1 2019-12-23 Alan Modra <amodra@gmail.com>
3 * iq2000.cpu (f-offset): Avoid left shift of negative values.
5 2019-12-20 Alan Modra <amodra@gmail.com>
7 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
9 2019-12-17 Alan Modra <amodra@gmail.com>
11 * bpf.cpu (f-imm64): Avoid signed overflow.
13 2019-12-16 Alan Modra <amodra@gmail.com>
15 * xstormy16.cpu (f-rel12a): Avoid signed overflow.
17 2019-12-11 Alan Modra <amodra@gmail.com>
19 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
20 * lm32.cpu (f-branch, f-vall): Likewise.
21 * m32.cpu (f-lab-8-16): Likewise.
23 2019-12-11 Alan Modra <amodra@gmail.com>
25 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
26 shift left to avoid UB on left shift of negative values.
28 2019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
30 * bpf.cpu: Fix comment describing the 128-bit instruction format.
32 2019-09-09 Phil Blundell <pb@pbcl.net>
34 binutils 2.33 branch created.
36 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
38 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
41 2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
43 * bpf.cpu (dlabs): New pmacro.
46 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
48 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
49 explicit 'dst' argument.
51 2019-06-13 Stafford Horne <shorne@gmail.com>
53 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
55 2019-06-13 Stafford Horne <shorne@gmail.com>
57 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
58 (l-adrp): Improve comment.
60 2019-06-13 Stafford Horne <shorne@gmail.com>
62 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
63 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
64 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
65 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
66 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
67 float-setflag-unordered-symantics): New pmacro for instruction
69 (float-setflag-insn): Update to use float-setflag-insn-base.
70 (float-setflag-unordered-insn): New pmacro for generating instructions.
72 2019-06-13 Andrey Bacherov <avbacherov@opencores.org>
73 Stafford Horne <shorne@gmail.com>
75 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
76 (ORFPX-MACHS): Removed pmacro.
77 * or1k.opc (or1k_cgen_insn_supported): New function.
78 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
79 (parse_regpair, print_regpair): New functions.
80 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
82 (h-fdr): Update comment to indicate or64.
83 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
84 (h-fd32r): New hardware for 64-bit fpu registers.
85 (h-i64r): New hardware for 64-bit int registers.
86 * or1korbis.cpu (f-resv-8-1): New field.
87 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
88 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
89 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
90 (h-roff1): New hardware.
91 (double-field-and-ops mnemonic): New pmacro to generate operations
92 rDD32F, rAD32F, rBD32F, rDDI and rADI.
93 (float-regreg-insn): Update single precision generator to MACH
94 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
95 (float-setflag-insn): Update single precision generator to MACH
96 ORFPX32-MACHS. Fix double instructions from single to double
97 precision. Add generator for or32 64-bit instructions.
98 (float-cust-insn cust-num): Update single precision generator to MACH
99 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
100 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
102 (lf-rem-d): Fix operation from mod to rem.
103 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
104 (lf-itof-d): Fix operands from single to double.
105 (lf-ftoi-d): Update operand mode from DI to WI.
107 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
112 2018-06-24 Nick Clifton <nickc@redhat.com>
116 2018-10-05 Richard Henderson <rth@twiddle.net>
117 Stafford Horne <shorne@gmail.com>
119 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
120 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
121 (l-mul): Fix overflow support and indentation.
122 (l-mulu): Fix overflow support and indentation.
123 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
124 (l-div); Remove incorrect carry behavior.
125 (l-divu): Fix carry and overflow behavior.
126 (l-mac): Add overflow support.
127 (l-msb, l-msbu): Add carry and overflow support.
129 2018-10-05 Richard Henderson <rth@twiddle.net>
131 * or1k.opc (parse_disp26): Add support for plta() relocations.
132 (parse_disp21): New function.
133 (or1k_rclass): New enum.
134 (or1k_rtype): New enum.
135 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
136 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
137 (parse_imm16): Add support for the new 21bit and 13bit relocations.
138 * or1korbis.cpu (f-disp26): Don't assume SI.
139 (f-disp21): New pc-relative 21-bit 13 shifted to right.
140 (insn-opcode): Add ADRP.
141 (l-adrp): New instruction.
143 2018-10-05 Richard Henderson <rth@twiddle.net>
145 * or1k.opc: Add RTYPE_ enum.
146 (INVALID_STORE_RELOC): New string.
147 (or1k_imm16_relocs): New array array.
148 (parse_reloc): New static function that just does the parsing.
149 (parse_imm16): New static function for generic parsing.
150 (parse_simm16): Change to just call parse_imm16.
151 (parse_simm16_split): New function.
152 (parse_uimm16): Change to call parse_imm16.
153 (parse_uimm16_split): New function.
154 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
155 (uimm16-split): Change to use new uimm16_split.
157 2018-07-24 Alan Modra <amodra@gmail.com>
160 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
162 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
164 * or1kcommon.cpu (spr-reg-info): Typo fix.
166 2018-03-03 Alan Modra <amodra@gmail.com>
168 * frv.opc: Include opintl.h.
169 (add_next_to_vliw): Use opcodes_error_handler to print error.
170 Standardize error message.
171 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
173 2018-01-13 Nick Clifton <nickc@redhat.com>
177 2017-03-15 Stafford Horne <shorne@gmail.com>
179 * or1kcommon.cpu: Add pc set semantics to also update ppc.
181 2016-10-06 Alan Modra <amodra@gmail.com>
183 * mep.opc (expand_string): Add fall through comment.
185 2016-03-03 Alan Modra <amodra@gmail.com>
187 * fr30.cpu (f-m4): Replace bogus comment with a better guess
188 at what is really going on.
190 2016-03-02 Alan Modra <amodra@gmail.com>
192 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
194 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
196 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
197 a constant to better align disassembler output.
199 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
201 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
203 2014-06-12 Alan Modra <amodra@gmail.com>
205 * or1k.opc: Whitespace fixes.
207 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
209 * or1korbis.cpu (h-atomic-reserve): New hardware.
210 (h-atomic-address): Likewise.
211 (insn-opcode): Add opcodes for LWA and SWA.
212 (atomic-reserve): New operand.
213 (atomic-address): Likewise.
214 (l-lwa, l-swa): New instructions.
215 (l-lbs): Fix typo in comment.
216 (store-insn): Clear atomic reserve on store to atomic-address.
217 Fix register names in fmt field.
219 2014-04-22 Christian Svensson <blue@cmd.nu>
221 * openrisc.cpu: Delete.
222 * openrisc.opc: Delete.
223 * or1k.cpu: New file.
224 * or1k.opc: New file.
225 * or1kcommon.cpu: New file.
226 * or1korbis.cpu: New file.
227 * or1korfpx.cpu: New file.
229 2013-12-07 Mike Frysinger <vapier@gentoo.org>
231 * epiphany.opc: Remove +x file mode.
233 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
236 * lm32.cpu (Control and status registers): Add CFG2, PSW,
237 TLBVADDR, TLBPADDR and TLBBADVADDR.
239 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
240 Joern Rennecke <joern.rennecke@embecosm.com>
242 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
243 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
244 (testset-insn): Add NO_DIS attribute to t.l.
245 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
246 (move-insns): Add NO-DIS attribute to cmov.l.
247 (op-mmr-movts): Add NO-DIS attribute to movts.l.
248 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
249 (op-rrr): Add NO-DIS attribute to .l.
250 (shift-rrr): Add NO-DIS attribute to .l.
251 (op-shift-rri): Add NO-DIS attribute to i32.l.
252 (bitrl, movtl): Add NO-DIS attribute.
253 (op-iextrrr): Add NO-DIS attribute to .l
254 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
255 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
257 2012-02-27 Alan Modra <amodra@gmail.com>
259 * mt.opc (print_dollarhex): Trim values to 32 bits.
261 2011-12-15 Nick Clifton <nickc@redhat.com>
263 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
266 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
268 * epiphany.opc (parse_branch_addr): Fix type of valuep.
269 Cast value before printing it as a long.
270 (parse_postindex): Fix type of valuep.
272 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
274 * cpu/epiphany.cpu: New file.
275 * cpu/epiphany.opc: New file.
277 2011-08-22 Nick Clifton <nickc@redhat.com>
279 * fr30.cpu: Newly contributed file.
280 * fr30.opc: Likewise.
281 * ip2k.cpu: Likewise.
282 * ip2k.opc: Likewise.
283 * mep-avc.cpu: Likewise.
284 * mep-avc2.cpu: Likewise.
285 * mep-c5.cpu: Likewise.
286 * mep-core.cpu: Likewise.
287 * mep-default.cpu: Likewise.
288 * mep-ext-cop.cpu: Likewise.
289 * mep-fmax.cpu: Likewise.
290 * mep-h1.cpu: Likewise.
291 * mep-ivc2.cpu: Likewise.
292 * mep-rhcop.cpu: Likewise.
293 * mep-sample-ucidsp.cpu: Likewise.
296 * openrisc.cpu: Likewise.
297 * openrisc.opc: Likewise.
298 * xstormy16.cpu: Likewise.
299 * xstormy16.opc: Likewise.
301 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
303 * frv.opc: #undef DEBUG.
305 2010-07-03 DJ Delorie <dj@delorie.com>
307 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
309 2010-02-11 Doug Evans <dje@sebabeach.org>
311 * m32r.cpu (HASH-PREFIX): Delete.
312 (duhpo, dshpo): New pmacros.
313 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
314 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
315 attribute, define with dshpo.
316 (uimm24): Delete HASH-PREFIX attribute.
317 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
318 (print_signed_with_hash_prefix): New function.
319 (print_unsigned_with_hash_prefix): New function.
320 * xc16x.cpu (dowh): New pmacro.
321 (upof16): Define with dowh, specify print handler.
322 (qbit, qlobit, qhibit): Ditto.
324 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
325 (print_with_dot_prefix): New functions.
326 (print_with_pof_prefix, print_with_pag_prefix): New functions.
328 2010-01-24 Doug Evans <dje@sebabeach.org>
330 * frv.cpu (floating-point-conversion): Update call to fp conv op.
331 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
332 conditional-floating-point-conversion, ne-floating-point-conversion,
333 float-parallel-mul-add-double-semantics): Ditto.
335 2010-01-05 Doug Evans <dje@sebabeach.org>
337 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
338 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
340 2010-01-02 Doug Evans <dje@sebabeach.org>
342 * m32c.opc (parse_signed16): Fix typo.
344 2009-12-11 Nick Clifton <nickc@redhat.com>
346 * frv.opc: Fix shadowed variable warnings.
347 * m32c.opc: Fix shadowed variable warnings.
349 2009-11-14 Doug Evans <dje@sebabeach.org>
351 Must use VOID expression in VOID context.
352 * xc16x.cpu (mov4): Fix mode of `sequence'.
353 (mov9, mov10): Ditto.
354 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
355 (callr, callseg, calls, trap, rets, reti): Ditto.
356 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
357 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
358 (exts, exts1, extsr, extsr1, prior): Ditto.
360 2009-10-23 Doug Evans <dje@sebabeach.org>
362 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
363 cgen-ops.h -> cgen/basic-ops.h.
365 2009-09-25 Alan Modra <amodra@bigpond.net.au>
367 * m32r.cpu (stb-plus): Typo fix.
369 2009-09-23 Doug Evans <dje@sebabeach.org>
371 * m32r.cpu (sth-plus): Fix address mode and calculation.
373 (clrpsw): Fix mask calculation.
374 (bset, bclr, btst): Make mode in bit calculation match expression.
376 * xc16x.cpu (rtl-version): Set to 0.8.
377 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
378 make uppercase. Remove unnecessary name-prefix spec.
379 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
380 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
381 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
382 (h-cr): New hardware.
383 (muls): Comment out parts that won't compile, add fixme.
384 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
385 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
386 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
388 2009-07-16 Doug Evans <dje@sebabeach.org>
390 * cpu/simplify.inc (*): One line doc strings don't need \n.
391 (df): Invoke define-full-ifield instead of claiming it's an alias.
393 (dnop): Mark as deprecated.
395 2009-06-22 Alan Modra <amodra@bigpond.net.au>
397 * m32c.opc (parse_lab_5_3): Use correct enum.
399 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
401 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
402 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
403 (media-arith-sat-semantics): Explicitly sign- or zero-extend
404 arguments of "operation" to DI using "mode" and the new pmacros.
406 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
408 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
411 2008-12-23 Jon Beniston <jon@beniston.com>
413 * lm32.cpu: New file.
414 * lm32.opc: New file.
416 2008-01-29 Alan Modra <amodra@bigpond.net.au>
418 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
421 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
423 * cris.cpu (movs, movu): Use result of extension operation when
426 2007-07-04 Nick Clifton <nickc@redhat.com>
428 * cris.cpu: Update copyright notice to refer to GPLv3.
429 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
430 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
431 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
433 * iq2000.cpu: Fix copyright notice to refer to FSF.
435 2007-04-30 Mark Salter <msalter@sadr.localdomain>
437 * frv.cpu (spr-names): Support new coprocessor SPR registers.
439 2007-04-20 Nick Clifton <nickc@redhat.com>
441 * xc16x.cpu: Restore after accidentally overwriting this file with
444 2007-03-29 DJ Delorie <dj@redhat.com>
446 * m32c.cpu (Imm-8-s4n): Fix print hook.
447 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
448 (arith-jnz-imm4-dst-defn): Make relaxable.
449 (arith-jnz16-imm4-dst-defn): Fix encodings.
451 2007-03-20 DJ Delorie <dj@redhat.com>
453 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
455 (src16-16-20-An-relative-*): New.
456 (dst16-*-20-An-relative-*): New.
457 (dst16-16-16sa-*): New
458 (dst16-16-16ar-*): New
459 (dst32-16-16sa-Unprefixed-*): New
460 (jsri): Fix operands.
461 (setzx): Fix encoding.
463 2007-03-08 Alan Modra <amodra@bigpond.net.au>
465 * m32r.opc: Formatting.
467 2006-05-22 Nick Clifton <nickc@redhat.com>
469 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
471 2006-04-10 DJ Delorie <dj@redhat.com>
473 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
474 decides if this function accepts symbolic constants or not.
475 (parse_signed_bitbase): Likewise.
476 (parse_unsigned_bitbase8): Pass the new parameter.
477 (parse_unsigned_bitbase11): Likewise.
478 (parse_unsigned_bitbase16): Likewise.
479 (parse_unsigned_bitbase19): Likewise.
480 (parse_unsigned_bitbase27): Likewise.
481 (parse_signed_bitbase8): Likewise.
482 (parse_signed_bitbase11): Likewise.
483 (parse_signed_bitbase19): Likewise.
485 2006-03-13 DJ Delorie <dj@redhat.com>
487 * m32c.cpu (Bit3-S): New.
489 * m32c.opc (parse_bit3_S): New.
491 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
492 (btst): Add optional :G suffix for MACH32.
494 (pop.w:G): Add optional :G suffix for MACH16.
495 (push.b.imm): Fix syntax.
497 2006-03-10 DJ Delorie <dj@redhat.com>
499 * m32c.cpu (mul.l): New.
502 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
504 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
505 an error message otherwise.
506 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
507 Fix up comments to correctly describe the functions.
509 2006-02-24 DJ Delorie <dj@redhat.com>
511 * m32c.cpu (RL_TYPE): New attribute, with macros.
512 (Lab-8-24): Add RELAX.
513 (unary-insn-defn-g, binary-arith-imm-dst-defn,
514 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
515 (binary-arith-src-dst-defn): Add 2ADDR attribute.
516 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
517 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
519 (jsri16, jsri32): Add 1ADDR attribute.
520 (jsr32.w, jsr32.a): Add JUMP attribute.
522 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
523 Anil Paranjape <anilp1@kpitcummins.com>
524 Shilin Shakti <shilins@kpitcummins.com>
526 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
528 * xc16x.opc: New file containing supporting XC16C routines.
530 2006-02-10 Nick Clifton <nickc@redhat.com>
532 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
534 2006-01-06 DJ Delorie <dj@redhat.com>
536 * m32c.cpu (mov.w:q): Fix mode.
537 (push32.b.imm): Likewise, for the comment.
539 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
541 Second part of ms1 to mt renaming.
542 * mt.cpu (define-arch, define-isa): Set name to mt.
543 (define-mach): Adjust.
544 * mt.opc (CGEN_ASM_HASH): Update.
545 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
546 (parse_loopsize, parse_imm16): Adjust.
548 2005-12-13 DJ Delorie <dj@redhat.com>
550 * m32c.cpu (jsri): Fix order so register names aren't treated as
552 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
553 indexwd, indexws): Fix encodings.
555 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
557 * mt.cpu: Rename from ms1.cpu.
558 * mt.opc: Rename from ms1.opc.
560 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
562 * cris.cpu (simplecris-common-writable-specregs)
563 (simplecris-common-readable-specregs): Split from
564 simplecris-common-specregs. All users changed.
565 (cris-implemented-writable-specregs-v0)
566 (cris-implemented-readable-specregs-v0): Similar from
567 cris-implemented-specregs-v0.
568 (cris-implemented-writable-specregs-v3)
569 (cris-implemented-readable-specregs-v3)
570 (cris-implemented-writable-specregs-v8)
571 (cris-implemented-readable-specregs-v8)
572 (cris-implemented-writable-specregs-v10)
573 (cris-implemented-readable-specregs-v10)
574 (cris-implemented-writable-specregs-v32)
575 (cris-implemented-readable-specregs-v32): Similar.
576 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
577 insns and specializations.
579 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
582 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
584 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
585 f-cb2incr, f-rc3): New fields.
586 (LOOP): New instruction.
587 (JAL-HAZARD): New hazard.
588 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
590 (mul, muli, dbnz, iflush): Enable for ms2
591 (jal, reti): Has JAL-HAZARD.
592 (ldctxt, ldfb, stfb): Only ms1.
593 (fbcb): Only ms1,ms1-003.
594 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
595 fbcbincrs, mfbcbincrs): Enable for ms2.
596 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
597 * ms1.opc (parse_loopsize): New.
598 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
601 2005-10-28 Dave Brolley <brolley@redhat.com>
603 Contribute the following change:
604 2003-09-24 Dave Brolley <brolley@redhat.com>
606 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
607 CGEN_ATTR_VALUE_TYPE.
608 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
609 Use cgen_bitset_intersect_p.
611 2005-10-27 DJ Delorie <dj@redhat.com>
613 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
614 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
615 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
616 imm operand is needed.
617 (adjnz, sbjnz): Pass the right operands.
618 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
619 unary-insn): Add -g variants for opcodes that need to support :G.
620 (not.BW:G, push.BW:G): Call it.
621 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
622 stzx16-imm8-imm8-abs16): Fix operand typos.
623 * m32c.opc (m32c_asm_hash): Support bnCND.
624 (parse_signed4n, print_signed4n): New.
626 2005-10-26 DJ Delorie <dj@redhat.com>
628 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
629 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
630 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
632 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
633 (mov.BW:S r0,r1): Fix typo r1l->r1.
634 (tst): Allow :G suffix.
635 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
637 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
639 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
641 2005-10-25 DJ Delorie <dj@redhat.com>
643 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
644 making one a macro of the other.
646 2005-10-21 DJ Delorie <dj@redhat.com>
648 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
649 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
650 indexld, indexls): .w variants have `1' bit.
651 (rot32.b): QI, not SI.
652 (rot32.w): HI, not SI.
653 (xchg16): HI for .w variant.
655 2005-10-19 Nick Clifton <nickc@redhat.com>
657 * m32r.opc (parse_slo16): Fix bad application of previous patch.
659 2005-10-18 Andreas Schwab <schwab@suse.de>
661 * m32r.opc (parse_slo16): Better version of previous patch.
663 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
665 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
668 2005-07-25 DJ Delorie <dj@redhat.com>
670 * m32c.opc (parse_unsigned8): Add %dsp8().
671 (parse_signed8): Add %hi8().
672 (parse_unsigned16): Add %dsp16().
673 (parse_signed16): Add %lo16() and %hi16().
674 (parse_lab_5_3): Make valuep a bfd_vma *.
676 2005-07-18 Nick Clifton <nickc@redhat.com>
678 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
680 (f-lab32-jmp-s): Fix insertion sequence.
681 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
682 (Dsp-40-s8): Make parameter be signed.
683 (Dsp-40-s16): Likewise.
684 (Dsp-48-s8): Likewise.
685 (Dsp-48-s16): Likewise.
686 (Imm-13-u3): Likewise. (Despite its name!)
687 (BitBase16-16-s8): Make the parameter be unsigned.
688 (BitBase16-8-u11-S): Likewise.
689 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
690 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
693 * m32c.opc: Fix formatting.
694 Use safe-ctype.h instead of ctype.h
695 Move duplicated code sequences into a macro.
696 Fix compile time warnings about signedness mismatches.
698 (parse_lab_5_3): New parser function.
700 2005-07-16 Jim Blandy <jimb@redhat.com>
702 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
703 to represent isa sets.
705 2005-07-15 Jim Blandy <jimb@redhat.com>
707 * m32c.cpu, m32c.opc: Fix copyright.
709 2005-07-14 Jim Blandy <jimb@redhat.com>
711 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
713 2005-07-14 Alan Modra <amodra@bigpond.net.au>
715 * ms1.opc (print_dollarhex): Correct format string.
717 2005-07-06 Alan Modra <amodra@bigpond.net.au>
719 * iq2000.cpu: Include from binutils cpu dir.
721 2005-07-05 Nick Clifton <nickc@redhat.com>
723 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
724 unsigned in order to avoid compile time warnings about sign
727 * ms1.opc (parse_*): Likewise.
728 (parse_imm16): Use a "void *" as it is passed both signed and
731 2005-07-01 Nick Clifton <nickc@redhat.com>
733 * frv.opc: Update to ISO C90 function declaration style.
734 * iq2000.opc: Likewise.
735 * m32r.opc: Likewise.
738 2005-06-15 Dave Brolley <brolley@redhat.com>
740 Contributed by Red Hat.
741 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
742 * ms1.opc: New file. Written by Stan Cox.
744 2005-05-10 Nick Clifton <nickc@redhat.com>
746 * Update the address and phone number of the FSF organization in
747 the GPL notices in the following files:
748 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
749 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
750 sh64-media.cpu, simplify.inc
752 2005-02-24 Alan Modra <amodra@bigpond.net.au>
754 * frv.opc (parse_A): Warning fix.
756 2005-02-23 Nick Clifton <nickc@redhat.com>
758 * frv.opc: Fixed compile time warnings about differing signed'ness
759 of pointers passed to functions.
760 * m32r.opc: Likewise.
762 2005-02-11 Nick Clifton <nickc@redhat.com>
764 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
765 'bfd_vma *' in order avoid compile time warning message.
767 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
769 * cris.cpu (mstep): Add missing insn.
771 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
773 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
774 * frv.cpu: Add support for TLS annotations in loads and calll.
775 * frv.opc (parse_symbolic_address): New.
776 (parse_ldd_annotation): New.
777 (parse_call_annotation): New.
778 (parse_ld_annotation): New.
779 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
780 Introduce TLS relocations.
781 (parse_d12, parse_s12, parse_u12): Likewise.
782 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
783 (parse_call_label, print_at): New.
785 2004-12-21 Mikael Starvik <starvik@axis.com>
787 * cris.cpu (cris-set-mem): Correct integral write semantics.
789 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
791 * cris.cpu: New file.
793 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
795 * iq2000.cpu: Added quotes around macro arguments so that they
796 will work with newer versions of guile.
798 2004-10-27 Nick Clifton <nickc@redhat.com>
800 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
801 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
803 * iq2000.cpu (dnop index): Rename to _index to avoid complications
806 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
808 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
810 2004-05-15 Nick Clifton <nickc@redhat.com>
812 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
814 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
816 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
818 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
820 * frv.cpu (define-arch frv): Add fr450 mach.
821 (define-mach fr450): New.
822 (define-model fr450): New. Add profile units to every fr450 insn.
823 (define-attr UNIT): Add MDCUTSSI.
824 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
825 (define-attr AUDIO): New boolean.
826 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
827 (f-LRA-null, f-TLBPR-null): New fields.
828 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
829 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
830 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
831 (LRA-null, TLBPR-null): New macros.
832 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
833 (load-real-address): New macro.
834 (lrai, lrad, tlbpr): New instructions.
835 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
836 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
837 (mdcutssi): Change UNIT attribute to MDCUTSSI.
838 (media-low-clear-semantics, media-scope-limit-semantics)
839 (media-quad-limit, media-quad-shift): New macros.
840 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
841 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
842 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
843 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
844 (fr450_unit_mapping): New array.
845 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
846 for new MDCUTSSI unit.
847 (fr450_check_insn_major_constraints): New function.
848 (check_insn_major_constraints): Use it.
850 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
852 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
853 (scutss): Change unit to I0.
854 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
855 (mqsaths): Fix FR400-MAJOR categorization.
856 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
857 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
858 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
861 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
863 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
864 (rstb, rsth, rst, rstd, rstq): Delete.
865 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
867 2004-02-23 Nick Clifton <nickc@redhat.com>
869 * Apply these patches from Renesas:
871 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
873 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
874 disassembling codes for 0x*2 addresses.
876 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
878 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
880 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
882 * cpu/m32r.cpu : Add new model m32r2.
883 Add new instructions.
884 Replace occurrances of 'Mitsubishi' with 'Renesas'.
885 Changed PIPE attr of push from O to OS.
886 Care for Little-endian of M32R.
887 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
888 Care for Little-endian of M32R.
889 (parse_slo16): signed extension for value.
891 2004-02-20 Andrew Cagney <cagney@redhat.com>
893 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
894 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
896 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
897 written by Ben Elliston.
899 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
901 * frv.cpu (UNIT): Add IACC.
902 (iacc-multiply-r-r): Use it.
903 * frv.opc (fr400_unit_mapping): Add entry for IACC.
904 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
906 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
908 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
909 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
910 cut&paste errors in shifting/truncating numerical operands.
911 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
912 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
913 (parse_uslo16): Likewise.
914 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
915 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
916 (parse_s12): Likewise.
917 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
918 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
919 (parse_uslo16): Likewise.
920 (parse_uhi16): Parse gothi and gotfuncdeschi.
921 (parse_d12): Parse got12 and gotfuncdesc12.
922 (parse_s12): Likewise.
924 2003-10-10 Dave Brolley <brolley@redhat.com>
926 * frv.cpu (dnpmop): New p-macro.
927 (GRdoublek): Use dnpmop.
928 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
929 (store-double-r-r): Use (.sym regtype doublek).
930 (r-store-double): Ditto.
931 (store-double-r-r-u): Ditto.
932 (conditional-store-double): Ditto.
933 (conditional-store-double-u): Ditto.
934 (store-double-r-simm): Ditto.
935 (fmovs): Assign to UNIT FMALL.
937 2003-10-06 Dave Brolley <brolley@redhat.com>
939 * frv.cpu, frv.opc: Add support for fr550.
941 2003-09-24 Dave Brolley <brolley@redhat.com>
943 * frv.cpu (u-commit): New modelling unit for fr500.
944 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
945 (commit-r): Use u-commit model for fr500.
947 (conditional-float-binary-op): Take profiling data as an argument.
949 (ne-float-binary-op): Ditto.
951 2003-09-19 Michael Snyder <msnyder@redhat.com>
953 * frv.cpu (nldqi): Delete unimplemented instruction.
955 2003-09-12 Dave Brolley <brolley@redhat.com>
957 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
958 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
959 frv_ref_SI to get input register referenced for profiling.
960 (clear-ne-flag-all): Pass insn profiling in as an argument.
961 (clrgr,clrfr,clrga,clrfa): Add profiling information.
963 2003-09-11 Michael Snyder <msnyder@redhat.com>
965 * frv.cpu: Typographical corrections.
967 2003-09-09 Dave Brolley <brolley@redhat.com>
969 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
970 (conditional-media-dual-complex, media-quad-complex): Likewise.
972 2003-09-04 Dave Brolley <brolley@redhat.com>
974 * frv.cpu (register-transfer): Pass in all attributes in on argument.
976 (conditional-register-transfer): Ditto.
977 (cache-preload): Ditto.
978 (floating-point-conversion): Ditto.
979 (floating-point-neg): Ditto.
981 (float-binary-op-s): Ditto.
982 (conditional-float-binary-op): Ditto.
983 (ne-float-binary-op): Ditto.
984 (float-dual-arith): Ditto.
985 (ne-float-dual-arith): Ditto.
987 2003-09-03 Dave Brolley <brolley@redhat.com>
989 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
990 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
992 (A): Removed operand.
993 (A0,A1): New operands replace operand A.
994 (mnop): Now a real insn
995 (mclracc): Removed insn.
996 (mclracc-0, mclracc-1): New insns replace mclracc.
997 (all insns): Use new UNIT attributes.
999 2003-08-21 Nick Clifton <nickc@redhat.com>
1001 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1002 and u-media-dual-btoh with output parameter.
1003 (cmbtoh): Add profiling hack.
1005 2003-08-19 Michael Snyder <msnyder@redhat.com>
1007 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1009 2003-06-10 Doug Evans <dje@sebabeach.org>
1011 * frv.cpu: Add IDOC attribute.
1013 2003-06-06 Andrew Cagney <cagney@redhat.com>
1015 Contributed by Red Hat.
1016 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1017 Stan Cox, and Frank Ch. Eigler.
1018 * iq2000.opc: New file. Written by Ben Elliston, Frank
1019 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1020 * iq2000m.cpu: New file. Written by Jeff Johnston.
1021 * iq10.cpu: New file. Written by Jeff Johnston.
1023 2003-06-05 Nick Clifton <nickc@redhat.com>
1025 * frv.cpu (FRintieven): New operand. An even-numbered only
1026 version of the FRinti operand.
1027 (FRintjeven): Likewise for FRintj.
1028 (FRintkeven): Likewise for FRintk.
1029 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1030 media-quad-arith-sat-semantics, media-quad-arith-sat,
1031 conditional-media-quad-arith-sat, mdunpackh,
1032 media-quad-multiply-semantics, media-quad-multiply,
1033 conditional-media-quad-multiply, media-quad-complex-i,
1034 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1035 conditional-media-quad-multiply-acc, munpackh,
1036 media-quad-multiply-cross-acc-semantics, mdpackh,
1037 media-quad-multiply-cross-acc, mbtoh-semantics,
1038 media-quad-cross-multiply-cross-acc-semantics,
1039 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1040 media-quad-cross-multiply-acc-semantics, cmbtoh,
1041 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1042 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1043 cmhtob): Use new operands.
1044 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1045 (parse_even_register): New function.
1047 2003-06-03 Nick Clifton <nickc@redhat.com>
1049 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1050 immediate value not unsigned.
1052 2003-06-03 Andrew Cagney <cagney@redhat.com>
1054 Contributed by Red Hat.
1055 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1056 and Eric Christopher.
1057 * frv.opc: New file. Written by Catherine Moore, and Dave
1059 * simplify.inc: New file. Written by Doug Evans.
1061 2003-05-02 Andrew Cagney <cagney@redhat.com>
1066 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1068 Copying and distribution of this file, with or without modification,
1069 are permitted in any medium without royalty provided the copyright
1070 notice and this notice are preserved.
1076 version-control: never