cpu/ChangeLog

   1 2020-02-01  Alan Modra  <amodra@gmail.com>
   2
   3         * frv.cpu (f-u12): Multiply rather than left shift signed values.
   4         (f-label16, f-label24): Likewise.
   5
   6 2020-01-30  Alan Modra  <amodra@gmail.com>
   7
   8         * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
   9         (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
  10         (f-dst32-rn-prefixed-QI): Likewise.
  11         (f-dsp-32-s32): Mask before shifting left.
  12         (f-dsp-48-u32, f-dsp-48-s32): Likewise.
  13         (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
  14         shifting left.
  15         (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
  16         (h-gr-SI): Mask before shifting.
  17
  18 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
  19
  20         * bpf.cpu (define-alu-insn-un): The unary BPF instructions
  21         (neg and neg32) use OP_SRC_K even if they operate only in
  22         registers.
  23
  24 2020-01-18  Nick Clifton  <nickc@redhat.com>
  25
  26         Binutils 2.34 branch created.
  27
  28 2020-01-13  Alan Modra  <amodra@gmail.com>
  29
  30         * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
  31         left shift signed values.
  32
  33 2020-01-06  Alan Modra  <amodra@gmail.com>
  34
  35         * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
  36         bits before shifting rather than masking after shifting.
  37         (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
  38         (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
  39         (f-dsp-64-u16, f-dsp-8-s24): Likewise.
  40         (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
  41
  42 2020-01-04  Alan Modra  <amodra@gmail.com>
  43
  44         * m32r.cpu (f-disp8): Avoid left shift of negative values.
  45         (f-disp16, f-disp24): Likewise.
  46
  47 2019-12-23  Alan Modra  <amodra@gmail.com>
  48
  49         * iq2000.cpu (f-offset): Avoid left shift of negative values.
  50
  51 2019-12-20  Alan Modra  <amodra@gmail.com>
  52
  53         * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
  54
  55 2019-12-17  Alan Modra  <amodra@gmail.com>
  56
  57         * bpf.cpu (f-imm64): Avoid signed overflow.
  58
  59 2019-12-16  Alan Modra  <amodra@gmail.com>
  60
  61         * xstormy16.cpu (f-rel12a): Avoid signed overflow.
  62
  63 2019-12-11  Alan Modra  <amodra@gmail.com>
  64
  65         * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
  66         * lm32.cpu (f-branch, f-vall): Likewise.
  67         * m32.cpu (f-lab-8-16): Likewise.
  68
  69 2019-12-11  Alan Modra  <amodra@gmail.com>
  70
  71         * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
  72         shift left to avoid UB on left shift of negative values.
  73
  74 2019-11-20  Jose E. Marchesi  <jose.marchesi@oracle.com>
  75
  76         * bpf.cpu: Fix comment describing the 128-bit instruction format.
  77
  78 2019-09-09  Phil Blundell  <pb@pbcl.net>
  79
  80         binutils 2.33 branch created.
  81
  82 2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
  83
  84         * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
  85         %a and %ctx.
  86
  87 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
  88
  89         * bpf.cpu (dlabs): New pmacro.
  90         (dlind): Likewise.
  91
  92 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
  93
  94         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
  95         explicit 'dst' argument.
  96
  97 2019-06-13  Stafford Horne  <shorne@gmail.com>
  98
  99         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
 100
 101 2019-06-13  Stafford Horne  <shorne@gmail.com>
 102
 103         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
 104         (l-adrp): Improve comment.
 105
 106 2019-06-13  Stafford Horne  <shorne@gmail.com>
 107
 108         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
 109         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
 110         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
 111         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
 112         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
 113         float-setflag-unordered-symantics): New pmacro for instruction
 114         symantics.
 115         (float-setflag-insn): Update to use float-setflag-insn-base.
 116         (float-setflag-unordered-insn): New pmacro for generating instructions.
 117
 118 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
 119             Stafford Horne  <shorne@gmail.com>
 120
 121         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
 122         (ORFPX-MACHS): Removed pmacro.
 123         * or1k.opc (or1k_cgen_insn_supported): New function.
 124         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
 125         (parse_regpair, print_regpair): New functions.
 126         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
 127         and add comments.
 128         (h-fdr): Update comment to indicate or64.
 129         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
 130         (h-fd32r): New hardware for 64-bit fpu registers.
 131         (h-i64r): New hardware for 64-bit int registers.
 132         * or1korbis.cpu (f-resv-8-1): New field.
 133         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
 134         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
 135         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
 136         (h-roff1): New hardware.
 137         (double-field-and-ops mnemonic): New pmacro to generate operations
 138         rDD32F, rAD32F, rBD32F, rDDI and rADI.
 139         (float-regreg-insn): Update single precision generator to MACH
 140         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 141         (float-setflag-insn): Update single precision generator to MACH
 142         ORFPX32-MACHS.  Fix double instructions from single to double
 143         precision.  Add generator for or32 64-bit instructions.
 144         (float-cust-insn cust-num): Update single precision generator to MACH
 145         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 146         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
 147         ORFPX32-MACHS.
 148         (lf-rem-d): Fix operation from mod to rem.
 149         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
 150         (lf-itof-d): Fix operands from single to double.
 151         (lf-ftoi-d): Update operand mode from DI to WI.
 152
 153 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
 154
 155         * bpf.cpu: New file.
 156         * bpf.opc: Likewise.
 157
 158 2018-06-24  Nick Clifton  <nickc@redhat.com>
 159
 160         2.32 branch created.
 161
 162 2018-10-05  Richard Henderson  <rth@twiddle.net>
 163             Stafford Horne  <shorne@gmail.com>
 164
 165         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
 166         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
 167         (l-mul): Fix overflow support and indentation.
 168         (l-mulu): Fix overflow support and indentation.
 169         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
 170         (l-div); Remove incorrect carry behavior.
 171         (l-divu): Fix carry and overflow behavior.
 172         (l-mac): Add overflow support.
 173         (l-msb, l-msbu): Add carry and overflow support.
 174
 175 2018-10-05  Richard Henderson  <rth@twiddle.net>
 176
 177         * or1k.opc (parse_disp26): Add support for plta() relocations.
 178         (parse_disp21): New function.
 179         (or1k_rclass): New enum.
 180         (or1k_rtype): New enum.
 181         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
 182         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
 183         (parse_imm16): Add support for the new 21bit and 13bit relocations.
 184         * or1korbis.cpu (f-disp26): Don't assume SI.
 185         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 186         (insn-opcode): Add ADRP.
 187         (l-adrp): New instruction.
 188
 189 2018-10-05  Richard Henderson  <rth@twiddle.net>
 190
 191         * or1k.opc: Add RTYPE_ enum.
 192         (INVALID_STORE_RELOC): New string.
 193         (or1k_imm16_relocs): New array array.
 194         (parse_reloc): New static function that just does the parsing.
 195         (parse_imm16): New static function for generic parsing.
 196         (parse_simm16): Change to just call parse_imm16.
 197         (parse_simm16_split): New function.
 198         (parse_uimm16): Change to call parse_imm16.
 199         (parse_uimm16_split): New function.
 200         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 201         (uimm16-split): Change to use new uimm16_split.
 202
 203 2018-07-24  Alan Modra  <amodra@gmail.com>
 204
 205         PR 23430
 206         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 207
 208 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 209
 210         * or1kcommon.cpu (spr-reg-info): Typo fix.
 211
 212 2018-03-03  Alan Modra  <amodra@gmail.com>
 213
 214         * frv.opc: Include opintl.h.
 215         (add_next_to_vliw): Use opcodes_error_handler to print error.
 216         Standardize error message.
 217         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 218
 219 2018-01-13  Nick Clifton  <nickc@redhat.com>
 220
 221         2.30 branch created.
 222
 223 2017-03-15  Stafford Horne  <shorne@gmail.com>
 224
 225         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 226
 227 2016-10-06  Alan Modra  <amodra@gmail.com>
 228
 229         * mep.opc (expand_string): Add fall through comment.
 230
 231 2016-03-03  Alan Modra  <amodra@gmail.com>
 232
 233         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 234         at what is really going on.
 235
 236 2016-03-02  Alan Modra  <amodra@gmail.com>
 237
 238         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 239
 240 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 241
 242         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 243         a constant to better align disassembler output.
 244
 245 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 246
 247         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 248
 249 2014-06-12  Alan Modra  <amodra@gmail.com>
 250
 251         * or1k.opc: Whitespace fixes.
 252
 253 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 254
 255         * or1korbis.cpu (h-atomic-reserve): New hardware.
 256         (h-atomic-address): Likewise.
 257         (insn-opcode): Add opcodes for LWA and SWA.
 258         (atomic-reserve): New operand.
 259         (atomic-address): Likewise.
 260         (l-lwa, l-swa): New instructions.
 261         (l-lbs): Fix typo in comment.
 262         (store-insn): Clear atomic reserve on store to atomic-address.
 263         Fix register names in fmt field.
 264
 265 2014-04-22  Christian Svensson  <blue@cmd.nu>
 266
 267         * openrisc.cpu: Delete.
 268         * openrisc.opc: Delete.
 269         * or1k.cpu: New file.
 270         * or1k.opc: New file.
 271         * or1kcommon.cpu: New file.
 272         * or1korbis.cpu: New file.
 273         * or1korfpx.cpu: New file.
 274
 275 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 276
 277         * epiphany.opc: Remove +x file mode.
 278
 279 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 280
 281         PR binutils/15241
 282         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 283         TLBVADDR, TLBPADDR and TLBBADVADDR.
 284
 285 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 286             Joern Rennecke  <joern.rennecke@embecosm.com>
 287
 288         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 289         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 290         (testset-insn): Add NO_DIS attribute to t.l.
 291         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 292         (move-insns): Add NO-DIS attribute to cmov.l.
 293         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 294         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 295         (op-rrr): Add NO-DIS attribute to .l.
 296         (shift-rrr): Add NO-DIS attribute to .l.
 297         (op-shift-rri): Add NO-DIS attribute to i32.l.
 298         (bitrl, movtl): Add NO-DIS attribute.
 299         (op-iextrrr): Add NO-DIS attribute to .l
 300         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 301         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 302
 303 2012-02-27  Alan Modra  <amodra@gmail.com>
 304
 305         * mt.opc (print_dollarhex): Trim values to 32 bits.
 306
 307 2011-12-15  Nick Clifton  <nickc@redhat.com>
 308
 309         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 310         hosts.
 311
 312 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 313
 314         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 315         Cast value before printing it as a long.
 316         (parse_postindex): Fix type of valuep.
 317
 318 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 319
 320         * cpu/epiphany.cpu: New file.
 321         * cpu/epiphany.opc: New file.
 322
 323 2011-08-22  Nick Clifton  <nickc@redhat.com>
 324
 325         * fr30.cpu: Newly contributed file.
 326         * fr30.opc: Likewise.
 327         * ip2k.cpu: Likewise.
 328         * ip2k.opc: Likewise.
 329         * mep-avc.cpu: Likewise.
 330         * mep-avc2.cpu: Likewise.
 331         * mep-c5.cpu: Likewise.
 332         * mep-core.cpu: Likewise.
 333         * mep-default.cpu: Likewise.
 334         * mep-ext-cop.cpu: Likewise.
 335         * mep-fmax.cpu: Likewise.
 336         * mep-h1.cpu: Likewise.
 337         * mep-ivc2.cpu: Likewise.
 338         * mep-rhcop.cpu: Likewise.
 339         * mep-sample-ucidsp.cpu: Likewise.
 340         * mep.cpu: Likewise.
 341         * mep.opc: Likewise.
 342         * openrisc.cpu: Likewise.
 343         * openrisc.opc: Likewise.
 344         * xstormy16.cpu: Likewise.
 345         * xstormy16.opc: Likewise.
 346
 347 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 348
 349         * frv.opc: #undef DEBUG.
 350
 351 2010-07-03  DJ Delorie  <dj@delorie.com>
 352
 353         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 354
 355 2010-02-11  Doug Evans  <dje@sebabeach.org>
 356
 357         * m32r.cpu (HASH-PREFIX): Delete.
 358         (duhpo, dshpo): New pmacros.
 359         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 360         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 361         attribute, define with dshpo.
 362         (uimm24): Delete HASH-PREFIX attribute.
 363         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 364         (print_signed_with_hash_prefix): New function.
 365         (print_unsigned_with_hash_prefix): New function.
 366         * xc16x.cpu (dowh): New pmacro.
 367         (upof16): Define with dowh, specify print handler.
 368         (qbit, qlobit, qhibit): Ditto.
 369         (upag16): Ditto.
 370         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 371         (print_with_dot_prefix): New functions.
 372         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 373
 374 2010-01-24  Doug Evans  <dje@sebabeach.org>
 375
 376         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 377         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 378         conditional-floating-point-conversion, ne-floating-point-conversion,
 379         float-parallel-mul-add-double-semantics): Ditto.
 380
 381 2010-01-05  Doug Evans  <dje@sebabeach.org>
 382
 383         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 384         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 385
 386 2010-01-02  Doug Evans  <dje@sebabeach.org>
 387
 388         * m32c.opc (parse_signed16): Fix typo.
 389
 390 2009-12-11  Nick Clifton  <nickc@redhat.com>
 391
 392         * frv.opc: Fix shadowed variable warnings.
 393         * m32c.opc: Fix shadowed variable warnings.
 394
 395 2009-11-14  Doug Evans  <dje@sebabeach.org>
 396
 397         Must use VOID expression in VOID context.
 398         * xc16x.cpu (mov4): Fix mode of `sequence'.
 399         (mov9, mov10): Ditto.
 400         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 401         (callr, callseg, calls, trap, rets, reti): Ditto.
 402         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 403         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 404         (exts, exts1, extsr, extsr1, prior): Ditto.
 405
 406 2009-10-23  Doug Evans  <dje@sebabeach.org>
 407
 408         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 409         cgen-ops.h -> cgen/basic-ops.h.
 410
 411 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 412
 413         * m32r.cpu (stb-plus): Typo fix.
 414
 415 2009-09-23  Doug Evans  <dje@sebabeach.org>
 416
 417         * m32r.cpu (sth-plus): Fix address mode and calculation.
 418         (stb-plus): Ditto.
 419         (clrpsw): Fix mask calculation.
 420         (bset, bclr, btst): Make mode in bit calculation match expression.
 421
 422         * xc16x.cpu (rtl-version): Set to 0.8.
 423         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 424         make uppercase.  Remove unnecessary name-prefix spec.
 425         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 426         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 427         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 428         (h-cr): New hardware.
 429         (muls): Comment out parts that won't compile, add fixme.
 430         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 431         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 432         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 433
 434 2009-07-16  Doug Evans  <dje@sebabeach.org>
 435
 436         * cpu/simplify.inc (*): One line doc strings don't need \n.
 437         (df): Invoke define-full-ifield instead of claiming it's an alias.
 438         (dno): Define.
 439         (dnop): Mark as deprecated.
 440
 441 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 442
 443         * m32c.opc (parse_lab_5_3): Use correct enum.
 444
 445 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 446
 447         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 448         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 449         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 450         arguments of "operation" to DI using "mode" and the new pmacros.
 451
 452 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 453
 454         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 455         of number 2, PID.
 456
 457 2008-12-23  Jon Beniston <jon@beniston.com>
 458
 459         * lm32.cpu: New file.
 460         * lm32.opc: New file.
 461
 462 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 463
 464         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 465         to source.
 466
 467 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 468
 469         * cris.cpu (movs, movu): Use result of extension operation when
 470         updating flags.
 471
 472 2007-07-04  Nick Clifton  <nickc@redhat.com>
 473
 474         * cris.cpu: Update copyright notice to refer to GPLv3.
 475         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 476         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 477         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 478         xc16x.opc: Likewise.
 479         * iq2000.cpu: Fix copyright notice to refer to FSF.
 480
 481 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 482
 483         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 484
 485 2007-04-20  Nick Clifton  <nickc@redhat.com>
 486
 487         * xc16x.cpu: Restore after accidentally overwriting this file with
 488         xc16x.opc.
 489
 490 2007-03-29  DJ Delorie  <dj@redhat.com>
 491
 492         * m32c.cpu (Imm-8-s4n): Fix print hook.
 493         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 494         (arith-jnz-imm4-dst-defn): Make relaxable.
 495         (arith-jnz16-imm4-dst-defn): Fix encodings.
 496
 497 2007-03-20  DJ Delorie  <dj@redhat.com>
 498
 499         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 500         mem20): New.
 501         (src16-16-20-An-relative-*): New.
 502         (dst16-*-20-An-relative-*): New.
 503         (dst16-16-16sa-*): New
 504         (dst16-16-16ar-*): New
 505         (dst32-16-16sa-Unprefixed-*): New
 506         (jsri): Fix operands.
 507         (setzx): Fix encoding.
 508
 509 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 510
 511         * m32r.opc: Formatting.
 512
 513 2006-05-22  Nick Clifton  <nickc@redhat.com>
 514
 515         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 516
 517 2006-04-10  DJ Delorie  <dj@redhat.com>
 518
 519         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 520         decides if this function accepts symbolic constants or not.
 521         (parse_signed_bitbase): Likewise.
 522         (parse_unsigned_bitbase8): Pass the new parameter.
 523         (parse_unsigned_bitbase11): Likewise.
 524         (parse_unsigned_bitbase16): Likewise.
 525         (parse_unsigned_bitbase19): Likewise.
 526         (parse_unsigned_bitbase27): Likewise.
 527         (parse_signed_bitbase8): Likewise.
 528         (parse_signed_bitbase11): Likewise.
 529         (parse_signed_bitbase19): Likewise.
 530
 531 2006-03-13  DJ Delorie  <dj@redhat.com>
 532
 533         * m32c.cpu (Bit3-S): New.
 534         (btst:s): New.
 535         * m32c.opc (parse_bit3_S): New.
 536
 537         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 538         (btst): Add optional :G suffix for MACH32.
 539         (or.b:S): New.
 540         (pop.w:G): Add optional :G suffix for MACH16.
 541         (push.b.imm): Fix syntax.
 542
 543 2006-03-10  DJ Delorie  <dj@redhat.com>
 544
 545         * m32c.cpu (mul.l): New.
 546         (mulu.l): New.
 547
 548 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 549
 550         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 551         an error message otherwise.
 552         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 553         Fix up comments to correctly describe the functions.
 554
 555 2006-02-24  DJ Delorie  <dj@redhat.com>
 556
 557         * m32c.cpu (RL_TYPE): New attribute, with macros.
 558         (Lab-8-24): Add RELAX.
 559         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 560         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 561         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 562         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 563         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 564         attribute.
 565         (jsri16, jsri32): Add 1ADDR attribute.
 566         (jsr32.w, jsr32.a): Add JUMP attribute.
 567
 568 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 569             Anil Paranjape   <anilp1@kpitcummins.com>
 570             Shilin Shakti    <shilins@kpitcummins.com>
 571
 572         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 573         description.
 574         * xc16x.opc: New file containing supporting XC16C routines.
 575
 576 2006-02-10  Nick Clifton  <nickc@redhat.com>
 577
 578         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 579
 580 2006-01-06  DJ Delorie  <dj@redhat.com>
 581
 582         * m32c.cpu (mov.w:q): Fix mode.
 583         (push32.b.imm): Likewise, for the comment.
 584
 585 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 586
 587         Second part of ms1 to mt renaming.
 588         * mt.cpu (define-arch, define-isa): Set name to mt.
 589         (define-mach): Adjust.
 590         * mt.opc (CGEN_ASM_HASH): Update.
 591         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 592         (parse_loopsize, parse_imm16): Adjust.
 593
 594 2005-12-13  DJ Delorie  <dj@redhat.com>
 595
 596         * m32c.cpu (jsri): Fix order so register names aren't treated as
 597         symbols.
 598         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 599         indexwd, indexws): Fix encodings.
 600
 601 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 602
 603         * mt.cpu: Rename from ms1.cpu.
 604         * mt.opc: Rename from ms1.opc.
 605
 606 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 607
 608         * cris.cpu (simplecris-common-writable-specregs)
 609         (simplecris-common-readable-specregs): Split from
 610         simplecris-common-specregs.  All users changed.
 611         (cris-implemented-writable-specregs-v0)
 612         (cris-implemented-readable-specregs-v0): Similar from
 613         cris-implemented-specregs-v0.
 614         (cris-implemented-writable-specregs-v3)
 615         (cris-implemented-readable-specregs-v3)
 616         (cris-implemented-writable-specregs-v8)
 617         (cris-implemented-readable-specregs-v8)
 618         (cris-implemented-writable-specregs-v10)
 619         (cris-implemented-readable-specregs-v10)
 620         (cris-implemented-writable-specregs-v32)
 621         (cris-implemented-readable-specregs-v32): Similar.
 622         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 623         insns and specializations.
 624
 625 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 626
 627         Add ms2
 628         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 629         model.
 630         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 631         f-cb2incr, f-rc3): New fields.
 632         (LOOP): New instruction.
 633         (JAL-HAZARD): New hazard.
 634         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 635         New operands.
 636         (mul, muli, dbnz, iflush): Enable for ms2
 637         (jal, reti): Has JAL-HAZARD.
 638         (ldctxt, ldfb, stfb): Only ms1.
 639         (fbcb): Only ms1,ms1-003.
 640         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 641         fbcbincrs, mfbcbincrs): Enable for ms2.
 642         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 643         * ms1.opc (parse_loopsize): New.
 644         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 645         (print_pcrel): New.
 646
 647 2005-10-28  Dave Brolley  <brolley@redhat.com>
 648
 649         Contribute the following change:
 650         2003-09-24  Dave Brolley  <brolley@redhat.com>
 651
 652         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 653         CGEN_ATTR_VALUE_TYPE.
 654         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 655         Use cgen_bitset_intersect_p.
 656
 657 2005-10-27  DJ Delorie  <dj@redhat.com>
 658
 659         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 660         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 661         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 662         imm operand is needed.
 663         (adjnz, sbjnz): Pass the right operands.
 664         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 665         unary-insn): Add -g variants for opcodes that need to support :G.
 666         (not.BW:G, push.BW:G): Call it.
 667         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 668         stzx16-imm8-imm8-abs16): Fix operand typos.
 669         * m32c.opc (m32c_asm_hash): Support bnCND.
 670         (parse_signed4n, print_signed4n): New.
 671
 672 2005-10-26  DJ Delorie  <dj@redhat.com>
 673
 674         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 675         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 676         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 677         dsp8[sp] is signed.
 678         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 679         (mov.BW:S r0,r1): Fix typo r1l->r1.
 680         (tst): Allow :G suffix.
 681         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 682
 683 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 684
 685         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 686
 687 2005-10-25  DJ Delorie  <dj@redhat.com>
 688
 689         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 690         making one a macro of the other.
 691
 692 2005-10-21  DJ Delorie  <dj@redhat.com>
 693
 694         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 695         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 696         indexld, indexls): .w variants have `1' bit.
 697         (rot32.b): QI, not SI.
 698         (rot32.w): HI, not SI.
 699         (xchg16): HI for .w variant.
 700
 701 2005-10-19  Nick Clifton  <nickc@redhat.com>
 702
 703         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 704
 705 2005-10-18  Andreas Schwab  <schwab@suse.de>
 706
 707         * m32r.opc (parse_slo16): Better version of previous patch.
 708
 709 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 710
 711         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 712         size.
 713
 714 2005-07-25  DJ Delorie  <dj@redhat.com>
 715
 716         * m32c.opc (parse_unsigned8): Add %dsp8().
 717         (parse_signed8): Add %hi8().
 718         (parse_unsigned16): Add %dsp16().
 719         (parse_signed16): Add %lo16() and %hi16().
 720         (parse_lab_5_3): Make valuep a bfd_vma *.
 721
 722 2005-07-18  Nick Clifton  <nickc@redhat.com>
 723
 724         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 725         components.
 726         (f-lab32-jmp-s): Fix insertion sequence.
 727         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 728         (Dsp-40-s8): Make parameter be signed.
 729         (Dsp-40-s16): Likewise.
 730         (Dsp-48-s8): Likewise.
 731         (Dsp-48-s16): Likewise.
 732         (Imm-13-u3): Likewise. (Despite its name!)
 733         (BitBase16-16-s8): Make the parameter be unsigned.
 734         (BitBase16-8-u11-S): Likewise.
 735         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 736         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 737         relaxation.
 738
 739         * m32c.opc: Fix formatting.
 740         Use safe-ctype.h instead of ctype.h
 741         Move duplicated code sequences into a macro.
 742         Fix compile time warnings about signedness mismatches.
 743         Remove dead code.
 744         (parse_lab_5_3): New parser function.
 745
 746 2005-07-16  Jim Blandy  <jimb@redhat.com>
 747
 748         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 749         to represent isa sets.
 750
 751 2005-07-15  Jim Blandy  <jimb@redhat.com>
 752
 753         * m32c.cpu, m32c.opc: Fix copyright.
 754
 755 2005-07-14  Jim Blandy  <jimb@redhat.com>
 756
 757         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 758
 759 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 760
 761         * ms1.opc (print_dollarhex): Correct format string.
 762
 763 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 764
 765         * iq2000.cpu: Include from binutils cpu dir.
 766
 767 2005-07-05  Nick Clifton  <nickc@redhat.com>
 768
 769         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 770         unsigned in order to avoid compile time warnings about sign
 771         conflicts.
 772
 773         * ms1.opc (parse_*): Likewise.
 774         (parse_imm16): Use a "void *" as it is passed both signed and
 775         unsigned arguments.
 776
 777 2005-07-01  Nick Clifton  <nickc@redhat.com>
 778
 779         * frv.opc: Update to ISO C90 function declaration style.
 780         * iq2000.opc: Likewise.
 781         * m32r.opc: Likewise.
 782         * sh.opc: Likewise.
 783
 784 2005-06-15  Dave Brolley  <brolley@redhat.com>
 785
 786         Contributed by Red Hat.
 787         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 788         * ms1.opc: New file.  Written by Stan Cox.
 789
 790 2005-05-10  Nick Clifton  <nickc@redhat.com>
 791
 792         * Update the address and phone number of the FSF organization in
 793         the GPL notices in the following files:
 794         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 795         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 796         sh64-media.cpu, simplify.inc
 797
 798 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 799
 800         * frv.opc (parse_A): Warning fix.
 801
 802 2005-02-23  Nick Clifton  <nickc@redhat.com>
 803
 804         * frv.opc: Fixed compile time warnings about differing signed'ness
 805         of pointers passed to functions.
 806         * m32r.opc: Likewise.
 807
 808 2005-02-11  Nick Clifton  <nickc@redhat.com>
 809
 810         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 811         'bfd_vma *' in order avoid compile time warning message.
 812
 813 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 814
 815         * cris.cpu (mstep): Add missing insn.
 816
 817 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 818
 819         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 820         * frv.cpu: Add support for TLS annotations in loads and calll.
 821         * frv.opc (parse_symbolic_address): New.
 822         (parse_ldd_annotation): New.
 823         (parse_call_annotation): New.
 824         (parse_ld_annotation): New.
 825         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 826         Introduce TLS relocations.
 827         (parse_d12, parse_s12, parse_u12): Likewise.
 828         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 829         (parse_call_label, print_at): New.
 830
 831 2004-12-21  Mikael Starvik  <starvik@axis.com>
 832
 833         * cris.cpu (cris-set-mem): Correct integral write semantics.
 834
 835 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 836
 837         * cris.cpu: New file.
 838
 839 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 840
 841         * iq2000.cpu: Added quotes around macro arguments so that they
 842         will work with newer versions of guile.
 843
 844 2004-10-27  Nick Clifton  <nickc@redhat.com>
 845
 846         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 847         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 848         operand.
 849         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 850         with guile.
 851
 852 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 853
 854         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 855
 856 2004-05-15  Nick Clifton  <nickc@redhat.com>
 857
 858         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 859
 860 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 861
 862         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 863
 864 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 865
 866         * frv.cpu (define-arch frv): Add fr450 mach.
 867         (define-mach fr450): New.
 868         (define-model fr450): New.  Add profile units to every fr450 insn.
 869         (define-attr UNIT): Add MDCUTSSI.
 870         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 871         (define-attr AUDIO): New boolean.
 872         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 873         (f-LRA-null, f-TLBPR-null): New fields.
 874         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 875         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 876         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 877         (LRA-null, TLBPR-null): New macros.
 878         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 879         (load-real-address): New macro.
 880         (lrai, lrad, tlbpr): New instructions.
 881         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 882         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 883         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 884         (media-low-clear-semantics, media-scope-limit-semantics)
 885         (media-quad-limit, media-quad-shift): New macros.
 886         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 887         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 888         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 889         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 890         (fr450_unit_mapping): New array.
 891         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 892         for new MDCUTSSI unit.
 893         (fr450_check_insn_major_constraints): New function.
 894         (check_insn_major_constraints): Use it.
 895
 896 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 897
 898         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 899         (scutss): Change unit to I0.
 900         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 901         (mqsaths): Fix FR400-MAJOR categorization.
 902         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 903         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 904         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 905         combinations.
 906
 907 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 908
 909         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 910         (rstb, rsth, rst, rstd, rstq): Delete.
 911         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 912
 913 2004-02-23  Nick Clifton  <nickc@redhat.com>
 914
 915         * Apply these patches from Renesas:
 916
 917         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 918
 919         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 920         disassembling codes for 0x*2 addresses.
 921
 922         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 923
 924         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 925
 926         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 927
 928         * cpu/m32r.cpu : Add new model m32r2.
 929         Add new instructions.
 930         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 931         Changed PIPE attr of push from O to OS.
 932         Care for Little-endian of M32R.
 933         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
 934         Care for Little-endian of M32R.
 935         (parse_slo16): signed extension for value.
 936
 937 2004-02-20  Andrew Cagney  <cagney@redhat.com>
 938
 939         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
 940         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
 941
 942         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
 943         written by Ben Elliston.
 944
 945 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 946
 947         * frv.cpu (UNIT): Add IACC.
 948         (iacc-multiply-r-r): Use it.
 949         * frv.opc (fr400_unit_mapping): Add entry for IACC.
 950         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
 951
 952 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 953
 954         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 955         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
 956         cut&paste errors in shifting/truncating numerical operands.
 957         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
 958         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 959         (parse_uslo16): Likewise.
 960         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 961         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 962         (parse_s12): Likewise.
 963         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 964         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
 965         (parse_uslo16): Likewise.
 966         (parse_uhi16): Parse gothi and gotfuncdeschi.
 967         (parse_d12): Parse got12 and gotfuncdesc12.
 968         (parse_s12): Likewise.
 969
 970 2003-10-10  Dave Brolley  <brolley@redhat.com>
 971
 972         * frv.cpu (dnpmop): New p-macro.
 973         (GRdoublek): Use dnpmop.
 974         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
 975         (store-double-r-r): Use (.sym regtype doublek).
 976         (r-store-double): Ditto.
 977         (store-double-r-r-u): Ditto.
 978         (conditional-store-double): Ditto.
 979         (conditional-store-double-u): Ditto.
 980         (store-double-r-simm): Ditto.
 981         (fmovs): Assign to UNIT FMALL.
 982
 983 2003-10-06  Dave Brolley  <brolley@redhat.com>
 984
 985         * frv.cpu, frv.opc: Add support for fr550.
 986
 987 2003-09-24  Dave Brolley  <brolley@redhat.com>
 988
 989         * frv.cpu (u-commit): New modelling unit for fr500.
 990         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
 991         (commit-r): Use u-commit model for fr500.
 992         (commit): Ditto.
 993         (conditional-float-binary-op): Take profiling data as an argument.
 994         Update callers.
 995         (ne-float-binary-op): Ditto.
 996
 997 2003-09-19  Michael Snyder  <msnyder@redhat.com>
 998
 999         * frv.cpu (nldqi): Delete unimplemented instruction.
1000
1001 2003-09-12  Dave Brolley  <brolley@redhat.com>
1002
1003         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1004         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1005         frv_ref_SI to get input register referenced for profiling.
1006         (clear-ne-flag-all): Pass insn profiling in as an argument.
1007         (clrgr,clrfr,clrga,clrfa): Add profiling information.
1008
1009 2003-09-11  Michael Snyder  <msnyder@redhat.com>
1010
1011         * frv.cpu: Typographical corrections.
1012
1013 2003-09-09  Dave Brolley  <brolley@redhat.com>
1014
1015         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1016         (conditional-media-dual-complex, media-quad-complex): Likewise.
1017
1018 2003-09-04  Dave Brolley  <brolley@redhat.com>
1019
1020         * frv.cpu (register-transfer): Pass in all attributes in on argument.
1021         Update all callers.
1022         (conditional-register-transfer): Ditto.
1023         (cache-preload): Ditto.
1024         (floating-point-conversion): Ditto.
1025         (floating-point-neg): Ditto.
1026         (float-abs): Ditto.
1027         (float-binary-op-s): Ditto.
1028         (conditional-float-binary-op): Ditto.
1029         (ne-float-binary-op): Ditto.
1030         (float-dual-arith): Ditto.
1031         (ne-float-dual-arith): Ditto.
1032
1033 2003-09-03  Dave Brolley  <brolley@redhat.com>
1034
1035         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1036         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1037         MCLRACC-1.
1038         (A): Removed operand.
1039         (A0,A1): New operands replace operand A.
1040         (mnop): Now a real insn
1041         (mclracc): Removed insn.
1042         (mclracc-0, mclracc-1): New insns replace mclracc.
1043         (all insns): Use new UNIT attributes.
1044
1045 2003-08-21  Nick Clifton  <nickc@redhat.com>
1046
1047         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1048         and u-media-dual-btoh with output parameter.
1049         (cmbtoh): Add profiling hack.
1050
1051 2003-08-19  Michael Snyder  <msnyder@redhat.com>
1052
1053         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1054
1055 2003-06-10  Doug Evans  <dje@sebabeach.org>
1056
1057         * frv.cpu: Add IDOC attribute.
1058
1059 2003-06-06  Andrew Cagney  <cagney@redhat.com>
1060
1061         Contributed by Red Hat.
1062         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
1063         Stan Cox, and Frank Ch. Eigler.
1064         * iq2000.opc: New file.  Written by Ben Elliston, Frank
1065         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1066         * iq2000m.cpu: New file.  Written by Jeff Johnston.
1067         * iq10.cpu: New file.  Written by Jeff Johnston.
1068
1069 2003-06-05  Nick Clifton  <nickc@redhat.com>
1070
1071         * frv.cpu (FRintieven): New operand.  An even-numbered only
1072         version of the FRinti operand.
1073         (FRintjeven): Likewise for FRintj.
1074         (FRintkeven): Likewise for FRintk.
1075         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1076         media-quad-arith-sat-semantics, media-quad-arith-sat,
1077         conditional-media-quad-arith-sat, mdunpackh,
1078         media-quad-multiply-semantics, media-quad-multiply,
1079         conditional-media-quad-multiply, media-quad-complex-i,
1080         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1081         conditional-media-quad-multiply-acc, munpackh,
1082         media-quad-multiply-cross-acc-semantics, mdpackh,
1083         media-quad-multiply-cross-acc, mbtoh-semantics,
1084         media-quad-cross-multiply-cross-acc-semantics,
1085         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1086         media-quad-cross-multiply-acc-semantics, cmbtoh,
1087         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1088         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1089         cmhtob): Use new operands.
1090         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1091         (parse_even_register): New function.
1092
1093 2003-06-03  Nick Clifton  <nickc@redhat.com>
1094
1095         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1096         immediate value not unsigned.
1097
1098 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1099
1100         Contributed by Red Hat.
1101         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1102         and Eric Christopher.
1103         * frv.opc: New file.  Written by Catherine Moore, and Dave
1104         Brolley.
1105         * simplify.inc: New file.  Written by Doug Evans.
1106
1107 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1108
1109         * New file.
1110
1111 \f
1112 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1113
1114 Copying and distribution of this file, with or without modification,
1115 are permitted in any medium without royalty provided the copyright
1116 notice and this notice are preserved.
1117
1118 Local Variables:
1119 mode: change-log
1120 left-margin: 8
1121 fill-column: 74
1122 version-control: never
1123 End: