1 2019-12-16 Alan Modra <amodra@gmail.com>
3 * xstormy16.cpu (f-rel12a): Avoid signed overflow.
5 2019-12-11 Alan Modra <amodra@gmail.com>
7 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
8 * lm32.cpu (f-branch, f-vall): Likewise.
9 * m32.cpu (f-lab-8-16): Likewise.
11 2019-12-11 Alan Modra <amodra@gmail.com>
13 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
14 shift left to avoid UB on left shift of negative values.
16 2019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
18 * bpf.cpu: Fix comment describing the 128-bit instruction format.
20 2019-09-09 Phil Blundell <pb@pbcl.net>
22 binutils 2.33 branch created.
24 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
26 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
29 2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
31 * bpf.cpu (dlabs): New pmacro.
34 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
36 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
37 explicit 'dst' argument.
39 2019-06-13 Stafford Horne <shorne@gmail.com>
41 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
43 2019-06-13 Stafford Horne <shorne@gmail.com>
45 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
46 (l-adrp): Improve comment.
48 2019-06-13 Stafford Horne <shorne@gmail.com>
50 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
51 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
52 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
53 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
54 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
55 float-setflag-unordered-symantics): New pmacro for instruction
57 (float-setflag-insn): Update to use float-setflag-insn-base.
58 (float-setflag-unordered-insn): New pmacro for generating instructions.
60 2019-06-13 Andrey Bacherov <avbacherov@opencores.org>
61 Stafford Horne <shorne@gmail.com>
63 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
64 (ORFPX-MACHS): Removed pmacro.
65 * or1k.opc (or1k_cgen_insn_supported): New function.
66 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
67 (parse_regpair, print_regpair): New functions.
68 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
70 (h-fdr): Update comment to indicate or64.
71 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
72 (h-fd32r): New hardware for 64-bit fpu registers.
73 (h-i64r): New hardware for 64-bit int registers.
74 * or1korbis.cpu (f-resv-8-1): New field.
75 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
76 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
77 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
78 (h-roff1): New hardware.
79 (double-field-and-ops mnemonic): New pmacro to generate operations
80 rDD32F, rAD32F, rBD32F, rDDI and rADI.
81 (float-regreg-insn): Update single precision generator to MACH
82 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
83 (float-setflag-insn): Update single precision generator to MACH
84 ORFPX32-MACHS. Fix double instructions from single to double
85 precision. Add generator for or32 64-bit instructions.
86 (float-cust-insn cust-num): Update single precision generator to MACH
87 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
88 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
90 (lf-rem-d): Fix operation from mod to rem.
91 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
92 (lf-itof-d): Fix operands from single to double.
93 (lf-ftoi-d): Update operand mode from DI to WI.
95 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
100 2018-06-24 Nick Clifton <nickc@redhat.com>
104 2018-10-05 Richard Henderson <rth@twiddle.net>
105 Stafford Horne <shorne@gmail.com>
107 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
108 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
109 (l-mul): Fix overflow support and indentation.
110 (l-mulu): Fix overflow support and indentation.
111 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
112 (l-div); Remove incorrect carry behavior.
113 (l-divu): Fix carry and overflow behavior.
114 (l-mac): Add overflow support.
115 (l-msb, l-msbu): Add carry and overflow support.
117 2018-10-05 Richard Henderson <rth@twiddle.net>
119 * or1k.opc (parse_disp26): Add support for plta() relocations.
120 (parse_disp21): New function.
121 (or1k_rclass): New enum.
122 (or1k_rtype): New enum.
123 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
124 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
125 (parse_imm16): Add support for the new 21bit and 13bit relocations.
126 * or1korbis.cpu (f-disp26): Don't assume SI.
127 (f-disp21): New pc-relative 21-bit 13 shifted to right.
128 (insn-opcode): Add ADRP.
129 (l-adrp): New instruction.
131 2018-10-05 Richard Henderson <rth@twiddle.net>
133 * or1k.opc: Add RTYPE_ enum.
134 (INVALID_STORE_RELOC): New string.
135 (or1k_imm16_relocs): New array array.
136 (parse_reloc): New static function that just does the parsing.
137 (parse_imm16): New static function for generic parsing.
138 (parse_simm16): Change to just call parse_imm16.
139 (parse_simm16_split): New function.
140 (parse_uimm16): Change to call parse_imm16.
141 (parse_uimm16_split): New function.
142 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
143 (uimm16-split): Change to use new uimm16_split.
145 2018-07-24 Alan Modra <amodra@gmail.com>
148 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
150 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
152 * or1kcommon.cpu (spr-reg-info): Typo fix.
154 2018-03-03 Alan Modra <amodra@gmail.com>
156 * frv.opc: Include opintl.h.
157 (add_next_to_vliw): Use opcodes_error_handler to print error.
158 Standardize error message.
159 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
161 2018-01-13 Nick Clifton <nickc@redhat.com>
165 2017-03-15 Stafford Horne <shorne@gmail.com>
167 * or1kcommon.cpu: Add pc set semantics to also update ppc.
169 2016-10-06 Alan Modra <amodra@gmail.com>
171 * mep.opc (expand_string): Add fall through comment.
173 2016-03-03 Alan Modra <amodra@gmail.com>
175 * fr30.cpu (f-m4): Replace bogus comment with a better guess
176 at what is really going on.
178 2016-03-02 Alan Modra <amodra@gmail.com>
180 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
182 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
184 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
185 a constant to better align disassembler output.
187 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
189 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
191 2014-06-12 Alan Modra <amodra@gmail.com>
193 * or1k.opc: Whitespace fixes.
195 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
197 * or1korbis.cpu (h-atomic-reserve): New hardware.
198 (h-atomic-address): Likewise.
199 (insn-opcode): Add opcodes for LWA and SWA.
200 (atomic-reserve): New operand.
201 (atomic-address): Likewise.
202 (l-lwa, l-swa): New instructions.
203 (l-lbs): Fix typo in comment.
204 (store-insn): Clear atomic reserve on store to atomic-address.
205 Fix register names in fmt field.
207 2014-04-22 Christian Svensson <blue@cmd.nu>
209 * openrisc.cpu: Delete.
210 * openrisc.opc: Delete.
211 * or1k.cpu: New file.
212 * or1k.opc: New file.
213 * or1kcommon.cpu: New file.
214 * or1korbis.cpu: New file.
215 * or1korfpx.cpu: New file.
217 2013-12-07 Mike Frysinger <vapier@gentoo.org>
219 * epiphany.opc: Remove +x file mode.
221 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
224 * lm32.cpu (Control and status registers): Add CFG2, PSW,
225 TLBVADDR, TLBPADDR and TLBBADVADDR.
227 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
228 Joern Rennecke <joern.rennecke@embecosm.com>
230 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
231 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
232 (testset-insn): Add NO_DIS attribute to t.l.
233 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
234 (move-insns): Add NO-DIS attribute to cmov.l.
235 (op-mmr-movts): Add NO-DIS attribute to movts.l.
236 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
237 (op-rrr): Add NO-DIS attribute to .l.
238 (shift-rrr): Add NO-DIS attribute to .l.
239 (op-shift-rri): Add NO-DIS attribute to i32.l.
240 (bitrl, movtl): Add NO-DIS attribute.
241 (op-iextrrr): Add NO-DIS attribute to .l
242 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
243 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
245 2012-02-27 Alan Modra <amodra@gmail.com>
247 * mt.opc (print_dollarhex): Trim values to 32 bits.
249 2011-12-15 Nick Clifton <nickc@redhat.com>
251 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
254 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
256 * epiphany.opc (parse_branch_addr): Fix type of valuep.
257 Cast value before printing it as a long.
258 (parse_postindex): Fix type of valuep.
260 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
262 * cpu/epiphany.cpu: New file.
263 * cpu/epiphany.opc: New file.
265 2011-08-22 Nick Clifton <nickc@redhat.com>
267 * fr30.cpu: Newly contributed file.
268 * fr30.opc: Likewise.
269 * ip2k.cpu: Likewise.
270 * ip2k.opc: Likewise.
271 * mep-avc.cpu: Likewise.
272 * mep-avc2.cpu: Likewise.
273 * mep-c5.cpu: Likewise.
274 * mep-core.cpu: Likewise.
275 * mep-default.cpu: Likewise.
276 * mep-ext-cop.cpu: Likewise.
277 * mep-fmax.cpu: Likewise.
278 * mep-h1.cpu: Likewise.
279 * mep-ivc2.cpu: Likewise.
280 * mep-rhcop.cpu: Likewise.
281 * mep-sample-ucidsp.cpu: Likewise.
284 * openrisc.cpu: Likewise.
285 * openrisc.opc: Likewise.
286 * xstormy16.cpu: Likewise.
287 * xstormy16.opc: Likewise.
289 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
291 * frv.opc: #undef DEBUG.
293 2010-07-03 DJ Delorie <dj@delorie.com>
295 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
297 2010-02-11 Doug Evans <dje@sebabeach.org>
299 * m32r.cpu (HASH-PREFIX): Delete.
300 (duhpo, dshpo): New pmacros.
301 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
302 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
303 attribute, define with dshpo.
304 (uimm24): Delete HASH-PREFIX attribute.
305 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
306 (print_signed_with_hash_prefix): New function.
307 (print_unsigned_with_hash_prefix): New function.
308 * xc16x.cpu (dowh): New pmacro.
309 (upof16): Define with dowh, specify print handler.
310 (qbit, qlobit, qhibit): Ditto.
312 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
313 (print_with_dot_prefix): New functions.
314 (print_with_pof_prefix, print_with_pag_prefix): New functions.
316 2010-01-24 Doug Evans <dje@sebabeach.org>
318 * frv.cpu (floating-point-conversion): Update call to fp conv op.
319 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
320 conditional-floating-point-conversion, ne-floating-point-conversion,
321 float-parallel-mul-add-double-semantics): Ditto.
323 2010-01-05 Doug Evans <dje@sebabeach.org>
325 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
326 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
328 2010-01-02 Doug Evans <dje@sebabeach.org>
330 * m32c.opc (parse_signed16): Fix typo.
332 2009-12-11 Nick Clifton <nickc@redhat.com>
334 * frv.opc: Fix shadowed variable warnings.
335 * m32c.opc: Fix shadowed variable warnings.
337 2009-11-14 Doug Evans <dje@sebabeach.org>
339 Must use VOID expression in VOID context.
340 * xc16x.cpu (mov4): Fix mode of `sequence'.
341 (mov9, mov10): Ditto.
342 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
343 (callr, callseg, calls, trap, rets, reti): Ditto.
344 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
345 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
346 (exts, exts1, extsr, extsr1, prior): Ditto.
348 2009-10-23 Doug Evans <dje@sebabeach.org>
350 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
351 cgen-ops.h -> cgen/basic-ops.h.
353 2009-09-25 Alan Modra <amodra@bigpond.net.au>
355 * m32r.cpu (stb-plus): Typo fix.
357 2009-09-23 Doug Evans <dje@sebabeach.org>
359 * m32r.cpu (sth-plus): Fix address mode and calculation.
361 (clrpsw): Fix mask calculation.
362 (bset, bclr, btst): Make mode in bit calculation match expression.
364 * xc16x.cpu (rtl-version): Set to 0.8.
365 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
366 make uppercase. Remove unnecessary name-prefix spec.
367 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
368 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
369 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
370 (h-cr): New hardware.
371 (muls): Comment out parts that won't compile, add fixme.
372 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
373 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
374 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
376 2009-07-16 Doug Evans <dje@sebabeach.org>
378 * cpu/simplify.inc (*): One line doc strings don't need \n.
379 (df): Invoke define-full-ifield instead of claiming it's an alias.
381 (dnop): Mark as deprecated.
383 2009-06-22 Alan Modra <amodra@bigpond.net.au>
385 * m32c.opc (parse_lab_5_3): Use correct enum.
387 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
389 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
390 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
391 (media-arith-sat-semantics): Explicitly sign- or zero-extend
392 arguments of "operation" to DI using "mode" and the new pmacros.
394 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
396 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
399 2008-12-23 Jon Beniston <jon@beniston.com>
401 * lm32.cpu: New file.
402 * lm32.opc: New file.
404 2008-01-29 Alan Modra <amodra@bigpond.net.au>
406 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
409 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
411 * cris.cpu (movs, movu): Use result of extension operation when
414 2007-07-04 Nick Clifton <nickc@redhat.com>
416 * cris.cpu: Update copyright notice to refer to GPLv3.
417 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
418 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
419 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
421 * iq2000.cpu: Fix copyright notice to refer to FSF.
423 2007-04-30 Mark Salter <msalter@sadr.localdomain>
425 * frv.cpu (spr-names): Support new coprocessor SPR registers.
427 2007-04-20 Nick Clifton <nickc@redhat.com>
429 * xc16x.cpu: Restore after accidentally overwriting this file with
432 2007-03-29 DJ Delorie <dj@redhat.com>
434 * m32c.cpu (Imm-8-s4n): Fix print hook.
435 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
436 (arith-jnz-imm4-dst-defn): Make relaxable.
437 (arith-jnz16-imm4-dst-defn): Fix encodings.
439 2007-03-20 DJ Delorie <dj@redhat.com>
441 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
443 (src16-16-20-An-relative-*): New.
444 (dst16-*-20-An-relative-*): New.
445 (dst16-16-16sa-*): New
446 (dst16-16-16ar-*): New
447 (dst32-16-16sa-Unprefixed-*): New
448 (jsri): Fix operands.
449 (setzx): Fix encoding.
451 2007-03-08 Alan Modra <amodra@bigpond.net.au>
453 * m32r.opc: Formatting.
455 2006-05-22 Nick Clifton <nickc@redhat.com>
457 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
459 2006-04-10 DJ Delorie <dj@redhat.com>
461 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
462 decides if this function accepts symbolic constants or not.
463 (parse_signed_bitbase): Likewise.
464 (parse_unsigned_bitbase8): Pass the new parameter.
465 (parse_unsigned_bitbase11): Likewise.
466 (parse_unsigned_bitbase16): Likewise.
467 (parse_unsigned_bitbase19): Likewise.
468 (parse_unsigned_bitbase27): Likewise.
469 (parse_signed_bitbase8): Likewise.
470 (parse_signed_bitbase11): Likewise.
471 (parse_signed_bitbase19): Likewise.
473 2006-03-13 DJ Delorie <dj@redhat.com>
475 * m32c.cpu (Bit3-S): New.
477 * m32c.opc (parse_bit3_S): New.
479 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
480 (btst): Add optional :G suffix for MACH32.
482 (pop.w:G): Add optional :G suffix for MACH16.
483 (push.b.imm): Fix syntax.
485 2006-03-10 DJ Delorie <dj@redhat.com>
487 * m32c.cpu (mul.l): New.
490 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
492 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
493 an error message otherwise.
494 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
495 Fix up comments to correctly describe the functions.
497 2006-02-24 DJ Delorie <dj@redhat.com>
499 * m32c.cpu (RL_TYPE): New attribute, with macros.
500 (Lab-8-24): Add RELAX.
501 (unary-insn-defn-g, binary-arith-imm-dst-defn,
502 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
503 (binary-arith-src-dst-defn): Add 2ADDR attribute.
504 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
505 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
507 (jsri16, jsri32): Add 1ADDR attribute.
508 (jsr32.w, jsr32.a): Add JUMP attribute.
510 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
511 Anil Paranjape <anilp1@kpitcummins.com>
512 Shilin Shakti <shilins@kpitcummins.com>
514 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
516 * xc16x.opc: New file containing supporting XC16C routines.
518 2006-02-10 Nick Clifton <nickc@redhat.com>
520 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
522 2006-01-06 DJ Delorie <dj@redhat.com>
524 * m32c.cpu (mov.w:q): Fix mode.
525 (push32.b.imm): Likewise, for the comment.
527 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
529 Second part of ms1 to mt renaming.
530 * mt.cpu (define-arch, define-isa): Set name to mt.
531 (define-mach): Adjust.
532 * mt.opc (CGEN_ASM_HASH): Update.
533 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
534 (parse_loopsize, parse_imm16): Adjust.
536 2005-12-13 DJ Delorie <dj@redhat.com>
538 * m32c.cpu (jsri): Fix order so register names aren't treated as
540 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
541 indexwd, indexws): Fix encodings.
543 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
545 * mt.cpu: Rename from ms1.cpu.
546 * mt.opc: Rename from ms1.opc.
548 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
550 * cris.cpu (simplecris-common-writable-specregs)
551 (simplecris-common-readable-specregs): Split from
552 simplecris-common-specregs. All users changed.
553 (cris-implemented-writable-specregs-v0)
554 (cris-implemented-readable-specregs-v0): Similar from
555 cris-implemented-specregs-v0.
556 (cris-implemented-writable-specregs-v3)
557 (cris-implemented-readable-specregs-v3)
558 (cris-implemented-writable-specregs-v8)
559 (cris-implemented-readable-specregs-v8)
560 (cris-implemented-writable-specregs-v10)
561 (cris-implemented-readable-specregs-v10)
562 (cris-implemented-writable-specregs-v32)
563 (cris-implemented-readable-specregs-v32): Similar.
564 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
565 insns and specializations.
567 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
570 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
572 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
573 f-cb2incr, f-rc3): New fields.
574 (LOOP): New instruction.
575 (JAL-HAZARD): New hazard.
576 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
578 (mul, muli, dbnz, iflush): Enable for ms2
579 (jal, reti): Has JAL-HAZARD.
580 (ldctxt, ldfb, stfb): Only ms1.
581 (fbcb): Only ms1,ms1-003.
582 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
583 fbcbincrs, mfbcbincrs): Enable for ms2.
584 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
585 * ms1.opc (parse_loopsize): New.
586 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
589 2005-10-28 Dave Brolley <brolley@redhat.com>
591 Contribute the following change:
592 2003-09-24 Dave Brolley <brolley@redhat.com>
594 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
595 CGEN_ATTR_VALUE_TYPE.
596 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
597 Use cgen_bitset_intersect_p.
599 2005-10-27 DJ Delorie <dj@redhat.com>
601 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
602 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
603 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
604 imm operand is needed.
605 (adjnz, sbjnz): Pass the right operands.
606 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
607 unary-insn): Add -g variants for opcodes that need to support :G.
608 (not.BW:G, push.BW:G): Call it.
609 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
610 stzx16-imm8-imm8-abs16): Fix operand typos.
611 * m32c.opc (m32c_asm_hash): Support bnCND.
612 (parse_signed4n, print_signed4n): New.
614 2005-10-26 DJ Delorie <dj@redhat.com>
616 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
617 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
618 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
620 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
621 (mov.BW:S r0,r1): Fix typo r1l->r1.
622 (tst): Allow :G suffix.
623 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
625 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
627 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
629 2005-10-25 DJ Delorie <dj@redhat.com>
631 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
632 making one a macro of the other.
634 2005-10-21 DJ Delorie <dj@redhat.com>
636 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
637 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
638 indexld, indexls): .w variants have `1' bit.
639 (rot32.b): QI, not SI.
640 (rot32.w): HI, not SI.
641 (xchg16): HI for .w variant.
643 2005-10-19 Nick Clifton <nickc@redhat.com>
645 * m32r.opc (parse_slo16): Fix bad application of previous patch.
647 2005-10-18 Andreas Schwab <schwab@suse.de>
649 * m32r.opc (parse_slo16): Better version of previous patch.
651 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
653 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
656 2005-07-25 DJ Delorie <dj@redhat.com>
658 * m32c.opc (parse_unsigned8): Add %dsp8().
659 (parse_signed8): Add %hi8().
660 (parse_unsigned16): Add %dsp16().
661 (parse_signed16): Add %lo16() and %hi16().
662 (parse_lab_5_3): Make valuep a bfd_vma *.
664 2005-07-18 Nick Clifton <nickc@redhat.com>
666 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
668 (f-lab32-jmp-s): Fix insertion sequence.
669 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
670 (Dsp-40-s8): Make parameter be signed.
671 (Dsp-40-s16): Likewise.
672 (Dsp-48-s8): Likewise.
673 (Dsp-48-s16): Likewise.
674 (Imm-13-u3): Likewise. (Despite its name!)
675 (BitBase16-16-s8): Make the parameter be unsigned.
676 (BitBase16-8-u11-S): Likewise.
677 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
678 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
681 * m32c.opc: Fix formatting.
682 Use safe-ctype.h instead of ctype.h
683 Move duplicated code sequences into a macro.
684 Fix compile time warnings about signedness mismatches.
686 (parse_lab_5_3): New parser function.
688 2005-07-16 Jim Blandy <jimb@redhat.com>
690 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
691 to represent isa sets.
693 2005-07-15 Jim Blandy <jimb@redhat.com>
695 * m32c.cpu, m32c.opc: Fix copyright.
697 2005-07-14 Jim Blandy <jimb@redhat.com>
699 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
701 2005-07-14 Alan Modra <amodra@bigpond.net.au>
703 * ms1.opc (print_dollarhex): Correct format string.
705 2005-07-06 Alan Modra <amodra@bigpond.net.au>
707 * iq2000.cpu: Include from binutils cpu dir.
709 2005-07-05 Nick Clifton <nickc@redhat.com>
711 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
712 unsigned in order to avoid compile time warnings about sign
715 * ms1.opc (parse_*): Likewise.
716 (parse_imm16): Use a "void *" as it is passed both signed and
719 2005-07-01 Nick Clifton <nickc@redhat.com>
721 * frv.opc: Update to ISO C90 function declaration style.
722 * iq2000.opc: Likewise.
723 * m32r.opc: Likewise.
726 2005-06-15 Dave Brolley <brolley@redhat.com>
728 Contributed by Red Hat.
729 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
730 * ms1.opc: New file. Written by Stan Cox.
732 2005-05-10 Nick Clifton <nickc@redhat.com>
734 * Update the address and phone number of the FSF organization in
735 the GPL notices in the following files:
736 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
737 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
738 sh64-media.cpu, simplify.inc
740 2005-02-24 Alan Modra <amodra@bigpond.net.au>
742 * frv.opc (parse_A): Warning fix.
744 2005-02-23 Nick Clifton <nickc@redhat.com>
746 * frv.opc: Fixed compile time warnings about differing signed'ness
747 of pointers passed to functions.
748 * m32r.opc: Likewise.
750 2005-02-11 Nick Clifton <nickc@redhat.com>
752 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
753 'bfd_vma *' in order avoid compile time warning message.
755 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
757 * cris.cpu (mstep): Add missing insn.
759 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
761 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
762 * frv.cpu: Add support for TLS annotations in loads and calll.
763 * frv.opc (parse_symbolic_address): New.
764 (parse_ldd_annotation): New.
765 (parse_call_annotation): New.
766 (parse_ld_annotation): New.
767 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
768 Introduce TLS relocations.
769 (parse_d12, parse_s12, parse_u12): Likewise.
770 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
771 (parse_call_label, print_at): New.
773 2004-12-21 Mikael Starvik <starvik@axis.com>
775 * cris.cpu (cris-set-mem): Correct integral write semantics.
777 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
779 * cris.cpu: New file.
781 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
783 * iq2000.cpu: Added quotes around macro arguments so that they
784 will work with newer versions of guile.
786 2004-10-27 Nick Clifton <nickc@redhat.com>
788 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
789 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
791 * iq2000.cpu (dnop index): Rename to _index to avoid complications
794 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
796 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
798 2004-05-15 Nick Clifton <nickc@redhat.com>
800 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
802 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
804 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
806 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
808 * frv.cpu (define-arch frv): Add fr450 mach.
809 (define-mach fr450): New.
810 (define-model fr450): New. Add profile units to every fr450 insn.
811 (define-attr UNIT): Add MDCUTSSI.
812 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
813 (define-attr AUDIO): New boolean.
814 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
815 (f-LRA-null, f-TLBPR-null): New fields.
816 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
817 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
818 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
819 (LRA-null, TLBPR-null): New macros.
820 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
821 (load-real-address): New macro.
822 (lrai, lrad, tlbpr): New instructions.
823 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
824 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
825 (mdcutssi): Change UNIT attribute to MDCUTSSI.
826 (media-low-clear-semantics, media-scope-limit-semantics)
827 (media-quad-limit, media-quad-shift): New macros.
828 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
829 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
830 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
831 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
832 (fr450_unit_mapping): New array.
833 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
834 for new MDCUTSSI unit.
835 (fr450_check_insn_major_constraints): New function.
836 (check_insn_major_constraints): Use it.
838 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
840 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
841 (scutss): Change unit to I0.
842 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
843 (mqsaths): Fix FR400-MAJOR categorization.
844 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
845 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
846 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
849 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
851 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
852 (rstb, rsth, rst, rstd, rstq): Delete.
853 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
855 2004-02-23 Nick Clifton <nickc@redhat.com>
857 * Apply these patches from Renesas:
859 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
861 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
862 disassembling codes for 0x*2 addresses.
864 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
866 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
868 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
870 * cpu/m32r.cpu : Add new model m32r2.
871 Add new instructions.
872 Replace occurrances of 'Mitsubishi' with 'Renesas'.
873 Changed PIPE attr of push from O to OS.
874 Care for Little-endian of M32R.
875 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
876 Care for Little-endian of M32R.
877 (parse_slo16): signed extension for value.
879 2004-02-20 Andrew Cagney <cagney@redhat.com>
881 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
882 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
884 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
885 written by Ben Elliston.
887 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
889 * frv.cpu (UNIT): Add IACC.
890 (iacc-multiply-r-r): Use it.
891 * frv.opc (fr400_unit_mapping): Add entry for IACC.
892 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
894 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
896 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
897 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
898 cut&paste errors in shifting/truncating numerical operands.
899 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
900 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
901 (parse_uslo16): Likewise.
902 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
903 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
904 (parse_s12): Likewise.
905 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
906 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
907 (parse_uslo16): Likewise.
908 (parse_uhi16): Parse gothi and gotfuncdeschi.
909 (parse_d12): Parse got12 and gotfuncdesc12.
910 (parse_s12): Likewise.
912 2003-10-10 Dave Brolley <brolley@redhat.com>
914 * frv.cpu (dnpmop): New p-macro.
915 (GRdoublek): Use dnpmop.
916 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
917 (store-double-r-r): Use (.sym regtype doublek).
918 (r-store-double): Ditto.
919 (store-double-r-r-u): Ditto.
920 (conditional-store-double): Ditto.
921 (conditional-store-double-u): Ditto.
922 (store-double-r-simm): Ditto.
923 (fmovs): Assign to UNIT FMALL.
925 2003-10-06 Dave Brolley <brolley@redhat.com>
927 * frv.cpu, frv.opc: Add support for fr550.
929 2003-09-24 Dave Brolley <brolley@redhat.com>
931 * frv.cpu (u-commit): New modelling unit for fr500.
932 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
933 (commit-r): Use u-commit model for fr500.
935 (conditional-float-binary-op): Take profiling data as an argument.
937 (ne-float-binary-op): Ditto.
939 2003-09-19 Michael Snyder <msnyder@redhat.com>
941 * frv.cpu (nldqi): Delete unimplemented instruction.
943 2003-09-12 Dave Brolley <brolley@redhat.com>
945 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
946 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
947 frv_ref_SI to get input register referenced for profiling.
948 (clear-ne-flag-all): Pass insn profiling in as an argument.
949 (clrgr,clrfr,clrga,clrfa): Add profiling information.
951 2003-09-11 Michael Snyder <msnyder@redhat.com>
953 * frv.cpu: Typographical corrections.
955 2003-09-09 Dave Brolley <brolley@redhat.com>
957 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
958 (conditional-media-dual-complex, media-quad-complex): Likewise.
960 2003-09-04 Dave Brolley <brolley@redhat.com>
962 * frv.cpu (register-transfer): Pass in all attributes in on argument.
964 (conditional-register-transfer): Ditto.
965 (cache-preload): Ditto.
966 (floating-point-conversion): Ditto.
967 (floating-point-neg): Ditto.
969 (float-binary-op-s): Ditto.
970 (conditional-float-binary-op): Ditto.
971 (ne-float-binary-op): Ditto.
972 (float-dual-arith): Ditto.
973 (ne-float-dual-arith): Ditto.
975 2003-09-03 Dave Brolley <brolley@redhat.com>
977 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
978 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
980 (A): Removed operand.
981 (A0,A1): New operands replace operand A.
982 (mnop): Now a real insn
983 (mclracc): Removed insn.
984 (mclracc-0, mclracc-1): New insns replace mclracc.
985 (all insns): Use new UNIT attributes.
987 2003-08-21 Nick Clifton <nickc@redhat.com>
989 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
990 and u-media-dual-btoh with output parameter.
991 (cmbtoh): Add profiling hack.
993 2003-08-19 Michael Snyder <msnyder@redhat.com>
995 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
997 2003-06-10 Doug Evans <dje@sebabeach.org>
999 * frv.cpu: Add IDOC attribute.
1001 2003-06-06 Andrew Cagney <cagney@redhat.com>
1003 Contributed by Red Hat.
1004 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1005 Stan Cox, and Frank Ch. Eigler.
1006 * iq2000.opc: New file. Written by Ben Elliston, Frank
1007 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1008 * iq2000m.cpu: New file. Written by Jeff Johnston.
1009 * iq10.cpu: New file. Written by Jeff Johnston.
1011 2003-06-05 Nick Clifton <nickc@redhat.com>
1013 * frv.cpu (FRintieven): New operand. An even-numbered only
1014 version of the FRinti operand.
1015 (FRintjeven): Likewise for FRintj.
1016 (FRintkeven): Likewise for FRintk.
1017 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1018 media-quad-arith-sat-semantics, media-quad-arith-sat,
1019 conditional-media-quad-arith-sat, mdunpackh,
1020 media-quad-multiply-semantics, media-quad-multiply,
1021 conditional-media-quad-multiply, media-quad-complex-i,
1022 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1023 conditional-media-quad-multiply-acc, munpackh,
1024 media-quad-multiply-cross-acc-semantics, mdpackh,
1025 media-quad-multiply-cross-acc, mbtoh-semantics,
1026 media-quad-cross-multiply-cross-acc-semantics,
1027 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1028 media-quad-cross-multiply-acc-semantics, cmbtoh,
1029 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1030 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1031 cmhtob): Use new operands.
1032 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1033 (parse_even_register): New function.
1035 2003-06-03 Nick Clifton <nickc@redhat.com>
1037 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1038 immediate value not unsigned.
1040 2003-06-03 Andrew Cagney <cagney@redhat.com>
1042 Contributed by Red Hat.
1043 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1044 and Eric Christopher.
1045 * frv.opc: New file. Written by Catherine Moore, and Dave
1047 * simplify.inc: New file. Written by Doug Evans.
1049 2003-05-02 Andrew Cagney <cagney@redhat.com>
1054 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1056 Copying and distribution of this file, with or without modification,
1057 are permitted in any medium without royalty provided the copyright
1058 notice and this notice are preserved.
1064 version-control: never