1 2019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
3 * bpf.cpu: Fix comment describing the 128-bit instruction format.
5 2019-09-09 Phil Blundell <pb@pbcl.net>
7 binutils 2.33 branch created.
9 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
11 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
14 2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
16 * bpf.cpu (dlabs): New pmacro.
19 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
21 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
22 explicit 'dst' argument.
24 2019-06-13 Stafford Horne <shorne@gmail.com>
26 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
28 2019-06-13 Stafford Horne <shorne@gmail.com>
30 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
31 (l-adrp): Improve comment.
33 2019-06-13 Stafford Horne <shorne@gmail.com>
35 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
36 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
37 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
38 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
39 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
40 float-setflag-unordered-symantics): New pmacro for instruction
42 (float-setflag-insn): Update to use float-setflag-insn-base.
43 (float-setflag-unordered-insn): New pmacro for generating instructions.
45 2019-06-13 Andrey Bacherov <avbacherov@opencores.org>
46 Stafford Horne <shorne@gmail.com>
48 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
49 (ORFPX-MACHS): Removed pmacro.
50 * or1k.opc (or1k_cgen_insn_supported): New function.
51 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
52 (parse_regpair, print_regpair): New functions.
53 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
55 (h-fdr): Update comment to indicate or64.
56 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
57 (h-fd32r): New hardware for 64-bit fpu registers.
58 (h-i64r): New hardware for 64-bit int registers.
59 * or1korbis.cpu (f-resv-8-1): New field.
60 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
61 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
62 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
63 (h-roff1): New hardware.
64 (double-field-and-ops mnemonic): New pmacro to generate operations
65 rDD32F, rAD32F, rBD32F, rDDI and rADI.
66 (float-regreg-insn): Update single precision generator to MACH
67 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
68 (float-setflag-insn): Update single precision generator to MACH
69 ORFPX32-MACHS. Fix double instructions from single to double
70 precision. Add generator for or32 64-bit instructions.
71 (float-cust-insn cust-num): Update single precision generator to MACH
72 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
73 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
75 (lf-rem-d): Fix operation from mod to rem.
76 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
77 (lf-itof-d): Fix operands from single to double.
78 (lf-ftoi-d): Update operand mode from DI to WI.
80 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
85 2018-06-24 Nick Clifton <nickc@redhat.com>
89 2018-10-05 Richard Henderson <rth@twiddle.net>
90 Stafford Horne <shorne@gmail.com>
92 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
93 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
94 (l-mul): Fix overflow support and indentation.
95 (l-mulu): Fix overflow support and indentation.
96 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
97 (l-div); Remove incorrect carry behavior.
98 (l-divu): Fix carry and overflow behavior.
99 (l-mac): Add overflow support.
100 (l-msb, l-msbu): Add carry and overflow support.
102 2018-10-05 Richard Henderson <rth@twiddle.net>
104 * or1k.opc (parse_disp26): Add support for plta() relocations.
105 (parse_disp21): New function.
106 (or1k_rclass): New enum.
107 (or1k_rtype): New enum.
108 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
109 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
110 (parse_imm16): Add support for the new 21bit and 13bit relocations.
111 * or1korbis.cpu (f-disp26): Don't assume SI.
112 (f-disp21): New pc-relative 21-bit 13 shifted to right.
113 (insn-opcode): Add ADRP.
114 (l-adrp): New instruction.
116 2018-10-05 Richard Henderson <rth@twiddle.net>
118 * or1k.opc: Add RTYPE_ enum.
119 (INVALID_STORE_RELOC): New string.
120 (or1k_imm16_relocs): New array array.
121 (parse_reloc): New static function that just does the parsing.
122 (parse_imm16): New static function for generic parsing.
123 (parse_simm16): Change to just call parse_imm16.
124 (parse_simm16_split): New function.
125 (parse_uimm16): Change to call parse_imm16.
126 (parse_uimm16_split): New function.
127 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
128 (uimm16-split): Change to use new uimm16_split.
130 2018-07-24 Alan Modra <amodra@gmail.com>
133 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
135 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
137 * or1kcommon.cpu (spr-reg-info): Typo fix.
139 2018-03-03 Alan Modra <amodra@gmail.com>
141 * frv.opc: Include opintl.h.
142 (add_next_to_vliw): Use opcodes_error_handler to print error.
143 Standardize error message.
144 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
146 2018-01-13 Nick Clifton <nickc@redhat.com>
150 2017-03-15 Stafford Horne <shorne@gmail.com>
152 * or1kcommon.cpu: Add pc set semantics to also update ppc.
154 2016-10-06 Alan Modra <amodra@gmail.com>
156 * mep.opc (expand_string): Add fall through comment.
158 2016-03-03 Alan Modra <amodra@gmail.com>
160 * fr30.cpu (f-m4): Replace bogus comment with a better guess
161 at what is really going on.
163 2016-03-02 Alan Modra <amodra@gmail.com>
165 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
167 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
169 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
170 a constant to better align disassembler output.
172 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
174 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
176 2014-06-12 Alan Modra <amodra@gmail.com>
178 * or1k.opc: Whitespace fixes.
180 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
182 * or1korbis.cpu (h-atomic-reserve): New hardware.
183 (h-atomic-address): Likewise.
184 (insn-opcode): Add opcodes for LWA and SWA.
185 (atomic-reserve): New operand.
186 (atomic-address): Likewise.
187 (l-lwa, l-swa): New instructions.
188 (l-lbs): Fix typo in comment.
189 (store-insn): Clear atomic reserve on store to atomic-address.
190 Fix register names in fmt field.
192 2014-04-22 Christian Svensson <blue@cmd.nu>
194 * openrisc.cpu: Delete.
195 * openrisc.opc: Delete.
196 * or1k.cpu: New file.
197 * or1k.opc: New file.
198 * or1kcommon.cpu: New file.
199 * or1korbis.cpu: New file.
200 * or1korfpx.cpu: New file.
202 2013-12-07 Mike Frysinger <vapier@gentoo.org>
204 * epiphany.opc: Remove +x file mode.
206 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
209 * lm32.cpu (Control and status registers): Add CFG2, PSW,
210 TLBVADDR, TLBPADDR and TLBBADVADDR.
212 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
213 Joern Rennecke <joern.rennecke@embecosm.com>
215 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
216 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
217 (testset-insn): Add NO_DIS attribute to t.l.
218 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
219 (move-insns): Add NO-DIS attribute to cmov.l.
220 (op-mmr-movts): Add NO-DIS attribute to movts.l.
221 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
222 (op-rrr): Add NO-DIS attribute to .l.
223 (shift-rrr): Add NO-DIS attribute to .l.
224 (op-shift-rri): Add NO-DIS attribute to i32.l.
225 (bitrl, movtl): Add NO-DIS attribute.
226 (op-iextrrr): Add NO-DIS attribute to .l
227 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
228 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
230 2012-02-27 Alan Modra <amodra@gmail.com>
232 * mt.opc (print_dollarhex): Trim values to 32 bits.
234 2011-12-15 Nick Clifton <nickc@redhat.com>
236 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
239 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
241 * epiphany.opc (parse_branch_addr): Fix type of valuep.
242 Cast value before printing it as a long.
243 (parse_postindex): Fix type of valuep.
245 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
247 * cpu/epiphany.cpu: New file.
248 * cpu/epiphany.opc: New file.
250 2011-08-22 Nick Clifton <nickc@redhat.com>
252 * fr30.cpu: Newly contributed file.
253 * fr30.opc: Likewise.
254 * ip2k.cpu: Likewise.
255 * ip2k.opc: Likewise.
256 * mep-avc.cpu: Likewise.
257 * mep-avc2.cpu: Likewise.
258 * mep-c5.cpu: Likewise.
259 * mep-core.cpu: Likewise.
260 * mep-default.cpu: Likewise.
261 * mep-ext-cop.cpu: Likewise.
262 * mep-fmax.cpu: Likewise.
263 * mep-h1.cpu: Likewise.
264 * mep-ivc2.cpu: Likewise.
265 * mep-rhcop.cpu: Likewise.
266 * mep-sample-ucidsp.cpu: Likewise.
269 * openrisc.cpu: Likewise.
270 * openrisc.opc: Likewise.
271 * xstormy16.cpu: Likewise.
272 * xstormy16.opc: Likewise.
274 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
276 * frv.opc: #undef DEBUG.
278 2010-07-03 DJ Delorie <dj@delorie.com>
280 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
282 2010-02-11 Doug Evans <dje@sebabeach.org>
284 * m32r.cpu (HASH-PREFIX): Delete.
285 (duhpo, dshpo): New pmacros.
286 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
287 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
288 attribute, define with dshpo.
289 (uimm24): Delete HASH-PREFIX attribute.
290 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
291 (print_signed_with_hash_prefix): New function.
292 (print_unsigned_with_hash_prefix): New function.
293 * xc16x.cpu (dowh): New pmacro.
294 (upof16): Define with dowh, specify print handler.
295 (qbit, qlobit, qhibit): Ditto.
297 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
298 (print_with_dot_prefix): New functions.
299 (print_with_pof_prefix, print_with_pag_prefix): New functions.
301 2010-01-24 Doug Evans <dje@sebabeach.org>
303 * frv.cpu (floating-point-conversion): Update call to fp conv op.
304 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
305 conditional-floating-point-conversion, ne-floating-point-conversion,
306 float-parallel-mul-add-double-semantics): Ditto.
308 2010-01-05 Doug Evans <dje@sebabeach.org>
310 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
311 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
313 2010-01-02 Doug Evans <dje@sebabeach.org>
315 * m32c.opc (parse_signed16): Fix typo.
317 2009-12-11 Nick Clifton <nickc@redhat.com>
319 * frv.opc: Fix shadowed variable warnings.
320 * m32c.opc: Fix shadowed variable warnings.
322 2009-11-14 Doug Evans <dje@sebabeach.org>
324 Must use VOID expression in VOID context.
325 * xc16x.cpu (mov4): Fix mode of `sequence'.
326 (mov9, mov10): Ditto.
327 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
328 (callr, callseg, calls, trap, rets, reti): Ditto.
329 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
330 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
331 (exts, exts1, extsr, extsr1, prior): Ditto.
333 2009-10-23 Doug Evans <dje@sebabeach.org>
335 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
336 cgen-ops.h -> cgen/basic-ops.h.
338 2009-09-25 Alan Modra <amodra@bigpond.net.au>
340 * m32r.cpu (stb-plus): Typo fix.
342 2009-09-23 Doug Evans <dje@sebabeach.org>
344 * m32r.cpu (sth-plus): Fix address mode and calculation.
346 (clrpsw): Fix mask calculation.
347 (bset, bclr, btst): Make mode in bit calculation match expression.
349 * xc16x.cpu (rtl-version): Set to 0.8.
350 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
351 make uppercase. Remove unnecessary name-prefix spec.
352 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
353 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
354 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
355 (h-cr): New hardware.
356 (muls): Comment out parts that won't compile, add fixme.
357 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
358 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
359 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
361 2009-07-16 Doug Evans <dje@sebabeach.org>
363 * cpu/simplify.inc (*): One line doc strings don't need \n.
364 (df): Invoke define-full-ifield instead of claiming it's an alias.
366 (dnop): Mark as deprecated.
368 2009-06-22 Alan Modra <amodra@bigpond.net.au>
370 * m32c.opc (parse_lab_5_3): Use correct enum.
372 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
374 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
375 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
376 (media-arith-sat-semantics): Explicitly sign- or zero-extend
377 arguments of "operation" to DI using "mode" and the new pmacros.
379 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
381 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
384 2008-12-23 Jon Beniston <jon@beniston.com>
386 * lm32.cpu: New file.
387 * lm32.opc: New file.
389 2008-01-29 Alan Modra <amodra@bigpond.net.au>
391 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
394 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
396 * cris.cpu (movs, movu): Use result of extension operation when
399 2007-07-04 Nick Clifton <nickc@redhat.com>
401 * cris.cpu: Update copyright notice to refer to GPLv3.
402 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
403 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
404 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
406 * iq2000.cpu: Fix copyright notice to refer to FSF.
408 2007-04-30 Mark Salter <msalter@sadr.localdomain>
410 * frv.cpu (spr-names): Support new coprocessor SPR registers.
412 2007-04-20 Nick Clifton <nickc@redhat.com>
414 * xc16x.cpu: Restore after accidentally overwriting this file with
417 2007-03-29 DJ Delorie <dj@redhat.com>
419 * m32c.cpu (Imm-8-s4n): Fix print hook.
420 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
421 (arith-jnz-imm4-dst-defn): Make relaxable.
422 (arith-jnz16-imm4-dst-defn): Fix encodings.
424 2007-03-20 DJ Delorie <dj@redhat.com>
426 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
428 (src16-16-20-An-relative-*): New.
429 (dst16-*-20-An-relative-*): New.
430 (dst16-16-16sa-*): New
431 (dst16-16-16ar-*): New
432 (dst32-16-16sa-Unprefixed-*): New
433 (jsri): Fix operands.
434 (setzx): Fix encoding.
436 2007-03-08 Alan Modra <amodra@bigpond.net.au>
438 * m32r.opc: Formatting.
440 2006-05-22 Nick Clifton <nickc@redhat.com>
442 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
444 2006-04-10 DJ Delorie <dj@redhat.com>
446 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
447 decides if this function accepts symbolic constants or not.
448 (parse_signed_bitbase): Likewise.
449 (parse_unsigned_bitbase8): Pass the new parameter.
450 (parse_unsigned_bitbase11): Likewise.
451 (parse_unsigned_bitbase16): Likewise.
452 (parse_unsigned_bitbase19): Likewise.
453 (parse_unsigned_bitbase27): Likewise.
454 (parse_signed_bitbase8): Likewise.
455 (parse_signed_bitbase11): Likewise.
456 (parse_signed_bitbase19): Likewise.
458 2006-03-13 DJ Delorie <dj@redhat.com>
460 * m32c.cpu (Bit3-S): New.
462 * m32c.opc (parse_bit3_S): New.
464 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
465 (btst): Add optional :G suffix for MACH32.
467 (pop.w:G): Add optional :G suffix for MACH16.
468 (push.b.imm): Fix syntax.
470 2006-03-10 DJ Delorie <dj@redhat.com>
472 * m32c.cpu (mul.l): New.
475 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
477 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
478 an error message otherwise.
479 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
480 Fix up comments to correctly describe the functions.
482 2006-02-24 DJ Delorie <dj@redhat.com>
484 * m32c.cpu (RL_TYPE): New attribute, with macros.
485 (Lab-8-24): Add RELAX.
486 (unary-insn-defn-g, binary-arith-imm-dst-defn,
487 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
488 (binary-arith-src-dst-defn): Add 2ADDR attribute.
489 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
490 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
492 (jsri16, jsri32): Add 1ADDR attribute.
493 (jsr32.w, jsr32.a): Add JUMP attribute.
495 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
496 Anil Paranjape <anilp1@kpitcummins.com>
497 Shilin Shakti <shilins@kpitcummins.com>
499 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
501 * xc16x.opc: New file containing supporting XC16C routines.
503 2006-02-10 Nick Clifton <nickc@redhat.com>
505 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
507 2006-01-06 DJ Delorie <dj@redhat.com>
509 * m32c.cpu (mov.w:q): Fix mode.
510 (push32.b.imm): Likewise, for the comment.
512 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
514 Second part of ms1 to mt renaming.
515 * mt.cpu (define-arch, define-isa): Set name to mt.
516 (define-mach): Adjust.
517 * mt.opc (CGEN_ASM_HASH): Update.
518 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
519 (parse_loopsize, parse_imm16): Adjust.
521 2005-12-13 DJ Delorie <dj@redhat.com>
523 * m32c.cpu (jsri): Fix order so register names aren't treated as
525 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
526 indexwd, indexws): Fix encodings.
528 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
530 * mt.cpu: Rename from ms1.cpu.
531 * mt.opc: Rename from ms1.opc.
533 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
535 * cris.cpu (simplecris-common-writable-specregs)
536 (simplecris-common-readable-specregs): Split from
537 simplecris-common-specregs. All users changed.
538 (cris-implemented-writable-specregs-v0)
539 (cris-implemented-readable-specregs-v0): Similar from
540 cris-implemented-specregs-v0.
541 (cris-implemented-writable-specregs-v3)
542 (cris-implemented-readable-specregs-v3)
543 (cris-implemented-writable-specregs-v8)
544 (cris-implemented-readable-specregs-v8)
545 (cris-implemented-writable-specregs-v10)
546 (cris-implemented-readable-specregs-v10)
547 (cris-implemented-writable-specregs-v32)
548 (cris-implemented-readable-specregs-v32): Similar.
549 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
550 insns and specializations.
552 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
555 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
557 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
558 f-cb2incr, f-rc3): New fields.
559 (LOOP): New instruction.
560 (JAL-HAZARD): New hazard.
561 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
563 (mul, muli, dbnz, iflush): Enable for ms2
564 (jal, reti): Has JAL-HAZARD.
565 (ldctxt, ldfb, stfb): Only ms1.
566 (fbcb): Only ms1,ms1-003.
567 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
568 fbcbincrs, mfbcbincrs): Enable for ms2.
569 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
570 * ms1.opc (parse_loopsize): New.
571 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
574 2005-10-28 Dave Brolley <brolley@redhat.com>
576 Contribute the following change:
577 2003-09-24 Dave Brolley <brolley@redhat.com>
579 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
580 CGEN_ATTR_VALUE_TYPE.
581 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
582 Use cgen_bitset_intersect_p.
584 2005-10-27 DJ Delorie <dj@redhat.com>
586 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
587 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
588 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
589 imm operand is needed.
590 (adjnz, sbjnz): Pass the right operands.
591 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
592 unary-insn): Add -g variants for opcodes that need to support :G.
593 (not.BW:G, push.BW:G): Call it.
594 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
595 stzx16-imm8-imm8-abs16): Fix operand typos.
596 * m32c.opc (m32c_asm_hash): Support bnCND.
597 (parse_signed4n, print_signed4n): New.
599 2005-10-26 DJ Delorie <dj@redhat.com>
601 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
602 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
603 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
605 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
606 (mov.BW:S r0,r1): Fix typo r1l->r1.
607 (tst): Allow :G suffix.
608 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
610 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
612 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
614 2005-10-25 DJ Delorie <dj@redhat.com>
616 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
617 making one a macro of the other.
619 2005-10-21 DJ Delorie <dj@redhat.com>
621 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
622 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
623 indexld, indexls): .w variants have `1' bit.
624 (rot32.b): QI, not SI.
625 (rot32.w): HI, not SI.
626 (xchg16): HI for .w variant.
628 2005-10-19 Nick Clifton <nickc@redhat.com>
630 * m32r.opc (parse_slo16): Fix bad application of previous patch.
632 2005-10-18 Andreas Schwab <schwab@suse.de>
634 * m32r.opc (parse_slo16): Better version of previous patch.
636 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
638 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
641 2005-07-25 DJ Delorie <dj@redhat.com>
643 * m32c.opc (parse_unsigned8): Add %dsp8().
644 (parse_signed8): Add %hi8().
645 (parse_unsigned16): Add %dsp16().
646 (parse_signed16): Add %lo16() and %hi16().
647 (parse_lab_5_3): Make valuep a bfd_vma *.
649 2005-07-18 Nick Clifton <nickc@redhat.com>
651 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
653 (f-lab32-jmp-s): Fix insertion sequence.
654 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
655 (Dsp-40-s8): Make parameter be signed.
656 (Dsp-40-s16): Likewise.
657 (Dsp-48-s8): Likewise.
658 (Dsp-48-s16): Likewise.
659 (Imm-13-u3): Likewise. (Despite its name!)
660 (BitBase16-16-s8): Make the parameter be unsigned.
661 (BitBase16-8-u11-S): Likewise.
662 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
663 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
666 * m32c.opc: Fix formatting.
667 Use safe-ctype.h instead of ctype.h
668 Move duplicated code sequences into a macro.
669 Fix compile time warnings about signedness mismatches.
671 (parse_lab_5_3): New parser function.
673 2005-07-16 Jim Blandy <jimb@redhat.com>
675 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
676 to represent isa sets.
678 2005-07-15 Jim Blandy <jimb@redhat.com>
680 * m32c.cpu, m32c.opc: Fix copyright.
682 2005-07-14 Jim Blandy <jimb@redhat.com>
684 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
686 2005-07-14 Alan Modra <amodra@bigpond.net.au>
688 * ms1.opc (print_dollarhex): Correct format string.
690 2005-07-06 Alan Modra <amodra@bigpond.net.au>
692 * iq2000.cpu: Include from binutils cpu dir.
694 2005-07-05 Nick Clifton <nickc@redhat.com>
696 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
697 unsigned in order to avoid compile time warnings about sign
700 * ms1.opc (parse_*): Likewise.
701 (parse_imm16): Use a "void *" as it is passed both signed and
704 2005-07-01 Nick Clifton <nickc@redhat.com>
706 * frv.opc: Update to ISO C90 function declaration style.
707 * iq2000.opc: Likewise.
708 * m32r.opc: Likewise.
711 2005-06-15 Dave Brolley <brolley@redhat.com>
713 Contributed by Red Hat.
714 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
715 * ms1.opc: New file. Written by Stan Cox.
717 2005-05-10 Nick Clifton <nickc@redhat.com>
719 * Update the address and phone number of the FSF organization in
720 the GPL notices in the following files:
721 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
722 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
723 sh64-media.cpu, simplify.inc
725 2005-02-24 Alan Modra <amodra@bigpond.net.au>
727 * frv.opc (parse_A): Warning fix.
729 2005-02-23 Nick Clifton <nickc@redhat.com>
731 * frv.opc: Fixed compile time warnings about differing signed'ness
732 of pointers passed to functions.
733 * m32r.opc: Likewise.
735 2005-02-11 Nick Clifton <nickc@redhat.com>
737 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
738 'bfd_vma *' in order avoid compile time warning message.
740 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
742 * cris.cpu (mstep): Add missing insn.
744 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
746 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
747 * frv.cpu: Add support for TLS annotations in loads and calll.
748 * frv.opc (parse_symbolic_address): New.
749 (parse_ldd_annotation): New.
750 (parse_call_annotation): New.
751 (parse_ld_annotation): New.
752 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
753 Introduce TLS relocations.
754 (parse_d12, parse_s12, parse_u12): Likewise.
755 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
756 (parse_call_label, print_at): New.
758 2004-12-21 Mikael Starvik <starvik@axis.com>
760 * cris.cpu (cris-set-mem): Correct integral write semantics.
762 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
764 * cris.cpu: New file.
766 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
768 * iq2000.cpu: Added quotes around macro arguments so that they
769 will work with newer versions of guile.
771 2004-10-27 Nick Clifton <nickc@redhat.com>
773 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
774 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
776 * iq2000.cpu (dnop index): Rename to _index to avoid complications
779 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
781 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
783 2004-05-15 Nick Clifton <nickc@redhat.com>
785 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
787 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
789 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
791 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
793 * frv.cpu (define-arch frv): Add fr450 mach.
794 (define-mach fr450): New.
795 (define-model fr450): New. Add profile units to every fr450 insn.
796 (define-attr UNIT): Add MDCUTSSI.
797 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
798 (define-attr AUDIO): New boolean.
799 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
800 (f-LRA-null, f-TLBPR-null): New fields.
801 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
802 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
803 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
804 (LRA-null, TLBPR-null): New macros.
805 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
806 (load-real-address): New macro.
807 (lrai, lrad, tlbpr): New instructions.
808 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
809 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
810 (mdcutssi): Change UNIT attribute to MDCUTSSI.
811 (media-low-clear-semantics, media-scope-limit-semantics)
812 (media-quad-limit, media-quad-shift): New macros.
813 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
814 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
815 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
816 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
817 (fr450_unit_mapping): New array.
818 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
819 for new MDCUTSSI unit.
820 (fr450_check_insn_major_constraints): New function.
821 (check_insn_major_constraints): Use it.
823 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
825 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
826 (scutss): Change unit to I0.
827 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
828 (mqsaths): Fix FR400-MAJOR categorization.
829 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
830 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
831 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
834 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
836 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
837 (rstb, rsth, rst, rstd, rstq): Delete.
838 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
840 2004-02-23 Nick Clifton <nickc@redhat.com>
842 * Apply these patches from Renesas:
844 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
846 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
847 disassembling codes for 0x*2 addresses.
849 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
851 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
853 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
855 * cpu/m32r.cpu : Add new model m32r2.
856 Add new instructions.
857 Replace occurrances of 'Mitsubishi' with 'Renesas'.
858 Changed PIPE attr of push from O to OS.
859 Care for Little-endian of M32R.
860 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
861 Care for Little-endian of M32R.
862 (parse_slo16): signed extension for value.
864 2004-02-20 Andrew Cagney <cagney@redhat.com>
866 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
867 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
869 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
870 written by Ben Elliston.
872 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
874 * frv.cpu (UNIT): Add IACC.
875 (iacc-multiply-r-r): Use it.
876 * frv.opc (fr400_unit_mapping): Add entry for IACC.
877 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
879 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
881 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
882 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
883 cut&paste errors in shifting/truncating numerical operands.
884 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
885 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
886 (parse_uslo16): Likewise.
887 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
888 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
889 (parse_s12): Likewise.
890 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
891 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
892 (parse_uslo16): Likewise.
893 (parse_uhi16): Parse gothi and gotfuncdeschi.
894 (parse_d12): Parse got12 and gotfuncdesc12.
895 (parse_s12): Likewise.
897 2003-10-10 Dave Brolley <brolley@redhat.com>
899 * frv.cpu (dnpmop): New p-macro.
900 (GRdoublek): Use dnpmop.
901 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
902 (store-double-r-r): Use (.sym regtype doublek).
903 (r-store-double): Ditto.
904 (store-double-r-r-u): Ditto.
905 (conditional-store-double): Ditto.
906 (conditional-store-double-u): Ditto.
907 (store-double-r-simm): Ditto.
908 (fmovs): Assign to UNIT FMALL.
910 2003-10-06 Dave Brolley <brolley@redhat.com>
912 * frv.cpu, frv.opc: Add support for fr550.
914 2003-09-24 Dave Brolley <brolley@redhat.com>
916 * frv.cpu (u-commit): New modelling unit for fr500.
917 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
918 (commit-r): Use u-commit model for fr500.
920 (conditional-float-binary-op): Take profiling data as an argument.
922 (ne-float-binary-op): Ditto.
924 2003-09-19 Michael Snyder <msnyder@redhat.com>
926 * frv.cpu (nldqi): Delete unimplemented instruction.
928 2003-09-12 Dave Brolley <brolley@redhat.com>
930 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
931 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
932 frv_ref_SI to get input register referenced for profiling.
933 (clear-ne-flag-all): Pass insn profiling in as an argument.
934 (clrgr,clrfr,clrga,clrfa): Add profiling information.
936 2003-09-11 Michael Snyder <msnyder@redhat.com>
938 * frv.cpu: Typographical corrections.
940 2003-09-09 Dave Brolley <brolley@redhat.com>
942 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
943 (conditional-media-dual-complex, media-quad-complex): Likewise.
945 2003-09-04 Dave Brolley <brolley@redhat.com>
947 * frv.cpu (register-transfer): Pass in all attributes in on argument.
949 (conditional-register-transfer): Ditto.
950 (cache-preload): Ditto.
951 (floating-point-conversion): Ditto.
952 (floating-point-neg): Ditto.
954 (float-binary-op-s): Ditto.
955 (conditional-float-binary-op): Ditto.
956 (ne-float-binary-op): Ditto.
957 (float-dual-arith): Ditto.
958 (ne-float-dual-arith): Ditto.
960 2003-09-03 Dave Brolley <brolley@redhat.com>
962 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
963 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
965 (A): Removed operand.
966 (A0,A1): New operands replace operand A.
967 (mnop): Now a real insn
968 (mclracc): Removed insn.
969 (mclracc-0, mclracc-1): New insns replace mclracc.
970 (all insns): Use new UNIT attributes.
972 2003-08-21 Nick Clifton <nickc@redhat.com>
974 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
975 and u-media-dual-btoh with output parameter.
976 (cmbtoh): Add profiling hack.
978 2003-08-19 Michael Snyder <msnyder@redhat.com>
980 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
982 2003-06-10 Doug Evans <dje@sebabeach.org>
984 * frv.cpu: Add IDOC attribute.
986 2003-06-06 Andrew Cagney <cagney@redhat.com>
988 Contributed by Red Hat.
989 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
990 Stan Cox, and Frank Ch. Eigler.
991 * iq2000.opc: New file. Written by Ben Elliston, Frank
992 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
993 * iq2000m.cpu: New file. Written by Jeff Johnston.
994 * iq10.cpu: New file. Written by Jeff Johnston.
996 2003-06-05 Nick Clifton <nickc@redhat.com>
998 * frv.cpu (FRintieven): New operand. An even-numbered only
999 version of the FRinti operand.
1000 (FRintjeven): Likewise for FRintj.
1001 (FRintkeven): Likewise for FRintk.
1002 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1003 media-quad-arith-sat-semantics, media-quad-arith-sat,
1004 conditional-media-quad-arith-sat, mdunpackh,
1005 media-quad-multiply-semantics, media-quad-multiply,
1006 conditional-media-quad-multiply, media-quad-complex-i,
1007 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1008 conditional-media-quad-multiply-acc, munpackh,
1009 media-quad-multiply-cross-acc-semantics, mdpackh,
1010 media-quad-multiply-cross-acc, mbtoh-semantics,
1011 media-quad-cross-multiply-cross-acc-semantics,
1012 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1013 media-quad-cross-multiply-acc-semantics, cmbtoh,
1014 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1015 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1016 cmhtob): Use new operands.
1017 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1018 (parse_even_register): New function.
1020 2003-06-03 Nick Clifton <nickc@redhat.com>
1022 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1023 immediate value not unsigned.
1025 2003-06-03 Andrew Cagney <cagney@redhat.com>
1027 Contributed by Red Hat.
1028 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1029 and Eric Christopher.
1030 * frv.opc: New file. Written by Catherine Moore, and Dave
1032 * simplify.inc: New file. Written by Doug Evans.
1034 2003-05-02 Andrew Cagney <cagney@redhat.com>
1039 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1041 Copying and distribution of this file, with or without modification,
1042 are permitted in any medium without royalty provided the copyright
1043 notice and this notice are preserved.
1049 version-control: never