* gdb.cp/annota2.exp ("watch triggered on a.x"): Allow arbitrary
[deliverable/binutils-gdb.git] / cpu / ChangeLog
1 2006-05-22 Nick Clifton <nickc@redhat.com>
2
3 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
4
5 2006-04-10 DJ Delorie <dj@redhat.com>
6
7 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
8 decides if this function accepts symbolic constants or not.
9 (parse_signed_bitbase): Likewise.
10 (parse_unsigned_bitbase8): Pass the new parameter.
11 (parse_unsigned_bitbase11): Likewise.
12 (parse_unsigned_bitbase16): Likewise.
13 (parse_unsigned_bitbase19): Likewise.
14 (parse_unsigned_bitbase27): Likewise.
15 (parse_signed_bitbase8): Likewise.
16 (parse_signed_bitbase11): Likewise.
17 (parse_signed_bitbase19): Likewise.
18
19 2006-03-13 DJ Delorie <dj@redhat.com>
20
21 * m32c.cpu (Bit3-S): New.
22 (btst:s): New.
23 * m32c.opc (parse_bit3_S): New.
24
25 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
26 (btst): Add optional :G suffix for MACH32.
27 (or.b:S): New.
28 (pop.w:G): Add optional :G suffix for MACH16.
29 (push.b.imm): Fix syntax.
30
31 2006-03-10 DJ Delorie <dj@redhat.com>
32
33 * m32c.cpu (mul.l): New.
34 (mulu.l): New.
35
36 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
37
38 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
39 an error message otherwise.
40 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
41 Fix up comments to correctly describe the functions.
42
43 2006-02-24 DJ Delorie <dj@redhat.com>
44
45 * m32c.cpu (RL_TYPE): New attribute, with macros.
46 (Lab-8-24): Add RELAX.
47 (unary-insn-defn-g, binary-arith-imm-dst-defn,
48 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
49 (binary-arith-src-dst-defn): Add 2ADDR attribute.
50 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
51 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
52 attribute.
53 (jsri16, jsri32): Add 1ADDR attribute.
54 (jsr32.w, jsr32.a): Add JUMP attribute.
55
56 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
57 Anil Paranjape <anilp1@kpitcummins.com>
58 Shilin Shakti <shilins@kpitcummins.com>
59
60 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
61 description.
62 * xc16x.opc: New file containing supporting XC16C routines.
63
64 2006-02-10 Nick Clifton <nickc@redhat.com>
65
66 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
67
68 2006-01-06 DJ Delorie <dj@redhat.com>
69
70 * m32c.cpu (mov.w:q): Fix mode.
71 (push32.b.imm): Likewise, for the comment.
72
73 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
74
75 Second part of ms1 to mt renaming.
76 * mt.cpu (define-arch, define-isa): Set name to mt.
77 (define-mach): Adjust.
78 * mt.opc (CGEN_ASM_HASH): Update.
79 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
80 (parse_loopsize, parse_imm16): Adjust.
81
82 2005-12-13 DJ Delorie <dj@redhat.com>
83
84 * m32c.cpu (jsri): Fix order so register names aren't treated as
85 symbols.
86 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
87 indexwd, indexws): Fix encodings.
88
89 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
90
91 * mt.cpu: Rename from ms1.cpu.
92 * mt.opc: Rename from ms1.opc.
93
94 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
95
96 * cris.cpu (simplecris-common-writable-specregs)
97 (simplecris-common-readable-specregs): Split from
98 simplecris-common-specregs. All users changed.
99 (cris-implemented-writable-specregs-v0)
100 (cris-implemented-readable-specregs-v0): Similar from
101 cris-implemented-specregs-v0.
102 (cris-implemented-writable-specregs-v3)
103 (cris-implemented-readable-specregs-v3)
104 (cris-implemented-writable-specregs-v8)
105 (cris-implemented-readable-specregs-v8)
106 (cris-implemented-writable-specregs-v10)
107 (cris-implemented-readable-specregs-v10)
108 (cris-implemented-writable-specregs-v32)
109 (cris-implemented-readable-specregs-v32): Similar.
110 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
111 insns and specializations.
112
113 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
114
115 Add ms2
116 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
117 model.
118 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
119 f-cb2incr, f-rc3): New fields.
120 (LOOP): New instruction.
121 (JAL-HAZARD): New hazard.
122 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
123 New operands.
124 (mul, muli, dbnz, iflush): Enable for ms2
125 (jal, reti): Has JAL-HAZARD.
126 (ldctxt, ldfb, stfb): Only ms1.
127 (fbcb): Only ms1,ms1-003.
128 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
129 fbcbincrs, mfbcbincrs): Enable for ms2.
130 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
131 * ms1.opc (parse_loopsize): New.
132 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
133 (print_pcrel): New.
134
135 2005-10-28 Dave Brolley <brolley@redhat.com>
136
137 Contribute the following change:
138 2003-09-24 Dave Brolley <brolley@redhat.com>
139
140 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
141 CGEN_ATTR_VALUE_TYPE.
142 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
143 Use cgen_bitset_intersect_p.
144
145 2005-10-27 DJ Delorie <dj@redhat.com>
146
147 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
148 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
149 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
150 imm operand is needed.
151 (adjnz, sbjnz): Pass the right operands.
152 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
153 unary-insn): Add -g variants for opcodes that need to support :G.
154 (not.BW:G, push.BW:G): Call it.
155 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
156 stzx16-imm8-imm8-abs16): Fix operand typos.
157 * m32c.opc (m32c_asm_hash): Support bnCND.
158 (parse_signed4n, print_signed4n): New.
159
160 2005-10-26 DJ Delorie <dj@redhat.com>
161
162 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
163 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
164 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
165 dsp8[sp] is signed.
166 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
167 (mov.BW:S r0,r1): Fix typo r1l->r1.
168 (tst): Allow :G suffix.
169 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
170
171 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
172
173 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
174
175 2005-10-25 DJ Delorie <dj@redhat.com>
176
177 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
178 making one a macro of the other.
179
180 2005-10-21 DJ Delorie <dj@redhat.com>
181
182 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
183 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
184 indexld, indexls): .w variants have `1' bit.
185 (rot32.b): QI, not SI.
186 (rot32.w): HI, not SI.
187 (xchg16): HI for .w variant.
188
189 2005-10-19 Nick Clifton <nickc@redhat.com>
190
191 * m32r.opc (parse_slo16): Fix bad application of previous patch.
192
193 2005-10-18 Andreas Schwab <schwab@suse.de>
194
195 * m32r.opc (parse_slo16): Better version of previous patch.
196
197 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
198
199 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
200 size.
201
202 2005-07-25 DJ Delorie <dj@redhat.com>
203
204 * m32c.opc (parse_unsigned8): Add %dsp8().
205 (parse_signed8): Add %hi8().
206 (parse_unsigned16): Add %dsp16().
207 (parse_signed16): Add %lo16() and %hi16().
208 (parse_lab_5_3): Make valuep a bfd_vma *.
209
210 2005-07-18 Nick Clifton <nickc@redhat.com>
211
212 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
213 components.
214 (f-lab32-jmp-s): Fix insertion sequence.
215 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
216 (Dsp-40-s8): Make parameter be signed.
217 (Dsp-40-s16): Likewise.
218 (Dsp-48-s8): Likewise.
219 (Dsp-48-s16): Likewise.
220 (Imm-13-u3): Likewise. (Despite its name!)
221 (BitBase16-16-s8): Make the parameter be unsigned.
222 (BitBase16-8-u11-S): Likewise.
223 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
224 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
225 relaxation.
226
227 * m32c.opc: Fix formatting.
228 Use safe-ctype.h instead of ctype.h
229 Move duplicated code sequences into a macro.
230 Fix compile time warnings about signedness mismatches.
231 Remove dead code.
232 (parse_lab_5_3): New parser function.
233
234 2005-07-16 Jim Blandy <jimb@redhat.com>
235
236 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
237 to represent isa sets.
238
239 2005-07-15 Jim Blandy <jimb@redhat.com>
240
241 * m32c.cpu, m32c.opc: Fix copyright.
242
243 2005-07-14 Jim Blandy <jimb@redhat.com>
244
245 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
246
247 2005-07-14 Alan Modra <amodra@bigpond.net.au>
248
249 * ms1.opc (print_dollarhex): Correct format string.
250
251 2005-07-06 Alan Modra <amodra@bigpond.net.au>
252
253 * iq2000.cpu: Include from binutils cpu dir.
254
255 2005-07-05 Nick Clifton <nickc@redhat.com>
256
257 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
258 unsigned in order to avoid compile time warnings about sign
259 conflicts.
260
261 * ms1.opc (parse_*): Likewise.
262 (parse_imm16): Use a "void *" as it is passed both signed and
263 unsigned arguments.
264
265 2005-07-01 Nick Clifton <nickc@redhat.com>
266
267 * frv.opc: Update to ISO C90 function declaration style.
268 * iq2000.opc: Likewise.
269 * m32r.opc: Likewise.
270 * sh.opc: Likewise.
271
272 2005-06-15 Dave Brolley <brolley@redhat.com>
273
274 Contributed by Red Hat.
275 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
276 * ms1.opc: New file. Written by Stan Cox.
277
278 2005-05-10 Nick Clifton <nickc@redhat.com>
279
280 * Update the address and phone number of the FSF organization in
281 the GPL notices in the following files:
282 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
283 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
284 sh64-media.cpu, simplify.inc
285
286 2005-02-24 Alan Modra <amodra@bigpond.net.au>
287
288 * frv.opc (parse_A): Warning fix.
289
290 2005-02-23 Nick Clifton <nickc@redhat.com>
291
292 * frv.opc: Fixed compile time warnings about differing signed'ness
293 of pointers passed to functions.
294 * m32r.opc: Likewise.
295
296 2005-02-11 Nick Clifton <nickc@redhat.com>
297
298 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
299 'bfd_vma *' in order avoid compile time warning message.
300
301 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
302
303 * cris.cpu (mstep): Add missing insn.
304
305 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
306
307 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
308 * frv.cpu: Add support for TLS annotations in loads and calll.
309 * frv.opc (parse_symbolic_address): New.
310 (parse_ldd_annotation): New.
311 (parse_call_annotation): New.
312 (parse_ld_annotation): New.
313 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
314 Introduce TLS relocations.
315 (parse_d12, parse_s12, parse_u12): Likewise.
316 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
317 (parse_call_label, print_at): New.
318
319 2004-12-21 Mikael Starvik <starvik@axis.com>
320
321 * cris.cpu (cris-set-mem): Correct integral write semantics.
322
323 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
324
325 * cris.cpu: New file.
326
327 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
328
329 * iq2000.cpu: Added quotes around macro arguments so that they
330 will work with newer versions of guile.
331
332 2004-10-27 Nick Clifton <nickc@redhat.com>
333
334 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
335 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
336 operand.
337 * iq2000.cpu (dnop index): Rename to _index to avoid complications
338 with guile.
339
340 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
341
342 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
343
344 2004-05-15 Nick Clifton <nickc@redhat.com>
345
346 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
347
348 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
349
350 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
351
352 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
353
354 * frv.cpu (define-arch frv): Add fr450 mach.
355 (define-mach fr450): New.
356 (define-model fr450): New. Add profile units to every fr450 insn.
357 (define-attr UNIT): Add MDCUTSSI.
358 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
359 (define-attr AUDIO): New boolean.
360 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
361 (f-LRA-null, f-TLBPR-null): New fields.
362 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
363 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
364 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
365 (LRA-null, TLBPR-null): New macros.
366 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
367 (load-real-address): New macro.
368 (lrai, lrad, tlbpr): New instructions.
369 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
370 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
371 (mdcutssi): Change UNIT attribute to MDCUTSSI.
372 (media-low-clear-semantics, media-scope-limit-semantics)
373 (media-quad-limit, media-quad-shift): New macros.
374 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
375 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
376 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
377 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
378 (fr450_unit_mapping): New array.
379 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
380 for new MDCUTSSI unit.
381 (fr450_check_insn_major_constraints): New function.
382 (check_insn_major_constraints): Use it.
383
384 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
385
386 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
387 (scutss): Change unit to I0.
388 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
389 (mqsaths): Fix FR400-MAJOR categorization.
390 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
391 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
392 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
393 combinations.
394
395 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
396
397 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
398 (rstb, rsth, rst, rstd, rstq): Delete.
399 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
400
401 2004-02-23 Nick Clifton <nickc@redhat.com>
402
403 * Apply these patches from Renesas:
404
405 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
406
407 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
408 disassembling codes for 0x*2 addresses.
409
410 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
411
412 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
413
414 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
415
416 * cpu/m32r.cpu : Add new model m32r2.
417 Add new instructions.
418 Replace occurrances of 'Mitsubishi' with 'Renesas'.
419 Changed PIPE attr of push from O to OS.
420 Care for Little-endian of M32R.
421 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
422 Care for Little-endian of M32R.
423 (parse_slo16): signed extension for value.
424
425 2004-02-20 Andrew Cagney <cagney@redhat.com>
426
427 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
428 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
429
430 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
431 written by Ben Elliston.
432
433 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
434
435 * frv.cpu (UNIT): Add IACC.
436 (iacc-multiply-r-r): Use it.
437 * frv.opc (fr400_unit_mapping): Add entry for IACC.
438 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
439
440 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
441
442 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
443 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
444 cut&paste errors in shifting/truncating numerical operands.
445 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
446 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
447 (parse_uslo16): Likewise.
448 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
449 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
450 (parse_s12): Likewise.
451 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
452 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
453 (parse_uslo16): Likewise.
454 (parse_uhi16): Parse gothi and gotfuncdeschi.
455 (parse_d12): Parse got12 and gotfuncdesc12.
456 (parse_s12): Likewise.
457
458 2003-10-10 Dave Brolley <brolley@redhat.com>
459
460 * frv.cpu (dnpmop): New p-macro.
461 (GRdoublek): Use dnpmop.
462 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
463 (store-double-r-r): Use (.sym regtype doublek).
464 (r-store-double): Ditto.
465 (store-double-r-r-u): Ditto.
466 (conditional-store-double): Ditto.
467 (conditional-store-double-u): Ditto.
468 (store-double-r-simm): Ditto.
469 (fmovs): Assign to UNIT FMALL.
470
471 2003-10-06 Dave Brolley <brolley@redhat.com>
472
473 * frv.cpu, frv.opc: Add support for fr550.
474
475 2003-09-24 Dave Brolley <brolley@redhat.com>
476
477 * frv.cpu (u-commit): New modelling unit for fr500.
478 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
479 (commit-r): Use u-commit model for fr500.
480 (commit): Ditto.
481 (conditional-float-binary-op): Take profiling data as an argument.
482 Update callers.
483 (ne-float-binary-op): Ditto.
484
485 2003-09-19 Michael Snyder <msnyder@redhat.com>
486
487 * frv.cpu (nldqi): Delete unimplemented instruction.
488
489 2003-09-12 Dave Brolley <brolley@redhat.com>
490
491 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
492 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
493 frv_ref_SI to get input register referenced for profiling.
494 (clear-ne-flag-all): Pass insn profiling in as an argument.
495 (clrgr,clrfr,clrga,clrfa): Add profiling information.
496
497 2003-09-11 Michael Snyder <msnyder@redhat.com>
498
499 * frv.cpu: Typographical corrections.
500
501 2003-09-09 Dave Brolley <brolley@redhat.com>
502
503 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
504 (conditional-media-dual-complex, media-quad-complex): Likewise.
505
506 2003-09-04 Dave Brolley <brolley@redhat.com>
507
508 * frv.cpu (register-transfer): Pass in all attributes in on argument.
509 Update all callers.
510 (conditional-register-transfer): Ditto.
511 (cache-preload): Ditto.
512 (floating-point-conversion): Ditto.
513 (floating-point-neg): Ditto.
514 (float-abs): Ditto.
515 (float-binary-op-s): Ditto.
516 (conditional-float-binary-op): Ditto.
517 (ne-float-binary-op): Ditto.
518 (float-dual-arith): Ditto.
519 (ne-float-dual-arith): Ditto.
520
521 2003-09-03 Dave Brolley <brolley@redhat.com>
522
523 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
524 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
525 MCLRACC-1.
526 (A): Removed operand.
527 (A0,A1): New operands replace operand A.
528 (mnop): Now a real insn
529 (mclracc): Removed insn.
530 (mclracc-0, mclracc-1): New insns replace mclracc.
531 (all insns): Use new UNIT attributes.
532
533 2003-08-21 Nick Clifton <nickc@redhat.com>
534
535 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
536 and u-media-dual-btoh with output parameter.
537 (cmbtoh): Add profiling hack.
538
539 2003-08-19 Michael Snyder <msnyder@redhat.com>
540
541 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
542
543 2003-06-10 Doug Evans <dje@sebabeach.org>
544
545 * frv.cpu: Add IDOC attribute.
546
547 2003-06-06 Andrew Cagney <cagney@redhat.com>
548
549 Contributed by Red Hat.
550 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
551 Stan Cox, and Frank Ch. Eigler.
552 * iq2000.opc: New file. Written by Ben Elliston, Frank
553 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
554 * iq2000m.cpu: New file. Written by Jeff Johnston.
555 * iq10.cpu: New file. Written by Jeff Johnston.
556
557 2003-06-05 Nick Clifton <nickc@redhat.com>
558
559 * frv.cpu (FRintieven): New operand. An even-numbered only
560 version of the FRinti operand.
561 (FRintjeven): Likewise for FRintj.
562 (FRintkeven): Likewise for FRintk.
563 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
564 media-quad-arith-sat-semantics, media-quad-arith-sat,
565 conditional-media-quad-arith-sat, mdunpackh,
566 media-quad-multiply-semantics, media-quad-multiply,
567 conditional-media-quad-multiply, media-quad-complex-i,
568 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
569 conditional-media-quad-multiply-acc, munpackh,
570 media-quad-multiply-cross-acc-semantics, mdpackh,
571 media-quad-multiply-cross-acc, mbtoh-semantics,
572 media-quad-cross-multiply-cross-acc-semantics,
573 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
574 media-quad-cross-multiply-acc-semantics, cmbtoh,
575 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
576 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
577 cmhtob): Use new operands.
578 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
579 (parse_even_register): New function.
580
581 2003-06-03 Nick Clifton <nickc@redhat.com>
582
583 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
584 immediate value not unsigned.
585
586 2003-06-03 Andrew Cagney <cagney@redhat.com>
587
588 Contributed by Red Hat.
589 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
590 and Eric Christopher.
591 * frv.opc: New file. Written by Catherine Moore, and Dave
592 Brolley.
593 * simplify.inc: New file. Written by Doug Evans.
594
595 2003-05-02 Andrew Cagney <cagney@redhat.com>
596
597 * New file.
598
599 \f
600 Local Variables:
601 mode: change-log
602 left-margin: 8
603 fill-column: 74
604 version-control: never
605 End:
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