1 2020-02-03 Alan Modra <amodra@gmail.com>
3 * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
5 2020-02-01 Alan Modra <amodra@gmail.com>
7 * frv.cpu (f-u12): Multiply rather than left shift signed values.
8 (f-label16, f-label24): Likewise.
10 2020-01-30 Alan Modra <amodra@gmail.com>
12 * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
13 (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
14 (f-dst32-rn-prefixed-QI): Likewise.
15 (f-dsp-32-s32): Mask before shifting left.
16 (f-dsp-48-u32, f-dsp-48-s32): Likewise.
17 (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
19 (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
20 (h-gr-SI): Mask before shifting.
22 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
24 * bpf.cpu (define-alu-insn-un): The unary BPF instructions
25 (neg and neg32) use OP_SRC_K even if they operate only in
28 2020-01-18 Nick Clifton <nickc@redhat.com>
30 Binutils 2.34 branch created.
32 2020-01-13 Alan Modra <amodra@gmail.com>
34 * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
35 left shift signed values.
37 2020-01-06 Alan Modra <amodra@gmail.com>
39 * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
40 bits before shifting rather than masking after shifting.
41 (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
42 (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
43 (f-dsp-64-u16, f-dsp-8-s24): Likewise.
44 (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
46 2020-01-04 Alan Modra <amodra@gmail.com>
48 * m32r.cpu (f-disp8): Avoid left shift of negative values.
49 (f-disp16, f-disp24): Likewise.
51 2019-12-23 Alan Modra <amodra@gmail.com>
53 * iq2000.cpu (f-offset): Avoid left shift of negative values.
55 2019-12-20 Alan Modra <amodra@gmail.com>
57 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
59 2019-12-17 Alan Modra <amodra@gmail.com>
61 * bpf.cpu (f-imm64): Avoid signed overflow.
63 2019-12-16 Alan Modra <amodra@gmail.com>
65 * xstormy16.cpu (f-rel12a): Avoid signed overflow.
67 2019-12-11 Alan Modra <amodra@gmail.com>
69 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
70 * lm32.cpu (f-branch, f-vall): Likewise.
71 * m32.cpu (f-lab-8-16): Likewise.
73 2019-12-11 Alan Modra <amodra@gmail.com>
75 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
76 shift left to avoid UB on left shift of negative values.
78 2019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
80 * bpf.cpu: Fix comment describing the 128-bit instruction format.
82 2019-09-09 Phil Blundell <pb@pbcl.net>
84 binutils 2.33 branch created.
86 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
88 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
91 2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
93 * bpf.cpu (dlabs): New pmacro.
96 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
98 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
99 explicit 'dst' argument.
101 2019-06-13 Stafford Horne <shorne@gmail.com>
103 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
105 2019-06-13 Stafford Horne <shorne@gmail.com>
107 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
108 (l-adrp): Improve comment.
110 2019-06-13 Stafford Horne <shorne@gmail.com>
112 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
113 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
114 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
115 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
116 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
117 float-setflag-unordered-symantics): New pmacro for instruction
119 (float-setflag-insn): Update to use float-setflag-insn-base.
120 (float-setflag-unordered-insn): New pmacro for generating instructions.
122 2019-06-13 Andrey Bacherov <avbacherov@opencores.org>
123 Stafford Horne <shorne@gmail.com>
125 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
126 (ORFPX-MACHS): Removed pmacro.
127 * or1k.opc (or1k_cgen_insn_supported): New function.
128 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
129 (parse_regpair, print_regpair): New functions.
130 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
132 (h-fdr): Update comment to indicate or64.
133 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
134 (h-fd32r): New hardware for 64-bit fpu registers.
135 (h-i64r): New hardware for 64-bit int registers.
136 * or1korbis.cpu (f-resv-8-1): New field.
137 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
138 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
139 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
140 (h-roff1): New hardware.
141 (double-field-and-ops mnemonic): New pmacro to generate operations
142 rDD32F, rAD32F, rBD32F, rDDI and rADI.
143 (float-regreg-insn): Update single precision generator to MACH
144 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
145 (float-setflag-insn): Update single precision generator to MACH
146 ORFPX32-MACHS. Fix double instructions from single to double
147 precision. Add generator for or32 64-bit instructions.
148 (float-cust-insn cust-num): Update single precision generator to MACH
149 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
150 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
152 (lf-rem-d): Fix operation from mod to rem.
153 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
154 (lf-itof-d): Fix operands from single to double.
155 (lf-ftoi-d): Update operand mode from DI to WI.
157 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
162 2018-06-24 Nick Clifton <nickc@redhat.com>
166 2018-10-05 Richard Henderson <rth@twiddle.net>
167 Stafford Horne <shorne@gmail.com>
169 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
170 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
171 (l-mul): Fix overflow support and indentation.
172 (l-mulu): Fix overflow support and indentation.
173 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
174 (l-div); Remove incorrect carry behavior.
175 (l-divu): Fix carry and overflow behavior.
176 (l-mac): Add overflow support.
177 (l-msb, l-msbu): Add carry and overflow support.
179 2018-10-05 Richard Henderson <rth@twiddle.net>
181 * or1k.opc (parse_disp26): Add support for plta() relocations.
182 (parse_disp21): New function.
183 (or1k_rclass): New enum.
184 (or1k_rtype): New enum.
185 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
186 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
187 (parse_imm16): Add support for the new 21bit and 13bit relocations.
188 * or1korbis.cpu (f-disp26): Don't assume SI.
189 (f-disp21): New pc-relative 21-bit 13 shifted to right.
190 (insn-opcode): Add ADRP.
191 (l-adrp): New instruction.
193 2018-10-05 Richard Henderson <rth@twiddle.net>
195 * or1k.opc: Add RTYPE_ enum.
196 (INVALID_STORE_RELOC): New string.
197 (or1k_imm16_relocs): New array array.
198 (parse_reloc): New static function that just does the parsing.
199 (parse_imm16): New static function for generic parsing.
200 (parse_simm16): Change to just call parse_imm16.
201 (parse_simm16_split): New function.
202 (parse_uimm16): Change to call parse_imm16.
203 (parse_uimm16_split): New function.
204 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
205 (uimm16-split): Change to use new uimm16_split.
207 2018-07-24 Alan Modra <amodra@gmail.com>
210 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
212 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
214 * or1kcommon.cpu (spr-reg-info): Typo fix.
216 2018-03-03 Alan Modra <amodra@gmail.com>
218 * frv.opc: Include opintl.h.
219 (add_next_to_vliw): Use opcodes_error_handler to print error.
220 Standardize error message.
221 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
223 2018-01-13 Nick Clifton <nickc@redhat.com>
227 2017-03-15 Stafford Horne <shorne@gmail.com>
229 * or1kcommon.cpu: Add pc set semantics to also update ppc.
231 2016-10-06 Alan Modra <amodra@gmail.com>
233 * mep.opc (expand_string): Add fall through comment.
235 2016-03-03 Alan Modra <amodra@gmail.com>
237 * fr30.cpu (f-m4): Replace bogus comment with a better guess
238 at what is really going on.
240 2016-03-02 Alan Modra <amodra@gmail.com>
242 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
244 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
246 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
247 a constant to better align disassembler output.
249 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
251 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
253 2014-06-12 Alan Modra <amodra@gmail.com>
255 * or1k.opc: Whitespace fixes.
257 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
259 * or1korbis.cpu (h-atomic-reserve): New hardware.
260 (h-atomic-address): Likewise.
261 (insn-opcode): Add opcodes for LWA and SWA.
262 (atomic-reserve): New operand.
263 (atomic-address): Likewise.
264 (l-lwa, l-swa): New instructions.
265 (l-lbs): Fix typo in comment.
266 (store-insn): Clear atomic reserve on store to atomic-address.
267 Fix register names in fmt field.
269 2014-04-22 Christian Svensson <blue@cmd.nu>
271 * openrisc.cpu: Delete.
272 * openrisc.opc: Delete.
273 * or1k.cpu: New file.
274 * or1k.opc: New file.
275 * or1kcommon.cpu: New file.
276 * or1korbis.cpu: New file.
277 * or1korfpx.cpu: New file.
279 2013-12-07 Mike Frysinger <vapier@gentoo.org>
281 * epiphany.opc: Remove +x file mode.
283 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
286 * lm32.cpu (Control and status registers): Add CFG2, PSW,
287 TLBVADDR, TLBPADDR and TLBBADVADDR.
289 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
290 Joern Rennecke <joern.rennecke@embecosm.com>
292 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
293 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
294 (testset-insn): Add NO_DIS attribute to t.l.
295 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
296 (move-insns): Add NO-DIS attribute to cmov.l.
297 (op-mmr-movts): Add NO-DIS attribute to movts.l.
298 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
299 (op-rrr): Add NO-DIS attribute to .l.
300 (shift-rrr): Add NO-DIS attribute to .l.
301 (op-shift-rri): Add NO-DIS attribute to i32.l.
302 (bitrl, movtl): Add NO-DIS attribute.
303 (op-iextrrr): Add NO-DIS attribute to .l
304 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
305 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
307 2012-02-27 Alan Modra <amodra@gmail.com>
309 * mt.opc (print_dollarhex): Trim values to 32 bits.
311 2011-12-15 Nick Clifton <nickc@redhat.com>
313 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
316 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
318 * epiphany.opc (parse_branch_addr): Fix type of valuep.
319 Cast value before printing it as a long.
320 (parse_postindex): Fix type of valuep.
322 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
324 * cpu/epiphany.cpu: New file.
325 * cpu/epiphany.opc: New file.
327 2011-08-22 Nick Clifton <nickc@redhat.com>
329 * fr30.cpu: Newly contributed file.
330 * fr30.opc: Likewise.
331 * ip2k.cpu: Likewise.
332 * ip2k.opc: Likewise.
333 * mep-avc.cpu: Likewise.
334 * mep-avc2.cpu: Likewise.
335 * mep-c5.cpu: Likewise.
336 * mep-core.cpu: Likewise.
337 * mep-default.cpu: Likewise.
338 * mep-ext-cop.cpu: Likewise.
339 * mep-fmax.cpu: Likewise.
340 * mep-h1.cpu: Likewise.
341 * mep-ivc2.cpu: Likewise.
342 * mep-rhcop.cpu: Likewise.
343 * mep-sample-ucidsp.cpu: Likewise.
346 * openrisc.cpu: Likewise.
347 * openrisc.opc: Likewise.
348 * xstormy16.cpu: Likewise.
349 * xstormy16.opc: Likewise.
351 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
353 * frv.opc: #undef DEBUG.
355 2010-07-03 DJ Delorie <dj@delorie.com>
357 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
359 2010-02-11 Doug Evans <dje@sebabeach.org>
361 * m32r.cpu (HASH-PREFIX): Delete.
362 (duhpo, dshpo): New pmacros.
363 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
364 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
365 attribute, define with dshpo.
366 (uimm24): Delete HASH-PREFIX attribute.
367 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
368 (print_signed_with_hash_prefix): New function.
369 (print_unsigned_with_hash_prefix): New function.
370 * xc16x.cpu (dowh): New pmacro.
371 (upof16): Define with dowh, specify print handler.
372 (qbit, qlobit, qhibit): Ditto.
374 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
375 (print_with_dot_prefix): New functions.
376 (print_with_pof_prefix, print_with_pag_prefix): New functions.
378 2010-01-24 Doug Evans <dje@sebabeach.org>
380 * frv.cpu (floating-point-conversion): Update call to fp conv op.
381 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
382 conditional-floating-point-conversion, ne-floating-point-conversion,
383 float-parallel-mul-add-double-semantics): Ditto.
385 2010-01-05 Doug Evans <dje@sebabeach.org>
387 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
388 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
390 2010-01-02 Doug Evans <dje@sebabeach.org>
392 * m32c.opc (parse_signed16): Fix typo.
394 2009-12-11 Nick Clifton <nickc@redhat.com>
396 * frv.opc: Fix shadowed variable warnings.
397 * m32c.opc: Fix shadowed variable warnings.
399 2009-11-14 Doug Evans <dje@sebabeach.org>
401 Must use VOID expression in VOID context.
402 * xc16x.cpu (mov4): Fix mode of `sequence'.
403 (mov9, mov10): Ditto.
404 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
405 (callr, callseg, calls, trap, rets, reti): Ditto.
406 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
407 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
408 (exts, exts1, extsr, extsr1, prior): Ditto.
410 2009-10-23 Doug Evans <dje@sebabeach.org>
412 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
413 cgen-ops.h -> cgen/basic-ops.h.
415 2009-09-25 Alan Modra <amodra@bigpond.net.au>
417 * m32r.cpu (stb-plus): Typo fix.
419 2009-09-23 Doug Evans <dje@sebabeach.org>
421 * m32r.cpu (sth-plus): Fix address mode and calculation.
423 (clrpsw): Fix mask calculation.
424 (bset, bclr, btst): Make mode in bit calculation match expression.
426 * xc16x.cpu (rtl-version): Set to 0.8.
427 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
428 make uppercase. Remove unnecessary name-prefix spec.
429 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
430 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
431 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
432 (h-cr): New hardware.
433 (muls): Comment out parts that won't compile, add fixme.
434 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
435 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
436 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
438 2009-07-16 Doug Evans <dje@sebabeach.org>
440 * cpu/simplify.inc (*): One line doc strings don't need \n.
441 (df): Invoke define-full-ifield instead of claiming it's an alias.
443 (dnop): Mark as deprecated.
445 2009-06-22 Alan Modra <amodra@bigpond.net.au>
447 * m32c.opc (parse_lab_5_3): Use correct enum.
449 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
451 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
452 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
453 (media-arith-sat-semantics): Explicitly sign- or zero-extend
454 arguments of "operation" to DI using "mode" and the new pmacros.
456 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
458 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
461 2008-12-23 Jon Beniston <jon@beniston.com>
463 * lm32.cpu: New file.
464 * lm32.opc: New file.
466 2008-01-29 Alan Modra <amodra@bigpond.net.au>
468 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
471 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
473 * cris.cpu (movs, movu): Use result of extension operation when
476 2007-07-04 Nick Clifton <nickc@redhat.com>
478 * cris.cpu: Update copyright notice to refer to GPLv3.
479 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
480 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
481 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
483 * iq2000.cpu: Fix copyright notice to refer to FSF.
485 2007-04-30 Mark Salter <msalter@sadr.localdomain>
487 * frv.cpu (spr-names): Support new coprocessor SPR registers.
489 2007-04-20 Nick Clifton <nickc@redhat.com>
491 * xc16x.cpu: Restore after accidentally overwriting this file with
494 2007-03-29 DJ Delorie <dj@redhat.com>
496 * m32c.cpu (Imm-8-s4n): Fix print hook.
497 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
498 (arith-jnz-imm4-dst-defn): Make relaxable.
499 (arith-jnz16-imm4-dst-defn): Fix encodings.
501 2007-03-20 DJ Delorie <dj@redhat.com>
503 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
505 (src16-16-20-An-relative-*): New.
506 (dst16-*-20-An-relative-*): New.
507 (dst16-16-16sa-*): New
508 (dst16-16-16ar-*): New
509 (dst32-16-16sa-Unprefixed-*): New
510 (jsri): Fix operands.
511 (setzx): Fix encoding.
513 2007-03-08 Alan Modra <amodra@bigpond.net.au>
515 * m32r.opc: Formatting.
517 2006-05-22 Nick Clifton <nickc@redhat.com>
519 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
521 2006-04-10 DJ Delorie <dj@redhat.com>
523 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
524 decides if this function accepts symbolic constants or not.
525 (parse_signed_bitbase): Likewise.
526 (parse_unsigned_bitbase8): Pass the new parameter.
527 (parse_unsigned_bitbase11): Likewise.
528 (parse_unsigned_bitbase16): Likewise.
529 (parse_unsigned_bitbase19): Likewise.
530 (parse_unsigned_bitbase27): Likewise.
531 (parse_signed_bitbase8): Likewise.
532 (parse_signed_bitbase11): Likewise.
533 (parse_signed_bitbase19): Likewise.
535 2006-03-13 DJ Delorie <dj@redhat.com>
537 * m32c.cpu (Bit3-S): New.
539 * m32c.opc (parse_bit3_S): New.
541 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
542 (btst): Add optional :G suffix for MACH32.
544 (pop.w:G): Add optional :G suffix for MACH16.
545 (push.b.imm): Fix syntax.
547 2006-03-10 DJ Delorie <dj@redhat.com>
549 * m32c.cpu (mul.l): New.
552 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
554 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
555 an error message otherwise.
556 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
557 Fix up comments to correctly describe the functions.
559 2006-02-24 DJ Delorie <dj@redhat.com>
561 * m32c.cpu (RL_TYPE): New attribute, with macros.
562 (Lab-8-24): Add RELAX.
563 (unary-insn-defn-g, binary-arith-imm-dst-defn,
564 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
565 (binary-arith-src-dst-defn): Add 2ADDR attribute.
566 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
567 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
569 (jsri16, jsri32): Add 1ADDR attribute.
570 (jsr32.w, jsr32.a): Add JUMP attribute.
572 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
573 Anil Paranjape <anilp1@kpitcummins.com>
574 Shilin Shakti <shilins@kpitcummins.com>
576 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
578 * xc16x.opc: New file containing supporting XC16C routines.
580 2006-02-10 Nick Clifton <nickc@redhat.com>
582 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
584 2006-01-06 DJ Delorie <dj@redhat.com>
586 * m32c.cpu (mov.w:q): Fix mode.
587 (push32.b.imm): Likewise, for the comment.
589 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
591 Second part of ms1 to mt renaming.
592 * mt.cpu (define-arch, define-isa): Set name to mt.
593 (define-mach): Adjust.
594 * mt.opc (CGEN_ASM_HASH): Update.
595 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
596 (parse_loopsize, parse_imm16): Adjust.
598 2005-12-13 DJ Delorie <dj@redhat.com>
600 * m32c.cpu (jsri): Fix order so register names aren't treated as
602 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
603 indexwd, indexws): Fix encodings.
605 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
607 * mt.cpu: Rename from ms1.cpu.
608 * mt.opc: Rename from ms1.opc.
610 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
612 * cris.cpu (simplecris-common-writable-specregs)
613 (simplecris-common-readable-specregs): Split from
614 simplecris-common-specregs. All users changed.
615 (cris-implemented-writable-specregs-v0)
616 (cris-implemented-readable-specregs-v0): Similar from
617 cris-implemented-specregs-v0.
618 (cris-implemented-writable-specregs-v3)
619 (cris-implemented-readable-specregs-v3)
620 (cris-implemented-writable-specregs-v8)
621 (cris-implemented-readable-specregs-v8)
622 (cris-implemented-writable-specregs-v10)
623 (cris-implemented-readable-specregs-v10)
624 (cris-implemented-writable-specregs-v32)
625 (cris-implemented-readable-specregs-v32): Similar.
626 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
627 insns and specializations.
629 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
632 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
634 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
635 f-cb2incr, f-rc3): New fields.
636 (LOOP): New instruction.
637 (JAL-HAZARD): New hazard.
638 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
640 (mul, muli, dbnz, iflush): Enable for ms2
641 (jal, reti): Has JAL-HAZARD.
642 (ldctxt, ldfb, stfb): Only ms1.
643 (fbcb): Only ms1,ms1-003.
644 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
645 fbcbincrs, mfbcbincrs): Enable for ms2.
646 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
647 * ms1.opc (parse_loopsize): New.
648 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
651 2005-10-28 Dave Brolley <brolley@redhat.com>
653 Contribute the following change:
654 2003-09-24 Dave Brolley <brolley@redhat.com>
656 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
657 CGEN_ATTR_VALUE_TYPE.
658 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
659 Use cgen_bitset_intersect_p.
661 2005-10-27 DJ Delorie <dj@redhat.com>
663 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
664 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
665 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
666 imm operand is needed.
667 (adjnz, sbjnz): Pass the right operands.
668 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
669 unary-insn): Add -g variants for opcodes that need to support :G.
670 (not.BW:G, push.BW:G): Call it.
671 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
672 stzx16-imm8-imm8-abs16): Fix operand typos.
673 * m32c.opc (m32c_asm_hash): Support bnCND.
674 (parse_signed4n, print_signed4n): New.
676 2005-10-26 DJ Delorie <dj@redhat.com>
678 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
679 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
680 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
682 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
683 (mov.BW:S r0,r1): Fix typo r1l->r1.
684 (tst): Allow :G suffix.
685 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
687 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
689 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
691 2005-10-25 DJ Delorie <dj@redhat.com>
693 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
694 making one a macro of the other.
696 2005-10-21 DJ Delorie <dj@redhat.com>
698 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
699 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
700 indexld, indexls): .w variants have `1' bit.
701 (rot32.b): QI, not SI.
702 (rot32.w): HI, not SI.
703 (xchg16): HI for .w variant.
705 2005-10-19 Nick Clifton <nickc@redhat.com>
707 * m32r.opc (parse_slo16): Fix bad application of previous patch.
709 2005-10-18 Andreas Schwab <schwab@suse.de>
711 * m32r.opc (parse_slo16): Better version of previous patch.
713 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
715 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
718 2005-07-25 DJ Delorie <dj@redhat.com>
720 * m32c.opc (parse_unsigned8): Add %dsp8().
721 (parse_signed8): Add %hi8().
722 (parse_unsigned16): Add %dsp16().
723 (parse_signed16): Add %lo16() and %hi16().
724 (parse_lab_5_3): Make valuep a bfd_vma *.
726 2005-07-18 Nick Clifton <nickc@redhat.com>
728 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
730 (f-lab32-jmp-s): Fix insertion sequence.
731 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
732 (Dsp-40-s8): Make parameter be signed.
733 (Dsp-40-s16): Likewise.
734 (Dsp-48-s8): Likewise.
735 (Dsp-48-s16): Likewise.
736 (Imm-13-u3): Likewise. (Despite its name!)
737 (BitBase16-16-s8): Make the parameter be unsigned.
738 (BitBase16-8-u11-S): Likewise.
739 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
740 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
743 * m32c.opc: Fix formatting.
744 Use safe-ctype.h instead of ctype.h
745 Move duplicated code sequences into a macro.
746 Fix compile time warnings about signedness mismatches.
748 (parse_lab_5_3): New parser function.
750 2005-07-16 Jim Blandy <jimb@redhat.com>
752 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
753 to represent isa sets.
755 2005-07-15 Jim Blandy <jimb@redhat.com>
757 * m32c.cpu, m32c.opc: Fix copyright.
759 2005-07-14 Jim Blandy <jimb@redhat.com>
761 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
763 2005-07-14 Alan Modra <amodra@bigpond.net.au>
765 * ms1.opc (print_dollarhex): Correct format string.
767 2005-07-06 Alan Modra <amodra@bigpond.net.au>
769 * iq2000.cpu: Include from binutils cpu dir.
771 2005-07-05 Nick Clifton <nickc@redhat.com>
773 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
774 unsigned in order to avoid compile time warnings about sign
777 * ms1.opc (parse_*): Likewise.
778 (parse_imm16): Use a "void *" as it is passed both signed and
781 2005-07-01 Nick Clifton <nickc@redhat.com>
783 * frv.opc: Update to ISO C90 function declaration style.
784 * iq2000.opc: Likewise.
785 * m32r.opc: Likewise.
788 2005-06-15 Dave Brolley <brolley@redhat.com>
790 Contributed by Red Hat.
791 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
792 * ms1.opc: New file. Written by Stan Cox.
794 2005-05-10 Nick Clifton <nickc@redhat.com>
796 * Update the address and phone number of the FSF organization in
797 the GPL notices in the following files:
798 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
799 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
800 sh64-media.cpu, simplify.inc
802 2005-02-24 Alan Modra <amodra@bigpond.net.au>
804 * frv.opc (parse_A): Warning fix.
806 2005-02-23 Nick Clifton <nickc@redhat.com>
808 * frv.opc: Fixed compile time warnings about differing signed'ness
809 of pointers passed to functions.
810 * m32r.opc: Likewise.
812 2005-02-11 Nick Clifton <nickc@redhat.com>
814 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
815 'bfd_vma *' in order avoid compile time warning message.
817 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
819 * cris.cpu (mstep): Add missing insn.
821 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
823 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
824 * frv.cpu: Add support for TLS annotations in loads and calll.
825 * frv.opc (parse_symbolic_address): New.
826 (parse_ldd_annotation): New.
827 (parse_call_annotation): New.
828 (parse_ld_annotation): New.
829 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
830 Introduce TLS relocations.
831 (parse_d12, parse_s12, parse_u12): Likewise.
832 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
833 (parse_call_label, print_at): New.
835 2004-12-21 Mikael Starvik <starvik@axis.com>
837 * cris.cpu (cris-set-mem): Correct integral write semantics.
839 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
841 * cris.cpu: New file.
843 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
845 * iq2000.cpu: Added quotes around macro arguments so that they
846 will work with newer versions of guile.
848 2004-10-27 Nick Clifton <nickc@redhat.com>
850 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
851 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
853 * iq2000.cpu (dnop index): Rename to _index to avoid complications
856 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
858 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
860 2004-05-15 Nick Clifton <nickc@redhat.com>
862 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
864 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
866 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
868 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
870 * frv.cpu (define-arch frv): Add fr450 mach.
871 (define-mach fr450): New.
872 (define-model fr450): New. Add profile units to every fr450 insn.
873 (define-attr UNIT): Add MDCUTSSI.
874 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
875 (define-attr AUDIO): New boolean.
876 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
877 (f-LRA-null, f-TLBPR-null): New fields.
878 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
879 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
880 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
881 (LRA-null, TLBPR-null): New macros.
882 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
883 (load-real-address): New macro.
884 (lrai, lrad, tlbpr): New instructions.
885 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
886 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
887 (mdcutssi): Change UNIT attribute to MDCUTSSI.
888 (media-low-clear-semantics, media-scope-limit-semantics)
889 (media-quad-limit, media-quad-shift): New macros.
890 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
891 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
892 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
893 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
894 (fr450_unit_mapping): New array.
895 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
896 for new MDCUTSSI unit.
897 (fr450_check_insn_major_constraints): New function.
898 (check_insn_major_constraints): Use it.
900 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
902 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
903 (scutss): Change unit to I0.
904 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
905 (mqsaths): Fix FR400-MAJOR categorization.
906 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
907 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
908 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
911 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
913 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
914 (rstb, rsth, rst, rstd, rstq): Delete.
915 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
917 2004-02-23 Nick Clifton <nickc@redhat.com>
919 * Apply these patches from Renesas:
921 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
923 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
924 disassembling codes for 0x*2 addresses.
926 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
928 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
930 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
932 * cpu/m32r.cpu : Add new model m32r2.
933 Add new instructions.
934 Replace occurrances of 'Mitsubishi' with 'Renesas'.
935 Changed PIPE attr of push from O to OS.
936 Care for Little-endian of M32R.
937 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
938 Care for Little-endian of M32R.
939 (parse_slo16): signed extension for value.
941 2004-02-20 Andrew Cagney <cagney@redhat.com>
943 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
944 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
946 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
947 written by Ben Elliston.
949 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
951 * frv.cpu (UNIT): Add IACC.
952 (iacc-multiply-r-r): Use it.
953 * frv.opc (fr400_unit_mapping): Add entry for IACC.
954 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
956 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
958 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
959 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
960 cut&paste errors in shifting/truncating numerical operands.
961 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
962 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
963 (parse_uslo16): Likewise.
964 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
965 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
966 (parse_s12): Likewise.
967 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
968 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
969 (parse_uslo16): Likewise.
970 (parse_uhi16): Parse gothi and gotfuncdeschi.
971 (parse_d12): Parse got12 and gotfuncdesc12.
972 (parse_s12): Likewise.
974 2003-10-10 Dave Brolley <brolley@redhat.com>
976 * frv.cpu (dnpmop): New p-macro.
977 (GRdoublek): Use dnpmop.
978 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
979 (store-double-r-r): Use (.sym regtype doublek).
980 (r-store-double): Ditto.
981 (store-double-r-r-u): Ditto.
982 (conditional-store-double): Ditto.
983 (conditional-store-double-u): Ditto.
984 (store-double-r-simm): Ditto.
985 (fmovs): Assign to UNIT FMALL.
987 2003-10-06 Dave Brolley <brolley@redhat.com>
989 * frv.cpu, frv.opc: Add support for fr550.
991 2003-09-24 Dave Brolley <brolley@redhat.com>
993 * frv.cpu (u-commit): New modelling unit for fr500.
994 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
995 (commit-r): Use u-commit model for fr500.
997 (conditional-float-binary-op): Take profiling data as an argument.
999 (ne-float-binary-op): Ditto.
1001 2003-09-19 Michael Snyder <msnyder@redhat.com>
1003 * frv.cpu (nldqi): Delete unimplemented instruction.
1005 2003-09-12 Dave Brolley <brolley@redhat.com>
1007 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1008 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1009 frv_ref_SI to get input register referenced for profiling.
1010 (clear-ne-flag-all): Pass insn profiling in as an argument.
1011 (clrgr,clrfr,clrga,clrfa): Add profiling information.
1013 2003-09-11 Michael Snyder <msnyder@redhat.com>
1015 * frv.cpu: Typographical corrections.
1017 2003-09-09 Dave Brolley <brolley@redhat.com>
1019 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1020 (conditional-media-dual-complex, media-quad-complex): Likewise.
1022 2003-09-04 Dave Brolley <brolley@redhat.com>
1024 * frv.cpu (register-transfer): Pass in all attributes in on argument.
1026 (conditional-register-transfer): Ditto.
1027 (cache-preload): Ditto.
1028 (floating-point-conversion): Ditto.
1029 (floating-point-neg): Ditto.
1031 (float-binary-op-s): Ditto.
1032 (conditional-float-binary-op): Ditto.
1033 (ne-float-binary-op): Ditto.
1034 (float-dual-arith): Ditto.
1035 (ne-float-dual-arith): Ditto.
1037 2003-09-03 Dave Brolley <brolley@redhat.com>
1039 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1040 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1042 (A): Removed operand.
1043 (A0,A1): New operands replace operand A.
1044 (mnop): Now a real insn
1045 (mclracc): Removed insn.
1046 (mclracc-0, mclracc-1): New insns replace mclracc.
1047 (all insns): Use new UNIT attributes.
1049 2003-08-21 Nick Clifton <nickc@redhat.com>
1051 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1052 and u-media-dual-btoh with output parameter.
1053 (cmbtoh): Add profiling hack.
1055 2003-08-19 Michael Snyder <msnyder@redhat.com>
1057 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1059 2003-06-10 Doug Evans <dje@sebabeach.org>
1061 * frv.cpu: Add IDOC attribute.
1063 2003-06-06 Andrew Cagney <cagney@redhat.com>
1065 Contributed by Red Hat.
1066 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1067 Stan Cox, and Frank Ch. Eigler.
1068 * iq2000.opc: New file. Written by Ben Elliston, Frank
1069 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1070 * iq2000m.cpu: New file. Written by Jeff Johnston.
1071 * iq10.cpu: New file. Written by Jeff Johnston.
1073 2003-06-05 Nick Clifton <nickc@redhat.com>
1075 * frv.cpu (FRintieven): New operand. An even-numbered only
1076 version of the FRinti operand.
1077 (FRintjeven): Likewise for FRintj.
1078 (FRintkeven): Likewise for FRintk.
1079 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1080 media-quad-arith-sat-semantics, media-quad-arith-sat,
1081 conditional-media-quad-arith-sat, mdunpackh,
1082 media-quad-multiply-semantics, media-quad-multiply,
1083 conditional-media-quad-multiply, media-quad-complex-i,
1084 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1085 conditional-media-quad-multiply-acc, munpackh,
1086 media-quad-multiply-cross-acc-semantics, mdpackh,
1087 media-quad-multiply-cross-acc, mbtoh-semantics,
1088 media-quad-cross-multiply-cross-acc-semantics,
1089 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1090 media-quad-cross-multiply-acc-semantics, cmbtoh,
1091 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1092 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1093 cmhtob): Use new operands.
1094 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1095 (parse_even_register): New function.
1097 2003-06-03 Nick Clifton <nickc@redhat.com>
1099 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1100 immediate value not unsigned.
1102 2003-06-03 Andrew Cagney <cagney@redhat.com>
1104 Contributed by Red Hat.
1105 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1106 and Eric Christopher.
1107 * frv.opc: New file. Written by Catherine Moore, and Dave
1109 * simplify.inc: New file. Written by Doug Evans.
1111 2003-05-02 Andrew Cagney <cagney@redhat.com>
1116 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1118 Copying and distribution of this file, with or without modification,
1119 are permitted in any medium without royalty provided the copyright
1120 notice and this notice are preserved.
1126 version-control: never