cpu/ChangeLog

   1 2020-10-05  Samanta Navarro  <ferivoz@riseup.net>
   2
   3         * m32r.cpu: Fix spelling mistakes.
   4
   5 2020-09-18  David Faust  <david.faust@oracle.com>
   6
   7         * bpf.cpu (insn-op-code-alu): Add SDIV and SMOD.
   8         (define-alu-insn-bin, daib): Take ISAs as an argument.
   9         (define-alu-instructions): Update calls to daib pmacro with
  10         ISAs; add sdiv and smod.
  11
  12 2020-09-08  David Faust  <david.faust@oracle.com>
  13
  14         * bpf.cpu (define-alu-instructions): Correct semantic operators
  15         for div, mod to unsigned versions.
  16
  17 2020-09-01  Alan Modra  <amodra@gmail.com>
  18
  19         * mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed
  20         value by two rather than shifting left.
  21         (f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract.
  22
  23 2020-08-26  David Faust  <david.faust@oracle.com>
  24
  25         * bpf.cpu (arch bpf): Add xbpf mach and isas.
  26         (define-xbpf-isa) New pmacro.
  27         (all-isas) Add xbpfle,xbpfbe.
  28         (endian-isas): New pmacro.
  29         (mach xbpf): New.
  30         (model xbpf-def): Likewise.
  31         (h-gpr): Add xbpf mach.
  32         (f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
  33         (f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
  34         (define-alu-insn-un): Use new endian-isas pmacro.
  35         (define-alu-insn-bin, define-alu-insn-mov): Likewise.
  36         (define-endian-insn, define-lddw): Likewise.
  37         (dlind, dxli, dxsi, dsti): Likewise.
  38         (define-cond-jump-insn, define-call-insn): Likewise.
  39         (define-atomic-insns): Likewise.
  40
  41 2020-07-04  Nick Clifton  <nickc@redhat.com>
  42
  43         Binutils 2.35 branch created.
  44
  45 2020-06-25 David Faust  <david.faust@oracle.com>
  46
  47         * bpf.cpu (f-offset16): Change type from INT to HI.
  48         (dxli): Simplify memory access.
  49         (dxsi): Likewise.
  50         (define-endian-insn): Update c-call in semantics.
  51         (dlabs) Likewise.
  52         (dlind) Likewise.
  53
  54 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
  55
  56         * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64.
  57         * bpf.opc (bpf_print_insn): Do not set endian_code here.
  58
  59 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
  60
  61         * mep.opc (print_slot_insn): Pass the insn endianness to
  62         cgen_get_insn_value.
  63
  64 2020-05-28  Jose E. Marchesi  <jose.marchesi@oracle.com>
  65             David Faust <david.faust@oracle.com>
  66
  67         * bpf.cpu (define-alu-insn-un): Add definitions of semantics.
  68         (define-alu-insn-mov): Likewise.
  69         (daib): Likewise.
  70         (define-alu-instructions): Likewise.
  71         (define-endian-insn): Likewise.
  72         (define-lddw): Likewise.
  73         (dlabs): Likewise.
  74         (dlind): Likewise.
  75         (dxli): Likewise.
  76         (dxsi): Likewise.
  77         (dsti): Likewise.
  78         (define-ldstx-insns): Likewise.
  79         (define-st-insns): Likewise.
  80         (define-cond-jump-insn): Likewise.
  81         (dcji): Likewise.
  82         (define-condjump-insns): Likewise.
  83         (define-call-insn): Likewise.
  84         (ja): Likewise.
  85         ("exit"): Likewise.
  86         (define-atomic-insns): Likewise.
  87         (sem-exchange-and-add): New macro.
  88         * bpf.cpu ("brkpt"): New instruction.
  89         (bpfbf): Set word-bitsize to 32 and insn-endian big.
  90         (h-gpr): Prefer r0 to `a' and r6 to `ctx'.
  91         (h-pc): Expand definition.
  92         * bpf.opc (bpf_print_insn): Set endian_code to BIG.
  93
  94 2020-05-21  Alan Modra  <amodra@gmail.com>
  95
  96         * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
  97         "if (x) free (x)" with "free (x)".
  98
  99 2020-05-19  Stafford Horne  <shorne@gmail.com>
 100
 101         PR 25184
 102         * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
 103         (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
 104         (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
 105         * or1kcommon.cpu (h-fdr): Remove hardware.
 106         * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
 107         (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
 108         (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
 109         (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
 110         (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
 111
 112 2020-02-16  David Faust  <david.faust@oracle.com>
 113
 114         * bpf.cpu (define-cond-jump-insn): Renamed from djci.
 115         (dcji) New version with support for JMP32
 116
 117 2020-02-03  Alan Modra  <amodra@gmail.com>
 118
 119         * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
 120
 121 2020-02-01  Alan Modra  <amodra@gmail.com>
 122
 123         * frv.cpu (f-u12): Multiply rather than left shift signed values.
 124         (f-label16, f-label24): Likewise.
 125
 126 2020-01-30  Alan Modra  <amodra@gmail.com>
 127
 128         * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
 129         (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
 130         (f-dst32-rn-prefixed-QI): Likewise.
 131         (f-dsp-32-s32): Mask before shifting left.
 132         (f-dsp-48-u32, f-dsp-48-s32): Likewise.
 133         (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
 134         shifting left.
 135         (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
 136         (h-gr-SI): Mask before shifting.
 137
 138 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
 139
 140         * bpf.cpu (define-alu-insn-un): The unary BPF instructions
 141         (neg and neg32) use OP_SRC_K even if they operate only in
 142         registers.
 143
 144 2020-01-18  Nick Clifton  <nickc@redhat.com>
 145
 146         Binutils 2.34 branch created.
 147
 148 2020-01-13  Alan Modra  <amodra@gmail.com>
 149
 150         * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
 151         left shift signed values.
 152
 153 2020-01-06  Alan Modra  <amodra@gmail.com>
 154
 155         * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
 156         bits before shifting rather than masking after shifting.
 157         (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
 158         (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
 159         (f-dsp-64-u16, f-dsp-8-s24): Likewise.
 160         (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
 161
 162 2020-01-04  Alan Modra  <amodra@gmail.com>
 163
 164         * m32r.cpu (f-disp8): Avoid left shift of negative values.
 165         (f-disp16, f-disp24): Likewise.
 166
 167 2019-12-23  Alan Modra  <amodra@gmail.com>
 168
 169         * iq2000.cpu (f-offset): Avoid left shift of negative values.
 170
 171 2019-12-20  Alan Modra  <amodra@gmail.com>
 172
 173         * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
 174
 175 2019-12-17  Alan Modra  <amodra@gmail.com>
 176
 177         * bpf.cpu (f-imm64): Avoid signed overflow.
 178
 179 2019-12-16  Alan Modra  <amodra@gmail.com>
 180
 181         * xstormy16.cpu (f-rel12a): Avoid signed overflow.
 182
 183 2019-12-11  Alan Modra  <amodra@gmail.com>
 184
 185         * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
 186         * lm32.cpu (f-branch, f-vall): Likewise.
 187         * m32.cpu (f-lab-8-16): Likewise.
 188
 189 2019-12-11  Alan Modra  <amodra@gmail.com>
 190
 191         * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
 192         shift left to avoid UB on left shift of negative values.
 193
 194 2019-11-20  Jose E. Marchesi  <jose.marchesi@oracle.com>
 195
 196         * bpf.cpu: Fix comment describing the 128-bit instruction format.
 197
 198 2019-09-09  Phil Blundell  <pb@pbcl.net>
 199
 200         binutils 2.33 branch created.
 201
 202 2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
 203
 204         * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
 205         %a and %ctx.
 206
 207 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
 208
 209         * bpf.cpu (dlabs): New pmacro.
 210         (dlind): Likewise.
 211
 212 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
 213
 214         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
 215         explicit 'dst' argument.
 216
 217 2019-06-13  Stafford Horne  <shorne@gmail.com>
 218
 219         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
 220
 221 2019-06-13  Stafford Horne  <shorne@gmail.com>
 222
 223         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
 224         (l-adrp): Improve comment.
 225
 226 2019-06-13  Stafford Horne  <shorne@gmail.com>
 227
 228         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
 229         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
 230         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
 231         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
 232         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
 233         float-setflag-unordered-symantics): New pmacro for instruction
 234         symantics.
 235         (float-setflag-insn): Update to use float-setflag-insn-base.
 236         (float-setflag-unordered-insn): New pmacro for generating instructions.
 237
 238 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
 239             Stafford Horne  <shorne@gmail.com>
 240
 241         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
 242         (ORFPX-MACHS): Removed pmacro.
 243         * or1k.opc (or1k_cgen_insn_supported): New function.
 244         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
 245         (parse_regpair, print_regpair): New functions.
 246         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
 247         and add comments.
 248         (h-fdr): Update comment to indicate or64.
 249         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
 250         (h-fd32r): New hardware for 64-bit fpu registers.
 251         (h-i64r): New hardware for 64-bit int registers.
 252         * or1korbis.cpu (f-resv-8-1): New field.
 253         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
 254         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
 255         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
 256         (h-roff1): New hardware.
 257         (double-field-and-ops mnemonic): New pmacro to generate operations
 258         rDD32F, rAD32F, rBD32F, rDDI and rADI.
 259         (float-regreg-insn): Update single precision generator to MACH
 260         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 261         (float-setflag-insn): Update single precision generator to MACH
 262         ORFPX32-MACHS.  Fix double instructions from single to double
 263         precision.  Add generator for or32 64-bit instructions.
 264         (float-cust-insn cust-num): Update single precision generator to MACH
 265         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 266         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
 267         ORFPX32-MACHS.
 268         (lf-rem-d): Fix operation from mod to rem.
 269         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
 270         (lf-itof-d): Fix operands from single to double.
 271         (lf-ftoi-d): Update operand mode from DI to WI.
 272
 273 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
 274
 275         * bpf.cpu: New file.
 276         * bpf.opc: Likewise.
 277
 278 2018-06-24  Nick Clifton  <nickc@redhat.com>
 279
 280         2.32 branch created.
 281
 282 2018-10-05  Richard Henderson  <rth@twiddle.net>
 283             Stafford Horne  <shorne@gmail.com>
 284
 285         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
 286         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
 287         (l-mul): Fix overflow support and indentation.
 288         (l-mulu): Fix overflow support and indentation.
 289         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
 290         (l-div); Remove incorrect carry behavior.
 291         (l-divu): Fix carry and overflow behavior.
 292         (l-mac): Add overflow support.
 293         (l-msb, l-msbu): Add carry and overflow support.
 294
 295 2018-10-05  Richard Henderson  <rth@twiddle.net>
 296
 297         * or1k.opc (parse_disp26): Add support for plta() relocations.
 298         (parse_disp21): New function.
 299         (or1k_rclass): New enum.
 300         (or1k_rtype): New enum.
 301         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
 302         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
 303         (parse_imm16): Add support for the new 21bit and 13bit relocations.
 304         * or1korbis.cpu (f-disp26): Don't assume SI.
 305         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 306         (insn-opcode): Add ADRP.
 307         (l-adrp): New instruction.
 308
 309 2018-10-05  Richard Henderson  <rth@twiddle.net>
 310
 311         * or1k.opc: Add RTYPE_ enum.
 312         (INVALID_STORE_RELOC): New string.
 313         (or1k_imm16_relocs): New array array.
 314         (parse_reloc): New static function that just does the parsing.
 315         (parse_imm16): New static function for generic parsing.
 316         (parse_simm16): Change to just call parse_imm16.
 317         (parse_simm16_split): New function.
 318         (parse_uimm16): Change to call parse_imm16.
 319         (parse_uimm16_split): New function.
 320         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 321         (uimm16-split): Change to use new uimm16_split.
 322
 323 2018-07-24  Alan Modra  <amodra@gmail.com>
 324
 325         PR 23430
 326         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 327
 328 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 329
 330         * or1kcommon.cpu (spr-reg-info): Typo fix.
 331
 332 2018-03-03  Alan Modra  <amodra@gmail.com>
 333
 334         * frv.opc: Include opintl.h.
 335         (add_next_to_vliw): Use opcodes_error_handler to print error.
 336         Standardize error message.
 337         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 338
 339 2018-01-13  Nick Clifton  <nickc@redhat.com>
 340
 341         2.30 branch created.
 342
 343 2017-03-15  Stafford Horne  <shorne@gmail.com>
 344
 345         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 346
 347 2016-10-06  Alan Modra  <amodra@gmail.com>
 348
 349         * mep.opc (expand_string): Add fall through comment.
 350
 351 2016-03-03  Alan Modra  <amodra@gmail.com>
 352
 353         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 354         at what is really going on.
 355
 356 2016-03-02  Alan Modra  <amodra@gmail.com>
 357
 358         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 359
 360 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 361
 362         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 363         a constant to better align disassembler output.
 364
 365 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 366
 367         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 368
 369 2014-06-12  Alan Modra  <amodra@gmail.com>
 370
 371         * or1k.opc: Whitespace fixes.
 372
 373 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 374
 375         * or1korbis.cpu (h-atomic-reserve): New hardware.
 376         (h-atomic-address): Likewise.
 377         (insn-opcode): Add opcodes for LWA and SWA.
 378         (atomic-reserve): New operand.
 379         (atomic-address): Likewise.
 380         (l-lwa, l-swa): New instructions.
 381         (l-lbs): Fix typo in comment.
 382         (store-insn): Clear atomic reserve on store to atomic-address.
 383         Fix register names in fmt field.
 384
 385 2014-04-22  Christian Svensson  <blue@cmd.nu>
 386
 387         * openrisc.cpu: Delete.
 388         * openrisc.opc: Delete.
 389         * or1k.cpu: New file.
 390         * or1k.opc: New file.
 391         * or1kcommon.cpu: New file.
 392         * or1korbis.cpu: New file.
 393         * or1korfpx.cpu: New file.
 394
 395 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 396
 397         * epiphany.opc: Remove +x file mode.
 398
 399 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 400
 401         PR binutils/15241
 402         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 403         TLBVADDR, TLBPADDR and TLBBADVADDR.
 404
 405 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 406             Joern Rennecke  <joern.rennecke@embecosm.com>
 407
 408         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 409         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 410         (testset-insn): Add NO_DIS attribute to t.l.
 411         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 412         (move-insns): Add NO-DIS attribute to cmov.l.
 413         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 414         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 415         (op-rrr): Add NO-DIS attribute to .l.
 416         (shift-rrr): Add NO-DIS attribute to .l.
 417         (op-shift-rri): Add NO-DIS attribute to i32.l.
 418         (bitrl, movtl): Add NO-DIS attribute.
 419         (op-iextrrr): Add NO-DIS attribute to .l
 420         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 421         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 422
 423 2012-02-27  Alan Modra  <amodra@gmail.com>
 424
 425         * mt.opc (print_dollarhex): Trim values to 32 bits.
 426
 427 2011-12-15  Nick Clifton  <nickc@redhat.com>
 428
 429         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 430         hosts.
 431
 432 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 433
 434         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 435         Cast value before printing it as a long.
 436         (parse_postindex): Fix type of valuep.
 437
 438 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 439
 440         * cpu/epiphany.cpu: New file.
 441         * cpu/epiphany.opc: New file.
 442
 443 2011-08-22  Nick Clifton  <nickc@redhat.com>
 444
 445         * fr30.cpu: Newly contributed file.
 446         * fr30.opc: Likewise.
 447         * ip2k.cpu: Likewise.
 448         * ip2k.opc: Likewise.
 449         * mep-avc.cpu: Likewise.
 450         * mep-avc2.cpu: Likewise.
 451         * mep-c5.cpu: Likewise.
 452         * mep-core.cpu: Likewise.
 453         * mep-default.cpu: Likewise.
 454         * mep-ext-cop.cpu: Likewise.
 455         * mep-fmax.cpu: Likewise.
 456         * mep-h1.cpu: Likewise.
 457         * mep-ivc2.cpu: Likewise.
 458         * mep-rhcop.cpu: Likewise.
 459         * mep-sample-ucidsp.cpu: Likewise.
 460         * mep.cpu: Likewise.
 461         * mep.opc: Likewise.
 462         * openrisc.cpu: Likewise.
 463         * openrisc.opc: Likewise.
 464         * xstormy16.cpu: Likewise.
 465         * xstormy16.opc: Likewise.
 466
 467 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 468
 469         * frv.opc: #undef DEBUG.
 470
 471 2010-07-03  DJ Delorie  <dj@delorie.com>
 472
 473         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 474
 475 2010-02-11  Doug Evans  <dje@sebabeach.org>
 476
 477         * m32r.cpu (HASH-PREFIX): Delete.
 478         (duhpo, dshpo): New pmacros.
 479         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 480         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 481         attribute, define with dshpo.
 482         (uimm24): Delete HASH-PREFIX attribute.
 483         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 484         (print_signed_with_hash_prefix): New function.
 485         (print_unsigned_with_hash_prefix): New function.
 486         * xc16x.cpu (dowh): New pmacro.
 487         (upof16): Define with dowh, specify print handler.
 488         (qbit, qlobit, qhibit): Ditto.
 489         (upag16): Ditto.
 490         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 491         (print_with_dot_prefix): New functions.
 492         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 493
 494 2010-01-24  Doug Evans  <dje@sebabeach.org>
 495
 496         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 497         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 498         conditional-floating-point-conversion, ne-floating-point-conversion,
 499         float-parallel-mul-add-double-semantics): Ditto.
 500
 501 2010-01-05  Doug Evans  <dje@sebabeach.org>
 502
 503         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 504         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 505
 506 2010-01-02  Doug Evans  <dje@sebabeach.org>
 507
 508         * m32c.opc (parse_signed16): Fix typo.
 509
 510 2009-12-11  Nick Clifton  <nickc@redhat.com>
 511
 512         * frv.opc: Fix shadowed variable warnings.
 513         * m32c.opc: Fix shadowed variable warnings.
 514
 515 2009-11-14  Doug Evans  <dje@sebabeach.org>
 516
 517         Must use VOID expression in VOID context.
 518         * xc16x.cpu (mov4): Fix mode of `sequence'.
 519         (mov9, mov10): Ditto.
 520         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 521         (callr, callseg, calls, trap, rets, reti): Ditto.
 522         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 523         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 524         (exts, exts1, extsr, extsr1, prior): Ditto.
 525
 526 2009-10-23  Doug Evans  <dje@sebabeach.org>
 527
 528         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 529         cgen-ops.h -> cgen/basic-ops.h.
 530
 531 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 532
 533         * m32r.cpu (stb-plus): Typo fix.
 534
 535 2009-09-23  Doug Evans  <dje@sebabeach.org>
 536
 537         * m32r.cpu (sth-plus): Fix address mode and calculation.
 538         (stb-plus): Ditto.
 539         (clrpsw): Fix mask calculation.
 540         (bset, bclr, btst): Make mode in bit calculation match expression.
 541
 542         * xc16x.cpu (rtl-version): Set to 0.8.
 543         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 544         make uppercase.  Remove unnecessary name-prefix spec.
 545         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 546         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 547         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 548         (h-cr): New hardware.
 549         (muls): Comment out parts that won't compile, add fixme.
 550         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 551         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 552         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 553
 554 2009-07-16  Doug Evans  <dje@sebabeach.org>
 555
 556         * cpu/simplify.inc (*): One line doc strings don't need \n.
 557         (df): Invoke define-full-ifield instead of claiming it's an alias.
 558         (dno): Define.
 559         (dnop): Mark as deprecated.
 560
 561 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 562
 563         * m32c.opc (parse_lab_5_3): Use correct enum.
 564
 565 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 566
 567         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 568         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 569         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 570         arguments of "operation" to DI using "mode" and the new pmacros.
 571
 572 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 573
 574         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 575         of number 2, PID.
 576
 577 2008-12-23  Jon Beniston <jon@beniston.com>
 578
 579         * lm32.cpu: New file.
 580         * lm32.opc: New file.
 581
 582 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 583
 584         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 585         to source.
 586
 587 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 588
 589         * cris.cpu (movs, movu): Use result of extension operation when
 590         updating flags.
 591
 592 2007-07-04  Nick Clifton  <nickc@redhat.com>
 593
 594         * cris.cpu: Update copyright notice to refer to GPLv3.
 595         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 596         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 597         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 598         xc16x.opc: Likewise.
 599         * iq2000.cpu: Fix copyright notice to refer to FSF.
 600
 601 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 602
 603         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 604
 605 2007-04-20  Nick Clifton  <nickc@redhat.com>
 606
 607         * xc16x.cpu: Restore after accidentally overwriting this file with
 608         xc16x.opc.
 609
 610 2007-03-29  DJ Delorie  <dj@redhat.com>
 611
 612         * m32c.cpu (Imm-8-s4n): Fix print hook.
 613         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 614         (arith-jnz-imm4-dst-defn): Make relaxable.
 615         (arith-jnz16-imm4-dst-defn): Fix encodings.
 616
 617 2007-03-20  DJ Delorie  <dj@redhat.com>
 618
 619         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 620         mem20): New.
 621         (src16-16-20-An-relative-*): New.
 622         (dst16-*-20-An-relative-*): New.
 623         (dst16-16-16sa-*): New
 624         (dst16-16-16ar-*): New
 625         (dst32-16-16sa-Unprefixed-*): New
 626         (jsri): Fix operands.
 627         (setzx): Fix encoding.
 628
 629 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 630
 631         * m32r.opc: Formatting.
 632
 633 2006-05-22  Nick Clifton  <nickc@redhat.com>
 634
 635         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 636
 637 2006-04-10  DJ Delorie  <dj@redhat.com>
 638
 639         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 640         decides if this function accepts symbolic constants or not.
 641         (parse_signed_bitbase): Likewise.
 642         (parse_unsigned_bitbase8): Pass the new parameter.
 643         (parse_unsigned_bitbase11): Likewise.
 644         (parse_unsigned_bitbase16): Likewise.
 645         (parse_unsigned_bitbase19): Likewise.
 646         (parse_unsigned_bitbase27): Likewise.
 647         (parse_signed_bitbase8): Likewise.
 648         (parse_signed_bitbase11): Likewise.
 649         (parse_signed_bitbase19): Likewise.
 650
 651 2006-03-13  DJ Delorie  <dj@redhat.com>
 652
 653         * m32c.cpu (Bit3-S): New.
 654         (btst:s): New.
 655         * m32c.opc (parse_bit3_S): New.
 656
 657         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 658         (btst): Add optional :G suffix for MACH32.
 659         (or.b:S): New.
 660         (pop.w:G): Add optional :G suffix for MACH16.
 661         (push.b.imm): Fix syntax.
 662
 663 2006-03-10  DJ Delorie  <dj@redhat.com>
 664
 665         * m32c.cpu (mul.l): New.
 666         (mulu.l): New.
 667
 668 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 669
 670         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 671         an error message otherwise.
 672         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 673         Fix up comments to correctly describe the functions.
 674
 675 2006-02-24  DJ Delorie  <dj@redhat.com>
 676
 677         * m32c.cpu (RL_TYPE): New attribute, with macros.
 678         (Lab-8-24): Add RELAX.
 679         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 680         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 681         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 682         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 683         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 684         attribute.
 685         (jsri16, jsri32): Add 1ADDR attribute.
 686         (jsr32.w, jsr32.a): Add JUMP attribute.
 687
 688 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 689             Anil Paranjape   <anilp1@kpitcummins.com>
 690             Shilin Shakti    <shilins@kpitcummins.com>
 691
 692         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 693         description.
 694         * xc16x.opc: New file containing supporting XC16C routines.
 695
 696 2006-02-10  Nick Clifton  <nickc@redhat.com>
 697
 698         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 699
 700 2006-01-06  DJ Delorie  <dj@redhat.com>
 701
 702         * m32c.cpu (mov.w:q): Fix mode.
 703         (push32.b.imm): Likewise, for the comment.
 704
 705 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 706
 707         Second part of ms1 to mt renaming.
 708         * mt.cpu (define-arch, define-isa): Set name to mt.
 709         (define-mach): Adjust.
 710         * mt.opc (CGEN_ASM_HASH): Update.
 711         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 712         (parse_loopsize, parse_imm16): Adjust.
 713
 714 2005-12-13  DJ Delorie  <dj@redhat.com>
 715
 716         * m32c.cpu (jsri): Fix order so register names aren't treated as
 717         symbols.
 718         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 719         indexwd, indexws): Fix encodings.
 720
 721 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 722
 723         * mt.cpu: Rename from ms1.cpu.
 724         * mt.opc: Rename from ms1.opc.
 725
 726 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 727
 728         * cris.cpu (simplecris-common-writable-specregs)
 729         (simplecris-common-readable-specregs): Split from
 730         simplecris-common-specregs.  All users changed.
 731         (cris-implemented-writable-specregs-v0)
 732         (cris-implemented-readable-specregs-v0): Similar from
 733         cris-implemented-specregs-v0.
 734         (cris-implemented-writable-specregs-v3)
 735         (cris-implemented-readable-specregs-v3)
 736         (cris-implemented-writable-specregs-v8)
 737         (cris-implemented-readable-specregs-v8)
 738         (cris-implemented-writable-specregs-v10)
 739         (cris-implemented-readable-specregs-v10)
 740         (cris-implemented-writable-specregs-v32)
 741         (cris-implemented-readable-specregs-v32): Similar.
 742         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 743         insns and specializations.
 744
 745 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 746
 747         Add ms2
 748         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 749         model.
 750         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 751         f-cb2incr, f-rc3): New fields.
 752         (LOOP): New instruction.
 753         (JAL-HAZARD): New hazard.
 754         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 755         New operands.
 756         (mul, muli, dbnz, iflush): Enable for ms2
 757         (jal, reti): Has JAL-HAZARD.
 758         (ldctxt, ldfb, stfb): Only ms1.
 759         (fbcb): Only ms1,ms1-003.
 760         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 761         fbcbincrs, mfbcbincrs): Enable for ms2.
 762         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 763         * ms1.opc (parse_loopsize): New.
 764         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 765         (print_pcrel): New.
 766
 767 2005-10-28  Dave Brolley  <brolley@redhat.com>
 768
 769         Contribute the following change:
 770         2003-09-24  Dave Brolley  <brolley@redhat.com>
 771
 772         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 773         CGEN_ATTR_VALUE_TYPE.
 774         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 775         Use cgen_bitset_intersect_p.
 776
 777 2005-10-27  DJ Delorie  <dj@redhat.com>
 778
 779         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 780         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 781         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 782         imm operand is needed.
 783         (adjnz, sbjnz): Pass the right operands.
 784         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 785         unary-insn): Add -g variants for opcodes that need to support :G.
 786         (not.BW:G, push.BW:G): Call it.
 787         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 788         stzx16-imm8-imm8-abs16): Fix operand typos.
 789         * m32c.opc (m32c_asm_hash): Support bnCND.
 790         (parse_signed4n, print_signed4n): New.
 791
 792 2005-10-26  DJ Delorie  <dj@redhat.com>
 793
 794         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 795         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 796         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 797         dsp8[sp] is signed.
 798         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 799         (mov.BW:S r0,r1): Fix typo r1l->r1.
 800         (tst): Allow :G suffix.
 801         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 802
 803 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 804
 805         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 806
 807 2005-10-25  DJ Delorie  <dj@redhat.com>
 808
 809         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 810         making one a macro of the other.
 811
 812 2005-10-21  DJ Delorie  <dj@redhat.com>
 813
 814         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 815         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 816         indexld, indexls): .w variants have `1' bit.
 817         (rot32.b): QI, not SI.
 818         (rot32.w): HI, not SI.
 819         (xchg16): HI for .w variant.
 820
 821 2005-10-19  Nick Clifton  <nickc@redhat.com>
 822
 823         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 824
 825 2005-10-18  Andreas Schwab  <schwab@suse.de>
 826
 827         * m32r.opc (parse_slo16): Better version of previous patch.
 828
 829 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 830
 831         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 832         size.
 833
 834 2005-07-25  DJ Delorie  <dj@redhat.com>
 835
 836         * m32c.opc (parse_unsigned8): Add %dsp8().
 837         (parse_signed8): Add %hi8().
 838         (parse_unsigned16): Add %dsp16().
 839         (parse_signed16): Add %lo16() and %hi16().
 840         (parse_lab_5_3): Make valuep a bfd_vma *.
 841
 842 2005-07-18  Nick Clifton  <nickc@redhat.com>
 843
 844         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 845         components.
 846         (f-lab32-jmp-s): Fix insertion sequence.
 847         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 848         (Dsp-40-s8): Make parameter be signed.
 849         (Dsp-40-s16): Likewise.
 850         (Dsp-48-s8): Likewise.
 851         (Dsp-48-s16): Likewise.
 852         (Imm-13-u3): Likewise. (Despite its name!)
 853         (BitBase16-16-s8): Make the parameter be unsigned.
 854         (BitBase16-8-u11-S): Likewise.
 855         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 856         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 857         relaxation.
 858
 859         * m32c.opc: Fix formatting.
 860         Use safe-ctype.h instead of ctype.h
 861         Move duplicated code sequences into a macro.
 862         Fix compile time warnings about signedness mismatches.
 863         Remove dead code.
 864         (parse_lab_5_3): New parser function.
 865
 866 2005-07-16  Jim Blandy  <jimb@redhat.com>
 867
 868         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 869         to represent isa sets.
 870
 871 2005-07-15  Jim Blandy  <jimb@redhat.com>
 872
 873         * m32c.cpu, m32c.opc: Fix copyright.
 874
 875 2005-07-14  Jim Blandy  <jimb@redhat.com>
 876
 877         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 878
 879 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 880
 881         * ms1.opc (print_dollarhex): Correct format string.
 882
 883 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 884
 885         * iq2000.cpu: Include from binutils cpu dir.
 886
 887 2005-07-05  Nick Clifton  <nickc@redhat.com>
 888
 889         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 890         unsigned in order to avoid compile time warnings about sign
 891         conflicts.
 892
 893         * ms1.opc (parse_*): Likewise.
 894         (parse_imm16): Use a "void *" as it is passed both signed and
 895         unsigned arguments.
 896
 897 2005-07-01  Nick Clifton  <nickc@redhat.com>
 898
 899         * frv.opc: Update to ISO C90 function declaration style.
 900         * iq2000.opc: Likewise.
 901         * m32r.opc: Likewise.
 902         * sh.opc: Likewise.
 903
 904 2005-06-15  Dave Brolley  <brolley@redhat.com>
 905
 906         Contributed by Red Hat.
 907         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 908         * ms1.opc: New file.  Written by Stan Cox.
 909
 910 2005-05-10  Nick Clifton  <nickc@redhat.com>
 911
 912         * Update the address and phone number of the FSF organization in
 913         the GPL notices in the following files:
 914         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 915         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 916         sh64-media.cpu, simplify.inc
 917
 918 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 919
 920         * frv.opc (parse_A): Warning fix.
 921
 922 2005-02-23  Nick Clifton  <nickc@redhat.com>
 923
 924         * frv.opc: Fixed compile time warnings about differing signed'ness
 925         of pointers passed to functions.
 926         * m32r.opc: Likewise.
 927
 928 2005-02-11  Nick Clifton  <nickc@redhat.com>
 929
 930         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 931         'bfd_vma *' in order avoid compile time warning message.
 932
 933 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 934
 935         * cris.cpu (mstep): Add missing insn.
 936
 937 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 938
 939         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 940         * frv.cpu: Add support for TLS annotations in loads and calll.
 941         * frv.opc (parse_symbolic_address): New.
 942         (parse_ldd_annotation): New.
 943         (parse_call_annotation): New.
 944         (parse_ld_annotation): New.
 945         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 946         Introduce TLS relocations.
 947         (parse_d12, parse_s12, parse_u12): Likewise.
 948         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 949         (parse_call_label, print_at): New.
 950
 951 2004-12-21  Mikael Starvik  <starvik@axis.com>
 952
 953         * cris.cpu (cris-set-mem): Correct integral write semantics.
 954
 955 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 956
 957         * cris.cpu: New file.
 958
 959 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 960
 961         * iq2000.cpu: Added quotes around macro arguments so that they
 962         will work with newer versions of guile.
 963
 964 2004-10-27  Nick Clifton  <nickc@redhat.com>
 965
 966         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 967         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 968         operand.
 969         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 970         with guile.
 971
 972 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 973
 974         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 975
 976 2004-05-15  Nick Clifton  <nickc@redhat.com>
 977
 978         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 979
 980 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 981
 982         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 983
 984 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 985
 986         * frv.cpu (define-arch frv): Add fr450 mach.
 987         (define-mach fr450): New.
 988         (define-model fr450): New.  Add profile units to every fr450 insn.
 989         (define-attr UNIT): Add MDCUTSSI.
 990         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 991         (define-attr AUDIO): New boolean.
 992         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 993         (f-LRA-null, f-TLBPR-null): New fields.
 994         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 995         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 996         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 997         (LRA-null, TLBPR-null): New macros.
 998         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 999         (load-real-address): New macro.
1000         (lrai, lrad, tlbpr): New instructions.
1001         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
1002         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
1003         (mdcutssi): Change UNIT attribute to MDCUTSSI.
1004         (media-low-clear-semantics, media-scope-limit-semantics)
1005         (media-quad-limit, media-quad-shift): New macros.
1006         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
1007         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
1008         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
1009         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
1010         (fr450_unit_mapping): New array.
1011         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
1012         for new MDCUTSSI unit.
1013         (fr450_check_insn_major_constraints): New function.
1014         (check_insn_major_constraints): Use it.
1015
1016 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1017
1018         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
1019         (scutss): Change unit to I0.
1020         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
1021         (mqsaths): Fix FR400-MAJOR categorization.
1022         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
1023         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
1024         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
1025         combinations.
1026
1027 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1028
1029         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
1030         (rstb, rsth, rst, rstd, rstq): Delete.
1031         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
1032
1033 2004-02-23  Nick Clifton  <nickc@redhat.com>
1034
1035         * Apply these patches from Renesas:
1036
1037         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1038
1039         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
1040         disassembling codes for 0x*2 addresses.
1041
1042         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1043
1044         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
1045
1046         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1047
1048         * cpu/m32r.cpu : Add new model m32r2.
1049         Add new instructions.
1050         Replace occurrances of 'Mitsubishi' with 'Renesas'.
1051         Changed PIPE attr of push from O to OS.
1052         Care for Little-endian of M32R.
1053         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
1054         Care for Little-endian of M32R.
1055         (parse_slo16): signed extension for value.
1056
1057 2004-02-20  Andrew Cagney  <cagney@redhat.com>
1058
1059         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
1060         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
1061
1062         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
1063         written by Ben Elliston.
1064
1065 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1066
1067         * frv.cpu (UNIT): Add IACC.
1068         (iacc-multiply-r-r): Use it.
1069         * frv.opc (fr400_unit_mapping): Add entry for IACC.
1070         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
1071
1072 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1073
1074         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1075         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
1076         cut&paste errors in shifting/truncating numerical operands.
1077         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
1078         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1079         (parse_uslo16): Likewise.
1080         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1081         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1082         (parse_s12): Likewise.
1083         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1084         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
1085         (parse_uslo16): Likewise.
1086         (parse_uhi16): Parse gothi and gotfuncdeschi.
1087         (parse_d12): Parse got12 and gotfuncdesc12.
1088         (parse_s12): Likewise.
1089
1090 2003-10-10  Dave Brolley  <brolley@redhat.com>
1091
1092         * frv.cpu (dnpmop): New p-macro.
1093         (GRdoublek): Use dnpmop.
1094         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
1095         (store-double-r-r): Use (.sym regtype doublek).
1096         (r-store-double): Ditto.
1097         (store-double-r-r-u): Ditto.
1098         (conditional-store-double): Ditto.
1099         (conditional-store-double-u): Ditto.
1100         (store-double-r-simm): Ditto.
1101         (fmovs): Assign to UNIT FMALL.
1102
1103 2003-10-06  Dave Brolley  <brolley@redhat.com>
1104
1105         * frv.cpu, frv.opc: Add support for fr550.
1106
1107 2003-09-24  Dave Brolley  <brolley@redhat.com>
1108
1109         * frv.cpu (u-commit): New modelling unit for fr500.
1110         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1111         (commit-r): Use u-commit model for fr500.
1112         (commit): Ditto.
1113         (conditional-float-binary-op): Take profiling data as an argument.
1114         Update callers.
1115         (ne-float-binary-op): Ditto.
1116
1117 2003-09-19  Michael Snyder  <msnyder@redhat.com>
1118
1119         * frv.cpu (nldqi): Delete unimplemented instruction.
1120
1121 2003-09-12  Dave Brolley  <brolley@redhat.com>
1122
1123         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1124         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1125         frv_ref_SI to get input register referenced for profiling.
1126         (clear-ne-flag-all): Pass insn profiling in as an argument.
1127         (clrgr,clrfr,clrga,clrfa): Add profiling information.
1128
1129 2003-09-11  Michael Snyder  <msnyder@redhat.com>
1130
1131         * frv.cpu: Typographical corrections.
1132
1133 2003-09-09  Dave Brolley  <brolley@redhat.com>
1134
1135         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1136         (conditional-media-dual-complex, media-quad-complex): Likewise.
1137
1138 2003-09-04  Dave Brolley  <brolley@redhat.com>
1139
1140         * frv.cpu (register-transfer): Pass in all attributes in on argument.
1141         Update all callers.
1142         (conditional-register-transfer): Ditto.
1143         (cache-preload): Ditto.
1144         (floating-point-conversion): Ditto.
1145         (floating-point-neg): Ditto.
1146         (float-abs): Ditto.
1147         (float-binary-op-s): Ditto.
1148         (conditional-float-binary-op): Ditto.
1149         (ne-float-binary-op): Ditto.
1150         (float-dual-arith): Ditto.
1151         (ne-float-dual-arith): Ditto.
1152
1153 2003-09-03  Dave Brolley  <brolley@redhat.com>
1154
1155         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1156         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1157         MCLRACC-1.
1158         (A): Removed operand.
1159         (A0,A1): New operands replace operand A.
1160         (mnop): Now a real insn
1161         (mclracc): Removed insn.
1162         (mclracc-0, mclracc-1): New insns replace mclracc.
1163         (all insns): Use new UNIT attributes.
1164
1165 2003-08-21  Nick Clifton  <nickc@redhat.com>
1166
1167         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1168         and u-media-dual-btoh with output parameter.
1169         (cmbtoh): Add profiling hack.
1170
1171 2003-08-19  Michael Snyder  <msnyder@redhat.com>
1172
1173         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1174
1175 2003-06-10  Doug Evans  <dje@sebabeach.org>
1176
1177         * frv.cpu: Add IDOC attribute.
1178
1179 2003-06-06  Andrew Cagney  <cagney@redhat.com>
1180
1181         Contributed by Red Hat.
1182         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
1183         Stan Cox, and Frank Ch. Eigler.
1184         * iq2000.opc: New file.  Written by Ben Elliston, Frank
1185         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1186         * iq2000m.cpu: New file.  Written by Jeff Johnston.
1187         * iq10.cpu: New file.  Written by Jeff Johnston.
1188
1189 2003-06-05  Nick Clifton  <nickc@redhat.com>
1190
1191         * frv.cpu (FRintieven): New operand.  An even-numbered only
1192         version of the FRinti operand.
1193         (FRintjeven): Likewise for FRintj.
1194         (FRintkeven): Likewise for FRintk.
1195         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1196         media-quad-arith-sat-semantics, media-quad-arith-sat,
1197         conditional-media-quad-arith-sat, mdunpackh,
1198         media-quad-multiply-semantics, media-quad-multiply,
1199         conditional-media-quad-multiply, media-quad-complex-i,
1200         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1201         conditional-media-quad-multiply-acc, munpackh,
1202         media-quad-multiply-cross-acc-semantics, mdpackh,
1203         media-quad-multiply-cross-acc, mbtoh-semantics,
1204         media-quad-cross-multiply-cross-acc-semantics,
1205         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1206         media-quad-cross-multiply-acc-semantics, cmbtoh,
1207         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1208         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1209         cmhtob): Use new operands.
1210         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1211         (parse_even_register): New function.
1212
1213 2003-06-03  Nick Clifton  <nickc@redhat.com>
1214
1215         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1216         immediate value not unsigned.
1217
1218 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1219
1220         Contributed by Red Hat.
1221         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1222         and Eric Christopher.
1223         * frv.opc: New file.  Written by Catherine Moore, and Dave
1224         Brolley.
1225         * simplify.inc: New file.  Written by Doug Evans.
1226
1227 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1228
1229         * New file.
1230
1231 \f
1232 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1233
1234 Copying and distribution of this file, with or without modification,
1235 are permitted in any medium without royalty provided the copyright
1236 notice and this notice are preserved.
1237
1238 Local Variables:
1239 mode: change-log
1240 left-margin: 8
1241 fill-column: 74
1242 version-control: never
1243 End: