cpu/ChangeLog

   1 2019-12-20  Alan Modra  <amodra@gmail.com>
   2
   3         * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
   4
   5 2019-12-17  Alan Modra  <amodra@gmail.com>
   6
   7         * bpf.cpu (f-imm64): Avoid signed overflow.
   8
   9 2019-12-16  Alan Modra  <amodra@gmail.com>
  10
  11         * xstormy16.cpu (f-rel12a): Avoid signed overflow.
  12
  13 2019-12-11  Alan Modra  <amodra@gmail.com>
  14
  15         * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
  16         * lm32.cpu (f-branch, f-vall): Likewise.
  17         * m32.cpu (f-lab-8-16): Likewise.
  18
  19 2019-12-11  Alan Modra  <amodra@gmail.com>
  20
  21         * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
  22         shift left to avoid UB on left shift of negative values.
  23
  24 2019-11-20  Jose E. Marchesi  <jose.marchesi@oracle.com>
  25
  26         * bpf.cpu: Fix comment describing the 128-bit instruction format.
  27
  28 2019-09-09  Phil Blundell  <pb@pbcl.net>
  29
  30         binutils 2.33 branch created.
  31
  32 2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
  33
  34         * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
  35         %a and %ctx.
  36
  37 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
  38
  39         * bpf.cpu (dlabs): New pmacro.
  40         (dlind): Likewise.
  41
  42 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
  43
  44         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
  45         explicit 'dst' argument.
  46
  47 2019-06-13  Stafford Horne  <shorne@gmail.com>
  48
  49         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
  50
  51 2019-06-13  Stafford Horne  <shorne@gmail.com>
  52
  53         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
  54         (l-adrp): Improve comment.
  55
  56 2019-06-13  Stafford Horne  <shorne@gmail.com>
  57
  58         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
  59         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
  60         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
  61         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
  62         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
  63         float-setflag-unordered-symantics): New pmacro for instruction
  64         symantics.
  65         (float-setflag-insn): Update to use float-setflag-insn-base.
  66         (float-setflag-unordered-insn): New pmacro for generating instructions.
  67
  68 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
  69             Stafford Horne  <shorne@gmail.com>
  70
  71         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
  72         (ORFPX-MACHS): Removed pmacro.
  73         * or1k.opc (or1k_cgen_insn_supported): New function.
  74         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
  75         (parse_regpair, print_regpair): New functions.
  76         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
  77         and add comments.
  78         (h-fdr): Update comment to indicate or64.
  79         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
  80         (h-fd32r): New hardware for 64-bit fpu registers.
  81         (h-i64r): New hardware for 64-bit int registers.
  82         * or1korbis.cpu (f-resv-8-1): New field.
  83         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
  84         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
  85         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
  86         (h-roff1): New hardware.
  87         (double-field-and-ops mnemonic): New pmacro to generate operations
  88         rDD32F, rAD32F, rBD32F, rDDI and rADI.
  89         (float-regreg-insn): Update single precision generator to MACH
  90         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
  91         (float-setflag-insn): Update single precision generator to MACH
  92         ORFPX32-MACHS.  Fix double instructions from single to double
  93         precision.  Add generator for or32 64-bit instructions.
  94         (float-cust-insn cust-num): Update single precision generator to MACH
  95         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
  96         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
  97         ORFPX32-MACHS.
  98         (lf-rem-d): Fix operation from mod to rem.
  99         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
 100         (lf-itof-d): Fix operands from single to double.
 101         (lf-ftoi-d): Update operand mode from DI to WI.
 102
 103 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
 104
 105         * bpf.cpu: New file.
 106         * bpf.opc: Likewise.
 107
 108 2018-06-24  Nick Clifton  <nickc@redhat.com>
 109
 110         2.32 branch created.
 111
 112 2018-10-05  Richard Henderson  <rth@twiddle.net>
 113             Stafford Horne  <shorne@gmail.com>
 114
 115         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
 116         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
 117         (l-mul): Fix overflow support and indentation.
 118         (l-mulu): Fix overflow support and indentation.
 119         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
 120         (l-div); Remove incorrect carry behavior.
 121         (l-divu): Fix carry and overflow behavior.
 122         (l-mac): Add overflow support.
 123         (l-msb, l-msbu): Add carry and overflow support.
 124
 125 2018-10-05  Richard Henderson  <rth@twiddle.net>
 126
 127         * or1k.opc (parse_disp26): Add support for plta() relocations.
 128         (parse_disp21): New function.
 129         (or1k_rclass): New enum.
 130         (or1k_rtype): New enum.
 131         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
 132         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
 133         (parse_imm16): Add support for the new 21bit and 13bit relocations.
 134         * or1korbis.cpu (f-disp26): Don't assume SI.
 135         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 136         (insn-opcode): Add ADRP.
 137         (l-adrp): New instruction.
 138
 139 2018-10-05  Richard Henderson  <rth@twiddle.net>
 140
 141         * or1k.opc: Add RTYPE_ enum.
 142         (INVALID_STORE_RELOC): New string.
 143         (or1k_imm16_relocs): New array array.
 144         (parse_reloc): New static function that just does the parsing.
 145         (parse_imm16): New static function for generic parsing.
 146         (parse_simm16): Change to just call parse_imm16.
 147         (parse_simm16_split): New function.
 148         (parse_uimm16): Change to call parse_imm16.
 149         (parse_uimm16_split): New function.
 150         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 151         (uimm16-split): Change to use new uimm16_split.
 152
 153 2018-07-24  Alan Modra  <amodra@gmail.com>
 154
 155         PR 23430
 156         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 157
 158 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 159
 160         * or1kcommon.cpu (spr-reg-info): Typo fix.
 161
 162 2018-03-03  Alan Modra  <amodra@gmail.com>
 163
 164         * frv.opc: Include opintl.h.
 165         (add_next_to_vliw): Use opcodes_error_handler to print error.
 166         Standardize error message.
 167         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 168
 169 2018-01-13  Nick Clifton  <nickc@redhat.com>
 170
 171         2.30 branch created.
 172
 173 2017-03-15  Stafford Horne  <shorne@gmail.com>
 174
 175         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 176
 177 2016-10-06  Alan Modra  <amodra@gmail.com>
 178
 179         * mep.opc (expand_string): Add fall through comment.
 180
 181 2016-03-03  Alan Modra  <amodra@gmail.com>
 182
 183         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 184         at what is really going on.
 185
 186 2016-03-02  Alan Modra  <amodra@gmail.com>
 187
 188         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 189
 190 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 191
 192         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 193         a constant to better align disassembler output.
 194
 195 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 196
 197         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 198
 199 2014-06-12  Alan Modra  <amodra@gmail.com>
 200
 201         * or1k.opc: Whitespace fixes.
 202
 203 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 204
 205         * or1korbis.cpu (h-atomic-reserve): New hardware.
 206         (h-atomic-address): Likewise.
 207         (insn-opcode): Add opcodes for LWA and SWA.
 208         (atomic-reserve): New operand.
 209         (atomic-address): Likewise.
 210         (l-lwa, l-swa): New instructions.
 211         (l-lbs): Fix typo in comment.
 212         (store-insn): Clear atomic reserve on store to atomic-address.
 213         Fix register names in fmt field.
 214
 215 2014-04-22  Christian Svensson  <blue@cmd.nu>
 216
 217         * openrisc.cpu: Delete.
 218         * openrisc.opc: Delete.
 219         * or1k.cpu: New file.
 220         * or1k.opc: New file.
 221         * or1kcommon.cpu: New file.
 222         * or1korbis.cpu: New file.
 223         * or1korfpx.cpu: New file.
 224
 225 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 226
 227         * epiphany.opc: Remove +x file mode.
 228
 229 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 230
 231         PR binutils/15241
 232         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 233         TLBVADDR, TLBPADDR and TLBBADVADDR.
 234
 235 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 236             Joern Rennecke  <joern.rennecke@embecosm.com>
 237
 238         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 239         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 240         (testset-insn): Add NO_DIS attribute to t.l.
 241         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 242         (move-insns): Add NO-DIS attribute to cmov.l.
 243         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 244         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 245         (op-rrr): Add NO-DIS attribute to .l.
 246         (shift-rrr): Add NO-DIS attribute to .l.
 247         (op-shift-rri): Add NO-DIS attribute to i32.l.
 248         (bitrl, movtl): Add NO-DIS attribute.
 249         (op-iextrrr): Add NO-DIS attribute to .l
 250         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 251         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 252
 253 2012-02-27  Alan Modra  <amodra@gmail.com>
 254
 255         * mt.opc (print_dollarhex): Trim values to 32 bits.
 256
 257 2011-12-15  Nick Clifton  <nickc@redhat.com>
 258
 259         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 260         hosts.
 261
 262 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 263
 264         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 265         Cast value before printing it as a long.
 266         (parse_postindex): Fix type of valuep.
 267
 268 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 269
 270         * cpu/epiphany.cpu: New file.
 271         * cpu/epiphany.opc: New file.
 272
 273 2011-08-22  Nick Clifton  <nickc@redhat.com>
 274
 275         * fr30.cpu: Newly contributed file.
 276         * fr30.opc: Likewise.
 277         * ip2k.cpu: Likewise.
 278         * ip2k.opc: Likewise.
 279         * mep-avc.cpu: Likewise.
 280         * mep-avc2.cpu: Likewise.
 281         * mep-c5.cpu: Likewise.
 282         * mep-core.cpu: Likewise.
 283         * mep-default.cpu: Likewise.
 284         * mep-ext-cop.cpu: Likewise.
 285         * mep-fmax.cpu: Likewise.
 286         * mep-h1.cpu: Likewise.
 287         * mep-ivc2.cpu: Likewise.
 288         * mep-rhcop.cpu: Likewise.
 289         * mep-sample-ucidsp.cpu: Likewise.
 290         * mep.cpu: Likewise.
 291         * mep.opc: Likewise.
 292         * openrisc.cpu: Likewise.
 293         * openrisc.opc: Likewise.
 294         * xstormy16.cpu: Likewise.
 295         * xstormy16.opc: Likewise.
 296
 297 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 298
 299         * frv.opc: #undef DEBUG.
 300
 301 2010-07-03  DJ Delorie  <dj@delorie.com>
 302
 303         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 304
 305 2010-02-11  Doug Evans  <dje@sebabeach.org>
 306
 307         * m32r.cpu (HASH-PREFIX): Delete.
 308         (duhpo, dshpo): New pmacros.
 309         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 310         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 311         attribute, define with dshpo.
 312         (uimm24): Delete HASH-PREFIX attribute.
 313         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 314         (print_signed_with_hash_prefix): New function.
 315         (print_unsigned_with_hash_prefix): New function.
 316         * xc16x.cpu (dowh): New pmacro.
 317         (upof16): Define with dowh, specify print handler.
 318         (qbit, qlobit, qhibit): Ditto.
 319         (upag16): Ditto.
 320         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 321         (print_with_dot_prefix): New functions.
 322         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 323
 324 2010-01-24  Doug Evans  <dje@sebabeach.org>
 325
 326         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 327         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 328         conditional-floating-point-conversion, ne-floating-point-conversion,
 329         float-parallel-mul-add-double-semantics): Ditto.
 330
 331 2010-01-05  Doug Evans  <dje@sebabeach.org>
 332
 333         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 334         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 335
 336 2010-01-02  Doug Evans  <dje@sebabeach.org>
 337
 338         * m32c.opc (parse_signed16): Fix typo.
 339
 340 2009-12-11  Nick Clifton  <nickc@redhat.com>
 341
 342         * frv.opc: Fix shadowed variable warnings.
 343         * m32c.opc: Fix shadowed variable warnings.
 344
 345 2009-11-14  Doug Evans  <dje@sebabeach.org>
 346
 347         Must use VOID expression in VOID context.
 348         * xc16x.cpu (mov4): Fix mode of `sequence'.
 349         (mov9, mov10): Ditto.
 350         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 351         (callr, callseg, calls, trap, rets, reti): Ditto.
 352         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 353         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 354         (exts, exts1, extsr, extsr1, prior): Ditto.
 355
 356 2009-10-23  Doug Evans  <dje@sebabeach.org>
 357
 358         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 359         cgen-ops.h -> cgen/basic-ops.h.
 360
 361 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 362
 363         * m32r.cpu (stb-plus): Typo fix.
 364
 365 2009-09-23  Doug Evans  <dje@sebabeach.org>
 366
 367         * m32r.cpu (sth-plus): Fix address mode and calculation.
 368         (stb-plus): Ditto.
 369         (clrpsw): Fix mask calculation.
 370         (bset, bclr, btst): Make mode in bit calculation match expression.
 371
 372         * xc16x.cpu (rtl-version): Set to 0.8.
 373         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 374         make uppercase.  Remove unnecessary name-prefix spec.
 375         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 376         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 377         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 378         (h-cr): New hardware.
 379         (muls): Comment out parts that won't compile, add fixme.
 380         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 381         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 382         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 383
 384 2009-07-16  Doug Evans  <dje@sebabeach.org>
 385
 386         * cpu/simplify.inc (*): One line doc strings don't need \n.
 387         (df): Invoke define-full-ifield instead of claiming it's an alias.
 388         (dno): Define.
 389         (dnop): Mark as deprecated.
 390
 391 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 392
 393         * m32c.opc (parse_lab_5_3): Use correct enum.
 394
 395 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 396
 397         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 398         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 399         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 400         arguments of "operation" to DI using "mode" and the new pmacros.
 401
 402 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 403
 404         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 405         of number 2, PID.
 406
 407 2008-12-23  Jon Beniston <jon@beniston.com>
 408
 409         * lm32.cpu: New file.
 410         * lm32.opc: New file.
 411
 412 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 413
 414         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 415         to source.
 416
 417 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 418
 419         * cris.cpu (movs, movu): Use result of extension operation when
 420         updating flags.
 421
 422 2007-07-04  Nick Clifton  <nickc@redhat.com>
 423
 424         * cris.cpu: Update copyright notice to refer to GPLv3.
 425         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 426         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 427         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 428         xc16x.opc: Likewise.
 429         * iq2000.cpu: Fix copyright notice to refer to FSF.
 430
 431 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 432
 433         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 434
 435 2007-04-20  Nick Clifton  <nickc@redhat.com>
 436
 437         * xc16x.cpu: Restore after accidentally overwriting this file with
 438         xc16x.opc.
 439
 440 2007-03-29  DJ Delorie  <dj@redhat.com>
 441
 442         * m32c.cpu (Imm-8-s4n): Fix print hook.
 443         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 444         (arith-jnz-imm4-dst-defn): Make relaxable.
 445         (arith-jnz16-imm4-dst-defn): Fix encodings.
 446
 447 2007-03-20  DJ Delorie  <dj@redhat.com>
 448
 449         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 450         mem20): New.
 451         (src16-16-20-An-relative-*): New.
 452         (dst16-*-20-An-relative-*): New.
 453         (dst16-16-16sa-*): New
 454         (dst16-16-16ar-*): New
 455         (dst32-16-16sa-Unprefixed-*): New
 456         (jsri): Fix operands.
 457         (setzx): Fix encoding.
 458
 459 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 460
 461         * m32r.opc: Formatting.
 462
 463 2006-05-22  Nick Clifton  <nickc@redhat.com>
 464
 465         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 466
 467 2006-04-10  DJ Delorie  <dj@redhat.com>
 468
 469         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 470         decides if this function accepts symbolic constants or not.
 471         (parse_signed_bitbase): Likewise.
 472         (parse_unsigned_bitbase8): Pass the new parameter.
 473         (parse_unsigned_bitbase11): Likewise.
 474         (parse_unsigned_bitbase16): Likewise.
 475         (parse_unsigned_bitbase19): Likewise.
 476         (parse_unsigned_bitbase27): Likewise.
 477         (parse_signed_bitbase8): Likewise.
 478         (parse_signed_bitbase11): Likewise.
 479         (parse_signed_bitbase19): Likewise.
 480
 481 2006-03-13  DJ Delorie  <dj@redhat.com>
 482
 483         * m32c.cpu (Bit3-S): New.
 484         (btst:s): New.
 485         * m32c.opc (parse_bit3_S): New.
 486
 487         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 488         (btst): Add optional :G suffix for MACH32.
 489         (or.b:S): New.
 490         (pop.w:G): Add optional :G suffix for MACH16.
 491         (push.b.imm): Fix syntax.
 492
 493 2006-03-10  DJ Delorie  <dj@redhat.com>
 494
 495         * m32c.cpu (mul.l): New.
 496         (mulu.l): New.
 497
 498 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 499
 500         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 501         an error message otherwise.
 502         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 503         Fix up comments to correctly describe the functions.
 504
 505 2006-02-24  DJ Delorie  <dj@redhat.com>
 506
 507         * m32c.cpu (RL_TYPE): New attribute, with macros.
 508         (Lab-8-24): Add RELAX.
 509         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 510         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 511         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 512         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 513         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 514         attribute.
 515         (jsri16, jsri32): Add 1ADDR attribute.
 516         (jsr32.w, jsr32.a): Add JUMP attribute.
 517
 518 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 519             Anil Paranjape   <anilp1@kpitcummins.com>
 520             Shilin Shakti    <shilins@kpitcummins.com>
 521
 522         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 523         description.
 524         * xc16x.opc: New file containing supporting XC16C routines.
 525
 526 2006-02-10  Nick Clifton  <nickc@redhat.com>
 527
 528         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 529
 530 2006-01-06  DJ Delorie  <dj@redhat.com>
 531
 532         * m32c.cpu (mov.w:q): Fix mode.
 533         (push32.b.imm): Likewise, for the comment.
 534
 535 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 536
 537         Second part of ms1 to mt renaming.
 538         * mt.cpu (define-arch, define-isa): Set name to mt.
 539         (define-mach): Adjust.
 540         * mt.opc (CGEN_ASM_HASH): Update.
 541         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 542         (parse_loopsize, parse_imm16): Adjust.
 543
 544 2005-12-13  DJ Delorie  <dj@redhat.com>
 545
 546         * m32c.cpu (jsri): Fix order so register names aren't treated as
 547         symbols.
 548         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 549         indexwd, indexws): Fix encodings.
 550
 551 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 552
 553         * mt.cpu: Rename from ms1.cpu.
 554         * mt.opc: Rename from ms1.opc.
 555
 556 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 557
 558         * cris.cpu (simplecris-common-writable-specregs)
 559         (simplecris-common-readable-specregs): Split from
 560         simplecris-common-specregs.  All users changed.
 561         (cris-implemented-writable-specregs-v0)
 562         (cris-implemented-readable-specregs-v0): Similar from
 563         cris-implemented-specregs-v0.
 564         (cris-implemented-writable-specregs-v3)
 565         (cris-implemented-readable-specregs-v3)
 566         (cris-implemented-writable-specregs-v8)
 567         (cris-implemented-readable-specregs-v8)
 568         (cris-implemented-writable-specregs-v10)
 569         (cris-implemented-readable-specregs-v10)
 570         (cris-implemented-writable-specregs-v32)
 571         (cris-implemented-readable-specregs-v32): Similar.
 572         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 573         insns and specializations.
 574
 575 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 576
 577         Add ms2
 578         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 579         model.
 580         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 581         f-cb2incr, f-rc3): New fields.
 582         (LOOP): New instruction.
 583         (JAL-HAZARD): New hazard.
 584         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 585         New operands.
 586         (mul, muli, dbnz, iflush): Enable for ms2
 587         (jal, reti): Has JAL-HAZARD.
 588         (ldctxt, ldfb, stfb): Only ms1.
 589         (fbcb): Only ms1,ms1-003.
 590         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 591         fbcbincrs, mfbcbincrs): Enable for ms2.
 592         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 593         * ms1.opc (parse_loopsize): New.
 594         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 595         (print_pcrel): New.
 596
 597 2005-10-28  Dave Brolley  <brolley@redhat.com>
 598
 599         Contribute the following change:
 600         2003-09-24  Dave Brolley  <brolley@redhat.com>
 601
 602         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 603         CGEN_ATTR_VALUE_TYPE.
 604         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 605         Use cgen_bitset_intersect_p.
 606
 607 2005-10-27  DJ Delorie  <dj@redhat.com>
 608
 609         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 610         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 611         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 612         imm operand is needed.
 613         (adjnz, sbjnz): Pass the right operands.
 614         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 615         unary-insn): Add -g variants for opcodes that need to support :G.
 616         (not.BW:G, push.BW:G): Call it.
 617         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 618         stzx16-imm8-imm8-abs16): Fix operand typos.
 619         * m32c.opc (m32c_asm_hash): Support bnCND.
 620         (parse_signed4n, print_signed4n): New.
 621
 622 2005-10-26  DJ Delorie  <dj@redhat.com>
 623
 624         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 625         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 626         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 627         dsp8[sp] is signed.
 628         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 629         (mov.BW:S r0,r1): Fix typo r1l->r1.
 630         (tst): Allow :G suffix.
 631         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 632
 633 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 634
 635         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 636
 637 2005-10-25  DJ Delorie  <dj@redhat.com>
 638
 639         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 640         making one a macro of the other.
 641
 642 2005-10-21  DJ Delorie  <dj@redhat.com>
 643
 644         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 645         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 646         indexld, indexls): .w variants have `1' bit.
 647         (rot32.b): QI, not SI.
 648         (rot32.w): HI, not SI.
 649         (xchg16): HI for .w variant.
 650
 651 2005-10-19  Nick Clifton  <nickc@redhat.com>
 652
 653         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 654
 655 2005-10-18  Andreas Schwab  <schwab@suse.de>
 656
 657         * m32r.opc (parse_slo16): Better version of previous patch.
 658
 659 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 660
 661         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 662         size.
 663
 664 2005-07-25  DJ Delorie  <dj@redhat.com>
 665
 666         * m32c.opc (parse_unsigned8): Add %dsp8().
 667         (parse_signed8): Add %hi8().
 668         (parse_unsigned16): Add %dsp16().
 669         (parse_signed16): Add %lo16() and %hi16().
 670         (parse_lab_5_3): Make valuep a bfd_vma *.
 671
 672 2005-07-18  Nick Clifton  <nickc@redhat.com>
 673
 674         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 675         components.
 676         (f-lab32-jmp-s): Fix insertion sequence.
 677         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 678         (Dsp-40-s8): Make parameter be signed.
 679         (Dsp-40-s16): Likewise.
 680         (Dsp-48-s8): Likewise.
 681         (Dsp-48-s16): Likewise.
 682         (Imm-13-u3): Likewise. (Despite its name!)
 683         (BitBase16-16-s8): Make the parameter be unsigned.
 684         (BitBase16-8-u11-S): Likewise.
 685         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 686         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 687         relaxation.
 688
 689         * m32c.opc: Fix formatting.
 690         Use safe-ctype.h instead of ctype.h
 691         Move duplicated code sequences into a macro.
 692         Fix compile time warnings about signedness mismatches.
 693         Remove dead code.
 694         (parse_lab_5_3): New parser function.
 695
 696 2005-07-16  Jim Blandy  <jimb@redhat.com>
 697
 698         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 699         to represent isa sets.
 700
 701 2005-07-15  Jim Blandy  <jimb@redhat.com>
 702
 703         * m32c.cpu, m32c.opc: Fix copyright.
 704
 705 2005-07-14  Jim Blandy  <jimb@redhat.com>
 706
 707         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 708
 709 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 710
 711         * ms1.opc (print_dollarhex): Correct format string.
 712
 713 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 714
 715         * iq2000.cpu: Include from binutils cpu dir.
 716
 717 2005-07-05  Nick Clifton  <nickc@redhat.com>
 718
 719         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 720         unsigned in order to avoid compile time warnings about sign
 721         conflicts.
 722
 723         * ms1.opc (parse_*): Likewise.
 724         (parse_imm16): Use a "void *" as it is passed both signed and
 725         unsigned arguments.
 726
 727 2005-07-01  Nick Clifton  <nickc@redhat.com>
 728
 729         * frv.opc: Update to ISO C90 function declaration style.
 730         * iq2000.opc: Likewise.
 731         * m32r.opc: Likewise.
 732         * sh.opc: Likewise.
 733
 734 2005-06-15  Dave Brolley  <brolley@redhat.com>
 735
 736         Contributed by Red Hat.
 737         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 738         * ms1.opc: New file.  Written by Stan Cox.
 739
 740 2005-05-10  Nick Clifton  <nickc@redhat.com>
 741
 742         * Update the address and phone number of the FSF organization in
 743         the GPL notices in the following files:
 744         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 745         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 746         sh64-media.cpu, simplify.inc
 747
 748 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 749
 750         * frv.opc (parse_A): Warning fix.
 751
 752 2005-02-23  Nick Clifton  <nickc@redhat.com>
 753
 754         * frv.opc: Fixed compile time warnings about differing signed'ness
 755         of pointers passed to functions.
 756         * m32r.opc: Likewise.
 757
 758 2005-02-11  Nick Clifton  <nickc@redhat.com>
 759
 760         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 761         'bfd_vma *' in order avoid compile time warning message.
 762
 763 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 764
 765         * cris.cpu (mstep): Add missing insn.
 766
 767 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 768
 769         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 770         * frv.cpu: Add support for TLS annotations in loads and calll.
 771         * frv.opc (parse_symbolic_address): New.
 772         (parse_ldd_annotation): New.
 773         (parse_call_annotation): New.
 774         (parse_ld_annotation): New.
 775         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 776         Introduce TLS relocations.
 777         (parse_d12, parse_s12, parse_u12): Likewise.
 778         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 779         (parse_call_label, print_at): New.
 780
 781 2004-12-21  Mikael Starvik  <starvik@axis.com>
 782
 783         * cris.cpu (cris-set-mem): Correct integral write semantics.
 784
 785 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 786
 787         * cris.cpu: New file.
 788
 789 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 790
 791         * iq2000.cpu: Added quotes around macro arguments so that they
 792         will work with newer versions of guile.
 793
 794 2004-10-27  Nick Clifton  <nickc@redhat.com>
 795
 796         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 797         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 798         operand.
 799         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 800         with guile.
 801
 802 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 803
 804         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 805
 806 2004-05-15  Nick Clifton  <nickc@redhat.com>
 807
 808         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 809
 810 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 811
 812         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 813
 814 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 815
 816         * frv.cpu (define-arch frv): Add fr450 mach.
 817         (define-mach fr450): New.
 818         (define-model fr450): New.  Add profile units to every fr450 insn.
 819         (define-attr UNIT): Add MDCUTSSI.
 820         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 821         (define-attr AUDIO): New boolean.
 822         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 823         (f-LRA-null, f-TLBPR-null): New fields.
 824         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 825         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 826         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 827         (LRA-null, TLBPR-null): New macros.
 828         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 829         (load-real-address): New macro.
 830         (lrai, lrad, tlbpr): New instructions.
 831         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 832         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 833         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 834         (media-low-clear-semantics, media-scope-limit-semantics)
 835         (media-quad-limit, media-quad-shift): New macros.
 836         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 837         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 838         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 839         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 840         (fr450_unit_mapping): New array.
 841         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 842         for new MDCUTSSI unit.
 843         (fr450_check_insn_major_constraints): New function.
 844         (check_insn_major_constraints): Use it.
 845
 846 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 847
 848         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 849         (scutss): Change unit to I0.
 850         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 851         (mqsaths): Fix FR400-MAJOR categorization.
 852         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 853         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 854         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 855         combinations.
 856
 857 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 858
 859         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 860         (rstb, rsth, rst, rstd, rstq): Delete.
 861         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 862
 863 2004-02-23  Nick Clifton  <nickc@redhat.com>
 864
 865         * Apply these patches from Renesas:
 866
 867         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 868
 869         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 870         disassembling codes for 0x*2 addresses.
 871
 872         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 873
 874         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 875
 876         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 877
 878         * cpu/m32r.cpu : Add new model m32r2.
 879         Add new instructions.
 880         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 881         Changed PIPE attr of push from O to OS.
 882         Care for Little-endian of M32R.
 883         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
 884         Care for Little-endian of M32R.
 885         (parse_slo16): signed extension for value.
 886
 887 2004-02-20  Andrew Cagney  <cagney@redhat.com>
 888
 889         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
 890         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
 891
 892         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
 893         written by Ben Elliston.
 894
 895 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 896
 897         * frv.cpu (UNIT): Add IACC.
 898         (iacc-multiply-r-r): Use it.
 899         * frv.opc (fr400_unit_mapping): Add entry for IACC.
 900         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
 901
 902 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 903
 904         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 905         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
 906         cut&paste errors in shifting/truncating numerical operands.
 907         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
 908         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 909         (parse_uslo16): Likewise.
 910         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 911         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 912         (parse_s12): Likewise.
 913         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 914         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
 915         (parse_uslo16): Likewise.
 916         (parse_uhi16): Parse gothi and gotfuncdeschi.
 917         (parse_d12): Parse got12 and gotfuncdesc12.
 918         (parse_s12): Likewise.
 919
 920 2003-10-10  Dave Brolley  <brolley@redhat.com>
 921
 922         * frv.cpu (dnpmop): New p-macro.
 923         (GRdoublek): Use dnpmop.
 924         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
 925         (store-double-r-r): Use (.sym regtype doublek).
 926         (r-store-double): Ditto.
 927         (store-double-r-r-u): Ditto.
 928         (conditional-store-double): Ditto.
 929         (conditional-store-double-u): Ditto.
 930         (store-double-r-simm): Ditto.
 931         (fmovs): Assign to UNIT FMALL.
 932
 933 2003-10-06  Dave Brolley  <brolley@redhat.com>
 934
 935         * frv.cpu, frv.opc: Add support for fr550.
 936
 937 2003-09-24  Dave Brolley  <brolley@redhat.com>
 938
 939         * frv.cpu (u-commit): New modelling unit for fr500.
 940         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
 941         (commit-r): Use u-commit model for fr500.
 942         (commit): Ditto.
 943         (conditional-float-binary-op): Take profiling data as an argument.
 944         Update callers.
 945         (ne-float-binary-op): Ditto.
 946
 947 2003-09-19  Michael Snyder  <msnyder@redhat.com>
 948
 949         * frv.cpu (nldqi): Delete unimplemented instruction.
 950
 951 2003-09-12  Dave Brolley  <brolley@redhat.com>
 952
 953         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
 954         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
 955         frv_ref_SI to get input register referenced for profiling.
 956         (clear-ne-flag-all): Pass insn profiling in as an argument.
 957         (clrgr,clrfr,clrga,clrfa): Add profiling information.
 958
 959 2003-09-11  Michael Snyder  <msnyder@redhat.com>
 960
 961         * frv.cpu: Typographical corrections.
 962
 963 2003-09-09  Dave Brolley  <brolley@redhat.com>
 964
 965         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
 966         (conditional-media-dual-complex, media-quad-complex): Likewise.
 967
 968 2003-09-04  Dave Brolley  <brolley@redhat.com>
 969
 970         * frv.cpu (register-transfer): Pass in all attributes in on argument.
 971         Update all callers.
 972         (conditional-register-transfer): Ditto.
 973         (cache-preload): Ditto.
 974         (floating-point-conversion): Ditto.
 975         (floating-point-neg): Ditto.
 976         (float-abs): Ditto.
 977         (float-binary-op-s): Ditto.
 978         (conditional-float-binary-op): Ditto.
 979         (ne-float-binary-op): Ditto.
 980         (float-dual-arith): Ditto.
 981         (ne-float-dual-arith): Ditto.
 982
 983 2003-09-03  Dave Brolley  <brolley@redhat.com>
 984
 985         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
 986         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
 987         MCLRACC-1.
 988         (A): Removed operand.
 989         (A0,A1): New operands replace operand A.
 990         (mnop): Now a real insn
 991         (mclracc): Removed insn.
 992         (mclracc-0, mclracc-1): New insns replace mclracc.
 993         (all insns): Use new UNIT attributes.
 994
 995 2003-08-21  Nick Clifton  <nickc@redhat.com>
 996
 997         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
 998         and u-media-dual-btoh with output parameter.
 999         (cmbtoh): Add profiling hack.
1000
1001 2003-08-19  Michael Snyder  <msnyder@redhat.com>
1002
1003         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1004
1005 2003-06-10  Doug Evans  <dje@sebabeach.org>
1006
1007         * frv.cpu: Add IDOC attribute.
1008
1009 2003-06-06  Andrew Cagney  <cagney@redhat.com>
1010
1011         Contributed by Red Hat.
1012         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
1013         Stan Cox, and Frank Ch. Eigler.
1014         * iq2000.opc: New file.  Written by Ben Elliston, Frank
1015         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1016         * iq2000m.cpu: New file.  Written by Jeff Johnston.
1017         * iq10.cpu: New file.  Written by Jeff Johnston.
1018
1019 2003-06-05  Nick Clifton  <nickc@redhat.com>
1020
1021         * frv.cpu (FRintieven): New operand.  An even-numbered only
1022         version of the FRinti operand.
1023         (FRintjeven): Likewise for FRintj.
1024         (FRintkeven): Likewise for FRintk.
1025         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1026         media-quad-arith-sat-semantics, media-quad-arith-sat,
1027         conditional-media-quad-arith-sat, mdunpackh,
1028         media-quad-multiply-semantics, media-quad-multiply,
1029         conditional-media-quad-multiply, media-quad-complex-i,
1030         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1031         conditional-media-quad-multiply-acc, munpackh,
1032         media-quad-multiply-cross-acc-semantics, mdpackh,
1033         media-quad-multiply-cross-acc, mbtoh-semantics,
1034         media-quad-cross-multiply-cross-acc-semantics,
1035         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1036         media-quad-cross-multiply-acc-semantics, cmbtoh,
1037         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1038         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1039         cmhtob): Use new operands.
1040         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1041         (parse_even_register): New function.
1042
1043 2003-06-03  Nick Clifton  <nickc@redhat.com>
1044
1045         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1046         immediate value not unsigned.
1047
1048 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1049
1050         Contributed by Red Hat.
1051         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1052         and Eric Christopher.
1053         * frv.opc: New file.  Written by Catherine Moore, and Dave
1054         Brolley.
1055         * simplify.inc: New file.  Written by Doug Evans.
1056
1057 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1058
1059         * New file.
1060
1061 \f
1062 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1063
1064 Copying and distribution of this file, with or without modification,
1065 are permitted in any medium without royalty provided the copyright
1066 notice and this notice are preserved.
1067
1068 Local Variables:
1069 mode: change-log
1070 left-margin: 8
1071 fill-column: 74
1072 version-control: never
1073 End: