1 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
3 * or1korbis.cpu (h-atomic-reserve): New hardware.
4 (h-atomic-address): Likewise.
5 (insn-opcode): Add opcodes for LWA and SWA.
6 (atomic-reserve): New operand.
7 (atomic-address): Likewise.
8 (l-lwa, l-swa): New instructions.
9 (l-lbs): Fix typo in comment.
10 (store-insn): Clear atomic reserve on store to atomic-address.
11 Fix register names in fmt field.
13 2014-04-22 Christian Svensson <blue@cmd.nu>
15 * openrisc.cpu: Delete.
16 * openrisc.opc: Delete.
19 * or1kcommon.cpu: New file.
20 * or1korbis.cpu: New file.
21 * or1korfpx.cpu: New file.
23 2013-12-07 Mike Frysinger <vapier@gentoo.org>
25 * epiphany.opc: Remove +x file mode.
27 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
30 * lm32.cpu (Control and status registers): Add CFG2, PSW,
31 TLBVADDR, TLBPADDR and TLBBADVADDR.
33 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
34 Joern Rennecke <joern.rennecke@embecosm.com>
36 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
37 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
38 (testset-insn): Add NO_DIS attribute to t.l.
39 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
40 (move-insns): Add NO-DIS attribute to cmov.l.
41 (op-mmr-movts): Add NO-DIS attribute to movts.l.
42 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
43 (op-rrr): Add NO-DIS attribute to .l.
44 (shift-rrr): Add NO-DIS attribute to .l.
45 (op-shift-rri): Add NO-DIS attribute to i32.l.
46 (bitrl, movtl): Add NO-DIS attribute.
47 (op-iextrrr): Add NO-DIS attribute to .l
48 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
49 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
51 2012-02-27 Alan Modra <amodra@gmail.com>
53 * mt.opc (print_dollarhex): Trim values to 32 bits.
55 2011-12-15 Nick Clifton <nickc@redhat.com>
57 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
60 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
62 * epiphany.opc (parse_branch_addr): Fix type of valuep.
63 Cast value before printing it as a long.
64 (parse_postindex): Fix type of valuep.
66 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
68 * cpu/epiphany.cpu: New file.
69 * cpu/epiphany.opc: New file.
71 2011-08-22 Nick Clifton <nickc@redhat.com>
73 * fr30.cpu: Newly contributed file.
77 * mep-avc.cpu: Likewise.
78 * mep-avc2.cpu: Likewise.
79 * mep-c5.cpu: Likewise.
80 * mep-core.cpu: Likewise.
81 * mep-default.cpu: Likewise.
82 * mep-ext-cop.cpu: Likewise.
83 * mep-fmax.cpu: Likewise.
84 * mep-h1.cpu: Likewise.
85 * mep-ivc2.cpu: Likewise.
86 * mep-rhcop.cpu: Likewise.
87 * mep-sample-ucidsp.cpu: Likewise.
90 * openrisc.cpu: Likewise.
91 * openrisc.opc: Likewise.
92 * xstormy16.cpu: Likewise.
93 * xstormy16.opc: Likewise.
95 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
97 * frv.opc: #undef DEBUG.
99 2010-07-03 DJ Delorie <dj@delorie.com>
101 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
103 2010-02-11 Doug Evans <dje@sebabeach.org>
105 * m32r.cpu (HASH-PREFIX): Delete.
106 (duhpo, dshpo): New pmacros.
107 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
108 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
109 attribute, define with dshpo.
110 (uimm24): Delete HASH-PREFIX attribute.
111 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
112 (print_signed_with_hash_prefix): New function.
113 (print_unsigned_with_hash_prefix): New function.
114 * xc16x.cpu (dowh): New pmacro.
115 (upof16): Define with dowh, specify print handler.
116 (qbit, qlobit, qhibit): Ditto.
118 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
119 (print_with_dot_prefix): New functions.
120 (print_with_pof_prefix, print_with_pag_prefix): New functions.
122 2010-01-24 Doug Evans <dje@sebabeach.org>
124 * frv.cpu (floating-point-conversion): Update call to fp conv op.
125 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
126 conditional-floating-point-conversion, ne-floating-point-conversion,
127 float-parallel-mul-add-double-semantics): Ditto.
129 2010-01-05 Doug Evans <dje@sebabeach.org>
131 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
132 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
134 2010-01-02 Doug Evans <dje@sebabeach.org>
136 * m32c.opc (parse_signed16): Fix typo.
138 2009-12-11 Nick Clifton <nickc@redhat.com>
140 * frv.opc: Fix shadowed variable warnings.
141 * m32c.opc: Fix shadowed variable warnings.
143 2009-11-14 Doug Evans <dje@sebabeach.org>
145 Must use VOID expression in VOID context.
146 * xc16x.cpu (mov4): Fix mode of `sequence'.
147 (mov9, mov10): Ditto.
148 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
149 (callr, callseg, calls, trap, rets, reti): Ditto.
150 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
151 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
152 (exts, exts1, extsr, extsr1, prior): Ditto.
154 2009-10-23 Doug Evans <dje@sebabeach.org>
156 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
157 cgen-ops.h -> cgen/basic-ops.h.
159 2009-09-25 Alan Modra <amodra@bigpond.net.au>
161 * m32r.cpu (stb-plus): Typo fix.
163 2009-09-23 Doug Evans <dje@sebabeach.org>
165 * m32r.cpu (sth-plus): Fix address mode and calculation.
167 (clrpsw): Fix mask calculation.
168 (bset, bclr, btst): Make mode in bit calculation match expression.
170 * xc16x.cpu (rtl-version): Set to 0.8.
171 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
172 make uppercase. Remove unnecessary name-prefix spec.
173 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
174 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
175 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
176 (h-cr): New hardware.
177 (muls): Comment out parts that won't compile, add fixme.
178 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
179 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
180 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
182 2009-07-16 Doug Evans <dje@sebabeach.org>
184 * cpu/simplify.inc (*): One line doc strings don't need \n.
185 (df): Invoke define-full-ifield instead of claiming it's an alias.
187 (dnop): Mark as deprecated.
189 2009-06-22 Alan Modra <amodra@bigpond.net.au>
191 * m32c.opc (parse_lab_5_3): Use correct enum.
193 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
195 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
196 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
197 (media-arith-sat-semantics): Explicitly sign- or zero-extend
198 arguments of "operation" to DI using "mode" and the new pmacros.
200 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
202 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
205 2008-12-23 Jon Beniston <jon@beniston.com>
207 * lm32.cpu: New file.
208 * lm32.opc: New file.
210 2008-01-29 Alan Modra <amodra@bigpond.net.au>
212 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
215 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
217 * cris.cpu (movs, movu): Use result of extension operation when
220 2007-07-04 Nick Clifton <nickc@redhat.com>
222 * cris.cpu: Update copyright notice to refer to GPLv3.
223 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
224 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
225 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
227 * iq2000.cpu: Fix copyright notice to refer to FSF.
229 2007-04-30 Mark Salter <msalter@sadr.localdomain>
231 * frv.cpu (spr-names): Support new coprocessor SPR registers.
233 2007-04-20 Nick Clifton <nickc@redhat.com>
235 * xc16x.cpu: Restore after accidentally overwriting this file with
238 2007-03-29 DJ Delorie <dj@redhat.com>
240 * m32c.cpu (Imm-8-s4n): Fix print hook.
241 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
242 (arith-jnz-imm4-dst-defn): Make relaxable.
243 (arith-jnz16-imm4-dst-defn): Fix encodings.
245 2007-03-20 DJ Delorie <dj@redhat.com>
247 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
249 (src16-16-20-An-relative-*): New.
250 (dst16-*-20-An-relative-*): New.
251 (dst16-16-16sa-*): New
252 (dst16-16-16ar-*): New
253 (dst32-16-16sa-Unprefixed-*): New
254 (jsri): Fix operands.
255 (setzx): Fix encoding.
257 2007-03-08 Alan Modra <amodra@bigpond.net.au>
259 * m32r.opc: Formatting.
261 2006-05-22 Nick Clifton <nickc@redhat.com>
263 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
265 2006-04-10 DJ Delorie <dj@redhat.com>
267 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
268 decides if this function accepts symbolic constants or not.
269 (parse_signed_bitbase): Likewise.
270 (parse_unsigned_bitbase8): Pass the new parameter.
271 (parse_unsigned_bitbase11): Likewise.
272 (parse_unsigned_bitbase16): Likewise.
273 (parse_unsigned_bitbase19): Likewise.
274 (parse_unsigned_bitbase27): Likewise.
275 (parse_signed_bitbase8): Likewise.
276 (parse_signed_bitbase11): Likewise.
277 (parse_signed_bitbase19): Likewise.
279 2006-03-13 DJ Delorie <dj@redhat.com>
281 * m32c.cpu (Bit3-S): New.
283 * m32c.opc (parse_bit3_S): New.
285 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
286 (btst): Add optional :G suffix for MACH32.
288 (pop.w:G): Add optional :G suffix for MACH16.
289 (push.b.imm): Fix syntax.
291 2006-03-10 DJ Delorie <dj@redhat.com>
293 * m32c.cpu (mul.l): New.
296 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
298 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
299 an error message otherwise.
300 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
301 Fix up comments to correctly describe the functions.
303 2006-02-24 DJ Delorie <dj@redhat.com>
305 * m32c.cpu (RL_TYPE): New attribute, with macros.
306 (Lab-8-24): Add RELAX.
307 (unary-insn-defn-g, binary-arith-imm-dst-defn,
308 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
309 (binary-arith-src-dst-defn): Add 2ADDR attribute.
310 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
311 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
313 (jsri16, jsri32): Add 1ADDR attribute.
314 (jsr32.w, jsr32.a): Add JUMP attribute.
316 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
317 Anil Paranjape <anilp1@kpitcummins.com>
318 Shilin Shakti <shilins@kpitcummins.com>
320 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
322 * xc16x.opc: New file containing supporting XC16C routines.
324 2006-02-10 Nick Clifton <nickc@redhat.com>
326 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
328 2006-01-06 DJ Delorie <dj@redhat.com>
330 * m32c.cpu (mov.w:q): Fix mode.
331 (push32.b.imm): Likewise, for the comment.
333 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
335 Second part of ms1 to mt renaming.
336 * mt.cpu (define-arch, define-isa): Set name to mt.
337 (define-mach): Adjust.
338 * mt.opc (CGEN_ASM_HASH): Update.
339 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
340 (parse_loopsize, parse_imm16): Adjust.
342 2005-12-13 DJ Delorie <dj@redhat.com>
344 * m32c.cpu (jsri): Fix order so register names aren't treated as
346 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
347 indexwd, indexws): Fix encodings.
349 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
351 * mt.cpu: Rename from ms1.cpu.
352 * mt.opc: Rename from ms1.opc.
354 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
356 * cris.cpu (simplecris-common-writable-specregs)
357 (simplecris-common-readable-specregs): Split from
358 simplecris-common-specregs. All users changed.
359 (cris-implemented-writable-specregs-v0)
360 (cris-implemented-readable-specregs-v0): Similar from
361 cris-implemented-specregs-v0.
362 (cris-implemented-writable-specregs-v3)
363 (cris-implemented-readable-specregs-v3)
364 (cris-implemented-writable-specregs-v8)
365 (cris-implemented-readable-specregs-v8)
366 (cris-implemented-writable-specregs-v10)
367 (cris-implemented-readable-specregs-v10)
368 (cris-implemented-writable-specregs-v32)
369 (cris-implemented-readable-specregs-v32): Similar.
370 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
371 insns and specializations.
373 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
376 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
378 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
379 f-cb2incr, f-rc3): New fields.
380 (LOOP): New instruction.
381 (JAL-HAZARD): New hazard.
382 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
384 (mul, muli, dbnz, iflush): Enable for ms2
385 (jal, reti): Has JAL-HAZARD.
386 (ldctxt, ldfb, stfb): Only ms1.
387 (fbcb): Only ms1,ms1-003.
388 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
389 fbcbincrs, mfbcbincrs): Enable for ms2.
390 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
391 * ms1.opc (parse_loopsize): New.
392 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
395 2005-10-28 Dave Brolley <brolley@redhat.com>
397 Contribute the following change:
398 2003-09-24 Dave Brolley <brolley@redhat.com>
400 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
401 CGEN_ATTR_VALUE_TYPE.
402 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
403 Use cgen_bitset_intersect_p.
405 2005-10-27 DJ Delorie <dj@redhat.com>
407 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
408 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
409 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
410 imm operand is needed.
411 (adjnz, sbjnz): Pass the right operands.
412 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
413 unary-insn): Add -g variants for opcodes that need to support :G.
414 (not.BW:G, push.BW:G): Call it.
415 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
416 stzx16-imm8-imm8-abs16): Fix operand typos.
417 * m32c.opc (m32c_asm_hash): Support bnCND.
418 (parse_signed4n, print_signed4n): New.
420 2005-10-26 DJ Delorie <dj@redhat.com>
422 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
423 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
424 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
426 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
427 (mov.BW:S r0,r1): Fix typo r1l->r1.
428 (tst): Allow :G suffix.
429 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
431 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
433 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
435 2005-10-25 DJ Delorie <dj@redhat.com>
437 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
438 making one a macro of the other.
440 2005-10-21 DJ Delorie <dj@redhat.com>
442 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
443 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
444 indexld, indexls): .w variants have `1' bit.
445 (rot32.b): QI, not SI.
446 (rot32.w): HI, not SI.
447 (xchg16): HI for .w variant.
449 2005-10-19 Nick Clifton <nickc@redhat.com>
451 * m32r.opc (parse_slo16): Fix bad application of previous patch.
453 2005-10-18 Andreas Schwab <schwab@suse.de>
455 * m32r.opc (parse_slo16): Better version of previous patch.
457 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
459 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
462 2005-07-25 DJ Delorie <dj@redhat.com>
464 * m32c.opc (parse_unsigned8): Add %dsp8().
465 (parse_signed8): Add %hi8().
466 (parse_unsigned16): Add %dsp16().
467 (parse_signed16): Add %lo16() and %hi16().
468 (parse_lab_5_3): Make valuep a bfd_vma *.
470 2005-07-18 Nick Clifton <nickc@redhat.com>
472 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
474 (f-lab32-jmp-s): Fix insertion sequence.
475 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
476 (Dsp-40-s8): Make parameter be signed.
477 (Dsp-40-s16): Likewise.
478 (Dsp-48-s8): Likewise.
479 (Dsp-48-s16): Likewise.
480 (Imm-13-u3): Likewise. (Despite its name!)
481 (BitBase16-16-s8): Make the parameter be unsigned.
482 (BitBase16-8-u11-S): Likewise.
483 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
484 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
487 * m32c.opc: Fix formatting.
488 Use safe-ctype.h instead of ctype.h
489 Move duplicated code sequences into a macro.
490 Fix compile time warnings about signedness mismatches.
492 (parse_lab_5_3): New parser function.
494 2005-07-16 Jim Blandy <jimb@redhat.com>
496 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
497 to represent isa sets.
499 2005-07-15 Jim Blandy <jimb@redhat.com>
501 * m32c.cpu, m32c.opc: Fix copyright.
503 2005-07-14 Jim Blandy <jimb@redhat.com>
505 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
507 2005-07-14 Alan Modra <amodra@bigpond.net.au>
509 * ms1.opc (print_dollarhex): Correct format string.
511 2005-07-06 Alan Modra <amodra@bigpond.net.au>
513 * iq2000.cpu: Include from binutils cpu dir.
515 2005-07-05 Nick Clifton <nickc@redhat.com>
517 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
518 unsigned in order to avoid compile time warnings about sign
521 * ms1.opc (parse_*): Likewise.
522 (parse_imm16): Use a "void *" as it is passed both signed and
525 2005-07-01 Nick Clifton <nickc@redhat.com>
527 * frv.opc: Update to ISO C90 function declaration style.
528 * iq2000.opc: Likewise.
529 * m32r.opc: Likewise.
532 2005-06-15 Dave Brolley <brolley@redhat.com>
534 Contributed by Red Hat.
535 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
536 * ms1.opc: New file. Written by Stan Cox.
538 2005-05-10 Nick Clifton <nickc@redhat.com>
540 * Update the address and phone number of the FSF organization in
541 the GPL notices in the following files:
542 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
543 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
544 sh64-media.cpu, simplify.inc
546 2005-02-24 Alan Modra <amodra@bigpond.net.au>
548 * frv.opc (parse_A): Warning fix.
550 2005-02-23 Nick Clifton <nickc@redhat.com>
552 * frv.opc: Fixed compile time warnings about differing signed'ness
553 of pointers passed to functions.
554 * m32r.opc: Likewise.
556 2005-02-11 Nick Clifton <nickc@redhat.com>
558 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
559 'bfd_vma *' in order avoid compile time warning message.
561 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
563 * cris.cpu (mstep): Add missing insn.
565 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
567 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
568 * frv.cpu: Add support for TLS annotations in loads and calll.
569 * frv.opc (parse_symbolic_address): New.
570 (parse_ldd_annotation): New.
571 (parse_call_annotation): New.
572 (parse_ld_annotation): New.
573 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
574 Introduce TLS relocations.
575 (parse_d12, parse_s12, parse_u12): Likewise.
576 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
577 (parse_call_label, print_at): New.
579 2004-12-21 Mikael Starvik <starvik@axis.com>
581 * cris.cpu (cris-set-mem): Correct integral write semantics.
583 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
585 * cris.cpu: New file.
587 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
589 * iq2000.cpu: Added quotes around macro arguments so that they
590 will work with newer versions of guile.
592 2004-10-27 Nick Clifton <nickc@redhat.com>
594 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
595 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
597 * iq2000.cpu (dnop index): Rename to _index to avoid complications
600 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
602 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
604 2004-05-15 Nick Clifton <nickc@redhat.com>
606 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
608 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
610 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
612 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
614 * frv.cpu (define-arch frv): Add fr450 mach.
615 (define-mach fr450): New.
616 (define-model fr450): New. Add profile units to every fr450 insn.
617 (define-attr UNIT): Add MDCUTSSI.
618 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
619 (define-attr AUDIO): New boolean.
620 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
621 (f-LRA-null, f-TLBPR-null): New fields.
622 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
623 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
624 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
625 (LRA-null, TLBPR-null): New macros.
626 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
627 (load-real-address): New macro.
628 (lrai, lrad, tlbpr): New instructions.
629 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
630 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
631 (mdcutssi): Change UNIT attribute to MDCUTSSI.
632 (media-low-clear-semantics, media-scope-limit-semantics)
633 (media-quad-limit, media-quad-shift): New macros.
634 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
635 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
636 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
637 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
638 (fr450_unit_mapping): New array.
639 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
640 for new MDCUTSSI unit.
641 (fr450_check_insn_major_constraints): New function.
642 (check_insn_major_constraints): Use it.
644 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
646 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
647 (scutss): Change unit to I0.
648 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
649 (mqsaths): Fix FR400-MAJOR categorization.
650 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
651 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
652 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
655 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
657 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
658 (rstb, rsth, rst, rstd, rstq): Delete.
659 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
661 2004-02-23 Nick Clifton <nickc@redhat.com>
663 * Apply these patches from Renesas:
665 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
667 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
668 disassembling codes for 0x*2 addresses.
670 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
672 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
674 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
676 * cpu/m32r.cpu : Add new model m32r2.
677 Add new instructions.
678 Replace occurrances of 'Mitsubishi' with 'Renesas'.
679 Changed PIPE attr of push from O to OS.
680 Care for Little-endian of M32R.
681 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
682 Care for Little-endian of M32R.
683 (parse_slo16): signed extension for value.
685 2004-02-20 Andrew Cagney <cagney@redhat.com>
687 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
688 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
690 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
691 written by Ben Elliston.
693 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
695 * frv.cpu (UNIT): Add IACC.
696 (iacc-multiply-r-r): Use it.
697 * frv.opc (fr400_unit_mapping): Add entry for IACC.
698 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
700 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
702 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
703 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
704 cut&paste errors in shifting/truncating numerical operands.
705 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
706 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
707 (parse_uslo16): Likewise.
708 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
709 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
710 (parse_s12): Likewise.
711 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
712 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
713 (parse_uslo16): Likewise.
714 (parse_uhi16): Parse gothi and gotfuncdeschi.
715 (parse_d12): Parse got12 and gotfuncdesc12.
716 (parse_s12): Likewise.
718 2003-10-10 Dave Brolley <brolley@redhat.com>
720 * frv.cpu (dnpmop): New p-macro.
721 (GRdoublek): Use dnpmop.
722 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
723 (store-double-r-r): Use (.sym regtype doublek).
724 (r-store-double): Ditto.
725 (store-double-r-r-u): Ditto.
726 (conditional-store-double): Ditto.
727 (conditional-store-double-u): Ditto.
728 (store-double-r-simm): Ditto.
729 (fmovs): Assign to UNIT FMALL.
731 2003-10-06 Dave Brolley <brolley@redhat.com>
733 * frv.cpu, frv.opc: Add support for fr550.
735 2003-09-24 Dave Brolley <brolley@redhat.com>
737 * frv.cpu (u-commit): New modelling unit for fr500.
738 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
739 (commit-r): Use u-commit model for fr500.
741 (conditional-float-binary-op): Take profiling data as an argument.
743 (ne-float-binary-op): Ditto.
745 2003-09-19 Michael Snyder <msnyder@redhat.com>
747 * frv.cpu (nldqi): Delete unimplemented instruction.
749 2003-09-12 Dave Brolley <brolley@redhat.com>
751 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
752 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
753 frv_ref_SI to get input register referenced for profiling.
754 (clear-ne-flag-all): Pass insn profiling in as an argument.
755 (clrgr,clrfr,clrga,clrfa): Add profiling information.
757 2003-09-11 Michael Snyder <msnyder@redhat.com>
759 * frv.cpu: Typographical corrections.
761 2003-09-09 Dave Brolley <brolley@redhat.com>
763 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
764 (conditional-media-dual-complex, media-quad-complex): Likewise.
766 2003-09-04 Dave Brolley <brolley@redhat.com>
768 * frv.cpu (register-transfer): Pass in all attributes in on argument.
770 (conditional-register-transfer): Ditto.
771 (cache-preload): Ditto.
772 (floating-point-conversion): Ditto.
773 (floating-point-neg): Ditto.
775 (float-binary-op-s): Ditto.
776 (conditional-float-binary-op): Ditto.
777 (ne-float-binary-op): Ditto.
778 (float-dual-arith): Ditto.
779 (ne-float-dual-arith): Ditto.
781 2003-09-03 Dave Brolley <brolley@redhat.com>
783 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
784 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
786 (A): Removed operand.
787 (A0,A1): New operands replace operand A.
788 (mnop): Now a real insn
789 (mclracc): Removed insn.
790 (mclracc-0, mclracc-1): New insns replace mclracc.
791 (all insns): Use new UNIT attributes.
793 2003-08-21 Nick Clifton <nickc@redhat.com>
795 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
796 and u-media-dual-btoh with output parameter.
797 (cmbtoh): Add profiling hack.
799 2003-08-19 Michael Snyder <msnyder@redhat.com>
801 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
803 2003-06-10 Doug Evans <dje@sebabeach.org>
805 * frv.cpu: Add IDOC attribute.
807 2003-06-06 Andrew Cagney <cagney@redhat.com>
809 Contributed by Red Hat.
810 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
811 Stan Cox, and Frank Ch. Eigler.
812 * iq2000.opc: New file. Written by Ben Elliston, Frank
813 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
814 * iq2000m.cpu: New file. Written by Jeff Johnston.
815 * iq10.cpu: New file. Written by Jeff Johnston.
817 2003-06-05 Nick Clifton <nickc@redhat.com>
819 * frv.cpu (FRintieven): New operand. An even-numbered only
820 version of the FRinti operand.
821 (FRintjeven): Likewise for FRintj.
822 (FRintkeven): Likewise for FRintk.
823 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
824 media-quad-arith-sat-semantics, media-quad-arith-sat,
825 conditional-media-quad-arith-sat, mdunpackh,
826 media-quad-multiply-semantics, media-quad-multiply,
827 conditional-media-quad-multiply, media-quad-complex-i,
828 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
829 conditional-media-quad-multiply-acc, munpackh,
830 media-quad-multiply-cross-acc-semantics, mdpackh,
831 media-quad-multiply-cross-acc, mbtoh-semantics,
832 media-quad-cross-multiply-cross-acc-semantics,
833 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
834 media-quad-cross-multiply-acc-semantics, cmbtoh,
835 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
836 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
837 cmhtob): Use new operands.
838 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
839 (parse_even_register): New function.
841 2003-06-03 Nick Clifton <nickc@redhat.com>
843 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
844 immediate value not unsigned.
846 2003-06-03 Andrew Cagney <cagney@redhat.com>
848 Contributed by Red Hat.
849 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
850 and Eric Christopher.
851 * frv.opc: New file. Written by Catherine Moore, and Dave
853 * simplify.inc: New file. Written by Doug Evans.
855 2003-05-02 Andrew Cagney <cagney@redhat.com>
860 Copyright (C) 2003-2012 Free Software Foundation, Inc.
862 Copying and distribution of this file, with or without modification,
863 are permitted in any medium without royalty provided the copyright
864 notice and this notice are preserved.
870 version-control: never