cpu/ChangeLog

   1 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
   2
   3         * bpf.cpu: New file.
   4         * bpf.opc: Likewise.
   5
   6 2018-06-24  Nick Clifton  <nickc@redhat.com>
   7
   8         2.32 branch created.
   9
  10 2018-10-05  Richard Henderson  <rth@twiddle.net>
  11             Stafford Horne  <shorne@gmail.com>
  12
  13         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
  14         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
  15         (l-mul): Fix overflow support and indentation.
  16         (l-mulu): Fix overflow support and indentation.
  17         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
  18         (l-div); Remove incorrect carry behavior.
  19         (l-divu): Fix carry and overflow behavior.
  20         (l-mac): Add overflow support.
  21         (l-msb, l-msbu): Add carry and overflow support.
  22
  23 2018-10-05  Richard Henderson  <rth@twiddle.net>
  24
  25         * or1k.opc (parse_disp26): Add support for plta() relocations.
  26         (parse_disp21): New function.
  27         (or1k_rclass): New enum.
  28         (or1k_rtype): New enum.
  29         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
  30         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
  31         (parse_imm16): Add support for the new 21bit and 13bit relocations.
  32         * or1korbis.cpu (f-disp26): Don't assume SI.
  33         (f-disp21): New pc-relative 21-bit 13 shifted to right.
  34         (insn-opcode): Add ADRP.
  35         (l-adrp): New instruction.
  36
  37 2018-10-05  Richard Henderson  <rth@twiddle.net>
  38
  39         * or1k.opc: Add RTYPE_ enum.
  40         (INVALID_STORE_RELOC): New string.
  41         (or1k_imm16_relocs): New array array.
  42         (parse_reloc): New static function that just does the parsing.
  43         (parse_imm16): New static function for generic parsing.
  44         (parse_simm16): Change to just call parse_imm16.
  45         (parse_simm16_split): New function.
  46         (parse_uimm16): Change to call parse_imm16.
  47         (parse_uimm16_split): New function.
  48         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
  49         (uimm16-split): Change to use new uimm16_split.
  50
  51 2018-07-24  Alan Modra  <amodra@gmail.com>
  52
  53         PR 23430
  54         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
  55
  56 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
  57
  58         * or1kcommon.cpu (spr-reg-info): Typo fix.
  59
  60 2018-03-03  Alan Modra  <amodra@gmail.com>
  61
  62         * frv.opc: Include opintl.h.
  63         (add_next_to_vliw): Use opcodes_error_handler to print error.
  64         Standardize error message.
  65         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
  66
  67 2018-01-13  Nick Clifton  <nickc@redhat.com>
  68
  69         2.30 branch created.
  70
  71 2017-03-15  Stafford Horne  <shorne@gmail.com>
  72
  73         * or1kcommon.cpu: Add pc set semantics to also update ppc.
  74
  75 2016-10-06  Alan Modra  <amodra@gmail.com>
  76
  77         * mep.opc (expand_string): Add fall through comment.
  78
  79 2016-03-03  Alan Modra  <amodra@gmail.com>
  80
  81         * fr30.cpu (f-m4): Replace bogus comment with a better guess
  82         at what is really going on.
  83
  84 2016-03-02  Alan Modra  <amodra@gmail.com>
  85
  86         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
  87
  88 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
  89
  90         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
  91         a constant to better align disassembler output.
  92
  93 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
  94
  95         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
  96
  97 2014-06-12  Alan Modra  <amodra@gmail.com>
  98
  99         * or1k.opc: Whitespace fixes.
 100
 101 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 102
 103         * or1korbis.cpu (h-atomic-reserve): New hardware.
 104         (h-atomic-address): Likewise.
 105         (insn-opcode): Add opcodes for LWA and SWA.
 106         (atomic-reserve): New operand.
 107         (atomic-address): Likewise.
 108         (l-lwa, l-swa): New instructions.
 109         (l-lbs): Fix typo in comment.
 110         (store-insn): Clear atomic reserve on store to atomic-address.
 111         Fix register names in fmt field.
 112
 113 2014-04-22  Christian Svensson  <blue@cmd.nu>
 114
 115         * openrisc.cpu: Delete.
 116         * openrisc.opc: Delete.
 117         * or1k.cpu: New file.
 118         * or1k.opc: New file.
 119         * or1kcommon.cpu: New file.
 120         * or1korbis.cpu: New file.
 121         * or1korfpx.cpu: New file.
 122
 123 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 124
 125         * epiphany.opc: Remove +x file mode.
 126
 127 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 128
 129         PR binutils/15241
 130         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 131         TLBVADDR, TLBPADDR and TLBBADVADDR.
 132
 133 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 134             Joern Rennecke  <joern.rennecke@embecosm.com>
 135
 136         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 137         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 138         (testset-insn): Add NO_DIS attribute to t.l.
 139         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 140         (move-insns): Add NO-DIS attribute to cmov.l.
 141         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 142         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 143         (op-rrr): Add NO-DIS attribute to .l.
 144         (shift-rrr): Add NO-DIS attribute to .l.
 145         (op-shift-rri): Add NO-DIS attribute to i32.l.
 146         (bitrl, movtl): Add NO-DIS attribute.
 147         (op-iextrrr): Add NO-DIS attribute to .l
 148         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 149         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 150
 151 2012-02-27  Alan Modra  <amodra@gmail.com>
 152
 153         * mt.opc (print_dollarhex): Trim values to 32 bits.
 154
 155 2011-12-15  Nick Clifton  <nickc@redhat.com>
 156
 157         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 158         hosts.
 159
 160 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 161
 162         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 163         Cast value before printing it as a long.
 164         (parse_postindex): Fix type of valuep.
 165
 166 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 167
 168         * cpu/epiphany.cpu: New file.
 169         * cpu/epiphany.opc: New file.
 170
 171 2011-08-22  Nick Clifton  <nickc@redhat.com>
 172
 173         * fr30.cpu: Newly contributed file.
 174         * fr30.opc: Likewise.
 175         * ip2k.cpu: Likewise.
 176         * ip2k.opc: Likewise.
 177         * mep-avc.cpu: Likewise.
 178         * mep-avc2.cpu: Likewise.
 179         * mep-c5.cpu: Likewise.
 180         * mep-core.cpu: Likewise.
 181         * mep-default.cpu: Likewise.
 182         * mep-ext-cop.cpu: Likewise.
 183         * mep-fmax.cpu: Likewise.
 184         * mep-h1.cpu: Likewise.
 185         * mep-ivc2.cpu: Likewise.
 186         * mep-rhcop.cpu: Likewise.
 187         * mep-sample-ucidsp.cpu: Likewise.
 188         * mep.cpu: Likewise.
 189         * mep.opc: Likewise.
 190         * openrisc.cpu: Likewise.
 191         * openrisc.opc: Likewise.
 192         * xstormy16.cpu: Likewise.
 193         * xstormy16.opc: Likewise.
 194
 195 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 196
 197         * frv.opc: #undef DEBUG.
 198
 199 2010-07-03  DJ Delorie  <dj@delorie.com>
 200
 201         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 202
 203 2010-02-11  Doug Evans  <dje@sebabeach.org>
 204
 205         * m32r.cpu (HASH-PREFIX): Delete.
 206         (duhpo, dshpo): New pmacros.
 207         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 208         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 209         attribute, define with dshpo.
 210         (uimm24): Delete HASH-PREFIX attribute.
 211         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 212         (print_signed_with_hash_prefix): New function.
 213         (print_unsigned_with_hash_prefix): New function.
 214         * xc16x.cpu (dowh): New pmacro.
 215         (upof16): Define with dowh, specify print handler.
 216         (qbit, qlobit, qhibit): Ditto.
 217         (upag16): Ditto.
 218         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 219         (print_with_dot_prefix): New functions.
 220         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 221
 222 2010-01-24  Doug Evans  <dje@sebabeach.org>
 223
 224         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 225         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 226         conditional-floating-point-conversion, ne-floating-point-conversion,
 227         float-parallel-mul-add-double-semantics): Ditto.
 228
 229 2010-01-05  Doug Evans  <dje@sebabeach.org>
 230
 231         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 232         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 233
 234 2010-01-02  Doug Evans  <dje@sebabeach.org>
 235
 236         * m32c.opc (parse_signed16): Fix typo.
 237
 238 2009-12-11  Nick Clifton  <nickc@redhat.com>
 239
 240         * frv.opc: Fix shadowed variable warnings.
 241         * m32c.opc: Fix shadowed variable warnings.
 242
 243 2009-11-14  Doug Evans  <dje@sebabeach.org>
 244
 245         Must use VOID expression in VOID context.
 246         * xc16x.cpu (mov4): Fix mode of `sequence'.
 247         (mov9, mov10): Ditto.
 248         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 249         (callr, callseg, calls, trap, rets, reti): Ditto.
 250         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 251         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 252         (exts, exts1, extsr, extsr1, prior): Ditto.
 253
 254 2009-10-23  Doug Evans  <dje@sebabeach.org>
 255
 256         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 257         cgen-ops.h -> cgen/basic-ops.h.
 258
 259 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 260
 261         * m32r.cpu (stb-plus): Typo fix.
 262
 263 2009-09-23  Doug Evans  <dje@sebabeach.org>
 264
 265         * m32r.cpu (sth-plus): Fix address mode and calculation.
 266         (stb-plus): Ditto.
 267         (clrpsw): Fix mask calculation.
 268         (bset, bclr, btst): Make mode in bit calculation match expression.
 269
 270         * xc16x.cpu (rtl-version): Set to 0.8.
 271         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 272         make uppercase.  Remove unnecessary name-prefix spec.
 273         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 274         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 275         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 276         (h-cr): New hardware.
 277         (muls): Comment out parts that won't compile, add fixme.
 278         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 279         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 280         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 281
 282 2009-07-16  Doug Evans  <dje@sebabeach.org>
 283
 284         * cpu/simplify.inc (*): One line doc strings don't need \n.
 285         (df): Invoke define-full-ifield instead of claiming it's an alias.
 286         (dno): Define.
 287         (dnop): Mark as deprecated.
 288
 289 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 290
 291         * m32c.opc (parse_lab_5_3): Use correct enum.
 292
 293 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 294
 295         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 296         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 297         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 298         arguments of "operation" to DI using "mode" and the new pmacros.
 299
 300 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 301
 302         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 303         of number 2, PID.
 304
 305 2008-12-23  Jon Beniston <jon@beniston.com>
 306
 307         * lm32.cpu: New file.
 308         * lm32.opc: New file.
 309
 310 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 311
 312         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 313         to source.
 314
 315 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 316
 317         * cris.cpu (movs, movu): Use result of extension operation when
 318         updating flags.
 319
 320 2007-07-04  Nick Clifton  <nickc@redhat.com>
 321
 322         * cris.cpu: Update copyright notice to refer to GPLv3.
 323         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 324         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 325         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 326         xc16x.opc: Likewise.
 327         * iq2000.cpu: Fix copyright notice to refer to FSF.
 328
 329 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 330
 331         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 332
 333 2007-04-20  Nick Clifton  <nickc@redhat.com>
 334
 335         * xc16x.cpu: Restore after accidentally overwriting this file with
 336         xc16x.opc.
 337
 338 2007-03-29  DJ Delorie  <dj@redhat.com>
 339
 340         * m32c.cpu (Imm-8-s4n): Fix print hook.
 341         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 342         (arith-jnz-imm4-dst-defn): Make relaxable.
 343         (arith-jnz16-imm4-dst-defn): Fix encodings.
 344
 345 2007-03-20  DJ Delorie  <dj@redhat.com>
 346
 347         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 348         mem20): New.
 349         (src16-16-20-An-relative-*): New.
 350         (dst16-*-20-An-relative-*): New.
 351         (dst16-16-16sa-*): New
 352         (dst16-16-16ar-*): New
 353         (dst32-16-16sa-Unprefixed-*): New
 354         (jsri): Fix operands.
 355         (setzx): Fix encoding.
 356
 357 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 358
 359         * m32r.opc: Formatting.
 360
 361 2006-05-22  Nick Clifton  <nickc@redhat.com>
 362
 363         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 364
 365 2006-04-10  DJ Delorie  <dj@redhat.com>
 366
 367         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 368         decides if this function accepts symbolic constants or not.
 369         (parse_signed_bitbase): Likewise.
 370         (parse_unsigned_bitbase8): Pass the new parameter.
 371         (parse_unsigned_bitbase11): Likewise.
 372         (parse_unsigned_bitbase16): Likewise.
 373         (parse_unsigned_bitbase19): Likewise.
 374         (parse_unsigned_bitbase27): Likewise.
 375         (parse_signed_bitbase8): Likewise.
 376         (parse_signed_bitbase11): Likewise.
 377         (parse_signed_bitbase19): Likewise.
 378
 379 2006-03-13  DJ Delorie  <dj@redhat.com>
 380
 381         * m32c.cpu (Bit3-S): New.
 382         (btst:s): New.
 383         * m32c.opc (parse_bit3_S): New.
 384
 385         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 386         (btst): Add optional :G suffix for MACH32.
 387         (or.b:S): New.
 388         (pop.w:G): Add optional :G suffix for MACH16.
 389         (push.b.imm): Fix syntax.
 390
 391 2006-03-10  DJ Delorie  <dj@redhat.com>
 392
 393         * m32c.cpu (mul.l): New.
 394         (mulu.l): New.
 395
 396 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 397
 398         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 399         an error message otherwise.
 400         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 401         Fix up comments to correctly describe the functions.
 402
 403 2006-02-24  DJ Delorie  <dj@redhat.com>
 404
 405         * m32c.cpu (RL_TYPE): New attribute, with macros.
 406         (Lab-8-24): Add RELAX.
 407         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 408         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 409         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 410         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 411         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 412         attribute.
 413         (jsri16, jsri32): Add 1ADDR attribute.
 414         (jsr32.w, jsr32.a): Add JUMP attribute.
 415
 416 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 417             Anil Paranjape   <anilp1@kpitcummins.com>
 418             Shilin Shakti    <shilins@kpitcummins.com>
 419
 420         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 421         description.
 422         * xc16x.opc: New file containing supporting XC16C routines.
 423
 424 2006-02-10  Nick Clifton  <nickc@redhat.com>
 425
 426         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 427
 428 2006-01-06  DJ Delorie  <dj@redhat.com>
 429
 430         * m32c.cpu (mov.w:q): Fix mode.
 431         (push32.b.imm): Likewise, for the comment.
 432
 433 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 434
 435         Second part of ms1 to mt renaming.
 436         * mt.cpu (define-arch, define-isa): Set name to mt.
 437         (define-mach): Adjust.
 438         * mt.opc (CGEN_ASM_HASH): Update.
 439         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 440         (parse_loopsize, parse_imm16): Adjust.
 441
 442 2005-12-13  DJ Delorie  <dj@redhat.com>
 443
 444         * m32c.cpu (jsri): Fix order so register names aren't treated as
 445         symbols.
 446         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 447         indexwd, indexws): Fix encodings.
 448
 449 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 450
 451         * mt.cpu: Rename from ms1.cpu.
 452         * mt.opc: Rename from ms1.opc.
 453
 454 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 455
 456         * cris.cpu (simplecris-common-writable-specregs)
 457         (simplecris-common-readable-specregs): Split from
 458         simplecris-common-specregs.  All users changed.
 459         (cris-implemented-writable-specregs-v0)
 460         (cris-implemented-readable-specregs-v0): Similar from
 461         cris-implemented-specregs-v0.
 462         (cris-implemented-writable-specregs-v3)
 463         (cris-implemented-readable-specregs-v3)
 464         (cris-implemented-writable-specregs-v8)
 465         (cris-implemented-readable-specregs-v8)
 466         (cris-implemented-writable-specregs-v10)
 467         (cris-implemented-readable-specregs-v10)
 468         (cris-implemented-writable-specregs-v32)
 469         (cris-implemented-readable-specregs-v32): Similar.
 470         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 471         insns and specializations.
 472
 473 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 474
 475         Add ms2
 476         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 477         model.
 478         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 479         f-cb2incr, f-rc3): New fields.
 480         (LOOP): New instruction.
 481         (JAL-HAZARD): New hazard.
 482         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 483         New operands.
 484         (mul, muli, dbnz, iflush): Enable for ms2
 485         (jal, reti): Has JAL-HAZARD.
 486         (ldctxt, ldfb, stfb): Only ms1.
 487         (fbcb): Only ms1,ms1-003.
 488         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 489         fbcbincrs, mfbcbincrs): Enable for ms2.
 490         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 491         * ms1.opc (parse_loopsize): New.
 492         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 493         (print_pcrel): New.
 494
 495 2005-10-28  Dave Brolley  <brolley@redhat.com>
 496
 497         Contribute the following change:
 498         2003-09-24  Dave Brolley  <brolley@redhat.com>
 499
 500         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 501         CGEN_ATTR_VALUE_TYPE.
 502         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 503         Use cgen_bitset_intersect_p.
 504
 505 2005-10-27  DJ Delorie  <dj@redhat.com>
 506
 507         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 508         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 509         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 510         imm operand is needed.
 511         (adjnz, sbjnz): Pass the right operands.
 512         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 513         unary-insn): Add -g variants for opcodes that need to support :G.
 514         (not.BW:G, push.BW:G): Call it.
 515         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 516         stzx16-imm8-imm8-abs16): Fix operand typos.
 517         * m32c.opc (m32c_asm_hash): Support bnCND.
 518         (parse_signed4n, print_signed4n): New.
 519
 520 2005-10-26  DJ Delorie  <dj@redhat.com>
 521
 522         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 523         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 524         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 525         dsp8[sp] is signed.
 526         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 527         (mov.BW:S r0,r1): Fix typo r1l->r1.
 528         (tst): Allow :G suffix.
 529         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 530
 531 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 532
 533         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 534
 535 2005-10-25  DJ Delorie  <dj@redhat.com>
 536
 537         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 538         making one a macro of the other.
 539
 540 2005-10-21  DJ Delorie  <dj@redhat.com>
 541
 542         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 543         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 544         indexld, indexls): .w variants have `1' bit.
 545         (rot32.b): QI, not SI.
 546         (rot32.w): HI, not SI.
 547         (xchg16): HI for .w variant.
 548
 549 2005-10-19  Nick Clifton  <nickc@redhat.com>
 550
 551         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 552
 553 2005-10-18  Andreas Schwab  <schwab@suse.de>
 554
 555         * m32r.opc (parse_slo16): Better version of previous patch.
 556
 557 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 558
 559         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 560         size.
 561
 562 2005-07-25  DJ Delorie  <dj@redhat.com>
 563
 564         * m32c.opc (parse_unsigned8): Add %dsp8().
 565         (parse_signed8): Add %hi8().
 566         (parse_unsigned16): Add %dsp16().
 567         (parse_signed16): Add %lo16() and %hi16().
 568         (parse_lab_5_3): Make valuep a bfd_vma *.
 569
 570 2005-07-18  Nick Clifton  <nickc@redhat.com>
 571
 572         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 573         components.
 574         (f-lab32-jmp-s): Fix insertion sequence.
 575         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 576         (Dsp-40-s8): Make parameter be signed.
 577         (Dsp-40-s16): Likewise.
 578         (Dsp-48-s8): Likewise.
 579         (Dsp-48-s16): Likewise.
 580         (Imm-13-u3): Likewise. (Despite its name!)
 581         (BitBase16-16-s8): Make the parameter be unsigned.
 582         (BitBase16-8-u11-S): Likewise.
 583         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 584         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 585         relaxation.
 586
 587         * m32c.opc: Fix formatting.
 588         Use safe-ctype.h instead of ctype.h
 589         Move duplicated code sequences into a macro.
 590         Fix compile time warnings about signedness mismatches.
 591         Remove dead code.
 592         (parse_lab_5_3): New parser function.
 593
 594 2005-07-16  Jim Blandy  <jimb@redhat.com>
 595
 596         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 597         to represent isa sets.
 598
 599 2005-07-15  Jim Blandy  <jimb@redhat.com>
 600
 601         * m32c.cpu, m32c.opc: Fix copyright.
 602
 603 2005-07-14  Jim Blandy  <jimb@redhat.com>
 604
 605         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 606
 607 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 608
 609         * ms1.opc (print_dollarhex): Correct format string.
 610
 611 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 612
 613         * iq2000.cpu: Include from binutils cpu dir.
 614
 615 2005-07-05  Nick Clifton  <nickc@redhat.com>
 616
 617         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 618         unsigned in order to avoid compile time warnings about sign
 619         conflicts.
 620
 621         * ms1.opc (parse_*): Likewise.
 622         (parse_imm16): Use a "void *" as it is passed both signed and
 623         unsigned arguments.
 624
 625 2005-07-01  Nick Clifton  <nickc@redhat.com>
 626
 627         * frv.opc: Update to ISO C90 function declaration style.
 628         * iq2000.opc: Likewise.
 629         * m32r.opc: Likewise.
 630         * sh.opc: Likewise.
 631
 632 2005-06-15  Dave Brolley  <brolley@redhat.com>
 633
 634         Contributed by Red Hat.
 635         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 636         * ms1.opc: New file.  Written by Stan Cox.
 637
 638 2005-05-10  Nick Clifton  <nickc@redhat.com>
 639
 640         * Update the address and phone number of the FSF organization in
 641         the GPL notices in the following files:
 642         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 643         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 644         sh64-media.cpu, simplify.inc
 645
 646 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 647
 648         * frv.opc (parse_A): Warning fix.
 649
 650 2005-02-23  Nick Clifton  <nickc@redhat.com>
 651
 652         * frv.opc: Fixed compile time warnings about differing signed'ness
 653         of pointers passed to functions.
 654         * m32r.opc: Likewise.
 655
 656 2005-02-11  Nick Clifton  <nickc@redhat.com>
 657
 658         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 659         'bfd_vma *' in order avoid compile time warning message.
 660
 661 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 662
 663         * cris.cpu (mstep): Add missing insn.
 664
 665 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 666
 667         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 668         * frv.cpu: Add support for TLS annotations in loads and calll.
 669         * frv.opc (parse_symbolic_address): New.
 670         (parse_ldd_annotation): New.
 671         (parse_call_annotation): New.
 672         (parse_ld_annotation): New.
 673         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 674         Introduce TLS relocations.
 675         (parse_d12, parse_s12, parse_u12): Likewise.
 676         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 677         (parse_call_label, print_at): New.
 678
 679 2004-12-21  Mikael Starvik  <starvik@axis.com>
 680
 681         * cris.cpu (cris-set-mem): Correct integral write semantics.
 682
 683 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 684
 685         * cris.cpu: New file.
 686
 687 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 688
 689         * iq2000.cpu: Added quotes around macro arguments so that they
 690         will work with newer versions of guile.
 691
 692 2004-10-27  Nick Clifton  <nickc@redhat.com>
 693
 694         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 695         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 696         operand.
 697         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 698         with guile.
 699
 700 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 701
 702         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 703
 704 2004-05-15  Nick Clifton  <nickc@redhat.com>
 705
 706         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 707
 708 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 709
 710         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 711
 712 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 713
 714         * frv.cpu (define-arch frv): Add fr450 mach.
 715         (define-mach fr450): New.
 716         (define-model fr450): New.  Add profile units to every fr450 insn.
 717         (define-attr UNIT): Add MDCUTSSI.
 718         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 719         (define-attr AUDIO): New boolean.
 720         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 721         (f-LRA-null, f-TLBPR-null): New fields.
 722         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 723         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 724         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 725         (LRA-null, TLBPR-null): New macros.
 726         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 727         (load-real-address): New macro.
 728         (lrai, lrad, tlbpr): New instructions.
 729         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 730         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 731         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 732         (media-low-clear-semantics, media-scope-limit-semantics)
 733         (media-quad-limit, media-quad-shift): New macros.
 734         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 735         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 736         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 737         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 738         (fr450_unit_mapping): New array.
 739         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 740         for new MDCUTSSI unit.
 741         (fr450_check_insn_major_constraints): New function.
 742         (check_insn_major_constraints): Use it.
 743
 744 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 745
 746         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 747         (scutss): Change unit to I0.
 748         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 749         (mqsaths): Fix FR400-MAJOR categorization.
 750         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 751         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 752         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 753         combinations.
 754
 755 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 756
 757         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 758         (rstb, rsth, rst, rstd, rstq): Delete.
 759         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 760
 761 2004-02-23  Nick Clifton  <nickc@redhat.com>
 762
 763         * Apply these patches from Renesas:
 764
 765         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 766
 767         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 768         disassembling codes for 0x*2 addresses.
 769
 770         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 771
 772         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 773
 774         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 775
 776         * cpu/m32r.cpu : Add new model m32r2.
 777         Add new instructions.
 778         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 779         Changed PIPE attr of push from O to OS.
 780         Care for Little-endian of M32R.
 781         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
 782         Care for Little-endian of M32R.
 783         (parse_slo16): signed extension for value.
 784
 785 2004-02-20  Andrew Cagney  <cagney@redhat.com>
 786
 787         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
 788         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
 789
 790         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
 791         written by Ben Elliston.
 792
 793 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 794
 795         * frv.cpu (UNIT): Add IACC.
 796         (iacc-multiply-r-r): Use it.
 797         * frv.opc (fr400_unit_mapping): Add entry for IACC.
 798         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
 799
 800 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 801
 802         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 803         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
 804         cut&paste errors in shifting/truncating numerical operands.
 805         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
 806         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 807         (parse_uslo16): Likewise.
 808         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 809         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 810         (parse_s12): Likewise.
 811         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 812         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
 813         (parse_uslo16): Likewise.
 814         (parse_uhi16): Parse gothi and gotfuncdeschi.
 815         (parse_d12): Parse got12 and gotfuncdesc12.
 816         (parse_s12): Likewise.
 817
 818 2003-10-10  Dave Brolley  <brolley@redhat.com>
 819
 820         * frv.cpu (dnpmop): New p-macro.
 821         (GRdoublek): Use dnpmop.
 822         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
 823         (store-double-r-r): Use (.sym regtype doublek).
 824         (r-store-double): Ditto.
 825         (store-double-r-r-u): Ditto.
 826         (conditional-store-double): Ditto.
 827         (conditional-store-double-u): Ditto.
 828         (store-double-r-simm): Ditto.
 829         (fmovs): Assign to UNIT FMALL.
 830
 831 2003-10-06  Dave Brolley  <brolley@redhat.com>
 832
 833         * frv.cpu, frv.opc: Add support for fr550.
 834
 835 2003-09-24  Dave Brolley  <brolley@redhat.com>
 836
 837         * frv.cpu (u-commit): New modelling unit for fr500.
 838         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
 839         (commit-r): Use u-commit model for fr500.
 840         (commit): Ditto.
 841         (conditional-float-binary-op): Take profiling data as an argument.
 842         Update callers.
 843         (ne-float-binary-op): Ditto.
 844
 845 2003-09-19  Michael Snyder  <msnyder@redhat.com>
 846
 847         * frv.cpu (nldqi): Delete unimplemented instruction.
 848
 849 2003-09-12  Dave Brolley  <brolley@redhat.com>
 850
 851         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
 852         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
 853         frv_ref_SI to get input register referenced for profiling.
 854         (clear-ne-flag-all): Pass insn profiling in as an argument.
 855         (clrgr,clrfr,clrga,clrfa): Add profiling information.
 856
 857 2003-09-11  Michael Snyder  <msnyder@redhat.com>
 858
 859         * frv.cpu: Typographical corrections.
 860
 861 2003-09-09  Dave Brolley  <brolley@redhat.com>
 862
 863         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
 864         (conditional-media-dual-complex, media-quad-complex): Likewise.
 865
 866 2003-09-04  Dave Brolley  <brolley@redhat.com>
 867
 868         * frv.cpu (register-transfer): Pass in all attributes in on argument.
 869         Update all callers.
 870         (conditional-register-transfer): Ditto.
 871         (cache-preload): Ditto.
 872         (floating-point-conversion): Ditto.
 873         (floating-point-neg): Ditto.
 874         (float-abs): Ditto.
 875         (float-binary-op-s): Ditto.
 876         (conditional-float-binary-op): Ditto.
 877         (ne-float-binary-op): Ditto.
 878         (float-dual-arith): Ditto.
 879         (ne-float-dual-arith): Ditto.
 880
 881 2003-09-03  Dave Brolley  <brolley@redhat.com>
 882
 883         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
 884         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
 885         MCLRACC-1.
 886         (A): Removed operand.
 887         (A0,A1): New operands replace operand A.
 888         (mnop): Now a real insn
 889         (mclracc): Removed insn.
 890         (mclracc-0, mclracc-1): New insns replace mclracc.
 891         (all insns): Use new UNIT attributes.
 892
 893 2003-08-21  Nick Clifton  <nickc@redhat.com>
 894
 895         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
 896         and u-media-dual-btoh with output parameter.
 897         (cmbtoh): Add profiling hack.
 898
 899 2003-08-19  Michael Snyder  <msnyder@redhat.com>
 900
 901         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
 902
 903 2003-06-10  Doug Evans  <dje@sebabeach.org>
 904
 905         * frv.cpu: Add IDOC attribute.
 906
 907 2003-06-06  Andrew Cagney  <cagney@redhat.com>
 908
 909         Contributed by Red Hat.
 910         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
 911         Stan Cox, and Frank Ch. Eigler.
 912         * iq2000.opc: New file.  Written by Ben Elliston, Frank
 913         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
 914         * iq2000m.cpu: New file.  Written by Jeff Johnston.
 915         * iq10.cpu: New file.  Written by Jeff Johnston.
 916
 917 2003-06-05  Nick Clifton  <nickc@redhat.com>
 918
 919         * frv.cpu (FRintieven): New operand.  An even-numbered only
 920         version of the FRinti operand.
 921         (FRintjeven): Likewise for FRintj.
 922         (FRintkeven): Likewise for FRintk.
 923         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
 924         media-quad-arith-sat-semantics, media-quad-arith-sat,
 925         conditional-media-quad-arith-sat, mdunpackh,
 926         media-quad-multiply-semantics, media-quad-multiply,
 927         conditional-media-quad-multiply, media-quad-complex-i,
 928         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
 929         conditional-media-quad-multiply-acc, munpackh,
 930         media-quad-multiply-cross-acc-semantics, mdpackh,
 931         media-quad-multiply-cross-acc, mbtoh-semantics,
 932         media-quad-cross-multiply-cross-acc-semantics,
 933         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
 934         media-quad-cross-multiply-acc-semantics, cmbtoh,
 935         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
 936         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
 937         cmhtob): Use new operands.
 938         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
 939         (parse_even_register): New function.
 940
 941 2003-06-03  Nick Clifton  <nickc@redhat.com>
 942
 943         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
 944         immediate value not unsigned.
 945
 946 2003-06-03  Andrew Cagney  <cagney@redhat.com>
 947
 948         Contributed by Red Hat.
 949         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
 950         and Eric Christopher.
 951         * frv.opc: New file.  Written by Catherine Moore, and Dave
 952         Brolley.
 953         * simplify.inc: New file.  Written by Doug Evans.
 954
 955 2003-05-02  Andrew Cagney  <cagney@redhat.com>
 956
 957         * New file.
 958
 959 \f
 960 Copyright (C) 2003-2012 Free Software Foundation, Inc.
 961
 962 Copying and distribution of this file, with or without modification,
 963 are permitted in any medium without royalty provided the copyright
 964 notice and this notice are preserved.
 965
 966 Local Variables:
 967 mode: change-log
 968 left-margin: 8
 969 fill-column: 74
 970 version-control: never
 971 End: