2 * libata-sff.c - helper library for PCI IDE BMDMA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/pci.h>
37 #include <linux/libata.h>
38 #include <linux/highmem.h>
42 const struct ata_port_operations ata_sff_port_ops
= {
43 .inherits
= &ata_base_port_ops
,
45 .qc_prep
= ata_sff_qc_prep
,
46 .qc_issue
= ata_sff_qc_issue
,
48 .freeze
= ata_sff_freeze
,
50 .prereset
= ata_sff_prereset
,
51 .softreset
= ata_sff_softreset
,
52 .postreset
= ata_sff_postreset
,
53 .error_handler
= ata_sff_error_handler
,
54 .post_internal_cmd
= ata_sff_post_internal_cmd
,
56 .sff_dev_select
= ata_sff_dev_select
,
57 .sff_check_status
= ata_sff_check_status
,
58 .sff_tf_load
= ata_sff_tf_load
,
59 .sff_tf_read
= ata_sff_tf_read
,
60 .sff_exec_command
= ata_sff_exec_command
,
61 .sff_data_xfer
= ata_sff_data_xfer
,
62 .sff_irq_on
= ata_sff_irq_on
,
63 .sff_irq_clear
= ata_sff_irq_clear
,
65 .port_start
= ata_sff_port_start
,
68 const struct ata_port_operations ata_bmdma_port_ops
= {
69 .inherits
= &ata_sff_port_ops
,
71 .mode_filter
= ata_bmdma_mode_filter
,
73 .bmdma_setup
= ata_bmdma_setup
,
74 .bmdma_start
= ata_bmdma_start
,
75 .bmdma_stop
= ata_bmdma_stop
,
76 .bmdma_status
= ata_bmdma_status
,
80 * ata_fill_sg - Fill PCI IDE PRD table
81 * @qc: Metadata associated with taskfile to be transferred
83 * Fill PCI IDE PRD (scatter-gather) table with segments
84 * associated with the current disk command.
87 * spin_lock_irqsave(host lock)
90 static void ata_fill_sg(struct ata_queued_cmd
*qc
)
92 struct ata_port
*ap
= qc
->ap
;
93 struct scatterlist
*sg
;
97 for_each_sg(qc
->sg
, sg
, qc
->n_elem
, si
) {
101 /* determine if physical DMA addr spans 64K boundary.
102 * Note h/w doesn't support 64-bit, so we unconditionally
103 * truncate dma_addr_t to u32.
105 addr
= (u32
) sg_dma_address(sg
);
106 sg_len
= sg_dma_len(sg
);
109 offset
= addr
& 0xffff;
111 if ((offset
+ sg_len
) > 0x10000)
112 len
= 0x10000 - offset
;
114 ap
->prd
[pi
].addr
= cpu_to_le32(addr
);
115 ap
->prd
[pi
].flags_len
= cpu_to_le32(len
& 0xffff);
116 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi
, addr
, len
);
124 ap
->prd
[pi
- 1].flags_len
|= cpu_to_le32(ATA_PRD_EOT
);
128 * ata_fill_sg_dumb - Fill PCI IDE PRD table
129 * @qc: Metadata associated with taskfile to be transferred
131 * Fill PCI IDE PRD (scatter-gather) table with segments
132 * associated with the current disk command. Perform the fill
133 * so that we avoid writing any length 64K records for
134 * controllers that don't follow the spec.
137 * spin_lock_irqsave(host lock)
140 static void ata_fill_sg_dumb(struct ata_queued_cmd
*qc
)
142 struct ata_port
*ap
= qc
->ap
;
143 struct scatterlist
*sg
;
147 for_each_sg(qc
->sg
, sg
, qc
->n_elem
, si
) {
149 u32 sg_len
, len
, blen
;
151 /* determine if physical DMA addr spans 64K boundary.
152 * Note h/w doesn't support 64-bit, so we unconditionally
153 * truncate dma_addr_t to u32.
155 addr
= (u32
) sg_dma_address(sg
);
156 sg_len
= sg_dma_len(sg
);
159 offset
= addr
& 0xffff;
161 if ((offset
+ sg_len
) > 0x10000)
162 len
= 0x10000 - offset
;
165 ap
->prd
[pi
].addr
= cpu_to_le32(addr
);
167 /* Some PATA chipsets like the CS5530 can't
168 cope with 0x0000 meaning 64K as the spec says */
169 ap
->prd
[pi
].flags_len
= cpu_to_le32(0x8000);
171 ap
->prd
[++pi
].addr
= cpu_to_le32(addr
+ 0x8000);
173 ap
->prd
[pi
].flags_len
= cpu_to_le32(blen
);
174 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi
, addr
, len
);
182 ap
->prd
[pi
- 1].flags_len
|= cpu_to_le32(ATA_PRD_EOT
);
186 * ata_sff_qc_prep - Prepare taskfile for submission
187 * @qc: Metadata associated with taskfile to be prepared
189 * Prepare ATA taskfile for submission.
192 * spin_lock_irqsave(host lock)
194 void ata_sff_qc_prep(struct ata_queued_cmd
*qc
)
196 if (!(qc
->flags
& ATA_QCFLAG_DMAMAP
))
203 * ata_sff_dumb_qc_prep - Prepare taskfile for submission
204 * @qc: Metadata associated with taskfile to be prepared
206 * Prepare ATA taskfile for submission.
209 * spin_lock_irqsave(host lock)
211 void ata_sff_dumb_qc_prep(struct ata_queued_cmd
*qc
)
213 if (!(qc
->flags
& ATA_QCFLAG_DMAMAP
))
216 ata_fill_sg_dumb(qc
);
220 * ata_sff_check_status - Read device status reg & clear interrupt
221 * @ap: port where the device is
223 * Reads ATA taskfile status register for currently-selected device
224 * and return its value. This also clears pending interrupts
228 * Inherited from caller.
230 u8
ata_sff_check_status(struct ata_port
*ap
)
232 return ioread8(ap
->ioaddr
.status_addr
);
236 * ata_sff_altstatus - Read device alternate status reg
237 * @ap: port where the device is
239 * Reads ATA taskfile alternate status register for
240 * currently-selected device and return its value.
242 * Note: may NOT be used as the check_altstatus() entry in
243 * ata_port_operations.
246 * Inherited from caller.
248 u8
ata_sff_altstatus(struct ata_port
*ap
)
250 if (ap
->ops
->sff_check_altstatus
)
251 return ap
->ops
->sff_check_altstatus(ap
);
253 return ioread8(ap
->ioaddr
.altstatus_addr
);
257 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
258 * @ap: port containing status register to be polled
259 * @tmout_pat: impatience timeout
260 * @tmout: overall timeout
262 * Sleep until ATA Status register bit BSY clears,
263 * or a timeout occurs.
266 * Kernel thread context (may sleep).
269 * 0 on success, -errno otherwise.
271 int ata_sff_busy_sleep(struct ata_port
*ap
,
272 unsigned long tmout_pat
, unsigned long tmout
)
274 unsigned long timer_start
, timeout
;
277 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 300);
278 timer_start
= jiffies
;
279 timeout
= timer_start
+ tmout_pat
;
280 while (status
!= 0xff && (status
& ATA_BUSY
) &&
281 time_before(jiffies
, timeout
)) {
283 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 3);
286 if (status
!= 0xff && (status
& ATA_BUSY
))
287 ata_port_printk(ap
, KERN_WARNING
,
288 "port is slow to respond, please be patient "
289 "(Status 0x%x)\n", status
);
291 timeout
= timer_start
+ tmout
;
292 while (status
!= 0xff && (status
& ATA_BUSY
) &&
293 time_before(jiffies
, timeout
)) {
295 status
= ap
->ops
->sff_check_status(ap
);
301 if (status
& ATA_BUSY
) {
302 ata_port_printk(ap
, KERN_ERR
, "port failed to respond "
303 "(%lu secs, Status 0x%x)\n",
311 static int ata_sff_check_ready(struct ata_link
*link
)
313 u8 status
= link
->ap
->ops
->sff_check_status(link
->ap
);
315 if (!(status
& ATA_BUSY
))
323 * ata_sff_wait_ready - sleep until BSY clears, or timeout
324 * @link: SFF link to wait ready status for
325 * @deadline: deadline jiffies for the operation
327 * Sleep until ATA Status register bit BSY clears, or timeout
331 * Kernel thread context (may sleep).
334 * 0 on success, -errno otherwise.
336 int ata_sff_wait_ready(struct ata_link
*link
, unsigned long deadline
)
338 return ata_wait_ready(link
, deadline
, ata_sff_check_ready
);
342 * ata_sff_dev_select - Select device 0/1 on ATA bus
343 * @ap: ATA channel to manipulate
344 * @device: ATA device (numbered from zero) to select
346 * Use the method defined in the ATA specification to
347 * make either device 0, or device 1, active on the
348 * ATA channel. Works with both PIO and MMIO.
350 * May be used as the dev_select() entry in ata_port_operations.
355 void ata_sff_dev_select(struct ata_port
*ap
, unsigned int device
)
360 tmp
= ATA_DEVICE_OBS
;
362 tmp
= ATA_DEVICE_OBS
| ATA_DEV1
;
364 iowrite8(tmp
, ap
->ioaddr
.device_addr
);
365 ata_sff_pause(ap
); /* needed; also flushes, for mmio */
369 * ata_dev_select - Select device 0/1 on ATA bus
370 * @ap: ATA channel to manipulate
371 * @device: ATA device (numbered from zero) to select
372 * @wait: non-zero to wait for Status register BSY bit to clear
373 * @can_sleep: non-zero if context allows sleeping
375 * Use the method defined in the ATA specification to
376 * make either device 0, or device 1, active on the
379 * This is a high-level version of ata_sff_dev_select(), which
380 * additionally provides the services of inserting the proper
381 * pauses and status polling, where needed.
386 void ata_dev_select(struct ata_port
*ap
, unsigned int device
,
387 unsigned int wait
, unsigned int can_sleep
)
389 if (ata_msg_probe(ap
))
390 ata_port_printk(ap
, KERN_INFO
, "ata_dev_select: ENTER, "
391 "device %u, wait %u\n", device
, wait
);
396 ap
->ops
->sff_dev_select(ap
, device
);
399 if (can_sleep
&& ap
->link
.device
[device
].class == ATA_DEV_ATAPI
)
406 * ata_sff_irq_on - Enable interrupts on a port.
407 * @ap: Port on which interrupts are enabled.
409 * Enable interrupts on a legacy IDE device using MMIO or PIO,
410 * wait for idle, clear any pending interrupts.
413 * Inherited from caller.
415 u8
ata_sff_irq_on(struct ata_port
*ap
)
417 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
420 ap
->ctl
&= ~ATA_NIEN
;
421 ap
->last_ctl
= ap
->ctl
;
423 if (ioaddr
->ctl_addr
)
424 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
425 tmp
= ata_wait_idle(ap
);
427 ap
->ops
->sff_irq_clear(ap
);
433 * ata_sff_irq_clear - Clear PCI IDE BMDMA interrupt.
434 * @ap: Port associated with this ATA transaction.
436 * Clear interrupt and error flags in DMA status register.
438 * May be used as the irq_clear() entry in ata_port_operations.
441 * spin_lock_irqsave(host lock)
443 void ata_sff_irq_clear(struct ata_port
*ap
)
445 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
450 iowrite8(ioread8(mmio
+ ATA_DMA_STATUS
), mmio
+ ATA_DMA_STATUS
);
454 * ata_sff_tf_load - send taskfile registers to host controller
455 * @ap: Port to which output is sent
456 * @tf: ATA taskfile register set
458 * Outputs ATA taskfile to standard ATA host controller.
461 * Inherited from caller.
463 void ata_sff_tf_load(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
465 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
466 unsigned int is_addr
= tf
->flags
& ATA_TFLAG_ISADDR
;
468 if (tf
->ctl
!= ap
->last_ctl
) {
469 if (ioaddr
->ctl_addr
)
470 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
471 ap
->last_ctl
= tf
->ctl
;
475 if (is_addr
&& (tf
->flags
& ATA_TFLAG_LBA48
)) {
476 WARN_ON(!ioaddr
->ctl_addr
);
477 iowrite8(tf
->hob_feature
, ioaddr
->feature_addr
);
478 iowrite8(tf
->hob_nsect
, ioaddr
->nsect_addr
);
479 iowrite8(tf
->hob_lbal
, ioaddr
->lbal_addr
);
480 iowrite8(tf
->hob_lbam
, ioaddr
->lbam_addr
);
481 iowrite8(tf
->hob_lbah
, ioaddr
->lbah_addr
);
482 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
491 iowrite8(tf
->feature
, ioaddr
->feature_addr
);
492 iowrite8(tf
->nsect
, ioaddr
->nsect_addr
);
493 iowrite8(tf
->lbal
, ioaddr
->lbal_addr
);
494 iowrite8(tf
->lbam
, ioaddr
->lbam_addr
);
495 iowrite8(tf
->lbah
, ioaddr
->lbah_addr
);
496 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
504 if (tf
->flags
& ATA_TFLAG_DEVICE
) {
505 iowrite8(tf
->device
, ioaddr
->device_addr
);
506 VPRINTK("device 0x%X\n", tf
->device
);
513 * ata_sff_tf_read - input device's ATA taskfile shadow registers
514 * @ap: Port from which input is read
515 * @tf: ATA taskfile register set for storing input
517 * Reads ATA taskfile registers for currently-selected device
518 * into @tf. Assumes the device has a fully SFF compliant task file
519 * layout and behaviour. If you device does not (eg has a different
520 * status method) then you will need to provide a replacement tf_read
523 * Inherited from caller.
525 void ata_sff_tf_read(struct ata_port
*ap
, struct ata_taskfile
*tf
)
527 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
529 tf
->command
= ata_sff_check_status(ap
);
530 tf
->feature
= ioread8(ioaddr
->error_addr
);
531 tf
->nsect
= ioread8(ioaddr
->nsect_addr
);
532 tf
->lbal
= ioread8(ioaddr
->lbal_addr
);
533 tf
->lbam
= ioread8(ioaddr
->lbam_addr
);
534 tf
->lbah
= ioread8(ioaddr
->lbah_addr
);
535 tf
->device
= ioread8(ioaddr
->device_addr
);
537 if (tf
->flags
& ATA_TFLAG_LBA48
) {
538 if (likely(ioaddr
->ctl_addr
)) {
539 iowrite8(tf
->ctl
| ATA_HOB
, ioaddr
->ctl_addr
);
540 tf
->hob_feature
= ioread8(ioaddr
->error_addr
);
541 tf
->hob_nsect
= ioread8(ioaddr
->nsect_addr
);
542 tf
->hob_lbal
= ioread8(ioaddr
->lbal_addr
);
543 tf
->hob_lbam
= ioread8(ioaddr
->lbam_addr
);
544 tf
->hob_lbah
= ioread8(ioaddr
->lbah_addr
);
545 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
546 ap
->last_ctl
= tf
->ctl
;
553 * ata_sff_exec_command - issue ATA command to host controller
554 * @ap: port to which command is being issued
555 * @tf: ATA taskfile register set
557 * Issues ATA command, with proper synchronization with interrupt
558 * handler / other threads.
561 * spin_lock_irqsave(host lock)
563 void ata_sff_exec_command(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
565 DPRINTK("ata%u: cmd 0x%X\n", ap
->print_id
, tf
->command
);
567 iowrite8(tf
->command
, ap
->ioaddr
.command_addr
);
572 * ata_tf_to_host - issue ATA taskfile to host controller
573 * @ap: port to which command is being issued
574 * @tf: ATA taskfile register set
576 * Issues ATA taskfile register set to ATA host controller,
577 * with proper synchronization with interrupt handler and
581 * spin_lock_irqsave(host lock)
583 static inline void ata_tf_to_host(struct ata_port
*ap
,
584 const struct ata_taskfile
*tf
)
586 ap
->ops
->sff_tf_load(ap
, tf
);
587 ap
->ops
->sff_exec_command(ap
, tf
);
591 * ata_sff_data_xfer - Transfer data by PIO
592 * @dev: device to target
594 * @buflen: buffer length
597 * Transfer data from/to the device data register by PIO.
600 * Inherited from caller.
605 unsigned int ata_sff_data_xfer(struct ata_device
*dev
, unsigned char *buf
,
606 unsigned int buflen
, int rw
)
608 struct ata_port
*ap
= dev
->link
->ap
;
609 void __iomem
*data_addr
= ap
->ioaddr
.data_addr
;
610 unsigned int words
= buflen
>> 1;
612 /* Transfer multiple of 2 bytes */
614 ioread16_rep(data_addr
, buf
, words
);
616 iowrite16_rep(data_addr
, buf
, words
);
618 /* Transfer trailing 1 byte, if any. */
619 if (unlikely(buflen
& 0x01)) {
620 __le16 align_buf
[1] = { 0 };
621 unsigned char *trailing_buf
= buf
+ buflen
- 1;
624 align_buf
[0] = cpu_to_le16(ioread16(data_addr
));
625 memcpy(trailing_buf
, align_buf
, 1);
627 memcpy(align_buf
, trailing_buf
, 1);
628 iowrite16(le16_to_cpu(align_buf
[0]), data_addr
);
637 * ata_sff_data_xfer_noirq - Transfer data by PIO
638 * @dev: device to target
640 * @buflen: buffer length
643 * Transfer data from/to the device data register by PIO. Do the
644 * transfer with interrupts disabled.
647 * Inherited from caller.
652 unsigned int ata_sff_data_xfer_noirq(struct ata_device
*dev
, unsigned char *buf
,
653 unsigned int buflen
, int rw
)
656 unsigned int consumed
;
658 local_irq_save(flags
);
659 consumed
= ata_sff_data_xfer(dev
, buf
, buflen
, rw
);
660 local_irq_restore(flags
);
666 * ata_pio_sector - Transfer a sector of data.
667 * @qc: Command on going
669 * Transfer qc->sect_size bytes of data from/to the ATA device.
672 * Inherited from caller.
674 static void ata_pio_sector(struct ata_queued_cmd
*qc
)
676 int do_write
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
);
677 struct ata_port
*ap
= qc
->ap
;
682 if (qc
->curbytes
== qc
->nbytes
- qc
->sect_size
)
683 ap
->hsm_task_state
= HSM_ST_LAST
;
685 page
= sg_page(qc
->cursg
);
686 offset
= qc
->cursg
->offset
+ qc
->cursg_ofs
;
688 /* get the current page and offset */
689 page
= nth_page(page
, (offset
>> PAGE_SHIFT
));
692 DPRINTK("data %s\n", qc
->tf
.flags
& ATA_TFLAG_WRITE
? "write" : "read");
694 if (PageHighMem(page
)) {
697 /* FIXME: use a bounce buffer */
698 local_irq_save(flags
);
699 buf
= kmap_atomic(page
, KM_IRQ0
);
701 /* do the actual data transfer */
702 ap
->ops
->sff_data_xfer(qc
->dev
, buf
+ offset
, qc
->sect_size
,
705 kunmap_atomic(buf
, KM_IRQ0
);
706 local_irq_restore(flags
);
708 buf
= page_address(page
);
709 ap
->ops
->sff_data_xfer(qc
->dev
, buf
+ offset
, qc
->sect_size
,
713 qc
->curbytes
+= qc
->sect_size
;
714 qc
->cursg_ofs
+= qc
->sect_size
;
716 if (qc
->cursg_ofs
== qc
->cursg
->length
) {
717 qc
->cursg
= sg_next(qc
->cursg
);
723 * ata_pio_sectors - Transfer one or many sectors.
724 * @qc: Command on going
726 * Transfer one or many sectors of data from/to the
727 * ATA device for the DRQ request.
730 * Inherited from caller.
732 static void ata_pio_sectors(struct ata_queued_cmd
*qc
)
734 if (is_multi_taskfile(&qc
->tf
)) {
735 /* READ/WRITE MULTIPLE */
738 WARN_ON(qc
->dev
->multi_count
== 0);
740 nsect
= min((qc
->nbytes
- qc
->curbytes
) / qc
->sect_size
,
741 qc
->dev
->multi_count
);
747 ata_sff_altstatus(qc
->ap
); /* flush */
751 * atapi_send_cdb - Write CDB bytes to hardware
752 * @ap: Port to which ATAPI device is attached.
753 * @qc: Taskfile currently active
755 * When device has indicated its readiness to accept
756 * a CDB, this function is called. Send the CDB.
761 static void atapi_send_cdb(struct ata_port
*ap
, struct ata_queued_cmd
*qc
)
764 DPRINTK("send cdb\n");
765 WARN_ON(qc
->dev
->cdb_len
< 12);
767 ap
->ops
->sff_data_xfer(qc
->dev
, qc
->cdb
, qc
->dev
->cdb_len
, 1);
768 ata_sff_altstatus(ap
); /* flush */
770 switch (qc
->tf
.protocol
) {
772 ap
->hsm_task_state
= HSM_ST
;
774 case ATAPI_PROT_NODATA
:
775 ap
->hsm_task_state
= HSM_ST_LAST
;
778 ap
->hsm_task_state
= HSM_ST_LAST
;
780 ap
->ops
->bmdma_start(qc
);
786 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
787 * @qc: Command on going
788 * @bytes: number of bytes
790 * Transfer Transfer data from/to the ATAPI device.
793 * Inherited from caller.
796 static int __atapi_pio_bytes(struct ata_queued_cmd
*qc
, unsigned int bytes
)
798 int rw
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
) ? WRITE
: READ
;
799 struct ata_port
*ap
= qc
->ap
;
800 struct ata_device
*dev
= qc
->dev
;
801 struct ata_eh_info
*ehi
= &dev
->link
->eh_info
;
802 struct scatterlist
*sg
;
805 unsigned int offset
, count
, consumed
;
810 ata_ehi_push_desc(ehi
, "unexpected or too much trailing data "
811 "buf=%u cur=%u bytes=%u",
812 qc
->nbytes
, qc
->curbytes
, bytes
);
817 offset
= sg
->offset
+ qc
->cursg_ofs
;
819 /* get the current page and offset */
820 page
= nth_page(page
, (offset
>> PAGE_SHIFT
));
823 /* don't overrun current sg */
824 count
= min(sg
->length
- qc
->cursg_ofs
, bytes
);
826 /* don't cross page boundaries */
827 count
= min(count
, (unsigned int)PAGE_SIZE
- offset
);
829 DPRINTK("data %s\n", qc
->tf
.flags
& ATA_TFLAG_WRITE
? "write" : "read");
831 if (PageHighMem(page
)) {
834 /* FIXME: use bounce buffer */
835 local_irq_save(flags
);
836 buf
= kmap_atomic(page
, KM_IRQ0
);
838 /* do the actual data transfer */
839 consumed
= ap
->ops
->sff_data_xfer(dev
, buf
+ offset
, count
, rw
);
841 kunmap_atomic(buf
, KM_IRQ0
);
842 local_irq_restore(flags
);
844 buf
= page_address(page
);
845 consumed
= ap
->ops
->sff_data_xfer(dev
, buf
+ offset
, count
, rw
);
848 bytes
-= min(bytes
, consumed
);
849 qc
->curbytes
+= count
;
850 qc
->cursg_ofs
+= count
;
852 if (qc
->cursg_ofs
== sg
->length
) {
853 qc
->cursg
= sg_next(qc
->cursg
);
857 /* consumed can be larger than count only for the last transfer */
858 WARN_ON(qc
->cursg
&& count
!= consumed
);
866 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
867 * @qc: Command on going
869 * Transfer Transfer data from/to the ATAPI device.
872 * Inherited from caller.
874 static void atapi_pio_bytes(struct ata_queued_cmd
*qc
)
876 struct ata_port
*ap
= qc
->ap
;
877 struct ata_device
*dev
= qc
->dev
;
878 struct ata_eh_info
*ehi
= &dev
->link
->eh_info
;
879 unsigned int ireason
, bc_lo
, bc_hi
, bytes
;
880 int i_write
, do_write
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
) ? 1 : 0;
882 /* Abuse qc->result_tf for temp storage of intermediate TF
883 * here to save some kernel stack usage.
884 * For normal completion, qc->result_tf is not relevant. For
885 * error, qc->result_tf is later overwritten by ata_qc_complete().
886 * So, the correctness of qc->result_tf is not affected.
888 ap
->ops
->sff_tf_read(ap
, &qc
->result_tf
);
889 ireason
= qc
->result_tf
.nsect
;
890 bc_lo
= qc
->result_tf
.lbam
;
891 bc_hi
= qc
->result_tf
.lbah
;
892 bytes
= (bc_hi
<< 8) | bc_lo
;
894 /* shall be cleared to zero, indicating xfer of data */
895 if (unlikely(ireason
& (1 << 0)))
898 /* make sure transfer direction matches expected */
899 i_write
= ((ireason
& (1 << 1)) == 0) ? 1 : 0;
900 if (unlikely(do_write
!= i_write
))
903 if (unlikely(!bytes
))
906 VPRINTK("ata%u: xfering %d bytes\n", ap
->print_id
, bytes
);
908 if (unlikely(__atapi_pio_bytes(qc
, bytes
)))
910 ata_sff_altstatus(ap
); /* flush */
915 ata_ehi_push_desc(ehi
, "ATAPI check failed (ireason=0x%x bytes=%u)",
918 qc
->err_mask
|= AC_ERR_HSM
;
919 ap
->hsm_task_state
= HSM_ST_ERR
;
923 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
924 * @ap: the target ata_port
928 * 1 if ok in workqueue, 0 otherwise.
930 static inline int ata_hsm_ok_in_wq(struct ata_port
*ap
, struct ata_queued_cmd
*qc
)
932 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
935 if (ap
->hsm_task_state
== HSM_ST_FIRST
) {
936 if (qc
->tf
.protocol
== ATA_PROT_PIO
&&
937 (qc
->tf
.flags
& ATA_TFLAG_WRITE
))
940 if (ata_is_atapi(qc
->tf
.protocol
) &&
941 !(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
949 * ata_hsm_qc_complete - finish a qc running on standard HSM
950 * @qc: Command to complete
951 * @in_wq: 1 if called from workqueue, 0 otherwise
953 * Finish @qc which is running on standard HSM.
956 * If @in_wq is zero, spin_lock_irqsave(host lock).
957 * Otherwise, none on entry and grabs host lock.
959 static void ata_hsm_qc_complete(struct ata_queued_cmd
*qc
, int in_wq
)
961 struct ata_port
*ap
= qc
->ap
;
964 if (ap
->ops
->error_handler
) {
966 spin_lock_irqsave(ap
->lock
, flags
);
968 /* EH might have kicked in while host lock is
971 qc
= ata_qc_from_tag(ap
, qc
->tag
);
973 if (likely(!(qc
->err_mask
& AC_ERR_HSM
))) {
974 ap
->ops
->sff_irq_on(ap
);
980 spin_unlock_irqrestore(ap
->lock
, flags
);
982 if (likely(!(qc
->err_mask
& AC_ERR_HSM
)))
989 spin_lock_irqsave(ap
->lock
, flags
);
990 ap
->ops
->sff_irq_on(ap
);
992 spin_unlock_irqrestore(ap
->lock
, flags
);
999 * ata_sff_hsm_move - move the HSM to the next state.
1000 * @ap: the target ata_port
1002 * @status: current device status
1003 * @in_wq: 1 if called from workqueue, 0 otherwise
1006 * 1 when poll next status needed, 0 otherwise.
1008 int ata_sff_hsm_move(struct ata_port
*ap
, struct ata_queued_cmd
*qc
,
1009 u8 status
, int in_wq
)
1011 unsigned long flags
= 0;
1014 WARN_ON((qc
->flags
& ATA_QCFLAG_ACTIVE
) == 0);
1016 /* Make sure ata_sff_qc_issue() does not throw things
1017 * like DMA polling into the workqueue. Notice that
1018 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
1020 WARN_ON(in_wq
!= ata_hsm_ok_in_wq(ap
, qc
));
1023 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
1024 ap
->print_id
, qc
->tf
.protocol
, ap
->hsm_task_state
, status
);
1026 switch (ap
->hsm_task_state
) {
1028 /* Send first data block or PACKET CDB */
1030 /* If polling, we will stay in the work queue after
1031 * sending the data. Otherwise, interrupt handler
1032 * takes over after sending the data.
1034 poll_next
= (qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1036 /* check device status */
1037 if (unlikely((status
& ATA_DRQ
) == 0)) {
1038 /* handle BSY=0, DRQ=0 as error */
1039 if (likely(status
& (ATA_ERR
| ATA_DF
)))
1040 /* device stops HSM for abort/error */
1041 qc
->err_mask
|= AC_ERR_DEV
;
1043 /* HSM violation. Let EH handle this */
1044 qc
->err_mask
|= AC_ERR_HSM
;
1046 ap
->hsm_task_state
= HSM_ST_ERR
;
1050 /* Device should not ask for data transfer (DRQ=1)
1051 * when it finds something wrong.
1052 * We ignore DRQ here and stop the HSM by
1053 * changing hsm_task_state to HSM_ST_ERR and
1054 * let the EH abort the command or reset the device.
1056 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1057 /* Some ATAPI tape drives forget to clear the ERR bit
1058 * when doing the next command (mostly request sense).
1059 * We ignore ERR here to workaround and proceed sending
1062 if (!(qc
->dev
->horkage
& ATA_HORKAGE_STUCK_ERR
)) {
1063 ata_port_printk(ap
, KERN_WARNING
,
1064 "DRQ=1 with device error, "
1065 "dev_stat 0x%X\n", status
);
1066 qc
->err_mask
|= AC_ERR_HSM
;
1067 ap
->hsm_task_state
= HSM_ST_ERR
;
1072 /* Send the CDB (atapi) or the first data block (ata pio out).
1073 * During the state transition, interrupt handler shouldn't
1074 * be invoked before the data transfer is complete and
1075 * hsm_task_state is changed. Hence, the following locking.
1078 spin_lock_irqsave(ap
->lock
, flags
);
1080 if (qc
->tf
.protocol
== ATA_PROT_PIO
) {
1081 /* PIO data out protocol.
1082 * send first data block.
1085 /* ata_pio_sectors() might change the state
1086 * to HSM_ST_LAST. so, the state is changed here
1087 * before ata_pio_sectors().
1089 ap
->hsm_task_state
= HSM_ST
;
1090 ata_pio_sectors(qc
);
1093 atapi_send_cdb(ap
, qc
);
1096 spin_unlock_irqrestore(ap
->lock
, flags
);
1098 /* if polling, ata_pio_task() handles the rest.
1099 * otherwise, interrupt handler takes over from here.
1104 /* complete command or read/write the data register */
1105 if (qc
->tf
.protocol
== ATAPI_PROT_PIO
) {
1106 /* ATAPI PIO protocol */
1107 if ((status
& ATA_DRQ
) == 0) {
1108 /* No more data to transfer or device error.
1109 * Device error will be tagged in HSM_ST_LAST.
1111 ap
->hsm_task_state
= HSM_ST_LAST
;
1115 /* Device should not ask for data transfer (DRQ=1)
1116 * when it finds something wrong.
1117 * We ignore DRQ here and stop the HSM by
1118 * changing hsm_task_state to HSM_ST_ERR and
1119 * let the EH abort the command or reset the device.
1121 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1122 ata_port_printk(ap
, KERN_WARNING
, "DRQ=1 with "
1123 "device error, dev_stat 0x%X\n",
1125 qc
->err_mask
|= AC_ERR_HSM
;
1126 ap
->hsm_task_state
= HSM_ST_ERR
;
1130 atapi_pio_bytes(qc
);
1132 if (unlikely(ap
->hsm_task_state
== HSM_ST_ERR
))
1133 /* bad ireason reported by device */
1137 /* ATA PIO protocol */
1138 if (unlikely((status
& ATA_DRQ
) == 0)) {
1139 /* handle BSY=0, DRQ=0 as error */
1140 if (likely(status
& (ATA_ERR
| ATA_DF
)))
1141 /* device stops HSM for abort/error */
1142 qc
->err_mask
|= AC_ERR_DEV
;
1144 /* HSM violation. Let EH handle this.
1145 * Phantom devices also trigger this
1146 * condition. Mark hint.
1148 qc
->err_mask
|= AC_ERR_HSM
|
1151 ap
->hsm_task_state
= HSM_ST_ERR
;
1155 /* For PIO reads, some devices may ask for
1156 * data transfer (DRQ=1) alone with ERR=1.
1157 * We respect DRQ here and transfer one
1158 * block of junk data before changing the
1159 * hsm_task_state to HSM_ST_ERR.
1161 * For PIO writes, ERR=1 DRQ=1 doesn't make
1162 * sense since the data block has been
1163 * transferred to the device.
1165 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1166 /* data might be corrputed */
1167 qc
->err_mask
|= AC_ERR_DEV
;
1169 if (!(qc
->tf
.flags
& ATA_TFLAG_WRITE
)) {
1170 ata_pio_sectors(qc
);
1171 status
= ata_wait_idle(ap
);
1174 if (status
& (ATA_BUSY
| ATA_DRQ
))
1175 qc
->err_mask
|= AC_ERR_HSM
;
1177 /* ata_pio_sectors() might change the
1178 * state to HSM_ST_LAST. so, the state
1179 * is changed after ata_pio_sectors().
1181 ap
->hsm_task_state
= HSM_ST_ERR
;
1185 ata_pio_sectors(qc
);
1187 if (ap
->hsm_task_state
== HSM_ST_LAST
&&
1188 (!(qc
->tf
.flags
& ATA_TFLAG_WRITE
))) {
1190 status
= ata_wait_idle(ap
);
1199 if (unlikely(!ata_ok(status
))) {
1200 qc
->err_mask
|= __ac_err_mask(status
);
1201 ap
->hsm_task_state
= HSM_ST_ERR
;
1205 /* no more data to transfer */
1206 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1207 ap
->print_id
, qc
->dev
->devno
, status
);
1209 WARN_ON(qc
->err_mask
);
1211 ap
->hsm_task_state
= HSM_ST_IDLE
;
1213 /* complete taskfile transaction */
1214 ata_hsm_qc_complete(qc
, in_wq
);
1220 /* make sure qc->err_mask is available to
1221 * know what's wrong and recover
1223 WARN_ON(qc
->err_mask
== 0);
1225 ap
->hsm_task_state
= HSM_ST_IDLE
;
1227 /* complete taskfile transaction */
1228 ata_hsm_qc_complete(qc
, in_wq
);
1240 void ata_pio_task(struct work_struct
*work
)
1242 struct ata_port
*ap
=
1243 container_of(work
, struct ata_port
, port_task
.work
);
1244 struct ata_queued_cmd
*qc
= ap
->port_task_data
;
1249 WARN_ON(ap
->hsm_task_state
== HSM_ST_IDLE
);
1252 * This is purely heuristic. This is a fast path.
1253 * Sometimes when we enter, BSY will be cleared in
1254 * a chk-status or two. If not, the drive is probably seeking
1255 * or something. Snooze for a couple msecs, then
1256 * chk-status again. If still busy, queue delayed work.
1258 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 5);
1259 if (status
& ATA_BUSY
) {
1261 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 10);
1262 if (status
& ATA_BUSY
) {
1263 ata_pio_queue_task(ap
, qc
, ATA_SHORT_PAUSE
);
1269 poll_next
= ata_sff_hsm_move(ap
, qc
, status
, 1);
1271 /* another command or interrupt handler
1272 * may be running at this point.
1279 * ata_sff_qc_issue - issue taskfile to device in proto-dependent manner
1280 * @qc: command to issue to device
1282 * Using various libata functions and hooks, this function
1283 * starts an ATA command. ATA commands are grouped into
1284 * classes called "protocols", and issuing each type of protocol
1285 * is slightly different.
1287 * May be used as the qc_issue() entry in ata_port_operations.
1290 * spin_lock_irqsave(host lock)
1293 * Zero on success, AC_ERR_* mask on failure
1295 unsigned int ata_sff_qc_issue(struct ata_queued_cmd
*qc
)
1297 struct ata_port
*ap
= qc
->ap
;
1299 /* Use polling pio if the LLD doesn't handle
1300 * interrupt driven pio and atapi CDB interrupt.
1302 if (ap
->flags
& ATA_FLAG_PIO_POLLING
) {
1303 switch (qc
->tf
.protocol
) {
1305 case ATA_PROT_NODATA
:
1306 case ATAPI_PROT_PIO
:
1307 case ATAPI_PROT_NODATA
:
1308 qc
->tf
.flags
|= ATA_TFLAG_POLLING
;
1310 case ATAPI_PROT_DMA
:
1311 if (qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
)
1312 /* see ata_dma_blacklisted() */
1320 /* select the device */
1321 ata_dev_select(ap
, qc
->dev
->devno
, 1, 0);
1323 /* start the command */
1324 switch (qc
->tf
.protocol
) {
1325 case ATA_PROT_NODATA
:
1326 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1327 ata_qc_set_polling(qc
);
1329 ata_tf_to_host(ap
, &qc
->tf
);
1330 ap
->hsm_task_state
= HSM_ST_LAST
;
1332 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1333 ata_pio_queue_task(ap
, qc
, 0);
1338 WARN_ON(qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1340 ap
->ops
->sff_tf_load(ap
, &qc
->tf
); /* load tf registers */
1341 ap
->ops
->bmdma_setup(qc
); /* set up bmdma */
1342 ap
->ops
->bmdma_start(qc
); /* initiate bmdma */
1343 ap
->hsm_task_state
= HSM_ST_LAST
;
1347 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1348 ata_qc_set_polling(qc
);
1350 ata_tf_to_host(ap
, &qc
->tf
);
1352 if (qc
->tf
.flags
& ATA_TFLAG_WRITE
) {
1353 /* PIO data out protocol */
1354 ap
->hsm_task_state
= HSM_ST_FIRST
;
1355 ata_pio_queue_task(ap
, qc
, 0);
1357 /* always send first data block using
1358 * the ata_pio_task() codepath.
1361 /* PIO data in protocol */
1362 ap
->hsm_task_state
= HSM_ST
;
1364 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1365 ata_pio_queue_task(ap
, qc
, 0);
1367 /* if polling, ata_pio_task() handles the rest.
1368 * otherwise, interrupt handler takes over from here.
1374 case ATAPI_PROT_PIO
:
1375 case ATAPI_PROT_NODATA
:
1376 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1377 ata_qc_set_polling(qc
);
1379 ata_tf_to_host(ap
, &qc
->tf
);
1381 ap
->hsm_task_state
= HSM_ST_FIRST
;
1383 /* send cdb by polling if no cdb interrupt */
1384 if ((!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
)) ||
1385 (qc
->tf
.flags
& ATA_TFLAG_POLLING
))
1386 ata_pio_queue_task(ap
, qc
, 0);
1389 case ATAPI_PROT_DMA
:
1390 WARN_ON(qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1392 ap
->ops
->sff_tf_load(ap
, &qc
->tf
); /* load tf registers */
1393 ap
->ops
->bmdma_setup(qc
); /* set up bmdma */
1394 ap
->hsm_task_state
= HSM_ST_FIRST
;
1396 /* send cdb by polling if no cdb interrupt */
1397 if (!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1398 ata_pio_queue_task(ap
, qc
, 0);
1403 return AC_ERR_SYSTEM
;
1410 * ata_sff_host_intr - Handle host interrupt for given (port, task)
1411 * @ap: Port on which interrupt arrived (possibly...)
1412 * @qc: Taskfile currently active in engine
1414 * Handle host interrupt for given queued command. Currently,
1415 * only DMA interrupts are handled. All other commands are
1416 * handled via polling with interrupts disabled (nIEN bit).
1419 * spin_lock_irqsave(host lock)
1422 * One if interrupt was handled, zero if not (shared irq).
1424 inline unsigned int ata_sff_host_intr(struct ata_port
*ap
,
1425 struct ata_queued_cmd
*qc
)
1427 struct ata_eh_info
*ehi
= &ap
->link
.eh_info
;
1428 u8 status
, host_stat
= 0;
1430 VPRINTK("ata%u: protocol %d task_state %d\n",
1431 ap
->print_id
, qc
->tf
.protocol
, ap
->hsm_task_state
);
1433 /* Check whether we are expecting interrupt in this state */
1434 switch (ap
->hsm_task_state
) {
1436 /* Some pre-ATAPI-4 devices assert INTRQ
1437 * at this state when ready to receive CDB.
1440 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
1441 * The flag was turned on only for atapi devices. No
1442 * need to check ata_is_atapi(qc->tf.protocol) again.
1444 if (!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1448 if (qc
->tf
.protocol
== ATA_PROT_DMA
||
1449 qc
->tf
.protocol
== ATAPI_PROT_DMA
) {
1450 /* check status of DMA engine */
1451 host_stat
= ap
->ops
->bmdma_status(ap
);
1452 VPRINTK("ata%u: host_stat 0x%X\n",
1453 ap
->print_id
, host_stat
);
1455 /* if it's not our irq... */
1456 if (!(host_stat
& ATA_DMA_INTR
))
1459 /* before we do anything else, clear DMA-Start bit */
1460 ap
->ops
->bmdma_stop(qc
);
1462 if (unlikely(host_stat
& ATA_DMA_ERR
)) {
1463 /* error when transfering data to/from memory */
1464 qc
->err_mask
|= AC_ERR_HOST_BUS
;
1465 ap
->hsm_task_state
= HSM_ST_ERR
;
1475 /* check altstatus */
1476 status
= ata_sff_altstatus(ap
);
1477 if (status
& ATA_BUSY
)
1480 /* check main status, clearing INTRQ */
1481 status
= ap
->ops
->sff_check_status(ap
);
1482 if (unlikely(status
& ATA_BUSY
))
1485 /* ack bmdma irq events */
1486 ap
->ops
->sff_irq_clear(ap
);
1488 ata_sff_hsm_move(ap
, qc
, status
, 0);
1490 if (unlikely(qc
->err_mask
) && (qc
->tf
.protocol
== ATA_PROT_DMA
||
1491 qc
->tf
.protocol
== ATAPI_PROT_DMA
))
1492 ata_ehi_push_desc(ehi
, "BMDMA stat 0x%x", host_stat
);
1494 return 1; /* irq handled */
1497 ap
->stats
.idle_irq
++;
1500 if ((ap
->stats
.idle_irq
% 1000) == 0) {
1501 ap
->ops
->sff_check_status(ap
);
1502 ap
->ops
->sff_irq_clear(ap
);
1503 ata_port_printk(ap
, KERN_WARNING
, "irq trap\n");
1507 return 0; /* irq not handled */
1511 * ata_sff_interrupt - Default ATA host interrupt handler
1512 * @irq: irq line (unused)
1513 * @dev_instance: pointer to our ata_host information structure
1515 * Default interrupt handler for PCI IDE devices. Calls
1516 * ata_sff_host_intr() for each port that is not disabled.
1519 * Obtains host lock during operation.
1522 * IRQ_NONE or IRQ_HANDLED.
1524 irqreturn_t
ata_sff_interrupt(int irq
, void *dev_instance
)
1526 struct ata_host
*host
= dev_instance
;
1528 unsigned int handled
= 0;
1529 unsigned long flags
;
1531 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1532 spin_lock_irqsave(&host
->lock
, flags
);
1534 for (i
= 0; i
< host
->n_ports
; i
++) {
1535 struct ata_port
*ap
;
1537 ap
= host
->ports
[i
];
1539 !(ap
->flags
& ATA_FLAG_DISABLED
)) {
1540 struct ata_queued_cmd
*qc
;
1542 qc
= ata_qc_from_tag(ap
, ap
->link
.active_tag
);
1543 if (qc
&& (!(qc
->tf
.flags
& ATA_TFLAG_POLLING
)) &&
1544 (qc
->flags
& ATA_QCFLAG_ACTIVE
))
1545 handled
|= ata_sff_host_intr(ap
, qc
);
1549 spin_unlock_irqrestore(&host
->lock
, flags
);
1551 return IRQ_RETVAL(handled
);
1555 * ata_sff_freeze - Freeze SFF controller port
1556 * @ap: port to freeze
1558 * Freeze BMDMA controller port.
1561 * Inherited from caller.
1563 void ata_sff_freeze(struct ata_port
*ap
)
1565 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1567 ap
->ctl
|= ATA_NIEN
;
1568 ap
->last_ctl
= ap
->ctl
;
1570 if (ioaddr
->ctl_addr
)
1571 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
1573 /* Under certain circumstances, some controllers raise IRQ on
1574 * ATA_NIEN manipulation. Also, many controllers fail to mask
1575 * previously pending IRQ on ATA_NIEN assertion. Clear it.
1577 ap
->ops
->sff_check_status(ap
);
1579 ap
->ops
->sff_irq_clear(ap
);
1583 * ata_sff_thaw - Thaw SFF controller port
1586 * Thaw SFF controller port.
1589 * Inherited from caller.
1591 void ata_sff_thaw(struct ata_port
*ap
)
1593 /* clear & re-enable interrupts */
1594 ap
->ops
->sff_check_status(ap
);
1595 ap
->ops
->sff_irq_clear(ap
);
1596 ap
->ops
->sff_irq_on(ap
);
1600 * ata_sff_prereset - prepare SFF link for reset
1601 * @link: SFF link to be reset
1602 * @deadline: deadline jiffies for the operation
1604 * SFF link @link is about to be reset. Initialize it. It first
1605 * calls ata_std_prereset() and wait for !BSY if the port is
1609 * Kernel thread context (may sleep)
1612 * 0 on success, -errno otherwise.
1614 int ata_sff_prereset(struct ata_link
*link
, unsigned long deadline
)
1616 struct ata_eh_context
*ehc
= &link
->eh_context
;
1619 rc
= ata_std_prereset(link
, deadline
);
1623 /* if we're about to do hardreset, nothing more to do */
1624 if (ehc
->i
.action
& ATA_EH_HARDRESET
)
1627 /* wait for !BSY if we don't know that no device is attached */
1628 if (!ata_link_offline(link
)) {
1629 rc
= ata_sff_wait_ready(link
, deadline
);
1630 if (rc
&& rc
!= -ENODEV
) {
1631 ata_link_printk(link
, KERN_WARNING
, "device not ready "
1632 "(errno=%d), forcing hardreset\n", rc
);
1633 ehc
->i
.action
|= ATA_EH_HARDRESET
;
1641 * ata_devchk - PATA device presence detection
1642 * @ap: ATA channel to examine
1643 * @device: Device to examine (starting at zero)
1645 * This technique was originally described in
1646 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1647 * later found its way into the ATA/ATAPI spec.
1649 * Write a pattern to the ATA shadow registers,
1650 * and if a device is present, it will respond by
1651 * correctly storing and echoing back the
1652 * ATA shadow register contents.
1657 static unsigned int ata_devchk(struct ata_port
*ap
, unsigned int device
)
1659 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1662 ap
->ops
->sff_dev_select(ap
, device
);
1664 iowrite8(0x55, ioaddr
->nsect_addr
);
1665 iowrite8(0xaa, ioaddr
->lbal_addr
);
1667 iowrite8(0xaa, ioaddr
->nsect_addr
);
1668 iowrite8(0x55, ioaddr
->lbal_addr
);
1670 iowrite8(0x55, ioaddr
->nsect_addr
);
1671 iowrite8(0xaa, ioaddr
->lbal_addr
);
1673 nsect
= ioread8(ioaddr
->nsect_addr
);
1674 lbal
= ioread8(ioaddr
->lbal_addr
);
1676 if ((nsect
== 0x55) && (lbal
== 0xaa))
1677 return 1; /* we found a device */
1679 return 0; /* nothing found */
1683 * ata_sff_dev_classify - Parse returned ATA device signature
1684 * @dev: ATA device to classify (starting at zero)
1685 * @present: device seems present
1686 * @r_err: Value of error register on completion
1688 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
1689 * an ATA/ATAPI-defined set of values is placed in the ATA
1690 * shadow registers, indicating the results of device detection
1693 * Select the ATA device, and read the values from the ATA shadow
1694 * registers. Then parse according to the Error register value,
1695 * and the spec-defined values examined by ata_dev_classify().
1701 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1703 unsigned int ata_sff_dev_classify(struct ata_device
*dev
, int present
,
1706 struct ata_port
*ap
= dev
->link
->ap
;
1707 struct ata_taskfile tf
;
1711 ap
->ops
->sff_dev_select(ap
, dev
->devno
);
1713 memset(&tf
, 0, sizeof(tf
));
1715 ap
->ops
->sff_tf_read(ap
, &tf
);
1720 /* see if device passed diags: continue and warn later */
1722 /* diagnostic fail : do nothing _YET_ */
1723 dev
->horkage
|= ATA_HORKAGE_DIAGNOSTIC
;
1726 else if ((dev
->devno
== 0) && (err
== 0x81))
1729 return ATA_DEV_NONE
;
1731 /* determine if device is ATA or ATAPI */
1732 class = ata_dev_classify(&tf
);
1734 if (class == ATA_DEV_UNKNOWN
) {
1735 /* If the device failed diagnostic, it's likely to
1736 * have reported incorrect device signature too.
1737 * Assume ATA device if the device seems present but
1738 * device signature is invalid with diagnostic
1741 if (present
&& (dev
->horkage
& ATA_HORKAGE_DIAGNOSTIC
))
1742 class = ATA_DEV_ATA
;
1744 class = ATA_DEV_NONE
;
1745 } else if ((class == ATA_DEV_ATA
) &&
1746 (ap
->ops
->sff_check_status(ap
) == 0))
1747 class = ATA_DEV_NONE
;
1753 * ata_sff_wait_after_reset - wait for devices to become ready after reset
1754 * @link: SFF link which is just reset
1755 * @devmask: mask of present devices
1756 * @deadline: deadline jiffies for the operation
1758 * Wait devices attached to SFF @link to become ready after
1759 * reset. It contains preceding 150ms wait to avoid accessing TF
1760 * status register too early.
1763 * Kernel thread context (may sleep).
1766 * 0 on success, -ENODEV if some or all of devices in @devmask
1767 * don't seem to exist. -errno on other errors.
1769 int ata_sff_wait_after_reset(struct ata_link
*link
, unsigned int devmask
,
1770 unsigned long deadline
)
1772 struct ata_port
*ap
= link
->ap
;
1773 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1774 unsigned int dev0
= devmask
& (1 << 0);
1775 unsigned int dev1
= devmask
& (1 << 1);
1778 msleep(ATA_WAIT_AFTER_RESET_MSECS
);
1780 /* always check readiness of the master device */
1781 rc
= ata_sff_wait_ready(link
, deadline
);
1782 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
1783 * and TF status is 0xff, bail out on it too.
1788 /* if device 1 was found in ata_devchk, wait for register
1789 * access briefly, then wait for BSY to clear.
1794 ap
->ops
->sff_dev_select(ap
, 1);
1796 /* Wait for register access. Some ATAPI devices fail
1797 * to set nsect/lbal after reset, so don't waste too
1798 * much time on it. We're gonna wait for !BSY anyway.
1800 for (i
= 0; i
< 2; i
++) {
1803 nsect
= ioread8(ioaddr
->nsect_addr
);
1804 lbal
= ioread8(ioaddr
->lbal_addr
);
1805 if ((nsect
== 1) && (lbal
== 1))
1807 msleep(50); /* give drive a breather */
1810 rc
= ata_sff_wait_ready(link
, deadline
);
1818 /* is all this really necessary? */
1819 ap
->ops
->sff_dev_select(ap
, 0);
1821 ap
->ops
->sff_dev_select(ap
, 1);
1823 ap
->ops
->sff_dev_select(ap
, 0);
1828 static int ata_bus_softreset(struct ata_port
*ap
, unsigned int devmask
,
1829 unsigned long deadline
)
1831 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1833 DPRINTK("ata%u: bus reset via SRST\n", ap
->print_id
);
1835 /* software reset. causes dev0 to be selected */
1836 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
1837 udelay(20); /* FIXME: flush */
1838 iowrite8(ap
->ctl
| ATA_SRST
, ioaddr
->ctl_addr
);
1839 udelay(20); /* FIXME: flush */
1840 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
1842 /* wait the port to become ready */
1843 return ata_sff_wait_after_reset(&ap
->link
, devmask
, deadline
);
1847 * ata_sff_softreset - reset host port via ATA SRST
1848 * @link: ATA link to reset
1849 * @classes: resulting classes of attached devices
1850 * @deadline: deadline jiffies for the operation
1852 * Reset host port using ATA SRST.
1855 * Kernel thread context (may sleep)
1858 * 0 on success, -errno otherwise.
1860 int ata_sff_softreset(struct ata_link
*link
, unsigned int *classes
,
1861 unsigned long deadline
)
1863 struct ata_port
*ap
= link
->ap
;
1864 unsigned int slave_possible
= ap
->flags
& ATA_FLAG_SLAVE_POSS
;
1865 unsigned int devmask
= 0;
1871 if (ata_link_offline(link
)) {
1872 classes
[0] = ATA_DEV_NONE
;
1876 /* determine if device 0/1 are present */
1877 if (ata_devchk(ap
, 0))
1878 devmask
|= (1 << 0);
1879 if (slave_possible
&& ata_devchk(ap
, 1))
1880 devmask
|= (1 << 1);
1882 /* select device 0 again */
1883 ap
->ops
->sff_dev_select(ap
, 0);
1885 /* issue bus reset */
1886 DPRINTK("about to softreset, devmask=%x\n", devmask
);
1887 rc
= ata_bus_softreset(ap
, devmask
, deadline
);
1888 /* if link is occupied, -ENODEV too is an error */
1889 if (rc
&& (rc
!= -ENODEV
|| sata_scr_valid(link
))) {
1890 ata_link_printk(link
, KERN_ERR
, "SRST failed (errno=%d)\n", rc
);
1894 /* determine by signature whether we have ATA or ATAPI devices */
1895 classes
[0] = ata_sff_dev_classify(&link
->device
[0],
1896 devmask
& (1 << 0), &err
);
1897 if (slave_possible
&& err
!= 0x81)
1898 classes
[1] = ata_sff_dev_classify(&link
->device
[1],
1899 devmask
& (1 << 1), &err
);
1902 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes
[0], classes
[1]);
1907 * sata_sff_hardreset - reset host port via SATA phy reset
1908 * @link: link to reset
1909 * @class: resulting class of attached device
1910 * @deadline: deadline jiffies for the operation
1912 * SATA phy-reset host port using DET bits of SControl register,
1913 * wait for !BSY and classify the attached device.
1916 * Kernel thread context (may sleep)
1919 * 0 on success, -errno otherwise.
1921 int sata_sff_hardreset(struct ata_link
*link
, unsigned int *class,
1922 unsigned long deadline
)
1924 struct ata_port
*ap
= link
->ap
;
1925 const unsigned long *timing
= sata_ehc_deb_timing(&link
->eh_context
);
1931 rc
= sata_link_hardreset(link
, timing
, deadline
);
1933 ata_link_printk(link
, KERN_ERR
,
1934 "COMRESET failed (errno=%d)\n", rc
);
1938 /* TODO: phy layer with polling, timeouts, etc. */
1939 if (ata_link_offline(link
)) {
1940 *class = ATA_DEV_NONE
;
1941 DPRINTK("EXIT, link offline\n");
1945 /* If PMP is supported, we have to do follow-up SRST. Note
1946 * that some PMPs don't send D2H Reg FIS after hardreset at
1947 * all if the first port is empty. Wait for it just for a
1948 * second and request follow-up SRST.
1950 if (ap
->flags
& ATA_FLAG_PMP
) {
1951 ata_sff_wait_after_reset(link
, 1, jiffies
+ HZ
);
1955 /* wait for the link to become online */
1956 rc
= ata_sff_wait_after_reset(link
, 1, deadline
);
1957 /* link occupied, -ENODEV too is an error */
1959 ata_link_printk(link
, KERN_ERR
,
1960 "COMRESET failed (errno=%d)\n", rc
);
1964 *class = ata_sff_dev_classify(link
->device
, 1, NULL
);
1966 DPRINTK("EXIT, class=%u\n", *class);
1971 * ata_sff_postreset - SFF postreset callback
1972 * @link: the target SFF ata_link
1973 * @classes: classes of attached devices
1975 * This function is invoked after a successful reset. It first
1976 * calls ata_std_postreset() and performs SFF specific postreset
1980 * Kernel thread context (may sleep)
1982 void ata_sff_postreset(struct ata_link
*link
, unsigned int *classes
)
1984 struct ata_port
*ap
= link
->ap
;
1986 ata_std_postreset(link
, classes
);
1988 /* is double-select really necessary? */
1989 if (classes
[0] != ATA_DEV_NONE
)
1990 ap
->ops
->sff_dev_select(ap
, 1);
1991 if (classes
[1] != ATA_DEV_NONE
)
1992 ap
->ops
->sff_dev_select(ap
, 0);
1994 /* bail out if no device is present */
1995 if (classes
[0] == ATA_DEV_NONE
&& classes
[1] == ATA_DEV_NONE
) {
1996 DPRINTK("EXIT, no device\n");
2000 /* set up device control */
2001 if (ap
->ioaddr
.ctl_addr
)
2002 iowrite8(ap
->ctl
, ap
->ioaddr
.ctl_addr
);
2006 * ata_sff_error_handler - Stock error handler for BMDMA controller
2007 * @ap: port to handle error for
2009 * Stock error handler for SFF controller. It can handle both
2010 * PATA and SATA controllers. Many controllers should be able to
2011 * use this EH as-is or with some added handling before and
2015 * Kernel thread context (may sleep)
2017 void ata_sff_error_handler(struct ata_port
*ap
)
2019 ata_reset_fn_t softreset
= ap
->ops
->softreset
;
2020 ata_reset_fn_t hardreset
= ap
->ops
->hardreset
;
2021 struct ata_queued_cmd
*qc
;
2022 unsigned long flags
;
2025 qc
= __ata_qc_from_tag(ap
, ap
->link
.active_tag
);
2026 if (qc
&& !(qc
->flags
& ATA_QCFLAG_FAILED
))
2029 /* reset PIO HSM and stop DMA engine */
2030 spin_lock_irqsave(ap
->lock
, flags
);
2032 ap
->hsm_task_state
= HSM_ST_IDLE
;
2034 if (ap
->ioaddr
.bmdma_addr
&&
2035 qc
&& (qc
->tf
.protocol
== ATA_PROT_DMA
||
2036 qc
->tf
.protocol
== ATAPI_PROT_DMA
)) {
2039 host_stat
= ap
->ops
->bmdma_status(ap
);
2041 /* BMDMA controllers indicate host bus error by
2042 * setting DMA_ERR bit and timing out. As it wasn't
2043 * really a timeout event, adjust error mask and
2044 * cancel frozen state.
2046 if (qc
->err_mask
== AC_ERR_TIMEOUT
&& (host_stat
& ATA_DMA_ERR
)) {
2047 qc
->err_mask
= AC_ERR_HOST_BUS
;
2051 ap
->ops
->bmdma_stop(qc
);
2054 ata_sff_altstatus(ap
);
2055 ap
->ops
->sff_check_status(ap
);
2056 ap
->ops
->sff_irq_clear(ap
);
2058 spin_unlock_irqrestore(ap
->lock
, flags
);
2061 ata_eh_thaw_port(ap
);
2063 /* PIO and DMA engines have been stopped, perform recovery */
2065 /* ata_sff_softreset and sata_sff_hardreset are inherited to
2066 * all SFF drivers from ata_sff_port_ops. Ignore softreset if
2067 * ctl isn't accessible. Ignore hardreset if SCR access isn't
2070 if (softreset
== ata_sff_softreset
&& !ap
->ioaddr
.ctl_addr
)
2072 if (hardreset
== sata_sff_hardreset
&& !sata_scr_valid(&ap
->link
))
2075 ata_do_eh(ap
, ap
->ops
->prereset
, softreset
, hardreset
,
2076 ap
->ops
->postreset
);
2080 * ata_sff_post_internal_cmd - Stock post_internal_cmd for SFF controller
2081 * @qc: internal command to clean up
2084 * Kernel thread context (may sleep)
2086 void ata_sff_post_internal_cmd(struct ata_queued_cmd
*qc
)
2088 if (qc
->ap
->ioaddr
.bmdma_addr
)
2093 * ata_sff_port_start - Set port up for dma.
2094 * @ap: Port to initialize
2096 * Called just after data structures for each port are
2097 * initialized. Allocates space for PRD table if the device
2098 * is DMA capable SFF.
2100 * May be used as the port_start() entry in ata_port_operations.
2103 * Inherited from caller.
2105 int ata_sff_port_start(struct ata_port
*ap
)
2107 if (ap
->ioaddr
.bmdma_addr
)
2108 return ata_port_start(ap
);
2113 * ata_sff_std_ports - initialize ioaddr with standard port offsets.
2114 * @ioaddr: IO address structure to be initialized
2116 * Utility function which initializes data_addr, error_addr,
2117 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
2118 * device_addr, status_addr, and command_addr to standard offsets
2119 * relative to cmd_addr.
2121 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
2123 void ata_sff_std_ports(struct ata_ioports
*ioaddr
)
2125 ioaddr
->data_addr
= ioaddr
->cmd_addr
+ ATA_REG_DATA
;
2126 ioaddr
->error_addr
= ioaddr
->cmd_addr
+ ATA_REG_ERR
;
2127 ioaddr
->feature_addr
= ioaddr
->cmd_addr
+ ATA_REG_FEATURE
;
2128 ioaddr
->nsect_addr
= ioaddr
->cmd_addr
+ ATA_REG_NSECT
;
2129 ioaddr
->lbal_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAL
;
2130 ioaddr
->lbam_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAM
;
2131 ioaddr
->lbah_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAH
;
2132 ioaddr
->device_addr
= ioaddr
->cmd_addr
+ ATA_REG_DEVICE
;
2133 ioaddr
->status_addr
= ioaddr
->cmd_addr
+ ATA_REG_STATUS
;
2134 ioaddr
->command_addr
= ioaddr
->cmd_addr
+ ATA_REG_CMD
;
2137 unsigned long ata_bmdma_mode_filter(struct ata_device
*adev
,
2138 unsigned long xfer_mask
)
2140 /* Filter out DMA modes if the device has been configured by
2141 the BIOS as PIO only */
2143 if (adev
->link
->ap
->ioaddr
.bmdma_addr
== NULL
)
2144 xfer_mask
&= ~(ATA_MASK_MWDMA
| ATA_MASK_UDMA
);
2149 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
2150 * @qc: Info associated with this ATA transaction.
2153 * spin_lock_irqsave(host lock)
2155 void ata_bmdma_setup(struct ata_queued_cmd
*qc
)
2157 struct ata_port
*ap
= qc
->ap
;
2158 unsigned int rw
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
);
2161 /* load PRD table addr. */
2162 mb(); /* make sure PRD table writes are visible to controller */
2163 iowrite32(ap
->prd_dma
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_TABLE_OFS
);
2165 /* specify data direction, triple-check start bit is clear */
2166 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2167 dmactl
&= ~(ATA_DMA_WR
| ATA_DMA_START
);
2169 dmactl
|= ATA_DMA_WR
;
2170 iowrite8(dmactl
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2172 /* issue r/w command */
2173 ap
->ops
->sff_exec_command(ap
, &qc
->tf
);
2177 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
2178 * @qc: Info associated with this ATA transaction.
2181 * spin_lock_irqsave(host lock)
2183 void ata_bmdma_start(struct ata_queued_cmd
*qc
)
2185 struct ata_port
*ap
= qc
->ap
;
2188 /* start host DMA transaction */
2189 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2190 iowrite8(dmactl
| ATA_DMA_START
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2192 /* Strictly, one may wish to issue an ioread8() here, to
2193 * flush the mmio write. However, control also passes
2194 * to the hardware at this point, and it will interrupt
2195 * us when we are to resume control. So, in effect,
2196 * we don't care when the mmio write flushes.
2197 * Further, a read of the DMA status register _immediately_
2198 * following the write may not be what certain flaky hardware
2199 * is expected, so I think it is best to not add a readb()
2200 * without first all the MMIO ATA cards/mobos.
2201 * Or maybe I'm just being paranoid.
2203 * FIXME: The posting of this write means I/O starts are
2204 * unneccessarily delayed for MMIO
2209 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
2210 * @qc: Command we are ending DMA for
2212 * Clears the ATA_DMA_START flag in the dma control register
2214 * May be used as the bmdma_stop() entry in ata_port_operations.
2217 * spin_lock_irqsave(host lock)
2219 void ata_bmdma_stop(struct ata_queued_cmd
*qc
)
2221 struct ata_port
*ap
= qc
->ap
;
2222 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
2224 /* clear start/stop bit */
2225 iowrite8(ioread8(mmio
+ ATA_DMA_CMD
) & ~ATA_DMA_START
,
2226 mmio
+ ATA_DMA_CMD
);
2228 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
2229 ata_sff_altstatus(ap
); /* dummy read */
2233 * ata_bmdma_status - Read PCI IDE BMDMA status
2234 * @ap: Port associated with this ATA transaction.
2236 * Read and return BMDMA status register.
2238 * May be used as the bmdma_status() entry in ata_port_operations.
2241 * spin_lock_irqsave(host lock)
2243 u8
ata_bmdma_status(struct ata_port
*ap
)
2245 return ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_STATUS
);
2249 * ata_bus_reset - reset host port and associated ATA channel
2250 * @ap: port to reset
2252 * This is typically the first time we actually start issuing
2253 * commands to the ATA channel. We wait for BSY to clear, then
2254 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2255 * result. Determine what devices, if any, are on the channel
2256 * by looking at the device 0/1 error register. Look at the signature
2257 * stored in each device's taskfile registers, to determine if
2258 * the device is ATA or ATAPI.
2261 * PCI/etc. bus probe sem.
2262 * Obtains host lock.
2265 * Sets ATA_FLAG_DISABLED if bus reset fails.
2268 * This function is only for drivers which still use old EH and
2269 * will be removed soon.
2271 void ata_bus_reset(struct ata_port
*ap
)
2273 struct ata_device
*device
= ap
->link
.device
;
2274 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
2275 unsigned int slave_possible
= ap
->flags
& ATA_FLAG_SLAVE_POSS
;
2277 unsigned int dev0
, dev1
= 0, devmask
= 0;
2280 DPRINTK("ENTER, host %u, port %u\n", ap
->print_id
, ap
->port_no
);
2282 /* determine if device 0/1 are present */
2283 if (ap
->flags
& ATA_FLAG_SATA_RESET
)
2286 dev0
= ata_devchk(ap
, 0);
2288 dev1
= ata_devchk(ap
, 1);
2292 devmask
|= (1 << 0);
2294 devmask
|= (1 << 1);
2296 /* select device 0 again */
2297 ap
->ops
->sff_dev_select(ap
, 0);
2299 /* issue bus reset */
2300 if (ap
->flags
& ATA_FLAG_SRST
) {
2301 rc
= ata_bus_softreset(ap
, devmask
, jiffies
+ 40 * HZ
);
2302 if (rc
&& rc
!= -ENODEV
)
2307 * determine by signature whether we have ATA or ATAPI devices
2309 device
[0].class = ata_sff_dev_classify(&device
[0], dev0
, &err
);
2310 if ((slave_possible
) && (err
!= 0x81))
2311 device
[1].class = ata_sff_dev_classify(&device
[1], dev1
, &err
);
2313 /* is double-select really necessary? */
2314 if (device
[1].class != ATA_DEV_NONE
)
2315 ap
->ops
->sff_dev_select(ap
, 1);
2316 if (device
[0].class != ATA_DEV_NONE
)
2317 ap
->ops
->sff_dev_select(ap
, 0);
2319 /* if no devices were detected, disable this port */
2320 if ((device
[0].class == ATA_DEV_NONE
) &&
2321 (device
[1].class == ATA_DEV_NONE
))
2324 if (ap
->flags
& (ATA_FLAG_SATA_RESET
| ATA_FLAG_SRST
)) {
2325 /* set up device control for ATA_FLAG_SATA_RESET */
2326 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
2333 ata_port_printk(ap
, KERN_ERR
, "disabling port\n");
2334 ata_port_disable(ap
);
2342 * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex
2345 * Some PCI ATA devices report simplex mode but in fact can be told to
2346 * enter non simplex mode. This implements the necessary logic to
2347 * perform the task on such devices. Calling it on other devices will
2348 * have -undefined- behaviour.
2350 int ata_pci_bmdma_clear_simplex(struct pci_dev
*pdev
)
2352 unsigned long bmdma
= pci_resource_start(pdev
, 4);
2358 simplex
= inb(bmdma
+ 0x02);
2359 outb(simplex
& 0x60, bmdma
+ 0x02);
2360 simplex
= inb(bmdma
+ 0x02);
2367 * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host
2368 * @host: target ATA host
2370 * Acquire PCI BMDMA resources and initialize @host accordingly.
2373 * Inherited from calling layer (may sleep).
2376 * 0 on success, -errno otherwise.
2378 int ata_pci_bmdma_init(struct ata_host
*host
)
2380 struct device
*gdev
= host
->dev
;
2381 struct pci_dev
*pdev
= to_pci_dev(gdev
);
2384 /* No BAR4 allocation: No DMA */
2385 if (pci_resource_start(pdev
, 4) == 0)
2388 /* TODO: If we get no DMA mask we should fall back to PIO */
2389 rc
= pci_set_dma_mask(pdev
, ATA_DMA_MASK
);
2392 rc
= pci_set_consistent_dma_mask(pdev
, ATA_DMA_MASK
);
2396 /* request and iomap DMA region */
2397 rc
= pcim_iomap_regions(pdev
, 1 << 4, dev_driver_string(gdev
));
2399 dev_printk(KERN_ERR
, gdev
, "failed to request/iomap BAR4\n");
2402 host
->iomap
= pcim_iomap_table(pdev
);
2404 for (i
= 0; i
< 2; i
++) {
2405 struct ata_port
*ap
= host
->ports
[i
];
2406 void __iomem
*bmdma
= host
->iomap
[4] + 8 * i
;
2408 if (ata_port_is_dummy(ap
))
2411 ap
->ioaddr
.bmdma_addr
= bmdma
;
2412 if ((!(ap
->flags
& ATA_FLAG_IGN_SIMPLEX
)) &&
2413 (ioread8(bmdma
+ 2) & 0x80))
2414 host
->flags
|= ATA_HOST_SIMPLEX
;
2416 ata_port_desc(ap
, "bmdma 0x%llx",
2417 (unsigned long long)pci_resource_start(pdev
, 4) + 8 * i
);
2423 static int ata_resources_present(struct pci_dev
*pdev
, int port
)
2427 /* Check the PCI resources for this channel are enabled */
2429 for (i
= 0; i
< 2; i
++) {
2430 if (pci_resource_start(pdev
, port
+ i
) == 0 ||
2431 pci_resource_len(pdev
, port
+ i
) == 0)
2438 * ata_pci_sff_init_host - acquire native PCI ATA resources and init host
2439 * @host: target ATA host
2441 * Acquire native PCI ATA resources for @host and initialize the
2442 * first two ports of @host accordingly. Ports marked dummy are
2443 * skipped and allocation failure makes the port dummy.
2445 * Note that native PCI resources are valid even for legacy hosts
2446 * as we fix up pdev resources array early in boot, so this
2447 * function can be used for both native and legacy SFF hosts.
2450 * Inherited from calling layer (may sleep).
2453 * 0 if at least one port is initialized, -ENODEV if no port is
2456 int ata_pci_sff_init_host(struct ata_host
*host
)
2458 struct device
*gdev
= host
->dev
;
2459 struct pci_dev
*pdev
= to_pci_dev(gdev
);
2460 unsigned int mask
= 0;
2463 /* request, iomap BARs and init port addresses accordingly */
2464 for (i
= 0; i
< 2; i
++) {
2465 struct ata_port
*ap
= host
->ports
[i
];
2467 void __iomem
* const *iomap
;
2469 if (ata_port_is_dummy(ap
))
2472 /* Discard disabled ports. Some controllers show
2473 * their unused channels this way. Disabled ports are
2476 if (!ata_resources_present(pdev
, i
)) {
2477 ap
->ops
= &ata_dummy_port_ops
;
2481 rc
= pcim_iomap_regions(pdev
, 0x3 << base
,
2482 dev_driver_string(gdev
));
2484 dev_printk(KERN_WARNING
, gdev
,
2485 "failed to request/iomap BARs for port %d "
2486 "(errno=%d)\n", i
, rc
);
2488 pcim_pin_device(pdev
);
2489 ap
->ops
= &ata_dummy_port_ops
;
2492 host
->iomap
= iomap
= pcim_iomap_table(pdev
);
2494 ap
->ioaddr
.cmd_addr
= iomap
[base
];
2495 ap
->ioaddr
.altstatus_addr
=
2496 ap
->ioaddr
.ctl_addr
= (void __iomem
*)
2497 ((unsigned long)iomap
[base
+ 1] | ATA_PCI_CTL_OFS
);
2498 ata_sff_std_ports(&ap
->ioaddr
);
2500 ata_port_desc(ap
, "cmd 0x%llx ctl 0x%llx",
2501 (unsigned long long)pci_resource_start(pdev
, base
),
2502 (unsigned long long)pci_resource_start(pdev
, base
+ 1));
2508 dev_printk(KERN_ERR
, gdev
, "no available native port\n");
2516 * ata_pci_sff_prepare_host - helper to prepare native PCI ATA host
2517 * @pdev: target PCI device
2518 * @ppi: array of port_info, must be enough for two ports
2519 * @r_host: out argument for the initialized ATA host
2521 * Helper to allocate ATA host for @pdev, acquire all native PCI
2522 * resources and initialize it accordingly in one go.
2525 * Inherited from calling layer (may sleep).
2528 * 0 on success, -errno otherwise.
2530 int ata_pci_sff_prepare_host(struct pci_dev
*pdev
,
2531 const struct ata_port_info
* const * ppi
,
2532 struct ata_host
**r_host
)
2534 struct ata_host
*host
;
2537 if (!devres_open_group(&pdev
->dev
, NULL
, GFP_KERNEL
))
2540 host
= ata_host_alloc_pinfo(&pdev
->dev
, ppi
, 2);
2542 dev_printk(KERN_ERR
, &pdev
->dev
,
2543 "failed to allocate ATA host\n");
2548 rc
= ata_pci_sff_init_host(host
);
2552 /* init DMA related stuff */
2553 rc
= ata_pci_bmdma_init(host
);
2557 devres_remove_group(&pdev
->dev
, NULL
);
2562 /* This is necessary because PCI and iomap resources are
2563 * merged and releasing the top group won't release the
2564 * acquired resources if some of those have been acquired
2565 * before entering this function.
2567 pcim_iounmap_regions(pdev
, 0xf);
2569 devres_release_group(&pdev
->dev
, NULL
);
2574 * ata_pci_sff_activate_host - start SFF host, request IRQ and register it
2575 * @host: target SFF ATA host
2576 * @irq_handler: irq_handler used when requesting IRQ(s)
2577 * @sht: scsi_host_template to use when registering the host
2579 * This is the counterpart of ata_host_activate() for SFF ATA
2580 * hosts. This separate helper is necessary because SFF hosts
2581 * use two separate interrupts in legacy mode.
2584 * Inherited from calling layer (may sleep).
2587 * 0 on success, -errno otherwise.
2589 int ata_pci_sff_activate_host(struct ata_host
*host
,
2590 irq_handler_t irq_handler
,
2591 struct scsi_host_template
*sht
)
2593 struct device
*dev
= host
->dev
;
2594 struct pci_dev
*pdev
= to_pci_dev(dev
);
2595 const char *drv_name
= dev_driver_string(host
->dev
);
2596 int legacy_mode
= 0, rc
;
2598 rc
= ata_host_start(host
);
2602 if ((pdev
->class >> 8) == PCI_CLASS_STORAGE_IDE
) {
2605 /* TODO: What if one channel is in native mode ... */
2606 pci_read_config_byte(pdev
, PCI_CLASS_PROG
, &tmp8
);
2607 mask
= (1 << 2) | (1 << 0);
2608 if ((tmp8
& mask
) != mask
)
2610 #if defined(CONFIG_NO_ATA_LEGACY)
2611 /* Some platforms with PCI limits cannot address compat
2612 port space. In that case we punt if their firmware has
2613 left a device in compatibility mode */
2615 printk(KERN_ERR
"ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
2621 if (!devres_open_group(dev
, NULL
, GFP_KERNEL
))
2624 if (!legacy_mode
&& pdev
->irq
) {
2625 rc
= devm_request_irq(dev
, pdev
->irq
, irq_handler
,
2626 IRQF_SHARED
, drv_name
, host
);
2630 ata_port_desc(host
->ports
[0], "irq %d", pdev
->irq
);
2631 ata_port_desc(host
->ports
[1], "irq %d", pdev
->irq
);
2632 } else if (legacy_mode
) {
2633 if (!ata_port_is_dummy(host
->ports
[0])) {
2634 rc
= devm_request_irq(dev
, ATA_PRIMARY_IRQ(pdev
),
2635 irq_handler
, IRQF_SHARED
,
2640 ata_port_desc(host
->ports
[0], "irq %d",
2641 ATA_PRIMARY_IRQ(pdev
));
2644 if (!ata_port_is_dummy(host
->ports
[1])) {
2645 rc
= devm_request_irq(dev
, ATA_SECONDARY_IRQ(pdev
),
2646 irq_handler
, IRQF_SHARED
,
2651 ata_port_desc(host
->ports
[1], "irq %d",
2652 ATA_SECONDARY_IRQ(pdev
));
2656 rc
= ata_host_register(host
, sht
);
2659 devres_remove_group(dev
, NULL
);
2661 devres_release_group(dev
, NULL
);
2667 * ata_pci_sff_init_one - Initialize/register PCI IDE host controller
2668 * @pdev: Controller to be initialized
2669 * @ppi: array of port_info, must be enough for two ports
2670 * @sht: scsi_host_template to use when registering the host
2671 * @host_priv: host private_data
2673 * This is a helper function which can be called from a driver's
2674 * xxx_init_one() probe function if the hardware uses traditional
2675 * IDE taskfile registers.
2677 * This function calls pci_enable_device(), reserves its register
2678 * regions, sets the dma mask, enables bus master mode, and calls
2682 * Nobody makes a single channel controller that appears solely as
2683 * the secondary legacy port on PCI.
2686 * Inherited from PCI layer (may sleep).
2689 * Zero on success, negative on errno-based value on error.
2691 int ata_pci_sff_init_one(struct pci_dev
*pdev
,
2692 const struct ata_port_info
* const * ppi
,
2693 struct scsi_host_template
*sht
, void *host_priv
)
2695 struct device
*dev
= &pdev
->dev
;
2696 const struct ata_port_info
*pi
= NULL
;
2697 struct ata_host
*host
= NULL
;
2702 /* look up the first valid port_info */
2703 for (i
= 0; i
< 2 && ppi
[i
]; i
++) {
2704 if (ppi
[i
]->port_ops
!= &ata_dummy_port_ops
) {
2711 dev_printk(KERN_ERR
, &pdev
->dev
,
2712 "no valid port_info specified\n");
2716 if (!devres_open_group(dev
, NULL
, GFP_KERNEL
))
2719 rc
= pcim_enable_device(pdev
);
2723 /* prepare and activate SFF host */
2724 rc
= ata_pci_sff_prepare_host(pdev
, ppi
, &host
);
2727 host
->private_data
= host_priv
;
2729 pci_set_master(pdev
);
2730 rc
= ata_pci_sff_activate_host(host
, ata_sff_interrupt
, sht
);
2733 devres_remove_group(&pdev
->dev
, NULL
);
2735 devres_release_group(&pdev
->dev
, NULL
);
2740 #endif /* CONFIG_PCI */
2742 EXPORT_SYMBOL_GPL(ata_sff_port_ops
);
2743 EXPORT_SYMBOL_GPL(ata_bmdma_port_ops
);
2744 EXPORT_SYMBOL_GPL(ata_sff_qc_prep
);
2745 EXPORT_SYMBOL_GPL(ata_sff_dumb_qc_prep
);
2746 EXPORT_SYMBOL_GPL(ata_sff_dev_select
);
2747 EXPORT_SYMBOL_GPL(ata_sff_check_status
);
2748 EXPORT_SYMBOL_GPL(ata_sff_altstatus
);
2749 EXPORT_SYMBOL_GPL(ata_sff_busy_sleep
);
2750 EXPORT_SYMBOL_GPL(ata_sff_wait_ready
);
2751 EXPORT_SYMBOL_GPL(ata_sff_tf_load
);
2752 EXPORT_SYMBOL_GPL(ata_sff_tf_read
);
2753 EXPORT_SYMBOL_GPL(ata_sff_exec_command
);
2754 EXPORT_SYMBOL_GPL(ata_sff_data_xfer
);
2755 EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq
);
2756 EXPORT_SYMBOL_GPL(ata_sff_irq_on
);
2757 EXPORT_SYMBOL_GPL(ata_sff_irq_clear
);
2758 EXPORT_SYMBOL_GPL(ata_sff_hsm_move
);
2759 EXPORT_SYMBOL_GPL(ata_sff_qc_issue
);
2760 EXPORT_SYMBOL_GPL(ata_sff_host_intr
);
2761 EXPORT_SYMBOL_GPL(ata_sff_interrupt
);
2762 EXPORT_SYMBOL_GPL(ata_sff_freeze
);
2763 EXPORT_SYMBOL_GPL(ata_sff_thaw
);
2764 EXPORT_SYMBOL_GPL(ata_sff_prereset
);
2765 EXPORT_SYMBOL_GPL(ata_sff_dev_classify
);
2766 EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset
);
2767 EXPORT_SYMBOL_GPL(ata_sff_softreset
);
2768 EXPORT_SYMBOL_GPL(sata_sff_hardreset
);
2769 EXPORT_SYMBOL_GPL(ata_sff_postreset
);
2770 EXPORT_SYMBOL_GPL(ata_sff_error_handler
);
2771 EXPORT_SYMBOL_GPL(ata_sff_post_internal_cmd
);
2772 EXPORT_SYMBOL_GPL(ata_sff_port_start
);
2773 EXPORT_SYMBOL_GPL(ata_sff_std_ports
);
2774 EXPORT_SYMBOL_GPL(ata_bmdma_mode_filter
);
2775 EXPORT_SYMBOL_GPL(ata_bmdma_setup
);
2776 EXPORT_SYMBOL_GPL(ata_bmdma_start
);
2777 EXPORT_SYMBOL_GPL(ata_bmdma_stop
);
2778 EXPORT_SYMBOL_GPL(ata_bmdma_status
);
2779 EXPORT_SYMBOL_GPL(ata_bus_reset
);
2781 EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex
);
2782 EXPORT_SYMBOL_GPL(ata_pci_bmdma_init
);
2783 EXPORT_SYMBOL_GPL(ata_pci_sff_init_host
);
2784 EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host
);
2785 EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host
);
2786 EXPORT_SYMBOL_GPL(ata_pci_sff_init_one
);
2787 #endif /* CONFIG_PCI */