2 * libata-sff.c - helper library for PCI IDE BMDMA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/pci.h>
37 #include <linux/libata.h>
38 #include <linux/highmem.h>
42 const struct ata_port_operations ata_sff_port_ops
= {
43 .inherits
= &ata_base_port_ops
,
45 .qc_prep
= ata_sff_qc_prep
,
46 .qc_issue
= ata_sff_qc_issue
,
47 .qc_fill_rtf
= ata_sff_qc_fill_rtf
,
49 .freeze
= ata_sff_freeze
,
51 .prereset
= ata_sff_prereset
,
52 .softreset
= ata_sff_softreset
,
53 .hardreset
= sata_sff_hardreset
,
54 .postreset
= ata_sff_postreset
,
55 .drain_fifo
= ata_sff_drain_fifo
,
56 .error_handler
= ata_sff_error_handler
,
57 .post_internal_cmd
= ata_sff_post_internal_cmd
,
59 .sff_dev_select
= ata_sff_dev_select
,
60 .sff_check_status
= ata_sff_check_status
,
61 .sff_tf_load
= ata_sff_tf_load
,
62 .sff_tf_read
= ata_sff_tf_read
,
63 .sff_exec_command
= ata_sff_exec_command
,
64 .sff_data_xfer
= ata_sff_data_xfer
,
65 .sff_irq_on
= ata_sff_irq_on
,
66 .sff_irq_clear
= ata_sff_irq_clear
,
68 .port_start
= ata_sff_port_start
,
70 EXPORT_SYMBOL_GPL(ata_sff_port_ops
);
72 const struct ata_port_operations ata_bmdma_port_ops
= {
73 .inherits
= &ata_sff_port_ops
,
75 .mode_filter
= ata_bmdma_mode_filter
,
77 .bmdma_setup
= ata_bmdma_setup
,
78 .bmdma_start
= ata_bmdma_start
,
79 .bmdma_stop
= ata_bmdma_stop
,
80 .bmdma_status
= ata_bmdma_status
,
82 EXPORT_SYMBOL_GPL(ata_bmdma_port_ops
);
84 const struct ata_port_operations ata_bmdma32_port_ops
= {
85 .inherits
= &ata_bmdma_port_ops
,
87 .sff_data_xfer
= ata_sff_data_xfer32
,
89 EXPORT_SYMBOL_GPL(ata_bmdma32_port_ops
);
92 * ata_fill_sg - Fill PCI IDE PRD table
93 * @qc: Metadata associated with taskfile to be transferred
95 * Fill PCI IDE PRD (scatter-gather) table with segments
96 * associated with the current disk command.
99 * spin_lock_irqsave(host lock)
102 static void ata_fill_sg(struct ata_queued_cmd
*qc
)
104 struct ata_port
*ap
= qc
->ap
;
105 struct scatterlist
*sg
;
109 for_each_sg(qc
->sg
, sg
, qc
->n_elem
, si
) {
113 /* determine if physical DMA addr spans 64K boundary.
114 * Note h/w doesn't support 64-bit, so we unconditionally
115 * truncate dma_addr_t to u32.
117 addr
= (u32
) sg_dma_address(sg
);
118 sg_len
= sg_dma_len(sg
);
121 offset
= addr
& 0xffff;
123 if ((offset
+ sg_len
) > 0x10000)
124 len
= 0x10000 - offset
;
126 ap
->prd
[pi
].addr
= cpu_to_le32(addr
);
127 ap
->prd
[pi
].flags_len
= cpu_to_le32(len
& 0xffff);
128 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi
, addr
, len
);
136 ap
->prd
[pi
- 1].flags_len
|= cpu_to_le32(ATA_PRD_EOT
);
140 * ata_fill_sg_dumb - Fill PCI IDE PRD table
141 * @qc: Metadata associated with taskfile to be transferred
143 * Fill PCI IDE PRD (scatter-gather) table with segments
144 * associated with the current disk command. Perform the fill
145 * so that we avoid writing any length 64K records for
146 * controllers that don't follow the spec.
149 * spin_lock_irqsave(host lock)
152 static void ata_fill_sg_dumb(struct ata_queued_cmd
*qc
)
154 struct ata_port
*ap
= qc
->ap
;
155 struct scatterlist
*sg
;
159 for_each_sg(qc
->sg
, sg
, qc
->n_elem
, si
) {
161 u32 sg_len
, len
, blen
;
163 /* determine if physical DMA addr spans 64K boundary.
164 * Note h/w doesn't support 64-bit, so we unconditionally
165 * truncate dma_addr_t to u32.
167 addr
= (u32
) sg_dma_address(sg
);
168 sg_len
= sg_dma_len(sg
);
171 offset
= addr
& 0xffff;
173 if ((offset
+ sg_len
) > 0x10000)
174 len
= 0x10000 - offset
;
177 ap
->prd
[pi
].addr
= cpu_to_le32(addr
);
179 /* Some PATA chipsets like the CS5530 can't
180 cope with 0x0000 meaning 64K as the spec
182 ap
->prd
[pi
].flags_len
= cpu_to_le32(0x8000);
184 ap
->prd
[++pi
].addr
= cpu_to_le32(addr
+ 0x8000);
186 ap
->prd
[pi
].flags_len
= cpu_to_le32(blen
);
187 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi
, addr
, len
);
195 ap
->prd
[pi
- 1].flags_len
|= cpu_to_le32(ATA_PRD_EOT
);
199 * ata_sff_qc_prep - Prepare taskfile for submission
200 * @qc: Metadata associated with taskfile to be prepared
202 * Prepare ATA taskfile for submission.
205 * spin_lock_irqsave(host lock)
207 void ata_sff_qc_prep(struct ata_queued_cmd
*qc
)
209 if (!(qc
->flags
& ATA_QCFLAG_DMAMAP
))
214 EXPORT_SYMBOL_GPL(ata_sff_qc_prep
);
217 * ata_sff_dumb_qc_prep - Prepare taskfile for submission
218 * @qc: Metadata associated with taskfile to be prepared
220 * Prepare ATA taskfile for submission.
223 * spin_lock_irqsave(host lock)
225 void ata_sff_dumb_qc_prep(struct ata_queued_cmd
*qc
)
227 if (!(qc
->flags
& ATA_QCFLAG_DMAMAP
))
230 ata_fill_sg_dumb(qc
);
232 EXPORT_SYMBOL_GPL(ata_sff_dumb_qc_prep
);
235 * ata_sff_check_status - Read device status reg & clear interrupt
236 * @ap: port where the device is
238 * Reads ATA taskfile status register for currently-selected device
239 * and return its value. This also clears pending interrupts
243 * Inherited from caller.
245 u8
ata_sff_check_status(struct ata_port
*ap
)
247 return ioread8(ap
->ioaddr
.status_addr
);
249 EXPORT_SYMBOL_GPL(ata_sff_check_status
);
252 * ata_sff_altstatus - Read device alternate status reg
253 * @ap: port where the device is
255 * Reads ATA taskfile alternate status register for
256 * currently-selected device and return its value.
258 * Note: may NOT be used as the check_altstatus() entry in
259 * ata_port_operations.
262 * Inherited from caller.
264 static u8
ata_sff_altstatus(struct ata_port
*ap
)
266 if (ap
->ops
->sff_check_altstatus
)
267 return ap
->ops
->sff_check_altstatus(ap
);
269 return ioread8(ap
->ioaddr
.altstatus_addr
);
273 * ata_sff_irq_status - Check if the device is busy
274 * @ap: port where the device is
276 * Determine if the port is currently busy. Uses altstatus
277 * if available in order to avoid clearing shared IRQ status
278 * when finding an IRQ source. Non ctl capable devices don't
279 * share interrupt lines fortunately for us.
282 * Inherited from caller.
284 static u8
ata_sff_irq_status(struct ata_port
*ap
)
288 if (ap
->ops
->sff_check_altstatus
|| ap
->ioaddr
.altstatus_addr
) {
289 status
= ata_sff_altstatus(ap
);
290 /* Not us: We are busy */
291 if (status
& ATA_BUSY
)
294 /* Clear INTRQ latch */
295 status
= ap
->ops
->sff_check_status(ap
);
300 * ata_sff_sync - Flush writes
301 * @ap: Port to wait for.
304 * If we have an mmio device with no ctl and no altstatus
305 * method this will fail. No such devices are known to exist.
308 * Inherited from caller.
311 static void ata_sff_sync(struct ata_port
*ap
)
313 if (ap
->ops
->sff_check_altstatus
)
314 ap
->ops
->sff_check_altstatus(ap
);
315 else if (ap
->ioaddr
.altstatus_addr
)
316 ioread8(ap
->ioaddr
.altstatus_addr
);
320 * ata_sff_pause - Flush writes and wait 400nS
321 * @ap: Port to pause for.
324 * If we have an mmio device with no ctl and no altstatus
325 * method this will fail. No such devices are known to exist.
328 * Inherited from caller.
331 void ata_sff_pause(struct ata_port
*ap
)
336 EXPORT_SYMBOL_GPL(ata_sff_pause
);
339 * ata_sff_dma_pause - Pause before commencing DMA
340 * @ap: Port to pause for.
342 * Perform I/O fencing and ensure sufficient cycle delays occur
343 * for the HDMA1:0 transition
346 void ata_sff_dma_pause(struct ata_port
*ap
)
348 if (ap
->ops
->sff_check_altstatus
|| ap
->ioaddr
.altstatus_addr
) {
349 /* An altstatus read will cause the needed delay without
350 messing up the IRQ status */
351 ata_sff_altstatus(ap
);
354 /* There are no DMA controllers without ctl. BUG here to ensure
355 we never violate the HDMA1:0 transition timing and risk
359 EXPORT_SYMBOL_GPL(ata_sff_dma_pause
);
362 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
363 * @ap: port containing status register to be polled
364 * @tmout_pat: impatience timeout in msecs
365 * @tmout: overall timeout in msecs
367 * Sleep until ATA Status register bit BSY clears,
368 * or a timeout occurs.
371 * Kernel thread context (may sleep).
374 * 0 on success, -errno otherwise.
376 int ata_sff_busy_sleep(struct ata_port
*ap
,
377 unsigned long tmout_pat
, unsigned long tmout
)
379 unsigned long timer_start
, timeout
;
382 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 300);
383 timer_start
= jiffies
;
384 timeout
= ata_deadline(timer_start
, tmout_pat
);
385 while (status
!= 0xff && (status
& ATA_BUSY
) &&
386 time_before(jiffies
, timeout
)) {
388 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 3);
391 if (status
!= 0xff && (status
& ATA_BUSY
))
392 ata_port_printk(ap
, KERN_WARNING
,
393 "port is slow to respond, please be patient "
394 "(Status 0x%x)\n", status
);
396 timeout
= ata_deadline(timer_start
, tmout
);
397 while (status
!= 0xff && (status
& ATA_BUSY
) &&
398 time_before(jiffies
, timeout
)) {
400 status
= ap
->ops
->sff_check_status(ap
);
406 if (status
& ATA_BUSY
) {
407 ata_port_printk(ap
, KERN_ERR
, "port failed to respond "
408 "(%lu secs, Status 0x%x)\n",
409 DIV_ROUND_UP(tmout
, 1000), status
);
415 EXPORT_SYMBOL_GPL(ata_sff_busy_sleep
);
417 static int ata_sff_check_ready(struct ata_link
*link
)
419 u8 status
= link
->ap
->ops
->sff_check_status(link
->ap
);
421 return ata_check_ready(status
);
425 * ata_sff_wait_ready - sleep until BSY clears, or timeout
426 * @link: SFF link to wait ready status for
427 * @deadline: deadline jiffies for the operation
429 * Sleep until ATA Status register bit BSY clears, or timeout
433 * Kernel thread context (may sleep).
436 * 0 on success, -errno otherwise.
438 int ata_sff_wait_ready(struct ata_link
*link
, unsigned long deadline
)
440 return ata_wait_ready(link
, deadline
, ata_sff_check_ready
);
442 EXPORT_SYMBOL_GPL(ata_sff_wait_ready
);
445 * ata_sff_dev_select - Select device 0/1 on ATA bus
446 * @ap: ATA channel to manipulate
447 * @device: ATA device (numbered from zero) to select
449 * Use the method defined in the ATA specification to
450 * make either device 0, or device 1, active on the
451 * ATA channel. Works with both PIO and MMIO.
453 * May be used as the dev_select() entry in ata_port_operations.
458 void ata_sff_dev_select(struct ata_port
*ap
, unsigned int device
)
463 tmp
= ATA_DEVICE_OBS
;
465 tmp
= ATA_DEVICE_OBS
| ATA_DEV1
;
467 iowrite8(tmp
, ap
->ioaddr
.device_addr
);
468 ata_sff_pause(ap
); /* needed; also flushes, for mmio */
470 EXPORT_SYMBOL_GPL(ata_sff_dev_select
);
473 * ata_dev_select - Select device 0/1 on ATA bus
474 * @ap: ATA channel to manipulate
475 * @device: ATA device (numbered from zero) to select
476 * @wait: non-zero to wait for Status register BSY bit to clear
477 * @can_sleep: non-zero if context allows sleeping
479 * Use the method defined in the ATA specification to
480 * make either device 0, or device 1, active on the
483 * This is a high-level version of ata_sff_dev_select(), which
484 * additionally provides the services of inserting the proper
485 * pauses and status polling, where needed.
490 void ata_dev_select(struct ata_port
*ap
, unsigned int device
,
491 unsigned int wait
, unsigned int can_sleep
)
493 if (ata_msg_probe(ap
))
494 ata_port_printk(ap
, KERN_INFO
, "ata_dev_select: ENTER, "
495 "device %u, wait %u\n", device
, wait
);
500 ap
->ops
->sff_dev_select(ap
, device
);
503 if (can_sleep
&& ap
->link
.device
[device
].class == ATA_DEV_ATAPI
)
510 * ata_sff_irq_on - Enable interrupts on a port.
511 * @ap: Port on which interrupts are enabled.
513 * Enable interrupts on a legacy IDE device using MMIO or PIO,
514 * wait for idle, clear any pending interrupts.
517 * Inherited from caller.
519 u8
ata_sff_irq_on(struct ata_port
*ap
)
521 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
524 ap
->ctl
&= ~ATA_NIEN
;
525 ap
->last_ctl
= ap
->ctl
;
527 if (ioaddr
->ctl_addr
)
528 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
529 tmp
= ata_wait_idle(ap
);
531 ap
->ops
->sff_irq_clear(ap
);
535 EXPORT_SYMBOL_GPL(ata_sff_irq_on
);
538 * ata_sff_irq_clear - Clear PCI IDE BMDMA interrupt.
539 * @ap: Port associated with this ATA transaction.
541 * Clear interrupt and error flags in DMA status register.
543 * May be used as the irq_clear() entry in ata_port_operations.
546 * spin_lock_irqsave(host lock)
548 void ata_sff_irq_clear(struct ata_port
*ap
)
550 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
555 iowrite8(ioread8(mmio
+ ATA_DMA_STATUS
), mmio
+ ATA_DMA_STATUS
);
557 EXPORT_SYMBOL_GPL(ata_sff_irq_clear
);
560 * ata_sff_tf_load - send taskfile registers to host controller
561 * @ap: Port to which output is sent
562 * @tf: ATA taskfile register set
564 * Outputs ATA taskfile to standard ATA host controller.
567 * Inherited from caller.
569 void ata_sff_tf_load(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
571 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
572 unsigned int is_addr
= tf
->flags
& ATA_TFLAG_ISADDR
;
574 if (tf
->ctl
!= ap
->last_ctl
) {
575 if (ioaddr
->ctl_addr
)
576 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
577 ap
->last_ctl
= tf
->ctl
;
581 if (is_addr
&& (tf
->flags
& ATA_TFLAG_LBA48
)) {
582 WARN_ON_ONCE(!ioaddr
->ctl_addr
);
583 iowrite8(tf
->hob_feature
, ioaddr
->feature_addr
);
584 iowrite8(tf
->hob_nsect
, ioaddr
->nsect_addr
);
585 iowrite8(tf
->hob_lbal
, ioaddr
->lbal_addr
);
586 iowrite8(tf
->hob_lbam
, ioaddr
->lbam_addr
);
587 iowrite8(tf
->hob_lbah
, ioaddr
->lbah_addr
);
588 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
597 iowrite8(tf
->feature
, ioaddr
->feature_addr
);
598 iowrite8(tf
->nsect
, ioaddr
->nsect_addr
);
599 iowrite8(tf
->lbal
, ioaddr
->lbal_addr
);
600 iowrite8(tf
->lbam
, ioaddr
->lbam_addr
);
601 iowrite8(tf
->lbah
, ioaddr
->lbah_addr
);
602 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
610 if (tf
->flags
& ATA_TFLAG_DEVICE
) {
611 iowrite8(tf
->device
, ioaddr
->device_addr
);
612 VPRINTK("device 0x%X\n", tf
->device
);
617 EXPORT_SYMBOL_GPL(ata_sff_tf_load
);
620 * ata_sff_tf_read - input device's ATA taskfile shadow registers
621 * @ap: Port from which input is read
622 * @tf: ATA taskfile register set for storing input
624 * Reads ATA taskfile registers for currently-selected device
625 * into @tf. Assumes the device has a fully SFF compliant task file
626 * layout and behaviour. If you device does not (eg has a different
627 * status method) then you will need to provide a replacement tf_read
630 * Inherited from caller.
632 void ata_sff_tf_read(struct ata_port
*ap
, struct ata_taskfile
*tf
)
634 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
636 tf
->command
= ata_sff_check_status(ap
);
637 tf
->feature
= ioread8(ioaddr
->error_addr
);
638 tf
->nsect
= ioread8(ioaddr
->nsect_addr
);
639 tf
->lbal
= ioread8(ioaddr
->lbal_addr
);
640 tf
->lbam
= ioread8(ioaddr
->lbam_addr
);
641 tf
->lbah
= ioread8(ioaddr
->lbah_addr
);
642 tf
->device
= ioread8(ioaddr
->device_addr
);
644 if (tf
->flags
& ATA_TFLAG_LBA48
) {
645 if (likely(ioaddr
->ctl_addr
)) {
646 iowrite8(tf
->ctl
| ATA_HOB
, ioaddr
->ctl_addr
);
647 tf
->hob_feature
= ioread8(ioaddr
->error_addr
);
648 tf
->hob_nsect
= ioread8(ioaddr
->nsect_addr
);
649 tf
->hob_lbal
= ioread8(ioaddr
->lbal_addr
);
650 tf
->hob_lbam
= ioread8(ioaddr
->lbam_addr
);
651 tf
->hob_lbah
= ioread8(ioaddr
->lbah_addr
);
652 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
653 ap
->last_ctl
= tf
->ctl
;
658 EXPORT_SYMBOL_GPL(ata_sff_tf_read
);
661 * ata_sff_exec_command - issue ATA command to host controller
662 * @ap: port to which command is being issued
663 * @tf: ATA taskfile register set
665 * Issues ATA command, with proper synchronization with interrupt
666 * handler / other threads.
669 * spin_lock_irqsave(host lock)
671 void ata_sff_exec_command(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
673 DPRINTK("ata%u: cmd 0x%X\n", ap
->print_id
, tf
->command
);
675 iowrite8(tf
->command
, ap
->ioaddr
.command_addr
);
678 EXPORT_SYMBOL_GPL(ata_sff_exec_command
);
681 * ata_tf_to_host - issue ATA taskfile to host controller
682 * @ap: port to which command is being issued
683 * @tf: ATA taskfile register set
685 * Issues ATA taskfile register set to ATA host controller,
686 * with proper synchronization with interrupt handler and
690 * spin_lock_irqsave(host lock)
692 static inline void ata_tf_to_host(struct ata_port
*ap
,
693 const struct ata_taskfile
*tf
)
695 ap
->ops
->sff_tf_load(ap
, tf
);
696 ap
->ops
->sff_exec_command(ap
, tf
);
700 * ata_sff_data_xfer - Transfer data by PIO
701 * @dev: device to target
703 * @buflen: buffer length
706 * Transfer data from/to the device data register by PIO.
709 * Inherited from caller.
714 unsigned int ata_sff_data_xfer(struct ata_device
*dev
, unsigned char *buf
,
715 unsigned int buflen
, int rw
)
717 struct ata_port
*ap
= dev
->link
->ap
;
718 void __iomem
*data_addr
= ap
->ioaddr
.data_addr
;
719 unsigned int words
= buflen
>> 1;
721 /* Transfer multiple of 2 bytes */
723 ioread16_rep(data_addr
, buf
, words
);
725 iowrite16_rep(data_addr
, buf
, words
);
727 /* Transfer trailing 1 byte, if any. */
728 if (unlikely(buflen
& 0x01)) {
729 __le16 align_buf
[1] = { 0 };
730 unsigned char *trailing_buf
= buf
+ buflen
- 1;
733 align_buf
[0] = cpu_to_le16(ioread16(data_addr
));
734 memcpy(trailing_buf
, align_buf
, 1);
736 memcpy(align_buf
, trailing_buf
, 1);
737 iowrite16(le16_to_cpu(align_buf
[0]), data_addr
);
744 EXPORT_SYMBOL_GPL(ata_sff_data_xfer
);
747 * ata_sff_data_xfer32 - Transfer data by PIO
748 * @dev: device to target
750 * @buflen: buffer length
753 * Transfer data from/to the device data register by PIO using 32bit
757 * Inherited from caller.
763 unsigned int ata_sff_data_xfer32(struct ata_device
*dev
, unsigned char *buf
,
764 unsigned int buflen
, int rw
)
766 struct ata_port
*ap
= dev
->link
->ap
;
767 void __iomem
*data_addr
= ap
->ioaddr
.data_addr
;
768 unsigned int words
= buflen
>> 2;
769 int slop
= buflen
& 3;
771 /* Transfer multiple of 4 bytes */
773 ioread32_rep(data_addr
, buf
, words
);
775 iowrite32_rep(data_addr
, buf
, words
);
777 /* Transfer trailing bytes, if any */
778 if (unlikely(slop
)) {
779 unsigned char pad
[4];
781 /* Point buf to the tail of buffer */
782 buf
+= buflen
- slop
;
785 * Use io*_rep() accessors here as well to avoid pointlessly
786 * swapping bytes to and fro on the big endian machines...
790 ioread16_rep(data_addr
, pad
, 1);
792 ioread32_rep(data_addr
, pad
, 1);
793 memcpy(buf
, pad
, slop
);
795 memcpy(pad
, buf
, slop
);
797 iowrite16_rep(data_addr
, pad
, 1);
799 iowrite32_rep(data_addr
, pad
, 1);
802 return (buflen
+ 1) & ~1;
804 EXPORT_SYMBOL_GPL(ata_sff_data_xfer32
);
807 * ata_sff_data_xfer_noirq - Transfer data by PIO
808 * @dev: device to target
810 * @buflen: buffer length
813 * Transfer data from/to the device data register by PIO. Do the
814 * transfer with interrupts disabled.
817 * Inherited from caller.
822 unsigned int ata_sff_data_xfer_noirq(struct ata_device
*dev
, unsigned char *buf
,
823 unsigned int buflen
, int rw
)
826 unsigned int consumed
;
828 local_irq_save(flags
);
829 consumed
= ata_sff_data_xfer(dev
, buf
, buflen
, rw
);
830 local_irq_restore(flags
);
834 EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq
);
837 * ata_pio_sector - Transfer a sector of data.
838 * @qc: Command on going
840 * Transfer qc->sect_size bytes of data from/to the ATA device.
843 * Inherited from caller.
845 static void ata_pio_sector(struct ata_queued_cmd
*qc
)
847 int do_write
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
);
848 struct ata_port
*ap
= qc
->ap
;
853 if (qc
->curbytes
== qc
->nbytes
- qc
->sect_size
)
854 ap
->hsm_task_state
= HSM_ST_LAST
;
856 page
= sg_page(qc
->cursg
);
857 offset
= qc
->cursg
->offset
+ qc
->cursg_ofs
;
859 /* get the current page and offset */
860 page
= nth_page(page
, (offset
>> PAGE_SHIFT
));
863 DPRINTK("data %s\n", qc
->tf
.flags
& ATA_TFLAG_WRITE
? "write" : "read");
865 if (PageHighMem(page
)) {
868 /* FIXME: use a bounce buffer */
869 local_irq_save(flags
);
870 buf
= kmap_atomic(page
, KM_IRQ0
);
872 /* do the actual data transfer */
873 ap
->ops
->sff_data_xfer(qc
->dev
, buf
+ offset
, qc
->sect_size
,
876 kunmap_atomic(buf
, KM_IRQ0
);
877 local_irq_restore(flags
);
879 buf
= page_address(page
);
880 ap
->ops
->sff_data_xfer(qc
->dev
, buf
+ offset
, qc
->sect_size
,
884 qc
->curbytes
+= qc
->sect_size
;
885 qc
->cursg_ofs
+= qc
->sect_size
;
887 if (qc
->cursg_ofs
== qc
->cursg
->length
) {
888 qc
->cursg
= sg_next(qc
->cursg
);
894 * ata_pio_sectors - Transfer one or many sectors.
895 * @qc: Command on going
897 * Transfer one or many sectors of data from/to the
898 * ATA device for the DRQ request.
901 * Inherited from caller.
903 static void ata_pio_sectors(struct ata_queued_cmd
*qc
)
905 if (is_multi_taskfile(&qc
->tf
)) {
906 /* READ/WRITE MULTIPLE */
909 WARN_ON_ONCE(qc
->dev
->multi_count
== 0);
911 nsect
= min((qc
->nbytes
- qc
->curbytes
) / qc
->sect_size
,
912 qc
->dev
->multi_count
);
918 ata_sff_sync(qc
->ap
); /* flush */
922 * atapi_send_cdb - Write CDB bytes to hardware
923 * @ap: Port to which ATAPI device is attached.
924 * @qc: Taskfile currently active
926 * When device has indicated its readiness to accept
927 * a CDB, this function is called. Send the CDB.
932 static void atapi_send_cdb(struct ata_port
*ap
, struct ata_queued_cmd
*qc
)
935 DPRINTK("send cdb\n");
936 WARN_ON_ONCE(qc
->dev
->cdb_len
< 12);
938 ap
->ops
->sff_data_xfer(qc
->dev
, qc
->cdb
, qc
->dev
->cdb_len
, 1);
940 /* FIXME: If the CDB is for DMA do we need to do the transition delay
941 or is bmdma_start guaranteed to do it ? */
942 switch (qc
->tf
.protocol
) {
944 ap
->hsm_task_state
= HSM_ST
;
946 case ATAPI_PROT_NODATA
:
947 ap
->hsm_task_state
= HSM_ST_LAST
;
950 ap
->hsm_task_state
= HSM_ST_LAST
;
952 ap
->ops
->bmdma_start(qc
);
958 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
959 * @qc: Command on going
960 * @bytes: number of bytes
962 * Transfer Transfer data from/to the ATAPI device.
965 * Inherited from caller.
968 static int __atapi_pio_bytes(struct ata_queued_cmd
*qc
, unsigned int bytes
)
970 int rw
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
) ? WRITE
: READ
;
971 struct ata_port
*ap
= qc
->ap
;
972 struct ata_device
*dev
= qc
->dev
;
973 struct ata_eh_info
*ehi
= &dev
->link
->eh_info
;
974 struct scatterlist
*sg
;
977 unsigned int offset
, count
, consumed
;
982 ata_ehi_push_desc(ehi
, "unexpected or too much trailing data "
983 "buf=%u cur=%u bytes=%u",
984 qc
->nbytes
, qc
->curbytes
, bytes
);
989 offset
= sg
->offset
+ qc
->cursg_ofs
;
991 /* get the current page and offset */
992 page
= nth_page(page
, (offset
>> PAGE_SHIFT
));
995 /* don't overrun current sg */
996 count
= min(sg
->length
- qc
->cursg_ofs
, bytes
);
998 /* don't cross page boundaries */
999 count
= min(count
, (unsigned int)PAGE_SIZE
- offset
);
1001 DPRINTK("data %s\n", qc
->tf
.flags
& ATA_TFLAG_WRITE
? "write" : "read");
1003 if (PageHighMem(page
)) {
1004 unsigned long flags
;
1006 /* FIXME: use bounce buffer */
1007 local_irq_save(flags
);
1008 buf
= kmap_atomic(page
, KM_IRQ0
);
1010 /* do the actual data transfer */
1011 consumed
= ap
->ops
->sff_data_xfer(dev
, buf
+ offset
,
1014 kunmap_atomic(buf
, KM_IRQ0
);
1015 local_irq_restore(flags
);
1017 buf
= page_address(page
);
1018 consumed
= ap
->ops
->sff_data_xfer(dev
, buf
+ offset
,
1022 bytes
-= min(bytes
, consumed
);
1023 qc
->curbytes
+= count
;
1024 qc
->cursg_ofs
+= count
;
1026 if (qc
->cursg_ofs
== sg
->length
) {
1027 qc
->cursg
= sg_next(qc
->cursg
);
1032 * There used to be a WARN_ON_ONCE(qc->cursg && count != consumed);
1033 * Unfortunately __atapi_pio_bytes doesn't know enough to do the WARN
1034 * check correctly as it doesn't know if it is the last request being
1035 * made. Somebody should implement a proper sanity check.
1043 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
1044 * @qc: Command on going
1046 * Transfer Transfer data from/to the ATAPI device.
1049 * Inherited from caller.
1051 static void atapi_pio_bytes(struct ata_queued_cmd
*qc
)
1053 struct ata_port
*ap
= qc
->ap
;
1054 struct ata_device
*dev
= qc
->dev
;
1055 struct ata_eh_info
*ehi
= &dev
->link
->eh_info
;
1056 unsigned int ireason
, bc_lo
, bc_hi
, bytes
;
1057 int i_write
, do_write
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
) ? 1 : 0;
1059 /* Abuse qc->result_tf for temp storage of intermediate TF
1060 * here to save some kernel stack usage.
1061 * For normal completion, qc->result_tf is not relevant. For
1062 * error, qc->result_tf is later overwritten by ata_qc_complete().
1063 * So, the correctness of qc->result_tf is not affected.
1065 ap
->ops
->sff_tf_read(ap
, &qc
->result_tf
);
1066 ireason
= qc
->result_tf
.nsect
;
1067 bc_lo
= qc
->result_tf
.lbam
;
1068 bc_hi
= qc
->result_tf
.lbah
;
1069 bytes
= (bc_hi
<< 8) | bc_lo
;
1071 /* shall be cleared to zero, indicating xfer of data */
1072 if (unlikely(ireason
& (1 << 0)))
1075 /* make sure transfer direction matches expected */
1076 i_write
= ((ireason
& (1 << 1)) == 0) ? 1 : 0;
1077 if (unlikely(do_write
!= i_write
))
1080 if (unlikely(!bytes
))
1083 VPRINTK("ata%u: xfering %d bytes\n", ap
->print_id
, bytes
);
1085 if (unlikely(__atapi_pio_bytes(qc
, bytes
)))
1087 ata_sff_sync(ap
); /* flush */
1092 ata_ehi_push_desc(ehi
, "ATAPI check failed (ireason=0x%x bytes=%u)",
1095 qc
->err_mask
|= AC_ERR_HSM
;
1096 ap
->hsm_task_state
= HSM_ST_ERR
;
1100 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
1101 * @ap: the target ata_port
1105 * 1 if ok in workqueue, 0 otherwise.
1107 static inline int ata_hsm_ok_in_wq(struct ata_port
*ap
,
1108 struct ata_queued_cmd
*qc
)
1110 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1113 if (ap
->hsm_task_state
== HSM_ST_FIRST
) {
1114 if (qc
->tf
.protocol
== ATA_PROT_PIO
&&
1115 (qc
->tf
.flags
& ATA_TFLAG_WRITE
))
1118 if (ata_is_atapi(qc
->tf
.protocol
) &&
1119 !(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1127 * ata_hsm_qc_complete - finish a qc running on standard HSM
1128 * @qc: Command to complete
1129 * @in_wq: 1 if called from workqueue, 0 otherwise
1131 * Finish @qc which is running on standard HSM.
1134 * If @in_wq is zero, spin_lock_irqsave(host lock).
1135 * Otherwise, none on entry and grabs host lock.
1137 static void ata_hsm_qc_complete(struct ata_queued_cmd
*qc
, int in_wq
)
1139 struct ata_port
*ap
= qc
->ap
;
1140 unsigned long flags
;
1142 if (ap
->ops
->error_handler
) {
1144 spin_lock_irqsave(ap
->lock
, flags
);
1146 /* EH might have kicked in while host lock is
1149 qc
= ata_qc_from_tag(ap
, qc
->tag
);
1151 if (likely(!(qc
->err_mask
& AC_ERR_HSM
))) {
1152 ap
->ops
->sff_irq_on(ap
);
1153 ata_qc_complete(qc
);
1155 ata_port_freeze(ap
);
1158 spin_unlock_irqrestore(ap
->lock
, flags
);
1160 if (likely(!(qc
->err_mask
& AC_ERR_HSM
)))
1161 ata_qc_complete(qc
);
1163 ata_port_freeze(ap
);
1167 spin_lock_irqsave(ap
->lock
, flags
);
1168 ap
->ops
->sff_irq_on(ap
);
1169 ata_qc_complete(qc
);
1170 spin_unlock_irqrestore(ap
->lock
, flags
);
1172 ata_qc_complete(qc
);
1177 * ata_sff_hsm_move - move the HSM to the next state.
1178 * @ap: the target ata_port
1180 * @status: current device status
1181 * @in_wq: 1 if called from workqueue, 0 otherwise
1184 * 1 when poll next status needed, 0 otherwise.
1186 int ata_sff_hsm_move(struct ata_port
*ap
, struct ata_queued_cmd
*qc
,
1187 u8 status
, int in_wq
)
1189 struct ata_eh_info
*ehi
= &ap
->link
.eh_info
;
1190 unsigned long flags
= 0;
1193 WARN_ON_ONCE((qc
->flags
& ATA_QCFLAG_ACTIVE
) == 0);
1195 /* Make sure ata_sff_qc_issue() does not throw things
1196 * like DMA polling into the workqueue. Notice that
1197 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
1199 WARN_ON_ONCE(in_wq
!= ata_hsm_ok_in_wq(ap
, qc
));
1202 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
1203 ap
->print_id
, qc
->tf
.protocol
, ap
->hsm_task_state
, status
);
1205 switch (ap
->hsm_task_state
) {
1207 /* Send first data block or PACKET CDB */
1209 /* If polling, we will stay in the work queue after
1210 * sending the data. Otherwise, interrupt handler
1211 * takes over after sending the data.
1213 poll_next
= (qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1215 /* check device status */
1216 if (unlikely((status
& ATA_DRQ
) == 0)) {
1217 /* handle BSY=0, DRQ=0 as error */
1218 if (likely(status
& (ATA_ERR
| ATA_DF
)))
1219 /* device stops HSM for abort/error */
1220 qc
->err_mask
|= AC_ERR_DEV
;
1222 /* HSM violation. Let EH handle this */
1223 ata_ehi_push_desc(ehi
,
1224 "ST_FIRST: !(DRQ|ERR|DF)");
1225 qc
->err_mask
|= AC_ERR_HSM
;
1228 ap
->hsm_task_state
= HSM_ST_ERR
;
1232 /* Device should not ask for data transfer (DRQ=1)
1233 * when it finds something wrong.
1234 * We ignore DRQ here and stop the HSM by
1235 * changing hsm_task_state to HSM_ST_ERR and
1236 * let the EH abort the command or reset the device.
1238 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1239 /* Some ATAPI tape drives forget to clear the ERR bit
1240 * when doing the next command (mostly request sense).
1241 * We ignore ERR here to workaround and proceed sending
1244 if (!(qc
->dev
->horkage
& ATA_HORKAGE_STUCK_ERR
)) {
1245 ata_ehi_push_desc(ehi
, "ST_FIRST: "
1246 "DRQ=1 with device error, "
1247 "dev_stat 0x%X", status
);
1248 qc
->err_mask
|= AC_ERR_HSM
;
1249 ap
->hsm_task_state
= HSM_ST_ERR
;
1254 /* Send the CDB (atapi) or the first data block (ata pio out).
1255 * During the state transition, interrupt handler shouldn't
1256 * be invoked before the data transfer is complete and
1257 * hsm_task_state is changed. Hence, the following locking.
1260 spin_lock_irqsave(ap
->lock
, flags
);
1262 if (qc
->tf
.protocol
== ATA_PROT_PIO
) {
1263 /* PIO data out protocol.
1264 * send first data block.
1267 /* ata_pio_sectors() might change the state
1268 * to HSM_ST_LAST. so, the state is changed here
1269 * before ata_pio_sectors().
1271 ap
->hsm_task_state
= HSM_ST
;
1272 ata_pio_sectors(qc
);
1275 atapi_send_cdb(ap
, qc
);
1278 spin_unlock_irqrestore(ap
->lock
, flags
);
1280 /* if polling, ata_pio_task() handles the rest.
1281 * otherwise, interrupt handler takes over from here.
1286 /* complete command or read/write the data register */
1287 if (qc
->tf
.protocol
== ATAPI_PROT_PIO
) {
1288 /* ATAPI PIO protocol */
1289 if ((status
& ATA_DRQ
) == 0) {
1290 /* No more data to transfer or device error.
1291 * Device error will be tagged in HSM_ST_LAST.
1293 ap
->hsm_task_state
= HSM_ST_LAST
;
1297 /* Device should not ask for data transfer (DRQ=1)
1298 * when it finds something wrong.
1299 * We ignore DRQ here and stop the HSM by
1300 * changing hsm_task_state to HSM_ST_ERR and
1301 * let the EH abort the command or reset the device.
1303 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1304 ata_ehi_push_desc(ehi
, "ST-ATAPI: "
1305 "DRQ=1 with device error, "
1306 "dev_stat 0x%X", status
);
1307 qc
->err_mask
|= AC_ERR_HSM
;
1308 ap
->hsm_task_state
= HSM_ST_ERR
;
1312 atapi_pio_bytes(qc
);
1314 if (unlikely(ap
->hsm_task_state
== HSM_ST_ERR
))
1315 /* bad ireason reported by device */
1319 /* ATA PIO protocol */
1320 if (unlikely((status
& ATA_DRQ
) == 0)) {
1321 /* handle BSY=0, DRQ=0 as error */
1322 if (likely(status
& (ATA_ERR
| ATA_DF
))) {
1323 /* device stops HSM for abort/error */
1324 qc
->err_mask
|= AC_ERR_DEV
;
1326 /* If diagnostic failed and this is
1327 * IDENTIFY, it's likely a phantom
1328 * device. Mark hint.
1330 if (qc
->dev
->horkage
&
1331 ATA_HORKAGE_DIAGNOSTIC
)
1335 /* HSM violation. Let EH handle this.
1336 * Phantom devices also trigger this
1337 * condition. Mark hint.
1339 ata_ehi_push_desc(ehi
, "ST-ATA: "
1340 "DRQ=0 without device error, "
1341 "dev_stat 0x%X", status
);
1342 qc
->err_mask
|= AC_ERR_HSM
|
1346 ap
->hsm_task_state
= HSM_ST_ERR
;
1350 /* For PIO reads, some devices may ask for
1351 * data transfer (DRQ=1) alone with ERR=1.
1352 * We respect DRQ here and transfer one
1353 * block of junk data before changing the
1354 * hsm_task_state to HSM_ST_ERR.
1356 * For PIO writes, ERR=1 DRQ=1 doesn't make
1357 * sense since the data block has been
1358 * transferred to the device.
1360 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1361 /* data might be corrputed */
1362 qc
->err_mask
|= AC_ERR_DEV
;
1364 if (!(qc
->tf
.flags
& ATA_TFLAG_WRITE
)) {
1365 ata_pio_sectors(qc
);
1366 status
= ata_wait_idle(ap
);
1369 if (status
& (ATA_BUSY
| ATA_DRQ
)) {
1370 ata_ehi_push_desc(ehi
, "ST-ATA: "
1371 "BUSY|DRQ persists on ERR|DF, "
1372 "dev_stat 0x%X", status
);
1373 qc
->err_mask
|= AC_ERR_HSM
;
1376 /* There are oddball controllers with
1377 * status register stuck at 0x7f and
1378 * lbal/m/h at zero which makes it
1379 * pass all other presence detection
1380 * mechanisms we have. Set NODEV_HINT
1381 * for it. Kernel bz#7241.
1384 qc
->err_mask
|= AC_ERR_NODEV_HINT
;
1386 /* ata_pio_sectors() might change the
1387 * state to HSM_ST_LAST. so, the state
1388 * is changed after ata_pio_sectors().
1390 ap
->hsm_task_state
= HSM_ST_ERR
;
1394 ata_pio_sectors(qc
);
1396 if (ap
->hsm_task_state
== HSM_ST_LAST
&&
1397 (!(qc
->tf
.flags
& ATA_TFLAG_WRITE
))) {
1399 status
= ata_wait_idle(ap
);
1408 if (unlikely(!ata_ok(status
))) {
1409 qc
->err_mask
|= __ac_err_mask(status
);
1410 ap
->hsm_task_state
= HSM_ST_ERR
;
1414 /* no more data to transfer */
1415 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1416 ap
->print_id
, qc
->dev
->devno
, status
);
1418 WARN_ON_ONCE(qc
->err_mask
& (AC_ERR_DEV
| AC_ERR_HSM
));
1420 ap
->hsm_task_state
= HSM_ST_IDLE
;
1422 /* complete taskfile transaction */
1423 ata_hsm_qc_complete(qc
, in_wq
);
1429 ap
->hsm_task_state
= HSM_ST_IDLE
;
1431 /* complete taskfile transaction */
1432 ata_hsm_qc_complete(qc
, in_wq
);
1443 EXPORT_SYMBOL_GPL(ata_sff_hsm_move
);
1445 void ata_pio_task(struct work_struct
*work
)
1447 struct ata_port
*ap
=
1448 container_of(work
, struct ata_port
, port_task
.work
);
1449 struct ata_queued_cmd
*qc
= ap
->port_task_data
;
1454 WARN_ON_ONCE(ap
->hsm_task_state
== HSM_ST_IDLE
);
1457 * This is purely heuristic. This is a fast path.
1458 * Sometimes when we enter, BSY will be cleared in
1459 * a chk-status or two. If not, the drive is probably seeking
1460 * or something. Snooze for a couple msecs, then
1461 * chk-status again. If still busy, queue delayed work.
1463 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 5);
1464 if (status
& ATA_BUSY
) {
1466 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 10);
1467 if (status
& ATA_BUSY
) {
1468 ata_pio_queue_task(ap
, qc
, ATA_SHORT_PAUSE
);
1474 poll_next
= ata_sff_hsm_move(ap
, qc
, status
, 1);
1476 /* another command or interrupt handler
1477 * may be running at this point.
1484 * ata_sff_qc_issue - issue taskfile to device in proto-dependent manner
1485 * @qc: command to issue to device
1487 * Using various libata functions and hooks, this function
1488 * starts an ATA command. ATA commands are grouped into
1489 * classes called "protocols", and issuing each type of protocol
1490 * is slightly different.
1492 * May be used as the qc_issue() entry in ata_port_operations.
1495 * spin_lock_irqsave(host lock)
1498 * Zero on success, AC_ERR_* mask on failure
1500 unsigned int ata_sff_qc_issue(struct ata_queued_cmd
*qc
)
1502 struct ata_port
*ap
= qc
->ap
;
1504 /* Use polling pio if the LLD doesn't handle
1505 * interrupt driven pio and atapi CDB interrupt.
1507 if (ap
->flags
& ATA_FLAG_PIO_POLLING
) {
1508 switch (qc
->tf
.protocol
) {
1510 case ATA_PROT_NODATA
:
1511 case ATAPI_PROT_PIO
:
1512 case ATAPI_PROT_NODATA
:
1513 qc
->tf
.flags
|= ATA_TFLAG_POLLING
;
1515 case ATAPI_PROT_DMA
:
1516 if (qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
)
1517 /* see ata_dma_blacklisted() */
1525 /* select the device */
1526 ata_dev_select(ap
, qc
->dev
->devno
, 1, 0);
1528 /* start the command */
1529 switch (qc
->tf
.protocol
) {
1530 case ATA_PROT_NODATA
:
1531 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1532 ata_qc_set_polling(qc
);
1534 ata_tf_to_host(ap
, &qc
->tf
);
1535 ap
->hsm_task_state
= HSM_ST_LAST
;
1537 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1538 ata_pio_queue_task(ap
, qc
, 0);
1543 WARN_ON_ONCE(qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1545 ap
->ops
->sff_tf_load(ap
, &qc
->tf
); /* load tf registers */
1546 ap
->ops
->bmdma_setup(qc
); /* set up bmdma */
1547 ap
->ops
->bmdma_start(qc
); /* initiate bmdma */
1548 ap
->hsm_task_state
= HSM_ST_LAST
;
1552 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1553 ata_qc_set_polling(qc
);
1555 ata_tf_to_host(ap
, &qc
->tf
);
1557 if (qc
->tf
.flags
& ATA_TFLAG_WRITE
) {
1558 /* PIO data out protocol */
1559 ap
->hsm_task_state
= HSM_ST_FIRST
;
1560 ata_pio_queue_task(ap
, qc
, 0);
1562 /* always send first data block using
1563 * the ata_pio_task() codepath.
1566 /* PIO data in protocol */
1567 ap
->hsm_task_state
= HSM_ST
;
1569 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1570 ata_pio_queue_task(ap
, qc
, 0);
1572 /* if polling, ata_pio_task() handles the rest.
1573 * otherwise, interrupt handler takes over from here.
1579 case ATAPI_PROT_PIO
:
1580 case ATAPI_PROT_NODATA
:
1581 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1582 ata_qc_set_polling(qc
);
1584 ata_tf_to_host(ap
, &qc
->tf
);
1586 ap
->hsm_task_state
= HSM_ST_FIRST
;
1588 /* send cdb by polling if no cdb interrupt */
1589 if ((!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
)) ||
1590 (qc
->tf
.flags
& ATA_TFLAG_POLLING
))
1591 ata_pio_queue_task(ap
, qc
, 0);
1594 case ATAPI_PROT_DMA
:
1595 WARN_ON_ONCE(qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1597 ap
->ops
->sff_tf_load(ap
, &qc
->tf
); /* load tf registers */
1598 ap
->ops
->bmdma_setup(qc
); /* set up bmdma */
1599 ap
->hsm_task_state
= HSM_ST_FIRST
;
1601 /* send cdb by polling if no cdb interrupt */
1602 if (!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1603 ata_pio_queue_task(ap
, qc
, 0);
1608 return AC_ERR_SYSTEM
;
1613 EXPORT_SYMBOL_GPL(ata_sff_qc_issue
);
1616 * ata_sff_qc_fill_rtf - fill result TF using ->sff_tf_read
1617 * @qc: qc to fill result TF for
1619 * @qc is finished and result TF needs to be filled. Fill it
1620 * using ->sff_tf_read.
1623 * spin_lock_irqsave(host lock)
1626 * true indicating that result TF is successfully filled.
1628 bool ata_sff_qc_fill_rtf(struct ata_queued_cmd
*qc
)
1630 qc
->ap
->ops
->sff_tf_read(qc
->ap
, &qc
->result_tf
);
1633 EXPORT_SYMBOL_GPL(ata_sff_qc_fill_rtf
);
1636 * ata_sff_host_intr - Handle host interrupt for given (port, task)
1637 * @ap: Port on which interrupt arrived (possibly...)
1638 * @qc: Taskfile currently active in engine
1640 * Handle host interrupt for given queued command. Currently,
1641 * only DMA interrupts are handled. All other commands are
1642 * handled via polling with interrupts disabled (nIEN bit).
1645 * spin_lock_irqsave(host lock)
1648 * One if interrupt was handled, zero if not (shared irq).
1650 inline unsigned int ata_sff_host_intr(struct ata_port
*ap
,
1651 struct ata_queued_cmd
*qc
)
1653 struct ata_eh_info
*ehi
= &ap
->link
.eh_info
;
1654 u8 status
, host_stat
= 0;
1656 VPRINTK("ata%u: protocol %d task_state %d\n",
1657 ap
->print_id
, qc
->tf
.protocol
, ap
->hsm_task_state
);
1659 /* Check whether we are expecting interrupt in this state */
1660 switch (ap
->hsm_task_state
) {
1662 /* Some pre-ATAPI-4 devices assert INTRQ
1663 * at this state when ready to receive CDB.
1666 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
1667 * The flag was turned on only for atapi devices. No
1668 * need to check ata_is_atapi(qc->tf.protocol) again.
1670 if (!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1674 if (qc
->tf
.protocol
== ATA_PROT_DMA
||
1675 qc
->tf
.protocol
== ATAPI_PROT_DMA
) {
1676 /* check status of DMA engine */
1677 host_stat
= ap
->ops
->bmdma_status(ap
);
1678 VPRINTK("ata%u: host_stat 0x%X\n",
1679 ap
->print_id
, host_stat
);
1681 /* if it's not our irq... */
1682 if (!(host_stat
& ATA_DMA_INTR
))
1685 /* before we do anything else, clear DMA-Start bit */
1686 ap
->ops
->bmdma_stop(qc
);
1688 if (unlikely(host_stat
& ATA_DMA_ERR
)) {
1689 /* error when transfering data to/from memory */
1690 qc
->err_mask
|= AC_ERR_HOST_BUS
;
1691 ap
->hsm_task_state
= HSM_ST_ERR
;
1702 /* check main status, clearing INTRQ if needed */
1703 status
= ata_sff_irq_status(ap
);
1704 if (status
& ATA_BUSY
)
1707 /* ack bmdma irq events */
1708 ap
->ops
->sff_irq_clear(ap
);
1710 ata_sff_hsm_move(ap
, qc
, status
, 0);
1712 if (unlikely(qc
->err_mask
) && (qc
->tf
.protocol
== ATA_PROT_DMA
||
1713 qc
->tf
.protocol
== ATAPI_PROT_DMA
))
1714 ata_ehi_push_desc(ehi
, "BMDMA stat 0x%x", host_stat
);
1716 return 1; /* irq handled */
1719 ap
->stats
.idle_irq
++;
1722 if ((ap
->stats
.idle_irq
% 1000) == 0) {
1723 ap
->ops
->sff_check_status(ap
);
1724 ap
->ops
->sff_irq_clear(ap
);
1725 ata_port_printk(ap
, KERN_WARNING
, "irq trap\n");
1729 return 0; /* irq not handled */
1731 EXPORT_SYMBOL_GPL(ata_sff_host_intr
);
1734 * ata_sff_interrupt - Default ATA host interrupt handler
1735 * @irq: irq line (unused)
1736 * @dev_instance: pointer to our ata_host information structure
1738 * Default interrupt handler for PCI IDE devices. Calls
1739 * ata_sff_host_intr() for each port that is not disabled.
1742 * Obtains host lock during operation.
1745 * IRQ_NONE or IRQ_HANDLED.
1747 irqreturn_t
ata_sff_interrupt(int irq
, void *dev_instance
)
1749 struct ata_host
*host
= dev_instance
;
1751 unsigned int handled
= 0;
1752 unsigned long flags
;
1754 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1755 spin_lock_irqsave(&host
->lock
, flags
);
1757 for (i
= 0; i
< host
->n_ports
; i
++) {
1758 struct ata_port
*ap
;
1760 ap
= host
->ports
[i
];
1762 !(ap
->flags
& ATA_FLAG_DISABLED
)) {
1763 struct ata_queued_cmd
*qc
;
1765 qc
= ata_qc_from_tag(ap
, ap
->link
.active_tag
);
1766 if (qc
&& (!(qc
->tf
.flags
& ATA_TFLAG_POLLING
)) &&
1767 (qc
->flags
& ATA_QCFLAG_ACTIVE
))
1768 handled
|= ata_sff_host_intr(ap
, qc
);
1772 spin_unlock_irqrestore(&host
->lock
, flags
);
1774 return IRQ_RETVAL(handled
);
1776 EXPORT_SYMBOL_GPL(ata_sff_interrupt
);
1779 * ata_sff_freeze - Freeze SFF controller port
1780 * @ap: port to freeze
1782 * Freeze BMDMA controller port.
1785 * Inherited from caller.
1787 void ata_sff_freeze(struct ata_port
*ap
)
1789 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1791 ap
->ctl
|= ATA_NIEN
;
1792 ap
->last_ctl
= ap
->ctl
;
1794 if (ioaddr
->ctl_addr
)
1795 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
1797 /* Under certain circumstances, some controllers raise IRQ on
1798 * ATA_NIEN manipulation. Also, many controllers fail to mask
1799 * previously pending IRQ on ATA_NIEN assertion. Clear it.
1801 ap
->ops
->sff_check_status(ap
);
1803 ap
->ops
->sff_irq_clear(ap
);
1805 EXPORT_SYMBOL_GPL(ata_sff_freeze
);
1808 * ata_sff_thaw - Thaw SFF controller port
1811 * Thaw SFF controller port.
1814 * Inherited from caller.
1816 void ata_sff_thaw(struct ata_port
*ap
)
1818 /* clear & re-enable interrupts */
1819 ap
->ops
->sff_check_status(ap
);
1820 ap
->ops
->sff_irq_clear(ap
);
1821 ap
->ops
->sff_irq_on(ap
);
1823 EXPORT_SYMBOL_GPL(ata_sff_thaw
);
1826 * ata_sff_prereset - prepare SFF link for reset
1827 * @link: SFF link to be reset
1828 * @deadline: deadline jiffies for the operation
1830 * SFF link @link is about to be reset. Initialize it. It first
1831 * calls ata_std_prereset() and wait for !BSY if the port is
1835 * Kernel thread context (may sleep)
1838 * 0 on success, -errno otherwise.
1840 int ata_sff_prereset(struct ata_link
*link
, unsigned long deadline
)
1842 struct ata_eh_context
*ehc
= &link
->eh_context
;
1845 rc
= ata_std_prereset(link
, deadline
);
1849 /* if we're about to do hardreset, nothing more to do */
1850 if (ehc
->i
.action
& ATA_EH_HARDRESET
)
1853 /* wait for !BSY if we don't know that no device is attached */
1854 if (!ata_link_offline(link
)) {
1855 rc
= ata_sff_wait_ready(link
, deadline
);
1856 if (rc
&& rc
!= -ENODEV
) {
1857 ata_link_printk(link
, KERN_WARNING
, "device not ready "
1858 "(errno=%d), forcing hardreset\n", rc
);
1859 ehc
->i
.action
|= ATA_EH_HARDRESET
;
1865 EXPORT_SYMBOL_GPL(ata_sff_prereset
);
1868 * ata_devchk - PATA device presence detection
1869 * @ap: ATA channel to examine
1870 * @device: Device to examine (starting at zero)
1872 * This technique was originally described in
1873 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1874 * later found its way into the ATA/ATAPI spec.
1876 * Write a pattern to the ATA shadow registers,
1877 * and if a device is present, it will respond by
1878 * correctly storing and echoing back the
1879 * ATA shadow register contents.
1884 static unsigned int ata_devchk(struct ata_port
*ap
, unsigned int device
)
1886 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1889 ap
->ops
->sff_dev_select(ap
, device
);
1891 iowrite8(0x55, ioaddr
->nsect_addr
);
1892 iowrite8(0xaa, ioaddr
->lbal_addr
);
1894 iowrite8(0xaa, ioaddr
->nsect_addr
);
1895 iowrite8(0x55, ioaddr
->lbal_addr
);
1897 iowrite8(0x55, ioaddr
->nsect_addr
);
1898 iowrite8(0xaa, ioaddr
->lbal_addr
);
1900 nsect
= ioread8(ioaddr
->nsect_addr
);
1901 lbal
= ioread8(ioaddr
->lbal_addr
);
1903 if ((nsect
== 0x55) && (lbal
== 0xaa))
1904 return 1; /* we found a device */
1906 return 0; /* nothing found */
1910 * ata_sff_dev_classify - Parse returned ATA device signature
1911 * @dev: ATA device to classify (starting at zero)
1912 * @present: device seems present
1913 * @r_err: Value of error register on completion
1915 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
1916 * an ATA/ATAPI-defined set of values is placed in the ATA
1917 * shadow registers, indicating the results of device detection
1920 * Select the ATA device, and read the values from the ATA shadow
1921 * registers. Then parse according to the Error register value,
1922 * and the spec-defined values examined by ata_dev_classify().
1928 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1930 unsigned int ata_sff_dev_classify(struct ata_device
*dev
, int present
,
1933 struct ata_port
*ap
= dev
->link
->ap
;
1934 struct ata_taskfile tf
;
1938 ap
->ops
->sff_dev_select(ap
, dev
->devno
);
1940 memset(&tf
, 0, sizeof(tf
));
1942 ap
->ops
->sff_tf_read(ap
, &tf
);
1947 /* see if device passed diags: continue and warn later */
1949 /* diagnostic fail : do nothing _YET_ */
1950 dev
->horkage
|= ATA_HORKAGE_DIAGNOSTIC
;
1953 else if ((dev
->devno
== 0) && (err
== 0x81))
1956 return ATA_DEV_NONE
;
1958 /* determine if device is ATA or ATAPI */
1959 class = ata_dev_classify(&tf
);
1961 if (class == ATA_DEV_UNKNOWN
) {
1962 /* If the device failed diagnostic, it's likely to
1963 * have reported incorrect device signature too.
1964 * Assume ATA device if the device seems present but
1965 * device signature is invalid with diagnostic
1968 if (present
&& (dev
->horkage
& ATA_HORKAGE_DIAGNOSTIC
))
1969 class = ATA_DEV_ATA
;
1971 class = ATA_DEV_NONE
;
1972 } else if ((class == ATA_DEV_ATA
) &&
1973 (ap
->ops
->sff_check_status(ap
) == 0))
1974 class = ATA_DEV_NONE
;
1978 EXPORT_SYMBOL_GPL(ata_sff_dev_classify
);
1981 * ata_sff_wait_after_reset - wait for devices to become ready after reset
1982 * @link: SFF link which is just reset
1983 * @devmask: mask of present devices
1984 * @deadline: deadline jiffies for the operation
1986 * Wait devices attached to SFF @link to become ready after
1987 * reset. It contains preceding 150ms wait to avoid accessing TF
1988 * status register too early.
1991 * Kernel thread context (may sleep).
1994 * 0 on success, -ENODEV if some or all of devices in @devmask
1995 * don't seem to exist. -errno on other errors.
1997 int ata_sff_wait_after_reset(struct ata_link
*link
, unsigned int devmask
,
1998 unsigned long deadline
)
2000 struct ata_port
*ap
= link
->ap
;
2001 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
2002 unsigned int dev0
= devmask
& (1 << 0);
2003 unsigned int dev1
= devmask
& (1 << 1);
2006 msleep(ATA_WAIT_AFTER_RESET
);
2008 /* always check readiness of the master device */
2009 rc
= ata_sff_wait_ready(link
, deadline
);
2010 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
2011 * and TF status is 0xff, bail out on it too.
2016 /* if device 1 was found in ata_devchk, wait for register
2017 * access briefly, then wait for BSY to clear.
2022 ap
->ops
->sff_dev_select(ap
, 1);
2024 /* Wait for register access. Some ATAPI devices fail
2025 * to set nsect/lbal after reset, so don't waste too
2026 * much time on it. We're gonna wait for !BSY anyway.
2028 for (i
= 0; i
< 2; i
++) {
2031 nsect
= ioread8(ioaddr
->nsect_addr
);
2032 lbal
= ioread8(ioaddr
->lbal_addr
);
2033 if ((nsect
== 1) && (lbal
== 1))
2035 msleep(50); /* give drive a breather */
2038 rc
= ata_sff_wait_ready(link
, deadline
);
2046 /* is all this really necessary? */
2047 ap
->ops
->sff_dev_select(ap
, 0);
2049 ap
->ops
->sff_dev_select(ap
, 1);
2051 ap
->ops
->sff_dev_select(ap
, 0);
2055 EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset
);
2057 static int ata_bus_softreset(struct ata_port
*ap
, unsigned int devmask
,
2058 unsigned long deadline
)
2060 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
2062 DPRINTK("ata%u: bus reset via SRST\n", ap
->print_id
);
2064 /* software reset. causes dev0 to be selected */
2065 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
2066 udelay(20); /* FIXME: flush */
2067 iowrite8(ap
->ctl
| ATA_SRST
, ioaddr
->ctl_addr
);
2068 udelay(20); /* FIXME: flush */
2069 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
2070 ap
->last_ctl
= ap
->ctl
;
2072 /* wait the port to become ready */
2073 return ata_sff_wait_after_reset(&ap
->link
, devmask
, deadline
);
2077 * ata_sff_softreset - reset host port via ATA SRST
2078 * @link: ATA link to reset
2079 * @classes: resulting classes of attached devices
2080 * @deadline: deadline jiffies for the operation
2082 * Reset host port using ATA SRST.
2085 * Kernel thread context (may sleep)
2088 * 0 on success, -errno otherwise.
2090 int ata_sff_softreset(struct ata_link
*link
, unsigned int *classes
,
2091 unsigned long deadline
)
2093 struct ata_port
*ap
= link
->ap
;
2094 unsigned int slave_possible
= ap
->flags
& ATA_FLAG_SLAVE_POSS
;
2095 unsigned int devmask
= 0;
2101 /* determine if device 0/1 are present */
2102 if (ata_devchk(ap
, 0))
2103 devmask
|= (1 << 0);
2104 if (slave_possible
&& ata_devchk(ap
, 1))
2105 devmask
|= (1 << 1);
2107 /* select device 0 again */
2108 ap
->ops
->sff_dev_select(ap
, 0);
2110 /* issue bus reset */
2111 DPRINTK("about to softreset, devmask=%x\n", devmask
);
2112 rc
= ata_bus_softreset(ap
, devmask
, deadline
);
2113 /* if link is occupied, -ENODEV too is an error */
2114 if (rc
&& (rc
!= -ENODEV
|| sata_scr_valid(link
))) {
2115 ata_link_printk(link
, KERN_ERR
, "SRST failed (errno=%d)\n", rc
);
2119 /* determine by signature whether we have ATA or ATAPI devices */
2120 classes
[0] = ata_sff_dev_classify(&link
->device
[0],
2121 devmask
& (1 << 0), &err
);
2122 if (slave_possible
&& err
!= 0x81)
2123 classes
[1] = ata_sff_dev_classify(&link
->device
[1],
2124 devmask
& (1 << 1), &err
);
2126 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes
[0], classes
[1]);
2129 EXPORT_SYMBOL_GPL(ata_sff_softreset
);
2132 * sata_sff_hardreset - reset host port via SATA phy reset
2133 * @link: link to reset
2134 * @class: resulting class of attached device
2135 * @deadline: deadline jiffies for the operation
2137 * SATA phy-reset host port using DET bits of SControl register,
2138 * wait for !BSY and classify the attached device.
2141 * Kernel thread context (may sleep)
2144 * 0 on success, -errno otherwise.
2146 int sata_sff_hardreset(struct ata_link
*link
, unsigned int *class,
2147 unsigned long deadline
)
2149 struct ata_eh_context
*ehc
= &link
->eh_context
;
2150 const unsigned long *timing
= sata_ehc_deb_timing(ehc
);
2154 rc
= sata_link_hardreset(link
, timing
, deadline
, &online
,
2155 ata_sff_check_ready
);
2157 *class = ata_sff_dev_classify(link
->device
, 1, NULL
);
2159 DPRINTK("EXIT, class=%u\n", *class);
2162 EXPORT_SYMBOL_GPL(sata_sff_hardreset
);
2165 * ata_sff_postreset - SFF postreset callback
2166 * @link: the target SFF ata_link
2167 * @classes: classes of attached devices
2169 * This function is invoked after a successful reset. It first
2170 * calls ata_std_postreset() and performs SFF specific postreset
2174 * Kernel thread context (may sleep)
2176 void ata_sff_postreset(struct ata_link
*link
, unsigned int *classes
)
2178 struct ata_port
*ap
= link
->ap
;
2180 ata_std_postreset(link
, classes
);
2182 /* is double-select really necessary? */
2183 if (classes
[0] != ATA_DEV_NONE
)
2184 ap
->ops
->sff_dev_select(ap
, 1);
2185 if (classes
[1] != ATA_DEV_NONE
)
2186 ap
->ops
->sff_dev_select(ap
, 0);
2188 /* bail out if no device is present */
2189 if (classes
[0] == ATA_DEV_NONE
&& classes
[1] == ATA_DEV_NONE
) {
2190 DPRINTK("EXIT, no device\n");
2194 /* set up device control */
2195 if (ap
->ioaddr
.ctl_addr
) {
2196 iowrite8(ap
->ctl
, ap
->ioaddr
.ctl_addr
);
2197 ap
->last_ctl
= ap
->ctl
;
2200 EXPORT_SYMBOL_GPL(ata_sff_postreset
);
2203 * ata_sff_drain_fifo - Stock FIFO drain logic for SFF controllers
2206 * Drain the FIFO and device of any stuck data following a command
2207 * failing to complete. In some cases this is neccessary before a
2208 * reset will recover the device.
2212 void ata_sff_drain_fifo(struct ata_queued_cmd
*qc
)
2215 struct ata_port
*ap
;
2217 /* We only need to flush incoming data when a command was running */
2218 if (qc
== NULL
|| qc
->dma_dir
== DMA_TO_DEVICE
)
2222 /* Drain up to 64K of data before we give up this recovery method */
2223 for (count
= 0; (ap
->ops
->sff_check_status(ap
) & ATA_DRQ
)
2224 && count
< 32768; count
++)
2225 ioread16(ap
->ioaddr
.data_addr
);
2227 /* Can become DEBUG later */
2229 ata_port_printk(ap
, KERN_DEBUG
,
2230 "drained %d bytes to clear DRQ.\n", count
);
2233 EXPORT_SYMBOL_GPL(ata_sff_drain_fifo
);
2236 * ata_sff_error_handler - Stock error handler for BMDMA controller
2237 * @ap: port to handle error for
2239 * Stock error handler for SFF controller. It can handle both
2240 * PATA and SATA controllers. Many controllers should be able to
2241 * use this EH as-is or with some added handling before and
2245 * Kernel thread context (may sleep)
2247 void ata_sff_error_handler(struct ata_port
*ap
)
2249 ata_reset_fn_t softreset
= ap
->ops
->softreset
;
2250 ata_reset_fn_t hardreset
= ap
->ops
->hardreset
;
2251 struct ata_queued_cmd
*qc
;
2252 unsigned long flags
;
2255 qc
= __ata_qc_from_tag(ap
, ap
->link
.active_tag
);
2256 if (qc
&& !(qc
->flags
& ATA_QCFLAG_FAILED
))
2259 /* reset PIO HSM and stop DMA engine */
2260 spin_lock_irqsave(ap
->lock
, flags
);
2262 ap
->hsm_task_state
= HSM_ST_IDLE
;
2264 if (ap
->ioaddr
.bmdma_addr
&&
2265 qc
&& (qc
->tf
.protocol
== ATA_PROT_DMA
||
2266 qc
->tf
.protocol
== ATAPI_PROT_DMA
)) {
2269 host_stat
= ap
->ops
->bmdma_status(ap
);
2271 /* BMDMA controllers indicate host bus error by
2272 * setting DMA_ERR bit and timing out. As it wasn't
2273 * really a timeout event, adjust error mask and
2274 * cancel frozen state.
2276 if (qc
->err_mask
== AC_ERR_TIMEOUT
2277 && (host_stat
& ATA_DMA_ERR
)) {
2278 qc
->err_mask
= AC_ERR_HOST_BUS
;
2282 ap
->ops
->bmdma_stop(qc
);
2285 ata_sff_sync(ap
); /* FIXME: We don't need this */
2286 ap
->ops
->sff_check_status(ap
);
2287 ap
->ops
->sff_irq_clear(ap
);
2288 /* We *MUST* do FIFO draining before we issue a reset as several
2289 * devices helpfully clear their internal state and will lock solid
2290 * if we touch the data port post reset. Pass qc in case anyone wants
2291 * to do different PIO/DMA recovery or has per command fixups
2293 if (ap
->ops
->drain_fifo
)
2294 ap
->ops
->drain_fifo(qc
);
2296 spin_unlock_irqrestore(ap
->lock
, flags
);
2299 ata_eh_thaw_port(ap
);
2301 /* PIO and DMA engines have been stopped, perform recovery */
2303 /* Ignore ata_sff_softreset if ctl isn't accessible and
2304 * built-in hardresets if SCR access isn't available.
2306 if (softreset
== ata_sff_softreset
&& !ap
->ioaddr
.ctl_addr
)
2308 if (ata_is_builtin_hardreset(hardreset
) && !sata_scr_valid(&ap
->link
))
2311 ata_do_eh(ap
, ap
->ops
->prereset
, softreset
, hardreset
,
2312 ap
->ops
->postreset
);
2314 EXPORT_SYMBOL_GPL(ata_sff_error_handler
);
2317 * ata_sff_post_internal_cmd - Stock post_internal_cmd for SFF controller
2318 * @qc: internal command to clean up
2321 * Kernel thread context (may sleep)
2323 void ata_sff_post_internal_cmd(struct ata_queued_cmd
*qc
)
2325 struct ata_port
*ap
= qc
->ap
;
2326 unsigned long flags
;
2328 spin_lock_irqsave(ap
->lock
, flags
);
2330 ap
->hsm_task_state
= HSM_ST_IDLE
;
2332 if (ap
->ioaddr
.bmdma_addr
)
2335 spin_unlock_irqrestore(ap
->lock
, flags
);
2337 EXPORT_SYMBOL_GPL(ata_sff_post_internal_cmd
);
2340 * ata_sff_port_start - Set port up for dma.
2341 * @ap: Port to initialize
2343 * Called just after data structures for each port are
2344 * initialized. Allocates space for PRD table if the device
2345 * is DMA capable SFF.
2347 * May be used as the port_start() entry in ata_port_operations.
2350 * Inherited from caller.
2352 int ata_sff_port_start(struct ata_port
*ap
)
2354 if (ap
->ioaddr
.bmdma_addr
)
2355 return ata_port_start(ap
);
2358 EXPORT_SYMBOL_GPL(ata_sff_port_start
);
2361 * ata_sff_std_ports - initialize ioaddr with standard port offsets.
2362 * @ioaddr: IO address structure to be initialized
2364 * Utility function which initializes data_addr, error_addr,
2365 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
2366 * device_addr, status_addr, and command_addr to standard offsets
2367 * relative to cmd_addr.
2369 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
2371 void ata_sff_std_ports(struct ata_ioports
*ioaddr
)
2373 ioaddr
->data_addr
= ioaddr
->cmd_addr
+ ATA_REG_DATA
;
2374 ioaddr
->error_addr
= ioaddr
->cmd_addr
+ ATA_REG_ERR
;
2375 ioaddr
->feature_addr
= ioaddr
->cmd_addr
+ ATA_REG_FEATURE
;
2376 ioaddr
->nsect_addr
= ioaddr
->cmd_addr
+ ATA_REG_NSECT
;
2377 ioaddr
->lbal_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAL
;
2378 ioaddr
->lbam_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAM
;
2379 ioaddr
->lbah_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAH
;
2380 ioaddr
->device_addr
= ioaddr
->cmd_addr
+ ATA_REG_DEVICE
;
2381 ioaddr
->status_addr
= ioaddr
->cmd_addr
+ ATA_REG_STATUS
;
2382 ioaddr
->command_addr
= ioaddr
->cmd_addr
+ ATA_REG_CMD
;
2384 EXPORT_SYMBOL_GPL(ata_sff_std_ports
);
2386 unsigned long ata_bmdma_mode_filter(struct ata_device
*adev
,
2387 unsigned long xfer_mask
)
2389 /* Filter out DMA modes if the device has been configured by
2390 the BIOS as PIO only */
2392 if (adev
->link
->ap
->ioaddr
.bmdma_addr
== NULL
)
2393 xfer_mask
&= ~(ATA_MASK_MWDMA
| ATA_MASK_UDMA
);
2396 EXPORT_SYMBOL_GPL(ata_bmdma_mode_filter
);
2399 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
2400 * @qc: Info associated with this ATA transaction.
2403 * spin_lock_irqsave(host lock)
2405 void ata_bmdma_setup(struct ata_queued_cmd
*qc
)
2407 struct ata_port
*ap
= qc
->ap
;
2408 unsigned int rw
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
);
2411 /* load PRD table addr. */
2412 mb(); /* make sure PRD table writes are visible to controller */
2413 iowrite32(ap
->prd_dma
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_TABLE_OFS
);
2415 /* specify data direction, triple-check start bit is clear */
2416 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2417 dmactl
&= ~(ATA_DMA_WR
| ATA_DMA_START
);
2419 dmactl
|= ATA_DMA_WR
;
2420 iowrite8(dmactl
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2422 /* issue r/w command */
2423 ap
->ops
->sff_exec_command(ap
, &qc
->tf
);
2425 EXPORT_SYMBOL_GPL(ata_bmdma_setup
);
2428 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
2429 * @qc: Info associated with this ATA transaction.
2432 * spin_lock_irqsave(host lock)
2434 void ata_bmdma_start(struct ata_queued_cmd
*qc
)
2436 struct ata_port
*ap
= qc
->ap
;
2439 /* start host DMA transaction */
2440 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2441 iowrite8(dmactl
| ATA_DMA_START
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2443 /* Strictly, one may wish to issue an ioread8() here, to
2444 * flush the mmio write. However, control also passes
2445 * to the hardware at this point, and it will interrupt
2446 * us when we are to resume control. So, in effect,
2447 * we don't care when the mmio write flushes.
2448 * Further, a read of the DMA status register _immediately_
2449 * following the write may not be what certain flaky hardware
2450 * is expected, so I think it is best to not add a readb()
2451 * without first all the MMIO ATA cards/mobos.
2452 * Or maybe I'm just being paranoid.
2454 * FIXME: The posting of this write means I/O starts are
2455 * unneccessarily delayed for MMIO
2458 EXPORT_SYMBOL_GPL(ata_bmdma_start
);
2461 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
2462 * @qc: Command we are ending DMA for
2464 * Clears the ATA_DMA_START flag in the dma control register
2466 * May be used as the bmdma_stop() entry in ata_port_operations.
2469 * spin_lock_irqsave(host lock)
2471 void ata_bmdma_stop(struct ata_queued_cmd
*qc
)
2473 struct ata_port
*ap
= qc
->ap
;
2474 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
2476 /* clear start/stop bit */
2477 iowrite8(ioread8(mmio
+ ATA_DMA_CMD
) & ~ATA_DMA_START
,
2478 mmio
+ ATA_DMA_CMD
);
2480 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
2481 ata_sff_dma_pause(ap
);
2483 EXPORT_SYMBOL_GPL(ata_bmdma_stop
);
2486 * ata_bmdma_status - Read PCI IDE BMDMA status
2487 * @ap: Port associated with this ATA transaction.
2489 * Read and return BMDMA status register.
2491 * May be used as the bmdma_status() entry in ata_port_operations.
2494 * spin_lock_irqsave(host lock)
2496 u8
ata_bmdma_status(struct ata_port
*ap
)
2498 return ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_STATUS
);
2500 EXPORT_SYMBOL_GPL(ata_bmdma_status
);
2503 * ata_bus_reset - reset host port and associated ATA channel
2504 * @ap: port to reset
2506 * This is typically the first time we actually start issuing
2507 * commands to the ATA channel. We wait for BSY to clear, then
2508 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2509 * result. Determine what devices, if any, are on the channel
2510 * by looking at the device 0/1 error register. Look at the signature
2511 * stored in each device's taskfile registers, to determine if
2512 * the device is ATA or ATAPI.
2515 * PCI/etc. bus probe sem.
2516 * Obtains host lock.
2519 * Sets ATA_FLAG_DISABLED if bus reset fails.
2522 * This function is only for drivers which still use old EH and
2523 * will be removed soon.
2525 void ata_bus_reset(struct ata_port
*ap
)
2527 struct ata_device
*device
= ap
->link
.device
;
2528 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
2529 unsigned int slave_possible
= ap
->flags
& ATA_FLAG_SLAVE_POSS
;
2531 unsigned int dev0
, dev1
= 0, devmask
= 0;
2534 DPRINTK("ENTER, host %u, port %u\n", ap
->print_id
, ap
->port_no
);
2536 /* determine if device 0/1 are present */
2537 if (ap
->flags
& ATA_FLAG_SATA_RESET
)
2540 dev0
= ata_devchk(ap
, 0);
2542 dev1
= ata_devchk(ap
, 1);
2546 devmask
|= (1 << 0);
2548 devmask
|= (1 << 1);
2550 /* select device 0 again */
2551 ap
->ops
->sff_dev_select(ap
, 0);
2553 /* issue bus reset */
2554 if (ap
->flags
& ATA_FLAG_SRST
) {
2555 rc
= ata_bus_softreset(ap
, devmask
,
2556 ata_deadline(jiffies
, 40000));
2557 if (rc
&& rc
!= -ENODEV
)
2562 * determine by signature whether we have ATA or ATAPI devices
2564 device
[0].class = ata_sff_dev_classify(&device
[0], dev0
, &err
);
2565 if ((slave_possible
) && (err
!= 0x81))
2566 device
[1].class = ata_sff_dev_classify(&device
[1], dev1
, &err
);
2568 /* is double-select really necessary? */
2569 if (device
[1].class != ATA_DEV_NONE
)
2570 ap
->ops
->sff_dev_select(ap
, 1);
2571 if (device
[0].class != ATA_DEV_NONE
)
2572 ap
->ops
->sff_dev_select(ap
, 0);
2574 /* if no devices were detected, disable this port */
2575 if ((device
[0].class == ATA_DEV_NONE
) &&
2576 (device
[1].class == ATA_DEV_NONE
))
2579 if (ap
->flags
& (ATA_FLAG_SATA_RESET
| ATA_FLAG_SRST
)) {
2580 /* set up device control for ATA_FLAG_SATA_RESET */
2581 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
2582 ap
->last_ctl
= ap
->ctl
;
2589 ata_port_printk(ap
, KERN_ERR
, "disabling port\n");
2590 ata_port_disable(ap
);
2594 EXPORT_SYMBOL_GPL(ata_bus_reset
);
2599 * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex
2602 * Some PCI ATA devices report simplex mode but in fact can be told to
2603 * enter non simplex mode. This implements the necessary logic to
2604 * perform the task on such devices. Calling it on other devices will
2605 * have -undefined- behaviour.
2607 int ata_pci_bmdma_clear_simplex(struct pci_dev
*pdev
)
2609 unsigned long bmdma
= pci_resource_start(pdev
, 4);
2615 simplex
= inb(bmdma
+ 0x02);
2616 outb(simplex
& 0x60, bmdma
+ 0x02);
2617 simplex
= inb(bmdma
+ 0x02);
2622 EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex
);
2625 * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host
2626 * @host: target ATA host
2628 * Acquire PCI BMDMA resources and initialize @host accordingly.
2631 * Inherited from calling layer (may sleep).
2634 * 0 on success, -errno otherwise.
2636 int ata_pci_bmdma_init(struct ata_host
*host
)
2638 struct device
*gdev
= host
->dev
;
2639 struct pci_dev
*pdev
= to_pci_dev(gdev
);
2642 /* No BAR4 allocation: No DMA */
2643 if (pci_resource_start(pdev
, 4) == 0)
2646 /* TODO: If we get no DMA mask we should fall back to PIO */
2647 rc
= pci_set_dma_mask(pdev
, ATA_DMA_MASK
);
2650 rc
= pci_set_consistent_dma_mask(pdev
, ATA_DMA_MASK
);
2654 /* request and iomap DMA region */
2655 rc
= pcim_iomap_regions(pdev
, 1 << 4, dev_driver_string(gdev
));
2657 dev_printk(KERN_ERR
, gdev
, "failed to request/iomap BAR4\n");
2660 host
->iomap
= pcim_iomap_table(pdev
);
2662 for (i
= 0; i
< 2; i
++) {
2663 struct ata_port
*ap
= host
->ports
[i
];
2664 void __iomem
*bmdma
= host
->iomap
[4] + 8 * i
;
2666 if (ata_port_is_dummy(ap
))
2669 ap
->ioaddr
.bmdma_addr
= bmdma
;
2670 if ((!(ap
->flags
& ATA_FLAG_IGN_SIMPLEX
)) &&
2671 (ioread8(bmdma
+ 2) & 0x80))
2672 host
->flags
|= ATA_HOST_SIMPLEX
;
2674 ata_port_desc(ap
, "bmdma 0x%llx",
2675 (unsigned long long)pci_resource_start(pdev
, 4) + 8 * i
);
2680 EXPORT_SYMBOL_GPL(ata_pci_bmdma_init
);
2682 static int ata_resources_present(struct pci_dev
*pdev
, int port
)
2686 /* Check the PCI resources for this channel are enabled */
2688 for (i
= 0; i
< 2; i
++) {
2689 if (pci_resource_start(pdev
, port
+ i
) == 0 ||
2690 pci_resource_len(pdev
, port
+ i
) == 0)
2697 * ata_pci_sff_init_host - acquire native PCI ATA resources and init host
2698 * @host: target ATA host
2700 * Acquire native PCI ATA resources for @host and initialize the
2701 * first two ports of @host accordingly. Ports marked dummy are
2702 * skipped and allocation failure makes the port dummy.
2704 * Note that native PCI resources are valid even for legacy hosts
2705 * as we fix up pdev resources array early in boot, so this
2706 * function can be used for both native and legacy SFF hosts.
2709 * Inherited from calling layer (may sleep).
2712 * 0 if at least one port is initialized, -ENODEV if no port is
2715 int ata_pci_sff_init_host(struct ata_host
*host
)
2717 struct device
*gdev
= host
->dev
;
2718 struct pci_dev
*pdev
= to_pci_dev(gdev
);
2719 unsigned int mask
= 0;
2722 /* request, iomap BARs and init port addresses accordingly */
2723 for (i
= 0; i
< 2; i
++) {
2724 struct ata_port
*ap
= host
->ports
[i
];
2726 void __iomem
* const *iomap
;
2728 if (ata_port_is_dummy(ap
))
2731 /* Discard disabled ports. Some controllers show
2732 * their unused channels this way. Disabled ports are
2735 if (!ata_resources_present(pdev
, i
)) {
2736 ap
->ops
= &ata_dummy_port_ops
;
2740 rc
= pcim_iomap_regions(pdev
, 0x3 << base
,
2741 dev_driver_string(gdev
));
2743 dev_printk(KERN_WARNING
, gdev
,
2744 "failed to request/iomap BARs for port %d "
2745 "(errno=%d)\n", i
, rc
);
2747 pcim_pin_device(pdev
);
2748 ap
->ops
= &ata_dummy_port_ops
;
2751 host
->iomap
= iomap
= pcim_iomap_table(pdev
);
2753 ap
->ioaddr
.cmd_addr
= iomap
[base
];
2754 ap
->ioaddr
.altstatus_addr
=
2755 ap
->ioaddr
.ctl_addr
= (void __iomem
*)
2756 ((unsigned long)iomap
[base
+ 1] | ATA_PCI_CTL_OFS
);
2757 ata_sff_std_ports(&ap
->ioaddr
);
2759 ata_port_desc(ap
, "cmd 0x%llx ctl 0x%llx",
2760 (unsigned long long)pci_resource_start(pdev
, base
),
2761 (unsigned long long)pci_resource_start(pdev
, base
+ 1));
2767 dev_printk(KERN_ERR
, gdev
, "no available native port\n");
2773 EXPORT_SYMBOL_GPL(ata_pci_sff_init_host
);
2776 * ata_pci_sff_prepare_host - helper to prepare native PCI ATA host
2777 * @pdev: target PCI device
2778 * @ppi: array of port_info, must be enough for two ports
2779 * @r_host: out argument for the initialized ATA host
2781 * Helper to allocate ATA host for @pdev, acquire all native PCI
2782 * resources and initialize it accordingly in one go.
2785 * Inherited from calling layer (may sleep).
2788 * 0 on success, -errno otherwise.
2790 int ata_pci_sff_prepare_host(struct pci_dev
*pdev
,
2791 const struct ata_port_info
* const *ppi
,
2792 struct ata_host
**r_host
)
2794 struct ata_host
*host
;
2797 if (!devres_open_group(&pdev
->dev
, NULL
, GFP_KERNEL
))
2800 host
= ata_host_alloc_pinfo(&pdev
->dev
, ppi
, 2);
2802 dev_printk(KERN_ERR
, &pdev
->dev
,
2803 "failed to allocate ATA host\n");
2808 rc
= ata_pci_sff_init_host(host
);
2812 /* init DMA related stuff */
2813 rc
= ata_pci_bmdma_init(host
);
2817 devres_remove_group(&pdev
->dev
, NULL
);
2822 /* This is necessary because PCI and iomap resources are
2823 * merged and releasing the top group won't release the
2824 * acquired resources if some of those have been acquired
2825 * before entering this function.
2827 pcim_iounmap_regions(pdev
, 0xf);
2829 devres_release_group(&pdev
->dev
, NULL
);
2832 EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host
);
2835 * ata_pci_sff_activate_host - start SFF host, request IRQ and register it
2836 * @host: target SFF ATA host
2837 * @irq_handler: irq_handler used when requesting IRQ(s)
2838 * @sht: scsi_host_template to use when registering the host
2840 * This is the counterpart of ata_host_activate() for SFF ATA
2841 * hosts. This separate helper is necessary because SFF hosts
2842 * use two separate interrupts in legacy mode.
2845 * Inherited from calling layer (may sleep).
2848 * 0 on success, -errno otherwise.
2850 int ata_pci_sff_activate_host(struct ata_host
*host
,
2851 irq_handler_t irq_handler
,
2852 struct scsi_host_template
*sht
)
2854 struct device
*dev
= host
->dev
;
2855 struct pci_dev
*pdev
= to_pci_dev(dev
);
2856 const char *drv_name
= dev_driver_string(host
->dev
);
2857 int legacy_mode
= 0, rc
;
2859 rc
= ata_host_start(host
);
2863 if ((pdev
->class >> 8) == PCI_CLASS_STORAGE_IDE
) {
2866 /* TODO: What if one channel is in native mode ... */
2867 pci_read_config_byte(pdev
, PCI_CLASS_PROG
, &tmp8
);
2868 mask
= (1 << 2) | (1 << 0);
2869 if ((tmp8
& mask
) != mask
)
2871 #if defined(CONFIG_NO_ATA_LEGACY)
2872 /* Some platforms with PCI limits cannot address compat
2873 port space. In that case we punt if their firmware has
2874 left a device in compatibility mode */
2876 printk(KERN_ERR
"ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
2882 if (!devres_open_group(dev
, NULL
, GFP_KERNEL
))
2885 if (!legacy_mode
&& pdev
->irq
) {
2886 rc
= devm_request_irq(dev
, pdev
->irq
, irq_handler
,
2887 IRQF_SHARED
, drv_name
, host
);
2891 ata_port_desc(host
->ports
[0], "irq %d", pdev
->irq
);
2892 ata_port_desc(host
->ports
[1], "irq %d", pdev
->irq
);
2893 } else if (legacy_mode
) {
2894 if (!ata_port_is_dummy(host
->ports
[0])) {
2895 rc
= devm_request_irq(dev
, ATA_PRIMARY_IRQ(pdev
),
2896 irq_handler
, IRQF_SHARED
,
2901 ata_port_desc(host
->ports
[0], "irq %d",
2902 ATA_PRIMARY_IRQ(pdev
));
2905 if (!ata_port_is_dummy(host
->ports
[1])) {
2906 rc
= devm_request_irq(dev
, ATA_SECONDARY_IRQ(pdev
),
2907 irq_handler
, IRQF_SHARED
,
2912 ata_port_desc(host
->ports
[1], "irq %d",
2913 ATA_SECONDARY_IRQ(pdev
));
2917 rc
= ata_host_register(host
, sht
);
2920 devres_remove_group(dev
, NULL
);
2922 devres_release_group(dev
, NULL
);
2926 EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host
);
2929 * ata_pci_sff_init_one - Initialize/register PCI IDE host controller
2930 * @pdev: Controller to be initialized
2931 * @ppi: array of port_info, must be enough for two ports
2932 * @sht: scsi_host_template to use when registering the host
2933 * @host_priv: host private_data
2935 * This is a helper function which can be called from a driver's
2936 * xxx_init_one() probe function if the hardware uses traditional
2937 * IDE taskfile registers.
2939 * This function calls pci_enable_device(), reserves its register
2940 * regions, sets the dma mask, enables bus master mode, and calls
2944 * Nobody makes a single channel controller that appears solely as
2945 * the secondary legacy port on PCI.
2948 * Inherited from PCI layer (may sleep).
2951 * Zero on success, negative on errno-based value on error.
2953 int ata_pci_sff_init_one(struct pci_dev
*pdev
,
2954 const struct ata_port_info
* const *ppi
,
2955 struct scsi_host_template
*sht
, void *host_priv
)
2957 struct device
*dev
= &pdev
->dev
;
2958 const struct ata_port_info
*pi
= NULL
;
2959 struct ata_host
*host
= NULL
;
2964 /* look up the first valid port_info */
2965 for (i
= 0; i
< 2 && ppi
[i
]; i
++) {
2966 if (ppi
[i
]->port_ops
!= &ata_dummy_port_ops
) {
2973 dev_printk(KERN_ERR
, &pdev
->dev
,
2974 "no valid port_info specified\n");
2978 if (!devres_open_group(dev
, NULL
, GFP_KERNEL
))
2981 rc
= pcim_enable_device(pdev
);
2985 /* prepare and activate SFF host */
2986 rc
= ata_pci_sff_prepare_host(pdev
, ppi
, &host
);
2989 host
->private_data
= host_priv
;
2991 pci_set_master(pdev
);
2992 rc
= ata_pci_sff_activate_host(host
, ata_sff_interrupt
, sht
);
2995 devres_remove_group(&pdev
->dev
, NULL
);
2997 devres_release_group(&pdev
->dev
, NULL
);
3001 EXPORT_SYMBOL_GPL(ata_pci_sff_init_one
);
3003 #endif /* CONFIG_PCI */