2 * pdc_adma.c - Pacific Digital Corporation ADMA
4 * Maintained by: Mark Lord <mlord@pobox.com>
6 * Copyright 2005 Mark Lord
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; see the file COPYING. If not, write to
20 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
23 * libata documentation is available via 'make {ps|pdf}docs',
24 * as Documentation/DocBook/libata.*
27 * Supports ATA disks in single-packet ADMA mode.
28 * Uses PIO for everything else.
30 * TODO: Use ADMA transfers for ATAPI devices, when possible.
31 * This requires careful attention to a number of quirks of the chip.
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/blkdev.h>
40 #include <linux/delay.h>
41 #include <linux/interrupt.h>
42 #include <linux/sched.h>
43 #include <linux/device.h>
44 #include <scsi/scsi_host.h>
45 #include <linux/libata.h>
47 #define DRV_NAME "pdc_adma"
48 #define DRV_VERSION "0.04"
50 /* macro to calculate base address for ATA regs */
51 #define ADMA_ATA_REGS(base,port_no) ((base) + ((port_no) * 0x40))
53 /* macro to calculate base address for ADMA regs */
54 #define ADMA_REGS(base,port_no) ((base) + 0x80 + ((port_no) * 0x20))
56 /* macro to obtain addresses from ata_host */
57 #define ADMA_HOST_REGS(host,port_no) \
58 ADMA_REGS((host)->iomap[ADMA_MMIO_BAR], port_no)
65 ADMA_PRD_BYTES
= LIBATA_MAX_PRD
* 16,
66 ADMA_PKT_BYTES
= ADMA_CPB_BYTES
+ ADMA_PRD_BYTES
,
68 ADMA_DMA_BOUNDARY
= 0xffffffff,
70 /* global register offsets */
71 ADMA_MODE_LOCK
= 0x00c7,
73 /* per-channel register offsets */
74 ADMA_CONTROL
= 0x0000, /* ADMA control */
75 ADMA_STATUS
= 0x0002, /* ADMA status */
76 ADMA_CPB_COUNT
= 0x0004, /* CPB count */
77 ADMA_CPB_CURRENT
= 0x000c, /* current CPB address */
78 ADMA_CPB_NEXT
= 0x000c, /* next CPB address */
79 ADMA_CPB_LOOKUP
= 0x0010, /* CPB lookup table */
80 ADMA_FIFO_IN
= 0x0014, /* input FIFO threshold */
81 ADMA_FIFO_OUT
= 0x0016, /* output FIFO threshold */
83 /* ADMA_CONTROL register bits */
84 aNIEN
= (1 << 8), /* irq mask: 1==masked */
85 aGO
= (1 << 7), /* packet trigger ("Go!") */
86 aRSTADM
= (1 << 5), /* ADMA logic reset */
87 aPIOMD4
= 0x0003, /* PIO mode 4 */
89 /* ADMA_STATUS register bits */
105 /* ATA register flags */
109 /* ATA register addresses */
110 ADMA_REGS_CONTROL
= 0x0e,
111 ADMA_REGS_SECTOR_COUNT
= 0x12,
112 ADMA_REGS_LBA_LOW
= 0x13,
113 ADMA_REGS_LBA_MID
= 0x14,
114 ADMA_REGS_LBA_HIGH
= 0x15,
115 ADMA_REGS_DEVICE
= 0x16,
116 ADMA_REGS_COMMAND
= 0x17,
119 board_1841_idx
= 0, /* ADMA 2-port controller */
122 typedef enum { adma_state_idle
, adma_state_pkt
, adma_state_mmio
} adma_state_t
;
124 struct adma_port_priv
{
130 static int adma_ata_init_one (struct pci_dev
*pdev
,
131 const struct pci_device_id
*ent
);
132 static irqreturn_t
adma_intr (int irq
, void *dev_instance
);
133 static int adma_port_start(struct ata_port
*ap
);
134 static void adma_host_stop(struct ata_host
*host
);
135 static void adma_port_stop(struct ata_port
*ap
);
136 static void adma_phy_reset(struct ata_port
*ap
);
137 static void adma_qc_prep(struct ata_queued_cmd
*qc
);
138 static unsigned int adma_qc_issue(struct ata_queued_cmd
*qc
);
139 static int adma_check_atapi_dma(struct ata_queued_cmd
*qc
);
140 static void adma_bmdma_stop(struct ata_queued_cmd
*qc
);
141 static u8
adma_bmdma_status(struct ata_port
*ap
);
142 static void adma_irq_clear(struct ata_port
*ap
);
143 static void adma_eng_timeout(struct ata_port
*ap
);
145 static struct scsi_host_template adma_ata_sht
= {
146 .module
= THIS_MODULE
,
148 .ioctl
= ata_scsi_ioctl
,
149 .queuecommand
= ata_scsi_queuecmd
,
150 .can_queue
= ATA_DEF_QUEUE
,
151 .this_id
= ATA_SHT_THIS_ID
,
152 .sg_tablesize
= LIBATA_MAX_PRD
,
153 .cmd_per_lun
= ATA_SHT_CMD_PER_LUN
,
154 .emulated
= ATA_SHT_EMULATED
,
155 .use_clustering
= ENABLE_CLUSTERING
,
156 .proc_name
= DRV_NAME
,
157 .dma_boundary
= ADMA_DMA_BOUNDARY
,
158 .slave_configure
= ata_scsi_slave_config
,
159 .slave_destroy
= ata_scsi_slave_destroy
,
160 .bios_param
= ata_std_bios_param
,
163 static const struct ata_port_operations adma_ata_ops
= {
164 .port_disable
= ata_port_disable
,
165 .tf_load
= ata_tf_load
,
166 .tf_read
= ata_tf_read
,
167 .check_status
= ata_check_status
,
168 .check_atapi_dma
= adma_check_atapi_dma
,
169 .exec_command
= ata_exec_command
,
170 .dev_select
= ata_std_dev_select
,
171 .phy_reset
= adma_phy_reset
,
172 .qc_prep
= adma_qc_prep
,
173 .qc_issue
= adma_qc_issue
,
174 .eng_timeout
= adma_eng_timeout
,
175 .data_xfer
= ata_data_xfer
,
176 .irq_handler
= adma_intr
,
177 .irq_clear
= adma_irq_clear
,
178 .port_start
= adma_port_start
,
179 .port_stop
= adma_port_stop
,
180 .host_stop
= adma_host_stop
,
181 .bmdma_stop
= adma_bmdma_stop
,
182 .bmdma_status
= adma_bmdma_status
,
185 static struct ata_port_info adma_port_info
[] = {
188 .sht
= &adma_ata_sht
,
189 .flags
= ATA_FLAG_SLAVE_POSS
| ATA_FLAG_SRST
|
190 ATA_FLAG_NO_LEGACY
| ATA_FLAG_MMIO
|
191 ATA_FLAG_PIO_POLLING
,
192 .pio_mask
= 0x10, /* pio4 */
193 .udma_mask
= 0x1f, /* udma0-4 */
194 .port_ops
= &adma_ata_ops
,
198 static const struct pci_device_id adma_ata_pci_tbl
[] = {
199 { PCI_VDEVICE(PDC
, 0x1841), board_1841_idx
},
201 { } /* terminate list */
204 static struct pci_driver adma_ata_pci_driver
= {
206 .id_table
= adma_ata_pci_tbl
,
207 .probe
= adma_ata_init_one
,
208 .remove
= ata_pci_remove_one
,
211 static int adma_check_atapi_dma(struct ata_queued_cmd
*qc
)
213 return 1; /* ATAPI DMA not yet supported */
216 static void adma_bmdma_stop(struct ata_queued_cmd
*qc
)
221 static u8
adma_bmdma_status(struct ata_port
*ap
)
226 static void adma_irq_clear(struct ata_port
*ap
)
231 static void adma_reset_engine(void __iomem
*chan
)
233 /* reset ADMA to idle state */
234 writew(aPIOMD4
| aNIEN
| aRSTADM
, chan
+ ADMA_CONTROL
);
236 writew(aPIOMD4
, chan
+ ADMA_CONTROL
);
240 static void adma_reinit_engine(struct ata_port
*ap
)
242 struct adma_port_priv
*pp
= ap
->private_data
;
243 void __iomem
*chan
= ADMA_HOST_REGS(ap
->host
, ap
->port_no
);
245 /* mask/clear ATA interrupts */
246 writeb(ATA_NIEN
, ap
->ioaddr
.ctl_addr
);
247 ata_check_status(ap
);
249 /* reset the ADMA engine */
250 adma_reset_engine(chan
);
252 /* set in-FIFO threshold to 0x100 */
253 writew(0x100, chan
+ ADMA_FIFO_IN
);
255 /* set CPB pointer */
256 writel((u32
)pp
->pkt_dma
, chan
+ ADMA_CPB_NEXT
);
258 /* set out-FIFO threshold to 0x100 */
259 writew(0x100, chan
+ ADMA_FIFO_OUT
);
262 writew(1, chan
+ ADMA_CPB_COUNT
);
264 /* read/discard ADMA status */
265 readb(chan
+ ADMA_STATUS
);
268 static inline void adma_enter_reg_mode(struct ata_port
*ap
)
270 void __iomem
*chan
= ADMA_HOST_REGS(ap
->host
, ap
->port_no
);
272 writew(aPIOMD4
, chan
+ ADMA_CONTROL
);
273 readb(chan
+ ADMA_STATUS
); /* flush */
276 static void adma_phy_reset(struct ata_port
*ap
)
278 struct adma_port_priv
*pp
= ap
->private_data
;
280 pp
->state
= adma_state_idle
;
281 adma_reinit_engine(ap
);
286 static void adma_eng_timeout(struct ata_port
*ap
)
288 struct adma_port_priv
*pp
= ap
->private_data
;
290 if (pp
->state
!= adma_state_idle
) /* healthy paranoia */
291 pp
->state
= adma_state_mmio
;
292 adma_reinit_engine(ap
);
296 static int adma_fill_sg(struct ata_queued_cmd
*qc
)
298 struct scatterlist
*sg
;
299 struct ata_port
*ap
= qc
->ap
;
300 struct adma_port_priv
*pp
= ap
->private_data
;
302 int i
= (2 + buf
[3]) * 8;
303 u8 pFLAGS
= pORD
| ((qc
->tf
.flags
& ATA_TFLAG_WRITE
) ? pDIRO
: 0);
305 ata_for_each_sg(sg
, qc
) {
309 addr
= (u32
)sg_dma_address(sg
);
310 *(__le32
*)(buf
+ i
) = cpu_to_le32(addr
);
313 len
= sg_dma_len(sg
) >> 3;
314 *(__le32
*)(buf
+ i
) = cpu_to_le32(len
);
317 if (ata_sg_is_last(sg
, qc
))
320 buf
[i
++] = qc
->dev
->dma_mode
& 0xf;
321 buf
[i
++] = 0; /* pPKLW */
322 buf
[i
++] = 0; /* reserved */
325 = (pFLAGS
& pEND
) ? 0 : cpu_to_le32(pp
->pkt_dma
+ i
+ 4);
328 VPRINTK("PRD[%u] = (0x%lX, 0x%X)\n", i
/4,
329 (unsigned long)addr
, len
);
334 static void adma_qc_prep(struct ata_queued_cmd
*qc
)
336 struct adma_port_priv
*pp
= qc
->ap
->private_data
;
338 u32 pkt_dma
= (u32
)pp
->pkt_dma
;
343 adma_enter_reg_mode(qc
->ap
);
344 if (qc
->tf
.protocol
!= ATA_PROT_DMA
) {
349 buf
[i
++] = 0; /* Response flags */
350 buf
[i
++] = 0; /* reserved */
351 buf
[i
++] = cVLD
| cDAT
| cIEN
;
352 i
++; /* cLEN, gets filled in below */
354 *(__le32
*)(buf
+i
) = cpu_to_le32(pkt_dma
); /* cNCPB */
356 i
+= 4; /* cPRD, gets filled in below */
358 buf
[i
++] = 0; /* reserved */
359 buf
[i
++] = 0; /* reserved */
360 buf
[i
++] = 0; /* reserved */
361 buf
[i
++] = 0; /* reserved */
363 /* ATA registers; must be a multiple of 4 */
364 buf
[i
++] = qc
->tf
.device
;
365 buf
[i
++] = ADMA_REGS_DEVICE
;
366 if ((qc
->tf
.flags
& ATA_TFLAG_LBA48
)) {
367 buf
[i
++] = qc
->tf
.hob_nsect
;
368 buf
[i
++] = ADMA_REGS_SECTOR_COUNT
;
369 buf
[i
++] = qc
->tf
.hob_lbal
;
370 buf
[i
++] = ADMA_REGS_LBA_LOW
;
371 buf
[i
++] = qc
->tf
.hob_lbam
;
372 buf
[i
++] = ADMA_REGS_LBA_MID
;
373 buf
[i
++] = qc
->tf
.hob_lbah
;
374 buf
[i
++] = ADMA_REGS_LBA_HIGH
;
376 buf
[i
++] = qc
->tf
.nsect
;
377 buf
[i
++] = ADMA_REGS_SECTOR_COUNT
;
378 buf
[i
++] = qc
->tf
.lbal
;
379 buf
[i
++] = ADMA_REGS_LBA_LOW
;
380 buf
[i
++] = qc
->tf
.lbam
;
381 buf
[i
++] = ADMA_REGS_LBA_MID
;
382 buf
[i
++] = qc
->tf
.lbah
;
383 buf
[i
++] = ADMA_REGS_LBA_HIGH
;
385 buf
[i
++] = ADMA_REGS_CONTROL
;
388 buf
[i
++] = qc
->tf
.command
;
389 buf
[i
++] = ADMA_REGS_COMMAND
| rEND
;
391 buf
[3] = (i
>> 3) - 2; /* cLEN */
392 *(__le32
*)(buf
+8) = cpu_to_le32(pkt_dma
+ i
); /* cPRD */
394 i
= adma_fill_sg(qc
);
395 wmb(); /* flush PRDs and pkt to memory */
397 /* dump out CPB + PRDs for debug */
400 static char obuf
[2048];
401 for (j
= 0; j
< i
; ++j
) {
402 len
+= sprintf(obuf
+len
, "%02x ", buf
[j
]);
404 printk("%s\n", obuf
);
409 printk("%s\n", obuf
);
414 static inline void adma_packet_start(struct ata_queued_cmd
*qc
)
416 struct ata_port
*ap
= qc
->ap
;
417 void __iomem
*chan
= ADMA_HOST_REGS(ap
->host
, ap
->port_no
);
419 VPRINTK("ENTER, ap %p\n", ap
);
421 /* fire up the ADMA engine */
422 writew(aPIOMD4
| aGO
, chan
+ ADMA_CONTROL
);
425 static unsigned int adma_qc_issue(struct ata_queued_cmd
*qc
)
427 struct adma_port_priv
*pp
= qc
->ap
->private_data
;
429 switch (qc
->tf
.protocol
) {
431 pp
->state
= adma_state_pkt
;
432 adma_packet_start(qc
);
435 case ATA_PROT_ATAPI_DMA
:
443 pp
->state
= adma_state_mmio
;
444 return ata_qc_issue_prot(qc
);
447 static inline unsigned int adma_intr_pkt(struct ata_host
*host
)
449 unsigned int handled
= 0, port_no
;
451 for (port_no
= 0; port_no
< host
->n_ports
; ++port_no
) {
452 struct ata_port
*ap
= host
->ports
[port_no
];
453 struct adma_port_priv
*pp
;
454 struct ata_queued_cmd
*qc
;
455 void __iomem
*chan
= ADMA_HOST_REGS(host
, port_no
);
456 u8 status
= readb(chan
+ ADMA_STATUS
);
461 adma_enter_reg_mode(ap
);
462 if (ap
->flags
& ATA_FLAG_DISABLED
)
464 pp
= ap
->private_data
;
465 if (!pp
|| pp
->state
!= adma_state_pkt
)
467 qc
= ata_qc_from_tag(ap
, ap
->active_tag
);
468 if (qc
&& (!(qc
->tf
.flags
& ATA_TFLAG_POLLING
))) {
469 if ((status
& (aPERR
| aPSD
| aUIRQ
)))
470 qc
->err_mask
|= AC_ERR_OTHER
;
471 else if (pp
->pkt
[0] != cDONE
)
472 qc
->err_mask
|= AC_ERR_OTHER
;
480 static inline unsigned int adma_intr_mmio(struct ata_host
*host
)
482 unsigned int handled
= 0, port_no
;
484 for (port_no
= 0; port_no
< host
->n_ports
; ++port_no
) {
486 ap
= host
->ports
[port_no
];
487 if (ap
&& (!(ap
->flags
& ATA_FLAG_DISABLED
))) {
488 struct ata_queued_cmd
*qc
;
489 struct adma_port_priv
*pp
= ap
->private_data
;
490 if (!pp
|| pp
->state
!= adma_state_mmio
)
492 qc
= ata_qc_from_tag(ap
, ap
->active_tag
);
493 if (qc
&& (!(qc
->tf
.flags
& ATA_TFLAG_POLLING
))) {
495 /* check main status, clearing INTRQ */
496 u8 status
= ata_check_status(ap
);
497 if ((status
& ATA_BUSY
))
499 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
500 ap
->id
, qc
->tf
.protocol
, status
);
502 /* complete taskfile transaction */
503 pp
->state
= adma_state_idle
;
504 qc
->err_mask
|= ac_err_mask(status
);
513 static irqreturn_t
adma_intr(int irq
, void *dev_instance
)
515 struct ata_host
*host
= dev_instance
;
516 unsigned int handled
= 0;
520 spin_lock(&host
->lock
);
521 handled
= adma_intr_pkt(host
) | adma_intr_mmio(host
);
522 spin_unlock(&host
->lock
);
526 return IRQ_RETVAL(handled
);
529 static void adma_ata_setup_port(struct ata_ioports
*port
, void __iomem
*base
)
532 port
->data_addr
= base
+ 0x000;
534 port
->feature_addr
= base
+ 0x004;
535 port
->nsect_addr
= base
+ 0x008;
536 port
->lbal_addr
= base
+ 0x00c;
537 port
->lbam_addr
= base
+ 0x010;
538 port
->lbah_addr
= base
+ 0x014;
539 port
->device_addr
= base
+ 0x018;
541 port
->command_addr
= base
+ 0x01c;
542 port
->altstatus_addr
=
543 port
->ctl_addr
= base
+ 0x038;
546 static int adma_port_start(struct ata_port
*ap
)
548 struct device
*dev
= ap
->host
->dev
;
549 struct adma_port_priv
*pp
;
552 rc
= ata_port_start(ap
);
555 adma_enter_reg_mode(ap
);
556 pp
= devm_kzalloc(dev
, sizeof(*pp
), GFP_KERNEL
);
559 pp
->pkt
= dmam_alloc_coherent(dev
, ADMA_PKT_BYTES
, &pp
->pkt_dma
,
564 if ((pp
->pkt_dma
& 7) != 0) {
565 printk("bad alignment for pp->pkt_dma: %08x\n",
569 memset(pp
->pkt
, 0, ADMA_PKT_BYTES
);
570 ap
->private_data
= pp
;
571 adma_reinit_engine(ap
);
575 static void adma_port_stop(struct ata_port
*ap
)
577 adma_reset_engine(ADMA_HOST_REGS(ap
->host
, ap
->port_no
));
580 static void adma_host_stop(struct ata_host
*host
)
582 unsigned int port_no
;
584 for (port_no
= 0; port_no
< ADMA_PORTS
; ++port_no
)
585 adma_reset_engine(ADMA_HOST_REGS(host
, port_no
));
588 static void adma_host_init(unsigned int chip_id
,
589 struct ata_probe_ent
*probe_ent
)
591 unsigned int port_no
;
592 void __iomem
*mmio_base
= probe_ent
->iomap
[ADMA_MMIO_BAR
];
594 /* enable/lock aGO operation */
595 writeb(7, mmio_base
+ ADMA_MODE_LOCK
);
597 /* reset the ADMA logic */
598 for (port_no
= 0; port_no
< ADMA_PORTS
; ++port_no
)
599 adma_reset_engine(ADMA_REGS(mmio_base
, port_no
));
602 static int adma_set_dma_masks(struct pci_dev
*pdev
, void __iomem
*mmio_base
)
606 rc
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
608 dev_printk(KERN_ERR
, &pdev
->dev
,
609 "32-bit DMA enable failed\n");
612 rc
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
614 dev_printk(KERN_ERR
, &pdev
->dev
,
615 "32-bit consistent DMA enable failed\n");
621 static int adma_ata_init_one(struct pci_dev
*pdev
,
622 const struct pci_device_id
*ent
)
624 static int printed_version
;
625 struct ata_probe_ent
*probe_ent
= NULL
;
626 void __iomem
*mmio_base
;
627 unsigned int board_idx
= (unsigned int) ent
->driver_data
;
630 if (!printed_version
++)
631 dev_printk(KERN_DEBUG
, &pdev
->dev
, "version " DRV_VERSION
"\n");
633 rc
= pcim_enable_device(pdev
);
637 if ((pci_resource_flags(pdev
, 4) & IORESOURCE_MEM
) == 0)
640 rc
= pcim_iomap_regions(pdev
, 1 << ADMA_MMIO_BAR
, DRV_NAME
);
643 mmio_base
= pcim_iomap_table(pdev
)[ADMA_MMIO_BAR
];
645 rc
= adma_set_dma_masks(pdev
, mmio_base
);
649 probe_ent
= devm_kzalloc(&pdev
->dev
, sizeof(*probe_ent
), GFP_KERNEL
);
650 if (probe_ent
== NULL
)
653 probe_ent
->dev
= pci_dev_to_dev(pdev
);
654 INIT_LIST_HEAD(&probe_ent
->node
);
656 probe_ent
->sht
= adma_port_info
[board_idx
].sht
;
657 probe_ent
->port_flags
= adma_port_info
[board_idx
].flags
;
658 probe_ent
->pio_mask
= adma_port_info
[board_idx
].pio_mask
;
659 probe_ent
->mwdma_mask
= adma_port_info
[board_idx
].mwdma_mask
;
660 probe_ent
->udma_mask
= adma_port_info
[board_idx
].udma_mask
;
661 probe_ent
->port_ops
= adma_port_info
[board_idx
].port_ops
;
663 probe_ent
->irq
= pdev
->irq
;
664 probe_ent
->irq_flags
= IRQF_SHARED
;
665 probe_ent
->n_ports
= ADMA_PORTS
;
666 probe_ent
->iomap
= pcim_iomap_table(pdev
);
668 for (port_no
= 0; port_no
< probe_ent
->n_ports
; ++port_no
) {
669 adma_ata_setup_port(&probe_ent
->port
[port_no
],
670 ADMA_ATA_REGS(mmio_base
, port_no
));
673 pci_set_master(pdev
);
675 /* initialize adapter */
676 adma_host_init(board_idx
, probe_ent
);
678 if (!ata_device_add(probe_ent
))
681 devm_kfree(&pdev
->dev
, probe_ent
);
685 static int __init
adma_ata_init(void)
687 return pci_register_driver(&adma_ata_pci_driver
);
690 static void __exit
adma_ata_exit(void)
692 pci_unregister_driver(&adma_ata_pci_driver
);
695 MODULE_AUTHOR("Mark Lord");
696 MODULE_DESCRIPTION("Pacific Digital Corporation ADMA low-level driver");
697 MODULE_LICENSE("GPL");
698 MODULE_DEVICE_TABLE(pci
, adma_ata_pci_tbl
);
699 MODULE_VERSION(DRV_VERSION
);
701 module_init(adma_ata_init
);
702 module_exit(adma_ata_exit
);