2 * Register cache access API
4 * Copyright 2011 Wolfson Microelectronics plc
6 * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/bsearch.h>
14 #include <linux/device.h>
15 #include <linux/export.h>
16 #include <linux/slab.h>
17 #include <linux/sort.h>
18 #include <trace/events/regmap.h>
22 static const struct regcache_ops
*cache_types
[] = {
28 static int regcache_hw_init(struct regmap
*map
)
36 if (!map
->num_reg_defaults_raw
)
39 /* calculate the size of reg_defaults */
40 for (count
= 0, i
= 0; i
< map
->num_reg_defaults_raw
; i
++)
41 if (!regmap_volatile(map
, i
* map
->reg_stride
))
44 /* all registers are volatile, so just bypass */
46 map
->cache_bypass
= true;
50 map
->num_reg_defaults
= count
;
51 map
->reg_defaults
= kmalloc_array(count
, sizeof(struct reg_default
),
53 if (!map
->reg_defaults
)
56 if (!map
->reg_defaults_raw
) {
57 u32 cache_bypass
= map
->cache_bypass
;
58 dev_warn(map
->dev
, "No cache defaults, reading back from HW\n");
60 /* Bypass the cache access till data read from HW*/
61 map
->cache_bypass
= 1;
62 tmp_buf
= kmalloc(map
->cache_size_raw
, GFP_KERNEL
);
67 ret
= regmap_raw_read(map
, 0, tmp_buf
,
68 map
->num_reg_defaults_raw
);
69 map
->cache_bypass
= cache_bypass
;
73 map
->reg_defaults_raw
= tmp_buf
;
77 /* fill the reg_defaults */
78 for (i
= 0, j
= 0; i
< map
->num_reg_defaults_raw
; i
++) {
79 if (regmap_volatile(map
, i
* map
->reg_stride
))
81 val
= regcache_get_val(map
, map
->reg_defaults_raw
, i
);
82 map
->reg_defaults
[j
].reg
= i
* map
->reg_stride
;
83 map
->reg_defaults
[j
].def
= val
;
92 kfree(map
->reg_defaults
);
97 int regcache_init(struct regmap
*map
, const struct regmap_config
*config
)
103 for (i
= 0; i
< config
->num_reg_defaults
; i
++)
104 if (config
->reg_defaults
[i
].reg
% map
->reg_stride
)
107 if (map
->cache_type
== REGCACHE_NONE
) {
108 map
->cache_bypass
= true;
112 for (i
= 0; i
< ARRAY_SIZE(cache_types
); i
++)
113 if (cache_types
[i
]->type
== map
->cache_type
)
116 if (i
== ARRAY_SIZE(cache_types
)) {
117 dev_err(map
->dev
, "Could not match compress type: %d\n",
122 map
->num_reg_defaults
= config
->num_reg_defaults
;
123 map
->num_reg_defaults_raw
= config
->num_reg_defaults_raw
;
124 map
->reg_defaults_raw
= config
->reg_defaults_raw
;
125 map
->cache_word_size
= DIV_ROUND_UP(config
->val_bits
, 8);
126 map
->cache_size_raw
= map
->cache_word_size
* config
->num_reg_defaults_raw
;
129 map
->cache_ops
= cache_types
[i
];
131 if (!map
->cache_ops
->read
||
132 !map
->cache_ops
->write
||
133 !map
->cache_ops
->name
)
136 /* We still need to ensure that the reg_defaults
137 * won't vanish from under us. We'll need to make
140 if (config
->reg_defaults
) {
141 if (!map
->num_reg_defaults
)
143 tmp_buf
= kmemdup(config
->reg_defaults
, map
->num_reg_defaults
*
144 sizeof(struct reg_default
), GFP_KERNEL
);
147 map
->reg_defaults
= tmp_buf
;
148 } else if (map
->num_reg_defaults_raw
) {
149 /* Some devices such as PMICs don't have cache defaults,
150 * we cope with this by reading back the HW registers and
151 * crafting the cache defaults by hand.
153 ret
= regcache_hw_init(map
);
156 if (map
->cache_bypass
)
160 if (!map
->max_register
)
161 map
->max_register
= map
->num_reg_defaults_raw
;
163 if (map
->cache_ops
->init
) {
164 dev_dbg(map
->dev
, "Initializing %s cache\n",
165 map
->cache_ops
->name
);
166 ret
= map
->cache_ops
->init(map
);
173 kfree(map
->reg_defaults
);
175 kfree(map
->reg_defaults_raw
);
180 void regcache_exit(struct regmap
*map
)
182 if (map
->cache_type
== REGCACHE_NONE
)
185 BUG_ON(!map
->cache_ops
);
187 kfree(map
->reg_defaults
);
189 kfree(map
->reg_defaults_raw
);
191 if (map
->cache_ops
->exit
) {
192 dev_dbg(map
->dev
, "Destroying %s cache\n",
193 map
->cache_ops
->name
);
194 map
->cache_ops
->exit(map
);
199 * regcache_read: Fetch the value of a given register from the cache.
201 * @map: map to configure.
202 * @reg: The register index.
203 * @value: The value to be returned.
205 * Return a negative value on failure, 0 on success.
207 int regcache_read(struct regmap
*map
,
208 unsigned int reg
, unsigned int *value
)
212 if (map
->cache_type
== REGCACHE_NONE
)
215 BUG_ON(!map
->cache_ops
);
217 if (!regmap_volatile(map
, reg
)) {
218 ret
= map
->cache_ops
->read(map
, reg
, value
);
221 trace_regmap_reg_read_cache(map
->dev
, reg
, *value
);
230 * regcache_write: Set the value of a given register in the cache.
232 * @map: map to configure.
233 * @reg: The register index.
234 * @value: The new register value.
236 * Return a negative value on failure, 0 on success.
238 int regcache_write(struct regmap
*map
,
239 unsigned int reg
, unsigned int value
)
241 if (map
->cache_type
== REGCACHE_NONE
)
244 BUG_ON(!map
->cache_ops
);
246 if (!regmap_volatile(map
, reg
))
247 return map
->cache_ops
->write(map
, reg
, value
);
252 static int regcache_default_sync(struct regmap
*map
, unsigned int min
,
257 for (reg
= min
; reg
<= max
; reg
+= map
->reg_stride
) {
261 if (regmap_volatile(map
, reg
) ||
262 !regmap_writeable(map
, reg
))
265 ret
= regcache_read(map
, reg
, &val
);
269 /* Is this the hardware default? If so skip. */
270 ret
= regcache_lookup_reg(map
, reg
);
271 if (ret
>= 0 && val
== map
->reg_defaults
[ret
].def
)
274 map
->cache_bypass
= 1;
275 ret
= _regmap_write(map
, reg
, val
);
276 map
->cache_bypass
= 0;
278 dev_err(map
->dev
, "Unable to sync register %#x. %d\n",
282 dev_dbg(map
->dev
, "Synced register %#x, value %#x\n", reg
, val
);
289 * regcache_sync: Sync the register cache with the hardware.
291 * @map: map to configure.
293 * Any registers that should not be synced should be marked as
294 * volatile. In general drivers can choose not to use the provided
295 * syncing functionality if they so require.
297 * Return a negative value on failure, 0 on success.
299 int regcache_sync(struct regmap
*map
)
306 BUG_ON(!map
->cache_ops
);
308 map
->lock(map
->lock_arg
);
309 /* Remember the initial bypass state */
310 bypass
= map
->cache_bypass
;
311 dev_dbg(map
->dev
, "Syncing %s cache\n",
312 map
->cache_ops
->name
);
313 name
= map
->cache_ops
->name
;
314 trace_regcache_sync(map
->dev
, name
, "start");
316 if (!map
->cache_dirty
)
321 /* Apply any patch first */
322 map
->cache_bypass
= 1;
323 for (i
= 0; i
< map
->patch_regs
; i
++) {
324 ret
= _regmap_write(map
, map
->patch
[i
].reg
, map
->patch
[i
].def
);
326 dev_err(map
->dev
, "Failed to write %x = %x: %d\n",
327 map
->patch
[i
].reg
, map
->patch
[i
].def
, ret
);
331 map
->cache_bypass
= 0;
333 if (map
->cache_ops
->sync
)
334 ret
= map
->cache_ops
->sync(map
, 0, map
->max_register
);
336 ret
= regcache_default_sync(map
, 0, map
->max_register
);
339 map
->cache_dirty
= false;
342 /* Restore the bypass state */
344 map
->cache_bypass
= bypass
;
345 map
->unlock(map
->lock_arg
);
347 regmap_async_complete(map
);
349 trace_regcache_sync(map
->dev
, name
, "stop");
353 EXPORT_SYMBOL_GPL(regcache_sync
);
356 * regcache_sync_region: Sync part of the register cache with the hardware.
359 * @min: first register to sync
360 * @max: last register to sync
362 * Write all non-default register values in the specified region to
365 * Return a negative value on failure, 0 on success.
367 int regcache_sync_region(struct regmap
*map
, unsigned int min
,
374 BUG_ON(!map
->cache_ops
);
376 map
->lock(map
->lock_arg
);
378 /* Remember the initial bypass state */
379 bypass
= map
->cache_bypass
;
381 name
= map
->cache_ops
->name
;
382 dev_dbg(map
->dev
, "Syncing %s cache from %d-%d\n", name
, min
, max
);
384 trace_regcache_sync(map
->dev
, name
, "start region");
386 if (!map
->cache_dirty
)
391 if (map
->cache_ops
->sync
)
392 ret
= map
->cache_ops
->sync(map
, min
, max
);
394 ret
= regcache_default_sync(map
, min
, max
);
397 /* Restore the bypass state */
398 map
->cache_bypass
= bypass
;
400 map
->unlock(map
->lock_arg
);
402 regmap_async_complete(map
);
404 trace_regcache_sync(map
->dev
, name
, "stop region");
408 EXPORT_SYMBOL_GPL(regcache_sync_region
);
411 * regcache_drop_region: Discard part of the register cache
413 * @map: map to operate on
414 * @min: first register to discard
415 * @max: last register to discard
417 * Discard part of the register cache.
419 * Return a negative value on failure, 0 on success.
421 int regcache_drop_region(struct regmap
*map
, unsigned int min
,
426 if (!map
->cache_ops
|| !map
->cache_ops
->drop
)
429 map
->lock(map
->lock_arg
);
431 trace_regcache_drop_region(map
->dev
, min
, max
);
433 ret
= map
->cache_ops
->drop(map
, min
, max
);
435 map
->unlock(map
->lock_arg
);
439 EXPORT_SYMBOL_GPL(regcache_drop_region
);
442 * regcache_cache_only: Put a register map into cache only mode
444 * @map: map to configure
445 * @cache_only: flag if changes should be written to the hardware
447 * When a register map is marked as cache only writes to the register
448 * map API will only update the register cache, they will not cause
449 * any hardware changes. This is useful for allowing portions of
450 * drivers to act as though the device were functioning as normal when
451 * it is disabled for power saving reasons.
453 void regcache_cache_only(struct regmap
*map
, bool enable
)
455 map
->lock(map
->lock_arg
);
456 WARN_ON(map
->cache_bypass
&& enable
);
457 map
->cache_only
= enable
;
458 trace_regmap_cache_only(map
->dev
, enable
);
459 map
->unlock(map
->lock_arg
);
461 EXPORT_SYMBOL_GPL(regcache_cache_only
);
464 * regcache_mark_dirty: Mark the register cache as dirty
468 * Mark the register cache as dirty, for example due to the device
469 * having been powered down for suspend. If the cache is not marked
470 * as dirty then the cache sync will be suppressed.
472 void regcache_mark_dirty(struct regmap
*map
)
474 map
->lock(map
->lock_arg
);
475 map
->cache_dirty
= true;
476 map
->unlock(map
->lock_arg
);
478 EXPORT_SYMBOL_GPL(regcache_mark_dirty
);
481 * regcache_cache_bypass: Put a register map into cache bypass mode
483 * @map: map to configure
484 * @cache_bypass: flag if changes should not be written to the hardware
486 * When a register map is marked with the cache bypass option, writes
487 * to the register map API will only update the hardware and not the
488 * the cache directly. This is useful when syncing the cache back to
491 void regcache_cache_bypass(struct regmap
*map
, bool enable
)
493 map
->lock(map
->lock_arg
);
494 WARN_ON(map
->cache_only
&& enable
);
495 map
->cache_bypass
= enable
;
496 trace_regmap_cache_bypass(map
->dev
, enable
);
497 map
->unlock(map
->lock_arg
);
499 EXPORT_SYMBOL_GPL(regcache_cache_bypass
);
501 bool regcache_set_val(struct regmap
*map
, void *base
, unsigned int idx
,
504 if (regcache_get_val(map
, base
, idx
) == val
)
507 /* Use device native format if possible */
508 if (map
->format
.format_val
) {
509 map
->format
.format_val(base
+ (map
->cache_word_size
* idx
),
514 switch (map
->cache_word_size
) {
536 unsigned int regcache_get_val(struct regmap
*map
, const void *base
,
542 /* Use device native format if possible */
543 if (map
->format
.parse_val
)
544 return map
->format
.parse_val(regcache_get_val_addr(map
, base
,
547 switch (map
->cache_word_size
) {
549 const u8
*cache
= base
;
553 const u16
*cache
= base
;
557 const u32
*cache
= base
;
567 static int regcache_default_cmp(const void *a
, const void *b
)
569 const struct reg_default
*_a
= a
;
570 const struct reg_default
*_b
= b
;
572 return _a
->reg
- _b
->reg
;
575 int regcache_lookup_reg(struct regmap
*map
, unsigned int reg
)
577 struct reg_default key
;
578 struct reg_default
*r
;
583 r
= bsearch(&key
, map
->reg_defaults
, map
->num_reg_defaults
,
584 sizeof(struct reg_default
), regcache_default_cmp
);
587 return r
- map
->reg_defaults
;
592 static bool regcache_reg_present(unsigned long *cache_present
, unsigned int idx
)
597 return test_bit(idx
, cache_present
);
600 static int regcache_sync_block_single(struct regmap
*map
, void *block
,
601 unsigned long *cache_present
,
602 unsigned int block_base
,
603 unsigned int start
, unsigned int end
)
605 unsigned int i
, regtmp
, val
;
608 for (i
= start
; i
< end
; i
++) {
609 regtmp
= block_base
+ (i
* map
->reg_stride
);
611 if (!regcache_reg_present(cache_present
, i
))
614 val
= regcache_get_val(map
, block
, i
);
616 /* Is this the hardware default? If so skip. */
617 ret
= regcache_lookup_reg(map
, regtmp
);
618 if (ret
>= 0 && val
== map
->reg_defaults
[ret
].def
)
621 map
->cache_bypass
= 1;
623 ret
= _regmap_write(map
, regtmp
, val
);
625 map
->cache_bypass
= 0;
627 dev_err(map
->dev
, "Unable to sync register %#x. %d\n",
631 dev_dbg(map
->dev
, "Synced register %#x, value %#x\n",
638 static int regcache_sync_block_raw_flush(struct regmap
*map
, const void **data
,
639 unsigned int base
, unsigned int cur
)
641 size_t val_bytes
= map
->format
.val_bytes
;
647 count
= (cur
- base
) / map
->reg_stride
;
649 dev_dbg(map
->dev
, "Writing %zu bytes for %d registers from 0x%x-0x%x\n",
650 count
* val_bytes
, count
, base
, cur
- map
->reg_stride
);
652 map
->cache_bypass
= 1;
654 ret
= _regmap_raw_write(map
, base
, *data
, count
* val_bytes
);
656 dev_err(map
->dev
, "Unable to sync registers %#x-%#x. %d\n",
657 base
, cur
- map
->reg_stride
, ret
);
659 map
->cache_bypass
= 0;
666 static int regcache_sync_block_raw(struct regmap
*map
, void *block
,
667 unsigned long *cache_present
,
668 unsigned int block_base
, unsigned int start
,
672 unsigned int regtmp
= 0;
673 unsigned int base
= 0;
674 const void *data
= NULL
;
677 for (i
= start
; i
< end
; i
++) {
678 regtmp
= block_base
+ (i
* map
->reg_stride
);
680 if (!regcache_reg_present(cache_present
, i
)) {
681 ret
= regcache_sync_block_raw_flush(map
, &data
,
688 val
= regcache_get_val(map
, block
, i
);
690 /* Is this the hardware default? If so skip. */
691 ret
= regcache_lookup_reg(map
, regtmp
);
692 if (ret
>= 0 && val
== map
->reg_defaults
[ret
].def
) {
693 ret
= regcache_sync_block_raw_flush(map
, &data
,
701 data
= regcache_get_val_addr(map
, block
, i
);
706 return regcache_sync_block_raw_flush(map
, &data
, base
, regtmp
+
710 int regcache_sync_block(struct regmap
*map
, void *block
,
711 unsigned long *cache_present
,
712 unsigned int block_base
, unsigned int start
,
715 if (regmap_can_raw_write(map
) && !map
->use_single_rw
)
716 return regcache_sync_block_raw(map
, block
, cache_present
,
717 block_base
, start
, end
);
719 return regcache_sync_block_single(map
, block
, cache_present
,
720 block_base
, start
, end
);
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