drivers/block/cciss.h

   1 #ifndef CCISS_H
   2 #define CCISS_H
   3
   4 #include <linux/genhd.h>
   5
   6 #include "cciss_cmd.h"
   7
   8
   9 #define NWD             16
  10 #define NWD_SHIFT       4
  11 #define MAX_PART        (1 << NWD_SHIFT)
  12
  13 #define IO_OK           0
  14 #define IO_ERROR        1
  15
  16 #define MAJOR_NR COMPAQ_CISS_MAJOR
  17
  18 struct ctlr_info;
  19 typedef struct ctlr_info ctlr_info_t;
  20
  21 struct access_method {
  22         void (*submit_command)(ctlr_info_t *h, CommandList_struct *c);
  23         void (*set_intr_mask)(ctlr_info_t *h, unsigned long val);
  24         unsigned long (*fifo_full)(ctlr_info_t *h);
  25         unsigned long (*intr_pending)(ctlr_info_t *h);
  26         unsigned long (*command_completed)(ctlr_info_t *h);
  27 };
  28 typedef struct _drive_info_struct
  29 {
  30         __u32   LunID;
  31         int     usage_count;
  32         struct request_queue *queue;
  33         sector_t nr_blocks;
  34         int     block_size;
  35         int     heads;
  36         int     sectors;
  37         int     cylinders;
  38         int     raid_level; /* set to -1 to indicate that
  39                              * the drive is not in use/configured
  40                             */
  41         int     busy_configuring; /*This is set when the drive is being removed
  42                                    *to prevent it from being opened or it's queue
  43                                    *from being started.
  44                                   */
  45 } drive_info_struct;
  46
  47 #ifdef CONFIG_CISS_SCSI_TAPE
  48
  49 struct sendcmd_reject_list {
  50         int ncompletions;
  51         unsigned long *complete; /* array of NR_CMDS tags */
  52 };
  53
  54 #endif
  55 struct ctlr_info
  56 {
  57         int     ctlr;
  58         char    devname[8];
  59         char    *product_name;
  60         char    firm_ver[4]; // Firmware version
  61         struct pci_dev *pdev;
  62         __u32   board_id;
  63         void __iomem *vaddr;
  64         unsigned long paddr;
  65         unsigned long io_mem_addr;
  66         unsigned long io_mem_length;
  67         CfgTable_struct __iomem *cfgtable;
  68         unsigned int intr;
  69         int     interrupts_enabled;
  70         int     major;
  71         int     max_commands;
  72         int     commands_outstanding;
  73         int     max_outstanding; /* Debug */
  74         int     num_luns;
  75         int     highest_lun;
  76         int     usage_count;  /* number of opens all all minor devices */
  77
  78         // information about each logical volume
  79         drive_info_struct drv[CISS_MAX_LUN];
  80
  81         struct access_method access;
  82
  83         /* queue and queue Info */
  84         CommandList_struct *reqQ;
  85         CommandList_struct  *cmpQ;
  86         unsigned int Qdepth;
  87         unsigned int maxQsinceinit;
  88         unsigned int maxSG;
  89         spinlock_t lock;
  90
  91         //* pointers to command and error info pool */
  92         CommandList_struct      *cmd_pool;
  93         dma_addr_t              cmd_pool_dhandle;
  94         ErrorInfo_struct        *errinfo_pool;
  95         dma_addr_t              errinfo_pool_dhandle;
  96         unsigned long           *cmd_pool_bits;
  97         int                     nr_allocs;
  98         int                     nr_frees;
  99         int                     busy_configuring;
 100         int                     busy_initializing;
 101
 102         /* This element holds the zero based queue number of the last
 103          * queue to be started.  It is used for fairness.
 104         */
 105         int                     next_to_run;
 106
 107         // Disk structures we need to pass back
 108         struct gendisk   *gendisk[NWD];
 109 #ifdef CONFIG_CISS_SCSI_TAPE
 110         void *scsi_ctlr; /* ptr to structure containing scsi related stuff */
 111         /* list of block side commands the scsi error handling sucked up */
 112         /* and saved for later processing */
 113         struct sendcmd_reject_list scsi_rejects;
 114 #endif
 115         unsigned char alive;
 116 };
 117
 118 /*  Defining the diffent access_menthods */
 119 /*
 120  * Memory mapped FIFO interface (SMART 53xx cards)
 121  */
 122 #define SA5_DOORBELL    0x20
 123 #define SA5_REQUEST_PORT_OFFSET 0x40
 124 #define SA5_REPLY_INTR_MASK_OFFSET      0x34
 125 #define SA5_REPLY_PORT_OFFSET           0x44
 126 #define SA5_INTR_STATUS         0x30
 127 #define SA5_SCRATCHPAD_OFFSET   0xB0
 128
 129 #define SA5_CTCFG_OFFSET        0xB4
 130 #define SA5_CTMEM_OFFSET        0xB8
 131
 132 #define SA5_INTR_OFF            0x08
 133 #define SA5B_INTR_OFF           0x04
 134 #define SA5_INTR_PENDING        0x08
 135 #define SA5B_INTR_PENDING       0x04
 136 #define FIFO_EMPTY              0xffffffff
 137 #define CCISS_FIRMWARE_READY    0xffff0000 /* value in scratchpad register */
 138
 139 #define  CISS_ERROR_BIT         0x02
 140
 141 #define CCISS_INTR_ON   1
 142 #define CCISS_INTR_OFF  0
 143 /*
 144         Send the command to the hardware
 145 */
 146 static void SA5_submit_command( ctlr_info_t *h, CommandList_struct *c)
 147 {
 148 #ifdef CCISS_DEBUG
 149          printk("Sending %x - down to controller\n", c->busaddr );
 150 #endif /* CCISS_DEBUG */
 151          writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
 152          h->commands_outstanding++;
 153          if ( h->commands_outstanding > h->max_outstanding)
 154                 h->max_outstanding = h->commands_outstanding;
 155 }
 156
 157 /*
 158  *  This card is the opposite of the other cards.
 159  *   0 turns interrupts on...
 160  *   0x08 turns them off...
 161  */
 162 static void SA5_intr_mask(ctlr_info_t *h, unsigned long val)
 163 {
 164         if (val)
 165         { /* Turn interrupts on */
 166                 h->interrupts_enabled = 1;
 167                 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
 168         } else /* Turn them off */
 169         {
 170                 h->interrupts_enabled = 0;
 171                 writel( SA5_INTR_OFF,
 172                         h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
 173         }
 174 }
 175 /*
 176  *  This card is the opposite of the other cards.
 177  *   0 turns interrupts on...
 178  *   0x04 turns them off...
 179  */
 180 static void SA5B_intr_mask(ctlr_info_t *h, unsigned long val)
 181 {
 182         if (val)
 183         { /* Turn interrupts on */
 184                 h->interrupts_enabled = 1;
 185                 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
 186         } else /* Turn them off */
 187         {
 188                 h->interrupts_enabled = 0;
 189                 writel( SA5B_INTR_OFF,
 190                         h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
 191         }
 192 }
 193 /*
 194  *  Returns true if fifo is full.
 195  *
 196  */
 197 static unsigned long SA5_fifo_full(ctlr_info_t *h)
 198 {
 199         if( h->commands_outstanding >= h->max_commands)
 200                 return(1);
 201         else
 202                 return(0);
 203
 204 }
 205 /*
 206  *   returns value read from hardware.
 207  *     returns FIFO_EMPTY if there is nothing to read
 208  */
 209 static unsigned long SA5_completed(ctlr_info_t *h)
 210 {
 211         unsigned long register_value
 212                 = readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
 213         if(register_value != FIFO_EMPTY)
 214         {
 215                 h->commands_outstanding--;
 216 #ifdef CCISS_DEBUG
 217                 printk("cciss:  Read %lx back from board\n", register_value);
 218 #endif /* CCISS_DEBUG */
 219         }
 220 #ifdef CCISS_DEBUG
 221         else
 222         {
 223                 printk("cciss:  FIFO Empty read\n");
 224         }
 225 #endif
 226         return ( register_value);
 227
 228 }
 229 /*
 230  *      Returns true if an interrupt is pending..
 231  */
 232 static unsigned long SA5_intr_pending(ctlr_info_t *h)
 233 {
 234         unsigned long register_value  =
 235                 readl(h->vaddr + SA5_INTR_STATUS);
 236 #ifdef CCISS_DEBUG
 237         printk("cciss: intr_pending %lx\n", register_value);
 238 #endif  /* CCISS_DEBUG */
 239         if( register_value &  SA5_INTR_PENDING)
 240                 return  1;
 241         return 0 ;
 242 }
 243
 244 /*
 245  *      Returns true if an interrupt is pending..
 246  */
 247 static unsigned long SA5B_intr_pending(ctlr_info_t *h)
 248 {
 249         unsigned long register_value  =
 250                 readl(h->vaddr + SA5_INTR_STATUS);
 251 #ifdef CCISS_DEBUG
 252         printk("cciss: intr_pending %lx\n", register_value);
 253 #endif  /* CCISS_DEBUG */
 254         if( register_value &  SA5B_INTR_PENDING)
 255                 return  1;
 256         return 0 ;
 257 }
 258
 259
 260 static struct access_method SA5_access = {
 261         SA5_submit_command,
 262         SA5_intr_mask,
 263         SA5_fifo_full,
 264         SA5_intr_pending,
 265         SA5_completed,
 266 };
 267
 268 static struct access_method SA5B_access = {
 269         SA5_submit_command,
 270         SA5B_intr_mask,
 271         SA5_fifo_full,
 272         SA5B_intr_pending,
 273         SA5_completed,
 274 };
 275
 276 struct board_type {
 277         __u32   board_id;
 278         char    *product_name;
 279         struct access_method *access;
 280 };
 281
 282 #define CCISS_LOCK(i)   (&hba[i]->lock)
 283
 284 #endif /* CCISS_H */
 285