drivers/block/mtip32xx/mtip32xx.h

   1 /*
   2  * mtip32xx.h - Header file for the P320 SSD Block Driver
   3  *   Copyright (C) 2011 Micron Technology, Inc.
   4  *
   5  * Portions of this code were derived from works subjected to the
   6  * following copyright:
   7  *    Copyright (C) 2009 Integrated Device Technology, Inc.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  */
  20
  21 #ifndef __MTIP32XX_H__
  22 #define __MTIP32XX_H__
  23
  24 #include <linux/spinlock.h>
  25 #include <linux/rwsem.h>
  26 #include <linux/ata.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/genhd.h>
  29
  30 /* Offset of Subsystem Device ID in pci confoguration space */
  31 #define PCI_SUBSYSTEM_DEVICEID  0x2E
  32
  33 /* offset of Device Control register in PCIe extended capabilites space */
  34 #define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET   0x48
  35
  36 /* check for erase mode support during secure erase */
  37 #define MTIP_SEC_ERASE_MODE     0x2
  38
  39 /* # of times to retry timed out/failed IOs */
  40 #define MTIP_MAX_RETRIES        2
  41
  42 /* Various timeout values in ms */
  43 #define MTIP_NCQ_CMD_TIMEOUT_MS      15000
  44 #define MTIP_IOCTL_CMD_TIMEOUT_MS    5000
  45 #define MTIP_INT_CMD_TIMEOUT_MS      5000
  46 #define MTIP_QUIESCE_IO_TIMEOUT_MS   (MTIP_NCQ_CMD_TIMEOUT_MS * \
  47                                      (MTIP_MAX_RETRIES + 1))
  48
  49 /* check for timeouts every 500ms */
  50 #define MTIP_TIMEOUT_CHECK_PERIOD       500
  51
  52 /* ftl rebuild */
  53 #define MTIP_FTL_REBUILD_OFFSET         142
  54 #define MTIP_FTL_REBUILD_MAGIC          0xED51
  55 #define MTIP_FTL_REBUILD_TIMEOUT_MS     2400000
  56
  57 /* unaligned IO handling */
  58 #define MTIP_MAX_UNALIGNED_SLOTS        2
  59
  60 /* Macro to extract the tag bit number from a tag value. */
  61 #define MTIP_TAG_BIT(tag)       (tag & 0x1F)
  62
  63 /*
  64  * Macro to extract the tag index from a tag value. The index
  65  * is used to access the correct s_active/Command Issue register based
  66  * on the tag value.
  67  */
  68 #define MTIP_TAG_INDEX(tag)     (tag >> 5)
  69
  70 /*
  71  * Maximum number of scatter gather entries
  72  * a single command may have.
  73  */
  74 #define MTIP_MAX_SG             504
  75
  76 /*
  77  * Maximum number of slot groups (Command Issue & s_active registers)
  78  * NOTE: This is the driver maximum; check dd->slot_groups for actual value.
  79  */
  80 #define MTIP_MAX_SLOT_GROUPS    8
  81
  82 /* Internal command tag. */
  83 #define MTIP_TAG_INTERNAL       0
  84
  85 /* Micron Vendor ID & P320x SSD Device ID */
  86 #define PCI_VENDOR_ID_MICRON    0x1344
  87 #define P320H_DEVICE_ID         0x5150
  88 #define P320M_DEVICE_ID         0x5151
  89 #define P320S_DEVICE_ID         0x5152
  90 #define P325M_DEVICE_ID         0x5153
  91 #define P420H_DEVICE_ID         0x5160
  92 #define P420M_DEVICE_ID         0x5161
  93 #define P425M_DEVICE_ID         0x5163
  94
  95 /* Driver name and version strings */
  96 #define MTIP_DRV_NAME           "mtip32xx"
  97 #define MTIP_DRV_VERSION        "1.3.1"
  98
  99 /* Maximum number of minor device numbers per device. */
 100 #define MTIP_MAX_MINORS         16
 101
 102 /* Maximum number of supported command slots. */
 103 #define MTIP_MAX_COMMAND_SLOTS  (MTIP_MAX_SLOT_GROUPS * 32)
 104
 105 /*
 106  * Per-tag bitfield size in longs.
 107  * Linux bit manipulation functions
 108  * (i.e. test_and_set_bit, find_next_zero_bit)
 109  * manipulate memory in longs, so we try to make the math work.
 110  * take the slot groups and find the number of longs, rounding up.
 111  * Careful! i386 and x86_64 use different size longs!
 112  */
 113 #define U32_PER_LONG    (sizeof(long) / sizeof(u32))
 114 #define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \
 115                                         (U32_PER_LONG-1))/U32_PER_LONG)
 116
 117 /* BAR number used to access the HBA registers. */
 118 #define MTIP_ABAR               5
 119
 120 #ifdef DEBUG
 121  #define dbg_printk(format, arg...)     \
 122         printk(pr_fmt(format), ##arg);
 123 #else
 124  #define dbg_printk(format, arg...)
 125 #endif
 126
 127 #define MTIP_DFS_MAX_BUF_SIZE 1024
 128
 129 #define __force_bit2int (unsigned int __force)
 130
 131 enum {
 132         /* below are bit numbers in 'flags' defined in mtip_port */
 133         MTIP_PF_IC_ACTIVE_BIT       = 0, /* pio/ioctl */
 134         MTIP_PF_EH_ACTIVE_BIT       = 1, /* error handling */
 135         MTIP_PF_SE_ACTIVE_BIT       = 2, /* secure erase */
 136         MTIP_PF_DM_ACTIVE_BIT       = 3, /* download microcde */
 137         MTIP_PF_PAUSE_IO      = ((1 << MTIP_PF_IC_ACTIVE_BIT) |
 138                                 (1 << MTIP_PF_EH_ACTIVE_BIT) |
 139                                 (1 << MTIP_PF_SE_ACTIVE_BIT) |
 140                                 (1 << MTIP_PF_DM_ACTIVE_BIT)),
 141
 142         MTIP_PF_SVC_THD_ACTIVE_BIT  = 4,
 143         MTIP_PF_ISSUE_CMDS_BIT      = 5,
 144         MTIP_PF_REBUILD_BIT         = 6,
 145         MTIP_PF_SR_CLEANUP_BIT      = 7,
 146         MTIP_PF_SVC_THD_STOP_BIT    = 8,
 147
 148         /* below are bit numbers in 'dd_flag' defined in driver_data */
 149         MTIP_DDF_SEC_LOCK_BIT       = 0,
 150         MTIP_DDF_REMOVE_PENDING_BIT = 1,
 151         MTIP_DDF_OVER_TEMP_BIT      = 2,
 152         MTIP_DDF_WRITE_PROTECT_BIT  = 3,
 153         MTIP_DDF_REMOVE_DONE_BIT    = 4,
 154         MTIP_DDF_CLEANUP_BIT        = 5,
 155         MTIP_DDF_RESUME_BIT         = 6,
 156         MTIP_DDF_INIT_DONE_BIT      = 7,
 157         MTIP_DDF_REBUILD_FAILED_BIT = 8,
 158
 159         MTIP_DDF_STOP_IO      = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) |
 160                                 (1 << MTIP_DDF_SEC_LOCK_BIT) |
 161                                 (1 << MTIP_DDF_OVER_TEMP_BIT) |
 162                                 (1 << MTIP_DDF_WRITE_PROTECT_BIT) |
 163                                 (1 << MTIP_DDF_REBUILD_FAILED_BIT)),
 164
 165 };
 166
 167 struct smart_attr {
 168         u8 attr_id;
 169         u16 flags;
 170         u8 cur;
 171         u8 worst;
 172         u32 data;
 173         u8 res[3];
 174 } __packed;
 175
 176 struct mtip_work {
 177         struct work_struct work;
 178         void *port;
 179         int cpu_binding;
 180         u32 completed;
 181 } ____cacheline_aligned_in_smp;
 182
 183 #define DEFINE_HANDLER(group)                                  \
 184         void mtip_workq_sdbf##group(struct work_struct *work)       \
 185         {                                                      \
 186                 struct mtip_work *w = (struct mtip_work *) work;         \
 187                 mtip_workq_sdbfx(w->port, group, w->completed);     \
 188         }
 189
 190 #define MTIP_TRIM_TIMEOUT_MS            240000
 191 #define MTIP_MAX_TRIM_ENTRIES           8
 192 #define MTIP_MAX_TRIM_ENTRY_LEN         0xfff8
 193
 194 struct mtip_trim_entry {
 195         u32 lba;   /* starting lba of region */
 196         u16 rsvd;  /* unused */
 197         u16 range; /* # of 512b blocks to trim */
 198 } __packed;
 199
 200 struct mtip_trim {
 201         /* Array of regions to trim */
 202         struct mtip_trim_entry entry[MTIP_MAX_TRIM_ENTRIES];
 203 } __packed;
 204
 205 /* Register Frame Information Structure (FIS), host to device. */
 206 struct host_to_dev_fis {
 207         /*
 208          * FIS type.
 209          * - 27h Register FIS, host to device.
 210          * - 34h Register FIS, device to host.
 211          * - 39h DMA Activate FIS, device to host.
 212          * - 41h DMA Setup FIS, bi-directional.
 213          * - 46h Data FIS, bi-directional.
 214          * - 58h BIST Activate FIS, bi-directional.
 215          * - 5Fh PIO Setup FIS, device to host.
 216          * - A1h Set Device Bits FIS, device to host.
 217          */
 218         unsigned char type;
 219         unsigned char opts;
 220         unsigned char command;
 221         unsigned char features;
 222
 223         union {
 224                 unsigned char lba_low;
 225                 unsigned char sector;
 226         };
 227         union {
 228                 unsigned char lba_mid;
 229                 unsigned char cyl_low;
 230         };
 231         union {
 232                 unsigned char lba_hi;
 233                 unsigned char cyl_hi;
 234         };
 235         union {
 236                 unsigned char device;
 237                 unsigned char head;
 238         };
 239
 240         union {
 241                 unsigned char lba_low_ex;
 242                 unsigned char sector_ex;
 243         };
 244         union {
 245                 unsigned char lba_mid_ex;
 246                 unsigned char cyl_low_ex;
 247         };
 248         union {
 249                 unsigned char lba_hi_ex;
 250                 unsigned char cyl_hi_ex;
 251         };
 252         unsigned char features_ex;
 253
 254         unsigned char sect_count;
 255         unsigned char sect_cnt_ex;
 256         unsigned char res2;
 257         unsigned char control;
 258
 259         unsigned int res3;
 260 };
 261
 262 /* Command header structure. */
 263 struct mtip_cmd_hdr {
 264         /*
 265          * Command options.
 266          * - Bits 31:16 Number of PRD entries.
 267          * - Bits 15:8 Unused in this implementation.
 268          * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries.
 269          * - Bit 6 Write bit, should be set when writing data to the device.
 270          * - Bit 5 Unused in this implementation.
 271          * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes).
 272          */
 273         unsigned int opts;
 274         /* This field is unsed when using NCQ. */
 275         union {
 276                 unsigned int byte_count;
 277                 unsigned int status;
 278         };
 279         /*
 280          * Lower 32 bits of the command table address associated with this
 281          * header. The command table addresses must be 128 byte aligned.
 282          */
 283         unsigned int ctba;
 284         /*
 285          * If 64 bit addressing is used this field is the upper 32 bits
 286          * of the command table address associated with this command.
 287          */
 288         unsigned int ctbau;
 289         /* Reserved and unused. */
 290         unsigned int res[4];
 291 };
 292
 293 /* Command scatter gather structure (PRD). */
 294 struct mtip_cmd_sg {
 295         /*
 296          * Low 32 bits of the data buffer address. For P320 this
 297          * address must be 8 byte aligned signified by bits 2:0 being
 298          * set to 0.
 299          */
 300         unsigned int dba;
 301         /*
 302          * When 64 bit addressing is used this field is the upper
 303          * 32 bits of the data buffer address.
 304          */
 305         unsigned int dba_upper;
 306         /* Unused. */
 307         unsigned int reserved;
 308         /*
 309          * Bit 31: interrupt when this data block has been transferred.
 310          * Bits 30..22: reserved
 311          * Bits 21..0: byte count (minus 1).  For P320 the byte count must be
 312          * 8 byte aligned signified by bits 2:0 being set to 1.
 313          */
 314         unsigned int info;
 315 };
 316 struct mtip_port;
 317
 318 /* Structure used to describe a command. */
 319 struct mtip_cmd {
 320
 321         struct mtip_cmd_hdr *command_header; /* ptr to command header entry */
 322
 323         dma_addr_t command_header_dma; /* corresponding physical address */
 324
 325         void *command; /* ptr to command table entry */
 326
 327         dma_addr_t command_dma; /* corresponding physical address */
 328
 329         void *comp_data; /* data passed to completion function comp_func() */
 330         /*
 331          * Completion function called by the ISR upon completion of
 332          * a command.
 333          */
 334         void (*comp_func)(struct mtip_port *port,
 335                                 int tag,
 336                                 struct mtip_cmd *cmd,
 337                                 int status);
 338
 339         int scatter_ents; /* Number of scatter list entries used */
 340
 341         int unaligned; /* command is unaligned on 4k boundary */
 342
 343         struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */
 344
 345         int retries; /* The number of retries left for this command. */
 346
 347         int direction; /* Data transfer direction */
 348 };
 349
 350 /* Structure used to describe a port. */
 351 struct mtip_port {
 352         /* Pointer back to the driver data for this port. */
 353         struct driver_data *dd;
 354         /*
 355          * Used to determine if the data pointed to by the
 356          * identify field is valid.
 357          */
 358         unsigned long identify_valid;
 359         /* Base address of the memory mapped IO for the port. */
 360         void __iomem *mmio;
 361         /* Array of pointers to the memory mapped s_active registers. */
 362         void __iomem *s_active[MTIP_MAX_SLOT_GROUPS];
 363         /* Array of pointers to the memory mapped completed registers. */
 364         void __iomem *completed[MTIP_MAX_SLOT_GROUPS];
 365         /* Array of pointers to the memory mapped Command Issue registers. */
 366         void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS];
 367         /*
 368          * Pointer to the beginning of the command header memory as used
 369          * by the driver.
 370          */
 371         void *command_list;
 372         /*
 373          * Pointer to the beginning of the command header memory as used
 374          * by the DMA.
 375          */
 376         dma_addr_t command_list_dma;
 377         /*
 378          * Pointer to the beginning of the RX FIS memory as used
 379          * by the driver.
 380          */
 381         void *rxfis;
 382         /*
 383          * Pointer to the beginning of the RX FIS memory as used
 384          * by the DMA.
 385          */
 386         dma_addr_t rxfis_dma;
 387         /*
 388          * Pointer to the DMA region for RX Fis, Identify, RLE10, and SMART
 389          */
 390         void *block1;
 391         /*
 392          * DMA address of region for RX Fis, Identify, RLE10, and SMART
 393          */
 394         dma_addr_t block1_dma;
 395         /*
 396          * Pointer to the beginning of the identify data memory as used
 397          * by the driver.
 398          */
 399         u16 *identify;
 400         /*
 401          * Pointer to the beginning of the identify data memory as used
 402          * by the DMA.
 403          */
 404         dma_addr_t identify_dma;
 405         /*
 406          * Pointer to the beginning of a sector buffer that is used
 407          * by the driver when issuing internal commands.
 408          */
 409         u16 *sector_buffer;
 410         /*
 411          * Pointer to the beginning of a sector buffer that is used
 412          * by the DMA when the driver issues internal commands.
 413          */
 414         dma_addr_t sector_buffer_dma;
 415         /*
 416          * Bit significant, used to determine if a command slot has
 417          * been allocated. i.e. the slot is in use.  Bits are cleared
 418          * when the command slot and all associated data structures
 419          * are no longer needed.
 420          */
 421         u16 *log_buf;
 422         dma_addr_t log_buf_dma;
 423
 424         u8 *smart_buf;
 425         dma_addr_t smart_buf_dma;
 426
 427         unsigned long allocated[SLOTBITS_IN_LONGS];
 428         /*
 429          * used to queue commands when an internal command is in progress
 430          * or error handling is active
 431          */
 432         unsigned long cmds_to_issue[SLOTBITS_IN_LONGS];
 433         /* Used by mtip_service_thread to wait for an event */
 434         wait_queue_head_t svc_wait;
 435         /*
 436          * indicates the state of the port. Also, helps the service thread
 437          * to determine its action on wake up.
 438          */
 439         unsigned long flags;
 440         /*
 441          * Timer used to complete commands that have been active for too long.
 442          */
 443         unsigned long ic_pause_timer;
 444
 445         /* Semaphore to control queue depth of unaligned IOs */
 446         struct semaphore cmd_slot_unal;
 447
 448         /* Spinlock for working around command-issue bug. */
 449         spinlock_t cmd_issue_lock[MTIP_MAX_SLOT_GROUPS];
 450 };
 451
 452 /*
 453  * Driver private data structure.
 454  *
 455  * One structure is allocated per probed device.
 456  */
 457 struct driver_data {
 458         void __iomem *mmio; /* Base address of the HBA registers. */
 459
 460         int major; /* Major device number. */
 461
 462         int instance; /* Instance number. First device probed is 0, ... */
 463
 464         struct gendisk *disk; /* Pointer to our gendisk structure. */
 465
 466         struct pci_dev *pdev; /* Pointer to the PCI device structure. */
 467
 468         struct request_queue *queue; /* Our request queue. */
 469
 470         struct blk_mq_tag_set tags; /* blk_mq tags */
 471
 472         struct mtip_port *port; /* Pointer to the port data structure. */
 473
 474         unsigned product_type; /* magic value declaring the product type */
 475
 476         unsigned slot_groups; /* number of slot groups the product supports */
 477
 478         unsigned long index; /* Index to determine the disk name */
 479
 480         unsigned long dd_flag; /* NOTE: use atomic bit operations on this */
 481
 482         struct task_struct *mtip_svc_handler; /* task_struct of svc thd */
 483
 484         struct dentry *dfs_node;
 485
 486         bool trim_supp; /* flag indicating trim support */
 487
 488         bool sr;
 489
 490         int numa_node; /* NUMA support */
 491
 492         char workq_name[32];
 493
 494         struct workqueue_struct *isr_workq;
 495
 496         atomic_t irq_workers_active;
 497
 498         struct mtip_work work[MTIP_MAX_SLOT_GROUPS];
 499
 500         int isr_binding;
 501
 502         struct block_device *bdev;
 503
 504         struct list_head online_list; /* linkage for online list */
 505
 506         struct list_head remove_list; /* linkage for removing list */
 507
 508         int unal_qdepth; /* qdepth of unaligned IO queue */
 509 };
 510
 511 #endif