swim3: clean up request completion paths
[deliverable/linux.git] / drivers / block / swim3.c
1 /*
2 * Driver for the SWIM3 (Super Woz Integrated Machine 3)
3 * floppy controller found on Power Macintoshes.
4 *
5 * Copyright (C) 1996 Paul Mackerras.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 /*
14 * TODO:
15 * handle 2 drives
16 * handle GCR disks
17 */
18
19 #include <linux/stddef.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/timer.h>
23 #include <linux/delay.h>
24 #include <linux/fd.h>
25 #include <linux/ioctl.h>
26 #include <linux/blkdev.h>
27 #include <linux/interrupt.h>
28 #include <linux/module.h>
29 #include <linux/spinlock.h>
30 #include <asm/io.h>
31 #include <asm/dbdma.h>
32 #include <asm/prom.h>
33 #include <asm/uaccess.h>
34 #include <asm/mediabay.h>
35 #include <asm/machdep.h>
36 #include <asm/pmac_feature.h>
37
38 static struct request_queue *swim3_queue;
39 static struct gendisk *disks[2];
40 static struct request *fd_req;
41
42 #define MAX_FLOPPIES 2
43
44 enum swim_state {
45 idle,
46 locating,
47 seeking,
48 settling,
49 do_transfer,
50 jogging,
51 available,
52 revalidating,
53 ejecting
54 };
55
56 #define REG(x) unsigned char x; char x ## _pad[15];
57
58 /*
59 * The names for these registers mostly represent speculation on my part.
60 * It will be interesting to see how close they are to the names Apple uses.
61 */
62 struct swim3 {
63 REG(data);
64 REG(timer); /* counts down at 1MHz */
65 REG(error);
66 REG(mode);
67 REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
68 REG(setup);
69 REG(control); /* writing bits clears them */
70 REG(status); /* writing bits sets them in control */
71 REG(intr);
72 REG(nseek); /* # tracks to seek */
73 REG(ctrack); /* current track number */
74 REG(csect); /* current sector number */
75 REG(gap3); /* size of gap 3 in track format */
76 REG(sector); /* sector # to read or write */
77 REG(nsect); /* # sectors to read or write */
78 REG(intr_enable);
79 };
80
81 #define control_bic control
82 #define control_bis status
83
84 /* Bits in select register */
85 #define CA_MASK 7
86 #define LSTRB 8
87
88 /* Bits in control register */
89 #define DO_SEEK 0x80
90 #define FORMAT 0x40
91 #define SELECT 0x20
92 #define WRITE_SECTORS 0x10
93 #define DO_ACTION 0x08
94 #define DRIVE2_ENABLE 0x04
95 #define DRIVE_ENABLE 0x02
96 #define INTR_ENABLE 0x01
97
98 /* Bits in status register */
99 #define FIFO_1BYTE 0x80
100 #define FIFO_2BYTE 0x40
101 #define ERROR 0x20
102 #define DATA 0x08
103 #define RDDATA 0x04
104 #define INTR_PENDING 0x02
105 #define MARK_BYTE 0x01
106
107 /* Bits in intr and intr_enable registers */
108 #define ERROR_INTR 0x20
109 #define DATA_CHANGED 0x10
110 #define TRANSFER_DONE 0x08
111 #define SEEN_SECTOR 0x04
112 #define SEEK_DONE 0x02
113 #define TIMER_DONE 0x01
114
115 /* Bits in error register */
116 #define ERR_DATA_CRC 0x80
117 #define ERR_ADDR_CRC 0x40
118 #define ERR_OVERRUN 0x04
119 #define ERR_UNDERRUN 0x01
120
121 /* Bits in setup register */
122 #define S_SW_RESET 0x80
123 #define S_GCR_WRITE 0x40
124 #define S_IBM_DRIVE 0x20
125 #define S_TEST_MODE 0x10
126 #define S_FCLK_DIV2 0x08
127 #define S_GCR 0x04
128 #define S_COPY_PROT 0x02
129 #define S_INV_WDATA 0x01
130
131 /* Select values for swim3_action */
132 #define SEEK_POSITIVE 0
133 #define SEEK_NEGATIVE 4
134 #define STEP 1
135 #define MOTOR_ON 2
136 #define MOTOR_OFF 6
137 #define INDEX 3
138 #define EJECT 7
139 #define SETMFM 9
140 #define SETGCR 13
141
142 /* Select values for swim3_select and swim3_readbit */
143 #define STEP_DIR 0
144 #define STEPPING 1
145 #define MOTOR_ON 2
146 #define RELAX 3 /* also eject in progress */
147 #define READ_DATA_0 4
148 #define TWOMEG_DRIVE 5
149 #define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */
150 #define DRIVE_PRESENT 7
151 #define DISK_IN 8
152 #define WRITE_PROT 9
153 #define TRACK_ZERO 10
154 #define TACHO 11
155 #define READ_DATA_1 12
156 #define MFM_MODE 13
157 #define SEEK_COMPLETE 14
158 #define ONEMEG_MEDIA 15
159
160 /* Definitions of values used in writing and formatting */
161 #define DATA_ESCAPE 0x99
162 #define GCR_SYNC_EXC 0x3f
163 #define GCR_SYNC_CONV 0x80
164 #define GCR_FIRST_MARK 0xd5
165 #define GCR_SECOND_MARK 0xaa
166 #define GCR_ADDR_MARK "\xd5\xaa\x00"
167 #define GCR_DATA_MARK "\xd5\xaa\x0b"
168 #define GCR_SLIP_BYTE "\x27\xaa"
169 #define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f"
170
171 #define DATA_99 "\x99\x99"
172 #define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe"
173 #define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc"
174 #define MFM_GAP_LEN 12
175
176 struct floppy_state {
177 enum swim_state state;
178 spinlock_t lock;
179 struct swim3 __iomem *swim3; /* hardware registers */
180 struct dbdma_regs __iomem *dma; /* DMA controller registers */
181 int swim3_intr; /* interrupt number for SWIM3 */
182 int dma_intr; /* interrupt number for DMA channel */
183 int cur_cyl; /* cylinder head is on, or -1 */
184 int cur_sector; /* last sector we saw go past */
185 int req_cyl; /* the cylinder for the current r/w request */
186 int head; /* head number ditto */
187 int req_sector; /* sector number ditto */
188 int scount; /* # sectors we're transferring at present */
189 int retries;
190 int settle_time;
191 int secpercyl; /* disk geometry information */
192 int secpertrack;
193 int total_secs;
194 int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */
195 struct dbdma_cmd *dma_cmd;
196 int ref_count;
197 int expect_cyl;
198 struct timer_list timeout;
199 int timeout_pending;
200 int ejected;
201 wait_queue_head_t wait;
202 int wanted;
203 struct device_node* media_bay; /* NULL when not in bay */
204 char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)];
205 };
206
207 static struct floppy_state floppy_states[MAX_FLOPPIES];
208 static int floppy_count = 0;
209 static DEFINE_SPINLOCK(swim3_lock);
210
211 static unsigned short write_preamble[] = {
212 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */
213 0, 0, 0, 0, 0, 0, /* sync field */
214 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */
215 0x990f /* no escape for 512 bytes */
216 };
217
218 static unsigned short write_postamble[] = {
219 0x9904, /* insert CRC */
220 0x4e4e, 0x4e4e,
221 0x9908, /* stop writing */
222 0, 0, 0, 0, 0, 0
223 };
224
225 static void swim3_select(struct floppy_state *fs, int sel);
226 static void swim3_action(struct floppy_state *fs, int action);
227 static int swim3_readbit(struct floppy_state *fs, int bit);
228 static void do_fd_request(struct request_queue * q);
229 static void start_request(struct floppy_state *fs);
230 static void set_timeout(struct floppy_state *fs, int nticks,
231 void (*proc)(unsigned long));
232 static void scan_track(struct floppy_state *fs);
233 static void seek_track(struct floppy_state *fs, int n);
234 static void init_dma(struct dbdma_cmd *cp, int cmd, void *buf, int count);
235 static void setup_transfer(struct floppy_state *fs);
236 static void act(struct floppy_state *fs);
237 static void scan_timeout(unsigned long data);
238 static void seek_timeout(unsigned long data);
239 static void settle_timeout(unsigned long data);
240 static void xfer_timeout(unsigned long data);
241 static irqreturn_t swim3_interrupt(int irq, void *dev_id);
242 /*static void fd_dma_interrupt(int irq, void *dev_id);*/
243 static int grab_drive(struct floppy_state *fs, enum swim_state state,
244 int interruptible);
245 static void release_drive(struct floppy_state *fs);
246 static int fd_eject(struct floppy_state *fs);
247 static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
248 unsigned int cmd, unsigned long param);
249 static int floppy_open(struct block_device *bdev, fmode_t mode);
250 static int floppy_release(struct gendisk *disk, fmode_t mode);
251 static int floppy_check_change(struct gendisk *disk);
252 static int floppy_revalidate(struct gendisk *disk);
253
254 static void swim3_select(struct floppy_state *fs, int sel)
255 {
256 struct swim3 __iomem *sw = fs->swim3;
257
258 out_8(&sw->select, RELAX);
259 if (sel & 8)
260 out_8(&sw->control_bis, SELECT);
261 else
262 out_8(&sw->control_bic, SELECT);
263 out_8(&sw->select, sel & CA_MASK);
264 }
265
266 static void swim3_action(struct floppy_state *fs, int action)
267 {
268 struct swim3 __iomem *sw = fs->swim3;
269
270 swim3_select(fs, action);
271 udelay(1);
272 out_8(&sw->select, sw->select | LSTRB);
273 udelay(2);
274 out_8(&sw->select, sw->select & ~LSTRB);
275 udelay(1);
276 }
277
278 static int swim3_readbit(struct floppy_state *fs, int bit)
279 {
280 struct swim3 __iomem *sw = fs->swim3;
281 int stat;
282
283 swim3_select(fs, bit);
284 udelay(1);
285 stat = in_8(&sw->status);
286 return (stat & DATA) == 0;
287 }
288
289 static void do_fd_request(struct request_queue * q)
290 {
291 int i;
292 for(i=0;i<floppy_count;i++)
293 {
294 #ifdef CONFIG_PMAC_MEDIABAY
295 if (floppy_states[i].media_bay &&
296 check_media_bay(floppy_states[i].media_bay, MB_FD))
297 continue;
298 #endif /* CONFIG_PMAC_MEDIABAY */
299 start_request(&floppy_states[i]);
300 }
301 }
302
303 static void start_request(struct floppy_state *fs)
304 {
305 struct request *req;
306 unsigned long x;
307
308 if (fs->state == idle && fs->wanted) {
309 fs->state = available;
310 wake_up(&fs->wait);
311 return;
312 }
313 while (fs->state == idle && (req = elv_next_request(swim3_queue))) {
314 #if 0
315 printk("do_fd_req: dev=%s cmd=%d sec=%ld nr_sec=%ld buf=%p\n",
316 req->rq_disk->disk_name, req->cmd,
317 (long)req->sector, req->nr_sectors, req->buffer);
318 printk(" errors=%d current_nr_sectors=%ld\n",
319 req->errors, req->current_nr_sectors);
320 #endif
321
322 if (req->sector >= fs->total_secs) {
323 __blk_end_request_cur(req, -EIO);
324 continue;
325 }
326 if (fs->ejected) {
327 __blk_end_request_cur(req, -EIO);
328 continue;
329 }
330
331 if (rq_data_dir(req) == WRITE) {
332 if (fs->write_prot < 0)
333 fs->write_prot = swim3_readbit(fs, WRITE_PROT);
334 if (fs->write_prot) {
335 __blk_end_request_cur(req, -EIO);
336 continue;
337 }
338 }
339
340 /* Do not remove the cast. req->sector is now a sector_t and
341 * can be 64 bits, but it will never go past 32 bits for this
342 * driver anyway, so we can safely cast it down and not have
343 * to do a 64/32 division
344 */
345 fs->req_cyl = ((long)req->sector) / fs->secpercyl;
346 x = ((long)req->sector) % fs->secpercyl;
347 fs->head = x / fs->secpertrack;
348 fs->req_sector = x % fs->secpertrack + 1;
349 fd_req = req;
350 fs->state = do_transfer;
351 fs->retries = 0;
352
353 act(fs);
354 }
355 }
356
357 static void set_timeout(struct floppy_state *fs, int nticks,
358 void (*proc)(unsigned long))
359 {
360 unsigned long flags;
361
362 spin_lock_irqsave(&fs->lock, flags);
363 if (fs->timeout_pending)
364 del_timer(&fs->timeout);
365 fs->timeout.expires = jiffies + nticks;
366 fs->timeout.function = proc;
367 fs->timeout.data = (unsigned long) fs;
368 add_timer(&fs->timeout);
369 fs->timeout_pending = 1;
370 spin_unlock_irqrestore(&fs->lock, flags);
371 }
372
373 static inline void scan_track(struct floppy_state *fs)
374 {
375 struct swim3 __iomem *sw = fs->swim3;
376
377 swim3_select(fs, READ_DATA_0);
378 in_8(&sw->intr); /* clear SEEN_SECTOR bit */
379 in_8(&sw->error);
380 out_8(&sw->intr_enable, SEEN_SECTOR);
381 out_8(&sw->control_bis, DO_ACTION);
382 /* enable intr when track found */
383 set_timeout(fs, HZ, scan_timeout); /* enable timeout */
384 }
385
386 static inline void seek_track(struct floppy_state *fs, int n)
387 {
388 struct swim3 __iomem *sw = fs->swim3;
389
390 if (n >= 0) {
391 swim3_action(fs, SEEK_POSITIVE);
392 sw->nseek = n;
393 } else {
394 swim3_action(fs, SEEK_NEGATIVE);
395 sw->nseek = -n;
396 }
397 fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1;
398 swim3_select(fs, STEP);
399 in_8(&sw->error);
400 /* enable intr when seek finished */
401 out_8(&sw->intr_enable, SEEK_DONE);
402 out_8(&sw->control_bis, DO_SEEK);
403 set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */
404 fs->settle_time = 0;
405 }
406
407 static inline void init_dma(struct dbdma_cmd *cp, int cmd,
408 void *buf, int count)
409 {
410 st_le16(&cp->req_count, count);
411 st_le16(&cp->command, cmd);
412 st_le32(&cp->phy_addr, virt_to_bus(buf));
413 cp->xfer_status = 0;
414 }
415
416 static inline void setup_transfer(struct floppy_state *fs)
417 {
418 int n;
419 struct swim3 __iomem *sw = fs->swim3;
420 struct dbdma_cmd *cp = fs->dma_cmd;
421 struct dbdma_regs __iomem *dr = fs->dma;
422
423 if (fd_req->current_nr_sectors <= 0) {
424 printk(KERN_ERR "swim3: transfer 0 sectors?\n");
425 return;
426 }
427 if (rq_data_dir(fd_req) == WRITE)
428 n = 1;
429 else {
430 n = fs->secpertrack - fs->req_sector + 1;
431 if (n > fd_req->current_nr_sectors)
432 n = fd_req->current_nr_sectors;
433 }
434 fs->scount = n;
435 swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0);
436 out_8(&sw->sector, fs->req_sector);
437 out_8(&sw->nsect, n);
438 out_8(&sw->gap3, 0);
439 out_le32(&dr->cmdptr, virt_to_bus(cp));
440 if (rq_data_dir(fd_req) == WRITE) {
441 /* Set up 3 dma commands: write preamble, data, postamble */
442 init_dma(cp, OUTPUT_MORE, write_preamble, sizeof(write_preamble));
443 ++cp;
444 init_dma(cp, OUTPUT_MORE, fd_req->buffer, 512);
445 ++cp;
446 init_dma(cp, OUTPUT_LAST, write_postamble, sizeof(write_postamble));
447 } else {
448 init_dma(cp, INPUT_LAST, fd_req->buffer, n * 512);
449 }
450 ++cp;
451 out_le16(&cp->command, DBDMA_STOP);
452 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
453 in_8(&sw->error);
454 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
455 if (rq_data_dir(fd_req) == WRITE)
456 out_8(&sw->control_bis, WRITE_SECTORS);
457 in_8(&sw->intr);
458 out_le32(&dr->control, (RUN << 16) | RUN);
459 /* enable intr when transfer complete */
460 out_8(&sw->intr_enable, TRANSFER_DONE);
461 out_8(&sw->control_bis, DO_ACTION);
462 set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */
463 }
464
465 static void act(struct floppy_state *fs)
466 {
467 for (;;) {
468 switch (fs->state) {
469 case idle:
470 return; /* XXX shouldn't get here */
471
472 case locating:
473 if (swim3_readbit(fs, TRACK_ZERO)) {
474 fs->cur_cyl = 0;
475 if (fs->req_cyl == 0)
476 fs->state = do_transfer;
477 else
478 fs->state = seeking;
479 break;
480 }
481 scan_track(fs);
482 return;
483
484 case seeking:
485 if (fs->cur_cyl < 0) {
486 fs->expect_cyl = -1;
487 fs->state = locating;
488 break;
489 }
490 if (fs->req_cyl == fs->cur_cyl) {
491 printk("whoops, seeking 0\n");
492 fs->state = do_transfer;
493 break;
494 }
495 seek_track(fs, fs->req_cyl - fs->cur_cyl);
496 return;
497
498 case settling:
499 /* check for SEEK_COMPLETE after 30ms */
500 fs->settle_time = (HZ + 32) / 33;
501 set_timeout(fs, fs->settle_time, settle_timeout);
502 return;
503
504 case do_transfer:
505 if (fs->cur_cyl != fs->req_cyl) {
506 if (fs->retries > 5) {
507 __blk_end_request_cur(fd_req, -EIO);
508 fs->state = idle;
509 return;
510 }
511 fs->state = seeking;
512 break;
513 }
514 setup_transfer(fs);
515 return;
516
517 case jogging:
518 seek_track(fs, -5);
519 return;
520
521 default:
522 printk(KERN_ERR"swim3: unknown state %d\n", fs->state);
523 return;
524 }
525 }
526 }
527
528 static void scan_timeout(unsigned long data)
529 {
530 struct floppy_state *fs = (struct floppy_state *) data;
531 struct swim3 __iomem *sw = fs->swim3;
532
533 fs->timeout_pending = 0;
534 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
535 out_8(&sw->select, RELAX);
536 out_8(&sw->intr_enable, 0);
537 fs->cur_cyl = -1;
538 if (fs->retries > 5) {
539 __blk_end_request_cur(fd_req, -EIO);
540 fs->state = idle;
541 start_request(fs);
542 } else {
543 fs->state = jogging;
544 act(fs);
545 }
546 }
547
548 static void seek_timeout(unsigned long data)
549 {
550 struct floppy_state *fs = (struct floppy_state *) data;
551 struct swim3 __iomem *sw = fs->swim3;
552
553 fs->timeout_pending = 0;
554 out_8(&sw->control_bic, DO_SEEK);
555 out_8(&sw->select, RELAX);
556 out_8(&sw->intr_enable, 0);
557 printk(KERN_ERR "swim3: seek timeout\n");
558 __blk_end_request_cur(fd_req, -EIO);
559 fs->state = idle;
560 start_request(fs);
561 }
562
563 static void settle_timeout(unsigned long data)
564 {
565 struct floppy_state *fs = (struct floppy_state *) data;
566 struct swim3 __iomem *sw = fs->swim3;
567
568 fs->timeout_pending = 0;
569 if (swim3_readbit(fs, SEEK_COMPLETE)) {
570 out_8(&sw->select, RELAX);
571 fs->state = locating;
572 act(fs);
573 return;
574 }
575 out_8(&sw->select, RELAX);
576 if (fs->settle_time < 2*HZ) {
577 ++fs->settle_time;
578 set_timeout(fs, 1, settle_timeout);
579 return;
580 }
581 printk(KERN_ERR "swim3: seek settle timeout\n");
582 __blk_end_request_cur(fd_req, -EIO);
583 fs->state = idle;
584 start_request(fs);
585 }
586
587 static void xfer_timeout(unsigned long data)
588 {
589 struct floppy_state *fs = (struct floppy_state *) data;
590 struct swim3 __iomem *sw = fs->swim3;
591 struct dbdma_regs __iomem *dr = fs->dma;
592 int n;
593
594 fs->timeout_pending = 0;
595 out_le32(&dr->control, RUN << 16);
596 /* We must wait a bit for dbdma to stop */
597 for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++)
598 udelay(1);
599 out_8(&sw->intr_enable, 0);
600 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
601 out_8(&sw->select, RELAX);
602 printk(KERN_ERR "swim3: timeout %sing sector %ld\n",
603 (rq_data_dir(fd_req)==WRITE? "writ": "read"), (long)fd_req->sector);
604 __blk_end_request_cur(fd_req, -EIO);
605 fs->state = idle;
606 start_request(fs);
607 }
608
609 static irqreturn_t swim3_interrupt(int irq, void *dev_id)
610 {
611 struct floppy_state *fs = (struct floppy_state *) dev_id;
612 struct swim3 __iomem *sw = fs->swim3;
613 int intr, err, n;
614 int stat, resid;
615 struct dbdma_regs __iomem *dr;
616 struct dbdma_cmd *cp;
617
618 intr = in_8(&sw->intr);
619 err = (intr & ERROR_INTR)? in_8(&sw->error): 0;
620 if ((intr & ERROR_INTR) && fs->state != do_transfer)
621 printk(KERN_ERR "swim3_interrupt, state=%d, dir=%x, intr=%x, err=%x\n",
622 fs->state, rq_data_dir(fd_req), intr, err);
623 switch (fs->state) {
624 case locating:
625 if (intr & SEEN_SECTOR) {
626 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
627 out_8(&sw->select, RELAX);
628 out_8(&sw->intr_enable, 0);
629 del_timer(&fs->timeout);
630 fs->timeout_pending = 0;
631 if (sw->ctrack == 0xff) {
632 printk(KERN_ERR "swim3: seen sector but cyl=ff?\n");
633 fs->cur_cyl = -1;
634 if (fs->retries > 5) {
635 __blk_end_request_cur(fd_req, -EIO);
636 fs->state = idle;
637 start_request(fs);
638 } else {
639 fs->state = jogging;
640 act(fs);
641 }
642 break;
643 }
644 fs->cur_cyl = sw->ctrack;
645 fs->cur_sector = sw->csect;
646 if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl)
647 printk(KERN_ERR "swim3: expected cyl %d, got %d\n",
648 fs->expect_cyl, fs->cur_cyl);
649 fs->state = do_transfer;
650 act(fs);
651 }
652 break;
653 case seeking:
654 case jogging:
655 if (sw->nseek == 0) {
656 out_8(&sw->control_bic, DO_SEEK);
657 out_8(&sw->select, RELAX);
658 out_8(&sw->intr_enable, 0);
659 del_timer(&fs->timeout);
660 fs->timeout_pending = 0;
661 if (fs->state == seeking)
662 ++fs->retries;
663 fs->state = settling;
664 act(fs);
665 }
666 break;
667 case settling:
668 out_8(&sw->intr_enable, 0);
669 del_timer(&fs->timeout);
670 fs->timeout_pending = 0;
671 act(fs);
672 break;
673 case do_transfer:
674 if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0)
675 break;
676 out_8(&sw->intr_enable, 0);
677 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
678 out_8(&sw->select, RELAX);
679 del_timer(&fs->timeout);
680 fs->timeout_pending = 0;
681 dr = fs->dma;
682 cp = fs->dma_cmd;
683 if (rq_data_dir(fd_req) == WRITE)
684 ++cp;
685 /*
686 * Check that the main data transfer has finished.
687 * On writing, the swim3 sometimes doesn't use
688 * up all the bytes of the postamble, so we can still
689 * see DMA active here. That doesn't matter as long
690 * as all the sector data has been transferred.
691 */
692 if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) {
693 /* wait a little while for DMA to complete */
694 for (n = 0; n < 100; ++n) {
695 if (cp->xfer_status != 0)
696 break;
697 udelay(1);
698 barrier();
699 }
700 }
701 /* turn off DMA */
702 out_le32(&dr->control, (RUN | PAUSE) << 16);
703 stat = ld_le16(&cp->xfer_status);
704 resid = ld_le16(&cp->res_count);
705 if (intr & ERROR_INTR) {
706 n = fs->scount - 1 - resid / 512;
707 if (n > 0) {
708 blk_update_request(fd_req, 0, n << 9);
709 fs->req_sector += n;
710 }
711 if (fs->retries < 5) {
712 ++fs->retries;
713 act(fs);
714 } else {
715 printk("swim3: error %sing block %ld (err=%x)\n",
716 rq_data_dir(fd_req) == WRITE? "writ": "read",
717 (long)fd_req->sector, err);
718 __blk_end_request_cur(fd_req, -EIO);
719 fs->state = idle;
720 }
721 } else {
722 if ((stat & ACTIVE) == 0 || resid != 0) {
723 /* musta been an error */
724 printk(KERN_ERR "swim3: fd dma: stat=%x resid=%d\n", stat, resid);
725 printk(KERN_ERR " state=%d, dir=%x, intr=%x, err=%x\n",
726 fs->state, rq_data_dir(fd_req), intr, err);
727 __blk_end_request_cur(fd_req, -EIO);
728 fs->state = idle;
729 start_request(fs);
730 break;
731 }
732 if (__blk_end_request(fd_req, 0, fs->scount << 9)) {
733 fs->req_sector += fs->scount;
734 if (fs->req_sector > fs->secpertrack) {
735 fs->req_sector -= fs->secpertrack;
736 if (++fs->head > 1) {
737 fs->head = 0;
738 ++fs->req_cyl;
739 }
740 }
741 act(fs);
742 } else
743 fs->state = idle;
744 }
745 if (fs->state == idle)
746 start_request(fs);
747 break;
748 default:
749 printk(KERN_ERR "swim3: don't know what to do in state %d\n", fs->state);
750 }
751 return IRQ_HANDLED;
752 }
753
754 /*
755 static void fd_dma_interrupt(int irq, void *dev_id)
756 {
757 }
758 */
759
760 static int grab_drive(struct floppy_state *fs, enum swim_state state,
761 int interruptible)
762 {
763 unsigned long flags;
764
765 spin_lock_irqsave(&fs->lock, flags);
766 if (fs->state != idle) {
767 ++fs->wanted;
768 while (fs->state != available) {
769 if (interruptible && signal_pending(current)) {
770 --fs->wanted;
771 spin_unlock_irqrestore(&fs->lock, flags);
772 return -EINTR;
773 }
774 interruptible_sleep_on(&fs->wait);
775 }
776 --fs->wanted;
777 }
778 fs->state = state;
779 spin_unlock_irqrestore(&fs->lock, flags);
780 return 0;
781 }
782
783 static void release_drive(struct floppy_state *fs)
784 {
785 unsigned long flags;
786
787 spin_lock_irqsave(&fs->lock, flags);
788 fs->state = idle;
789 start_request(fs);
790 spin_unlock_irqrestore(&fs->lock, flags);
791 }
792
793 static int fd_eject(struct floppy_state *fs)
794 {
795 int err, n;
796
797 err = grab_drive(fs, ejecting, 1);
798 if (err)
799 return err;
800 swim3_action(fs, EJECT);
801 for (n = 20; n > 0; --n) {
802 if (signal_pending(current)) {
803 err = -EINTR;
804 break;
805 }
806 swim3_select(fs, RELAX);
807 schedule_timeout_interruptible(1);
808 if (swim3_readbit(fs, DISK_IN) == 0)
809 break;
810 }
811 swim3_select(fs, RELAX);
812 udelay(150);
813 fs->ejected = 1;
814 release_drive(fs);
815 return err;
816 }
817
818 static struct floppy_struct floppy_type =
819 { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */
820
821 static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
822 unsigned int cmd, unsigned long param)
823 {
824 struct floppy_state *fs = bdev->bd_disk->private_data;
825 int err;
826
827 if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN))
828 return -EPERM;
829
830 #ifdef CONFIG_PMAC_MEDIABAY
831 if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
832 return -ENXIO;
833 #endif
834
835 switch (cmd) {
836 case FDEJECT:
837 if (fs->ref_count != 1)
838 return -EBUSY;
839 err = fd_eject(fs);
840 return err;
841 case FDGETPRM:
842 if (copy_to_user((void __user *) param, &floppy_type,
843 sizeof(struct floppy_struct)))
844 return -EFAULT;
845 return 0;
846 }
847 return -ENOTTY;
848 }
849
850 static int floppy_open(struct block_device *bdev, fmode_t mode)
851 {
852 struct floppy_state *fs = bdev->bd_disk->private_data;
853 struct swim3 __iomem *sw = fs->swim3;
854 int n, err = 0;
855
856 if (fs->ref_count == 0) {
857 #ifdef CONFIG_PMAC_MEDIABAY
858 if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
859 return -ENXIO;
860 #endif
861 out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2);
862 out_8(&sw->control_bic, 0xff);
863 out_8(&sw->mode, 0x95);
864 udelay(10);
865 out_8(&sw->intr_enable, 0);
866 out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE);
867 swim3_action(fs, MOTOR_ON);
868 fs->write_prot = -1;
869 fs->cur_cyl = -1;
870 for (n = 0; n < 2 * HZ; ++n) {
871 if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE))
872 break;
873 if (signal_pending(current)) {
874 err = -EINTR;
875 break;
876 }
877 swim3_select(fs, RELAX);
878 schedule_timeout_interruptible(1);
879 }
880 if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0
881 || swim3_readbit(fs, DISK_IN) == 0))
882 err = -ENXIO;
883 swim3_action(fs, SETMFM);
884 swim3_select(fs, RELAX);
885
886 } else if (fs->ref_count == -1 || mode & FMODE_EXCL)
887 return -EBUSY;
888
889 if (err == 0 && (mode & FMODE_NDELAY) == 0
890 && (mode & (FMODE_READ|FMODE_WRITE))) {
891 check_disk_change(bdev);
892 if (fs->ejected)
893 err = -ENXIO;
894 }
895
896 if (err == 0 && (mode & FMODE_WRITE)) {
897 if (fs->write_prot < 0)
898 fs->write_prot = swim3_readbit(fs, WRITE_PROT);
899 if (fs->write_prot)
900 err = -EROFS;
901 }
902
903 if (err) {
904 if (fs->ref_count == 0) {
905 swim3_action(fs, MOTOR_OFF);
906 out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE);
907 swim3_select(fs, RELAX);
908 }
909 return err;
910 }
911
912 if (mode & FMODE_EXCL)
913 fs->ref_count = -1;
914 else
915 ++fs->ref_count;
916
917 return 0;
918 }
919
920 static int floppy_release(struct gendisk *disk, fmode_t mode)
921 {
922 struct floppy_state *fs = disk->private_data;
923 struct swim3 __iomem *sw = fs->swim3;
924 if (fs->ref_count > 0 && --fs->ref_count == 0) {
925 swim3_action(fs, MOTOR_OFF);
926 out_8(&sw->control_bic, 0xff);
927 swim3_select(fs, RELAX);
928 }
929 return 0;
930 }
931
932 static int floppy_check_change(struct gendisk *disk)
933 {
934 struct floppy_state *fs = disk->private_data;
935 return fs->ejected;
936 }
937
938 static int floppy_revalidate(struct gendisk *disk)
939 {
940 struct floppy_state *fs = disk->private_data;
941 struct swim3 __iomem *sw;
942 int ret, n;
943
944 #ifdef CONFIG_PMAC_MEDIABAY
945 if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
946 return -ENXIO;
947 #endif
948
949 sw = fs->swim3;
950 grab_drive(fs, revalidating, 0);
951 out_8(&sw->intr_enable, 0);
952 out_8(&sw->control_bis, DRIVE_ENABLE);
953 swim3_action(fs, MOTOR_ON); /* necessary? */
954 fs->write_prot = -1;
955 fs->cur_cyl = -1;
956 mdelay(1);
957 for (n = HZ; n > 0; --n) {
958 if (swim3_readbit(fs, SEEK_COMPLETE))
959 break;
960 if (signal_pending(current))
961 break;
962 swim3_select(fs, RELAX);
963 schedule_timeout_interruptible(1);
964 }
965 ret = swim3_readbit(fs, SEEK_COMPLETE) == 0
966 || swim3_readbit(fs, DISK_IN) == 0;
967 if (ret)
968 swim3_action(fs, MOTOR_OFF);
969 else {
970 fs->ejected = 0;
971 swim3_action(fs, SETMFM);
972 }
973 swim3_select(fs, RELAX);
974
975 release_drive(fs);
976 return ret;
977 }
978
979 static struct block_device_operations floppy_fops = {
980 .open = floppy_open,
981 .release = floppy_release,
982 .locked_ioctl = floppy_ioctl,
983 .media_changed = floppy_check_change,
984 .revalidate_disk= floppy_revalidate,
985 };
986
987 static int swim3_add_device(struct macio_dev *mdev, int index)
988 {
989 struct device_node *swim = mdev->ofdev.node;
990 struct device_node *mediabay;
991 struct floppy_state *fs = &floppy_states[index];
992 int rc = -EBUSY;
993
994 /* Check & Request resources */
995 if (macio_resource_count(mdev) < 2) {
996 printk(KERN_WARNING "ifd%d: no address for %s\n",
997 index, swim->full_name);
998 return -ENXIO;
999 }
1000 if (macio_irq_count(mdev) < 2) {
1001 printk(KERN_WARNING "fd%d: no intrs for device %s\n",
1002 index, swim->full_name);
1003 }
1004 if (macio_request_resource(mdev, 0, "swim3 (mmio)")) {
1005 printk(KERN_ERR "fd%d: can't request mmio resource for %s\n",
1006 index, swim->full_name);
1007 return -EBUSY;
1008 }
1009 if (macio_request_resource(mdev, 1, "swim3 (dma)")) {
1010 printk(KERN_ERR "fd%d: can't request dma resource for %s\n",
1011 index, swim->full_name);
1012 macio_release_resource(mdev, 0);
1013 return -EBUSY;
1014 }
1015 dev_set_drvdata(&mdev->ofdev.dev, fs);
1016
1017 mediabay = (strcasecmp(swim->parent->type, "media-bay") == 0) ?
1018 swim->parent : NULL;
1019 if (mediabay == NULL)
1020 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1);
1021
1022 memset(fs, 0, sizeof(*fs));
1023 spin_lock_init(&fs->lock);
1024 fs->state = idle;
1025 fs->swim3 = (struct swim3 __iomem *)
1026 ioremap(macio_resource_start(mdev, 0), 0x200);
1027 if (fs->swim3 == NULL) {
1028 printk("fd%d: couldn't map registers for %s\n",
1029 index, swim->full_name);
1030 rc = -ENOMEM;
1031 goto out_release;
1032 }
1033 fs->dma = (struct dbdma_regs __iomem *)
1034 ioremap(macio_resource_start(mdev, 1), 0x200);
1035 if (fs->dma == NULL) {
1036 printk("fd%d: couldn't map DMA for %s\n",
1037 index, swim->full_name);
1038 iounmap(fs->swim3);
1039 rc = -ENOMEM;
1040 goto out_release;
1041 }
1042 fs->swim3_intr = macio_irq(mdev, 0);
1043 fs->dma_intr = macio_irq(mdev, 1);;
1044 fs->cur_cyl = -1;
1045 fs->cur_sector = -1;
1046 fs->secpercyl = 36;
1047 fs->secpertrack = 18;
1048 fs->total_secs = 2880;
1049 fs->media_bay = mediabay;
1050 init_waitqueue_head(&fs->wait);
1051
1052 fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
1053 memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd));
1054 st_le16(&fs->dma_cmd[1].command, DBDMA_STOP);
1055
1056 if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) {
1057 printk(KERN_ERR "fd%d: couldn't request irq %d for %s\n",
1058 index, fs->swim3_intr, swim->full_name);
1059 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0);
1060 goto out_unmap;
1061 return -EBUSY;
1062 }
1063 /*
1064 if (request_irq(fs->dma_intr, fd_dma_interrupt, 0, "SWIM3-dma", fs)) {
1065 printk(KERN_ERR "Couldn't get irq %d for SWIM3 DMA",
1066 fs->dma_intr);
1067 return -EBUSY;
1068 }
1069 */
1070
1071 init_timer(&fs->timeout);
1072
1073 printk(KERN_INFO "fd%d: SWIM3 floppy controller %s\n", floppy_count,
1074 mediabay ? "in media bay" : "");
1075
1076 return 0;
1077
1078 out_unmap:
1079 iounmap(fs->dma);
1080 iounmap(fs->swim3);
1081
1082 out_release:
1083 macio_release_resource(mdev, 0);
1084 macio_release_resource(mdev, 1);
1085
1086 return rc;
1087 }
1088
1089 static int __devinit swim3_attach(struct macio_dev *mdev, const struct of_device_id *match)
1090 {
1091 int i, rc;
1092 struct gendisk *disk;
1093
1094 /* Add the drive */
1095 rc = swim3_add_device(mdev, floppy_count);
1096 if (rc)
1097 return rc;
1098
1099 /* Now create the queue if not there yet */
1100 if (swim3_queue == NULL) {
1101 /* If we failed, there isn't much we can do as the driver is still
1102 * too dumb to remove the device, just bail out
1103 */
1104 if (register_blkdev(FLOPPY_MAJOR, "fd"))
1105 return 0;
1106 swim3_queue = blk_init_queue(do_fd_request, &swim3_lock);
1107 if (swim3_queue == NULL) {
1108 unregister_blkdev(FLOPPY_MAJOR, "fd");
1109 return 0;
1110 }
1111 }
1112
1113 /* Now register that disk. Same comment about failure handling */
1114 i = floppy_count++;
1115 disk = disks[i] = alloc_disk(1);
1116 if (disk == NULL)
1117 return 0;
1118
1119 disk->major = FLOPPY_MAJOR;
1120 disk->first_minor = i;
1121 disk->fops = &floppy_fops;
1122 disk->private_data = &floppy_states[i];
1123 disk->queue = swim3_queue;
1124 disk->flags |= GENHD_FL_REMOVABLE;
1125 sprintf(disk->disk_name, "fd%d", i);
1126 set_capacity(disk, 2880);
1127 add_disk(disk);
1128
1129 return 0;
1130 }
1131
1132 static struct of_device_id swim3_match[] =
1133 {
1134 {
1135 .name = "swim3",
1136 },
1137 {
1138 .compatible = "ohare-swim3"
1139 },
1140 {
1141 .compatible = "swim3"
1142 },
1143 };
1144
1145 static struct macio_driver swim3_driver =
1146 {
1147 .name = "swim3",
1148 .match_table = swim3_match,
1149 .probe = swim3_attach,
1150 #if 0
1151 .suspend = swim3_suspend,
1152 .resume = swim3_resume,
1153 #endif
1154 };
1155
1156
1157 int swim3_init(void)
1158 {
1159 macio_register_driver(&swim3_driver);
1160 return 0;
1161 }
1162
1163 module_init(swim3_init)
1164
1165 MODULE_LICENSE("GPL");
1166 MODULE_AUTHOR("Paul Mackerras");
1167 MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR);
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