drivers/char/agp/via-agp.c

   1 /*
   2  * VIA AGPGART routines.
   3  */
   4
   5 #include <linux/types.h>
   6 #include <linux/module.h>
   7 #include <linux/pci.h>
   8 #include <linux/init.h>
   9 #include <linux/agp_backend.h>
  10 #include "agp.h"
  11
  12 static struct pci_device_id agp_via_pci_table[];
  13
  14 #define VIA_GARTCTRL    0x80
  15 #define VIA_APSIZE      0x84
  16 #define VIA_ATTBASE     0x88
  17
  18 #define VIA_AGP3_GARTCTRL       0x90
  19 #define VIA_AGP3_APSIZE         0x94
  20 #define VIA_AGP3_ATTBASE        0x98
  21 #define VIA_AGPSEL              0xfd
  22
  23 static int via_fetch_size(void)
  24 {
  25         int i;
  26         u8 temp;
  27         struct aper_size_info_8 *values;
  28
  29         values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
  30         pci_read_config_byte(agp_bridge->dev, VIA_APSIZE, &temp);
  31         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
  32                 if (temp == values[i].size_value) {
  33                         agp_bridge->previous_size =
  34                             agp_bridge->current_size = (void *) (values + i);
  35                         agp_bridge->aperture_size_idx = i;
  36                         return values[i].size;
  37                 }
  38         }
  39         printk(KERN_ERR PFX "Unknown aperture size from AGP bridge (0x%x)\n", temp);
  40         return 0;
  41 }
  42
  43
  44 static int via_configure(void)
  45 {
  46         u32 temp;
  47         struct aper_size_info_8 *current_size;
  48
  49         current_size = A_SIZE_8(agp_bridge->current_size);
  50         /* aperture size */
  51         pci_write_config_byte(agp_bridge->dev, VIA_APSIZE,
  52                               current_size->size_value);
  53         /* address to map too */
  54         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
  55         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
  56
  57         /* GART control register */
  58         pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, 0x0000000f);
  59
  60         /* attbase - aperture GATT base */
  61         pci_write_config_dword(agp_bridge->dev, VIA_ATTBASE,
  62                             (agp_bridge->gatt_bus_addr & 0xfffff000) | 3);
  63         return 0;
  64 }
  65
  66
  67 static void via_cleanup(void)
  68 {
  69         struct aper_size_info_8 *previous_size;
  70
  71         previous_size = A_SIZE_8(agp_bridge->previous_size);
  72         pci_write_config_byte(agp_bridge->dev, VIA_APSIZE,
  73                               previous_size->size_value);
  74         /* Do not disable by writing 0 to VIA_ATTBASE, it screws things up
  75          * during reinitialization.
  76          */
  77 }
  78
  79
  80 static void via_tlbflush(struct agp_memory *mem)
  81 {
  82         u32 temp;
  83
  84         pci_read_config_dword(agp_bridge->dev, VIA_GARTCTRL, &temp);
  85         temp |= (1<<7);
  86         pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, temp);
  87         temp &= ~(1<<7);
  88         pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, temp);
  89 }
  90
  91
  92 static struct aper_size_info_8 via_generic_sizes[9] =
  93 {
  94         {256, 65536, 6, 0},
  95         {128, 32768, 5, 128},
  96         {64, 16384, 4, 192},
  97         {32, 8192, 3, 224},
  98         {16, 4096, 2, 240},
  99         {8, 2048, 1, 248},
 100         {4, 1024, 0, 252},
 101         {2, 512, 0, 254},
 102         {1, 256, 0, 255}
 103 };
 104
 105
 106 static int via_fetch_size_agp3(void)
 107 {
 108         int i;
 109         u16 temp;
 110         struct aper_size_info_16 *values;
 111
 112         values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
 113         pci_read_config_word(agp_bridge->dev, VIA_AGP3_APSIZE, &temp);
 114         temp &= 0xfff;
 115
 116         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
 117                 if (temp == values[i].size_value) {
 118                         agp_bridge->previous_size =
 119                                 agp_bridge->current_size = (void *) (values + i);
 120                         agp_bridge->aperture_size_idx = i;
 121                         return values[i].size;
 122                 }
 123         }
 124         return 0;
 125 }
 126
 127
 128 static int via_configure_agp3(void)
 129 {
 130         u32 temp;
 131         struct aper_size_info_16 *current_size;
 132
 133         current_size = A_SIZE_16(agp_bridge->current_size);
 134
 135         /* address to map too */
 136         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
 137         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
 138
 139         /* attbase - aperture GATT base */
 140         pci_write_config_dword(agp_bridge->dev, VIA_AGP3_ATTBASE,
 141                 agp_bridge->gatt_bus_addr & 0xfffff000);
 142
 143         /* 1. Enable GTLB in RX90<7>, all AGP aperture access needs to fetch
 144          *    translation table first.
 145          * 2. Enable AGP aperture in RX91<0>. This bit controls the enabling of the
 146          *    graphics AGP aperture for the AGP3.0 port.
 147          */
 148         pci_read_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, &temp);
 149         pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp | (3<<7));
 150         return 0;
 151 }
 152
 153
 154 static void via_cleanup_agp3(void)
 155 {
 156         struct aper_size_info_16 *previous_size;
 157
 158         previous_size = A_SIZE_16(agp_bridge->previous_size);
 159         pci_write_config_byte(agp_bridge->dev, VIA_APSIZE, previous_size->size_value);
 160 }
 161
 162
 163 static void via_tlbflush_agp3(struct agp_memory *mem)
 164 {
 165         u32 temp;
 166
 167         pci_read_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, &temp);
 168         pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp & ~(1<<7));
 169         pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp);
 170 }
 171
 172
 173 struct agp_bridge_driver via_agp3_driver = {
 174         .owner                  = THIS_MODULE,
 175         .aperture_sizes         = agp3_generic_sizes,
 176         .size_type              = U8_APER_SIZE,
 177         .num_aperture_sizes     = 10,
 178         .configure              = via_configure_agp3,
 179         .fetch_size             = via_fetch_size_agp3,
 180         .cleanup                = via_cleanup_agp3,
 181         .tlb_flush              = via_tlbflush_agp3,
 182         .mask_memory            = agp_generic_mask_memory,
 183         .masks                  = NULL,
 184         .agp_enable             = agp_generic_enable,
 185         .cache_flush            = global_cache_flush,
 186         .create_gatt_table      = agp_generic_create_gatt_table,
 187         .free_gatt_table        = agp_generic_free_gatt_table,
 188         .insert_memory          = agp_generic_insert_memory,
 189         .remove_memory          = agp_generic_remove_memory,
 190         .alloc_by_type          = agp_generic_alloc_by_type,
 191         .free_by_type           = agp_generic_free_by_type,
 192         .agp_alloc_page         = agp_generic_alloc_page,
 193         .agp_destroy_page       = agp_generic_destroy_page,
 194 };
 195
 196 struct agp_bridge_driver via_driver = {
 197         .owner                  = THIS_MODULE,
 198         .aperture_sizes         = via_generic_sizes,
 199         .size_type              = U8_APER_SIZE,
 200         .num_aperture_sizes     = 9,
 201         .configure              = via_configure,
 202         .fetch_size             = via_fetch_size,
 203         .cleanup                = via_cleanup,
 204         .tlb_flush              = via_tlbflush,
 205         .mask_memory            = agp_generic_mask_memory,
 206         .masks                  = NULL,
 207         .agp_enable             = agp_generic_enable,
 208         .cache_flush            = global_cache_flush,
 209         .create_gatt_table      = agp_generic_create_gatt_table,
 210         .free_gatt_table        = agp_generic_free_gatt_table,
 211         .insert_memory          = agp_generic_insert_memory,
 212         .remove_memory          = agp_generic_remove_memory,
 213         .alloc_by_type          = agp_generic_alloc_by_type,
 214         .free_by_type           = agp_generic_free_by_type,
 215         .agp_alloc_page         = agp_generic_alloc_page,
 216         .agp_destroy_page       = agp_generic_destroy_page,
 217 };
 218
 219 static struct agp_device_ids via_agp_device_ids[] __devinitdata =
 220 {
 221         {
 222                 .device_id      = PCI_DEVICE_ID_VIA_82C597_0,
 223                 .chipset_name   = "Apollo VP3",
 224         },
 225
 226         {
 227                 .device_id      = PCI_DEVICE_ID_VIA_82C598_0,
 228                 .chipset_name   = "Apollo MVP3",
 229         },
 230
 231         {
 232                 .device_id      = PCI_DEVICE_ID_VIA_8501_0,
 233                 .chipset_name   = "Apollo MVP4",
 234         },
 235
 236         /* VT8601 */
 237         {
 238                 .device_id      = PCI_DEVICE_ID_VIA_8601_0,
 239                 .chipset_name   = "Apollo ProMedia/PLE133Ta",
 240         },
 241
 242         /* VT82C693A / VT28C694T */
 243         {
 244                 .device_id      = PCI_DEVICE_ID_VIA_82C691_0,
 245                 .chipset_name   = "Apollo Pro 133",
 246         },
 247
 248         {
 249                 .device_id      = PCI_DEVICE_ID_VIA_8371_0,
 250                 .chipset_name   = "KX133",
 251         },
 252
 253         /* VT8633 */
 254         {
 255                 .device_id      = PCI_DEVICE_ID_VIA_8633_0,
 256                 .chipset_name   = "Pro 266",
 257         },
 258
 259         {
 260                 .device_id      = PCI_DEVICE_ID_VIA_XN266,
 261                 .chipset_name   = "Apollo Pro266",
 262         },
 263
 264         /* VT8361 */
 265         {
 266                 .device_id      = PCI_DEVICE_ID_VIA_8361,
 267                 .chipset_name   = "KLE133",
 268         },
 269
 270         /* VT8365 / VT8362 */
 271         {
 272                 .device_id      = PCI_DEVICE_ID_VIA_8363_0,
 273                 .chipset_name   = "Twister-K/KT133x/KM133",
 274         },
 275
 276         /* VT8753A */
 277         {
 278                 .device_id      = PCI_DEVICE_ID_VIA_8753_0,
 279                 .chipset_name   = "P4X266",
 280         },
 281
 282         /* VT8366 */
 283         {
 284                 .device_id      = PCI_DEVICE_ID_VIA_8367_0,
 285                 .chipset_name   = "KT266/KY266x/KT333",
 286         },
 287
 288         /* VT8633 (for CuMine/ Celeron) */
 289         {
 290                 .device_id      = PCI_DEVICE_ID_VIA_8653_0,
 291                 .chipset_name   = "Pro266T",
 292         },
 293
 294         /* KM266 / PM266 */
 295         {
 296                 .device_id      = PCI_DEVICE_ID_VIA_XM266,
 297                 .chipset_name   = "PM266/KM266",
 298         },
 299
 300         /* CLE266 */
 301         {
 302                 .device_id      = PCI_DEVICE_ID_VIA_862X_0,
 303                 .chipset_name   = "CLE266",
 304         },
 305
 306         {
 307                 .device_id      = PCI_DEVICE_ID_VIA_8377_0,
 308                 .chipset_name   = "KT400/KT400A/KT600",
 309         },
 310
 311         /* VT8604 / VT8605 / VT8603
 312          * (Apollo Pro133A chipset with S3 Savage4) */
 313         {
 314                 .device_id      = PCI_DEVICE_ID_VIA_8605_0,
 315                 .chipset_name   = "ProSavage PM133/PL133/PN133"
 316         },
 317
 318         /* P4M266x/P4N266 */
 319         {
 320                 .device_id      = PCI_DEVICE_ID_VIA_8703_51_0,
 321                 .chipset_name   = "P4M266x/P4N266",
 322         },
 323
 324         /* VT8754 */
 325         {
 326                 .device_id      = PCI_DEVICE_ID_VIA_8754C_0,
 327                 .chipset_name   = "PT800",
 328         },
 329
 330         /* P4X600 */
 331         {
 332                 .device_id      = PCI_DEVICE_ID_VIA_8763_0,
 333                 .chipset_name   = "P4X600"
 334         },
 335
 336         /* KM400 */
 337         {
 338                 .device_id      = PCI_DEVICE_ID_VIA_8378_0,
 339                 .chipset_name   = "KM400/KM400A",
 340         },
 341
 342         /* PT880 */
 343         {
 344                 .device_id      = PCI_DEVICE_ID_VIA_PT880,
 345                 .chipset_name   = "PT880",
 346         },
 347
 348         /* PT890 */
 349         {
 350                 .device_id      = PCI_DEVICE_ID_VIA_8783_0,
 351                 .chipset_name   = "PT890",
 352         },
 353
 354         /* PM800/PN800/PM880/PN880 */
 355         {
 356                 .device_id      = PCI_DEVICE_ID_VIA_PX8X0_0,
 357                 .chipset_name   = "PM800/PN800/PM880/PN880",
 358         },
 359         /* KT880 */
 360         {
 361                 .device_id      = PCI_DEVICE_ID_VIA_3269_0,
 362                 .chipset_name   = "KT880",
 363         },
 364         /* KTxxx/Px8xx */
 365         {
 366                 .device_id      = PCI_DEVICE_ID_VIA_83_87XX_1,
 367                 .chipset_name   = "VT83xx/VT87xx/KTxxx/Px8xx",
 368         },
 369         /* P4M800 */
 370         {
 371                 .device_id      = PCI_DEVICE_ID_VIA_3296_0,
 372                 .chipset_name   = "P4M800",
 373         },
 374
 375         { }, /* dummy final entry, always present */
 376 };
 377
 378
 379 /*
 380  * VIA's AGP3 chipsets do magick to put the AGP bridge compliant
 381  * with the same standards version as the graphics card.
 382  */
 383 static void check_via_agp3 (struct agp_bridge_data *bridge)
 384 {
 385         u8 reg;
 386
 387         pci_read_config_byte(bridge->dev, VIA_AGPSEL, &reg);
 388         /* Check AGP 2.0 compatibility mode. */
 389         if ((reg & (1<<1))==0)
 390                 bridge->driver = &via_agp3_driver;
 391 }
 392
 393
 394 static int __devinit agp_via_probe(struct pci_dev *pdev,
 395                                    const struct pci_device_id *ent)
 396 {
 397         struct agp_device_ids *devs = via_agp_device_ids;
 398         struct agp_bridge_data *bridge;
 399         int j = 0;
 400         u8 cap_ptr;
 401
 402         cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
 403         if (!cap_ptr)
 404                 return -ENODEV;
 405
 406         j = ent - agp_via_pci_table;
 407         printk (KERN_INFO PFX "Detected VIA %s chipset\n", devs[j].chipset_name);
 408
 409         bridge = agp_alloc_bridge();
 410         if (!bridge)
 411                 return -ENOMEM;
 412
 413         bridge->dev = pdev;
 414         bridge->capndx = cap_ptr;
 415         bridge->driver = &via_driver;
 416
 417         /*
 418          * Garg, there are KT400s with KT266 IDs.
 419          */
 420         if (pdev->device == PCI_DEVICE_ID_VIA_8367_0) {
 421                 /* Is there a KT400 subsystem ? */
 422                 if (pdev->subsystem_device == PCI_DEVICE_ID_VIA_8377_0) {
 423                         printk(KERN_INFO PFX "Found KT400 in disguise as a KT266.\n");
 424                         check_via_agp3(bridge);
 425                 }
 426         }
 427
 428         /* If this is an AGP3 bridge, check which mode its in and adjust. */
 429         get_agp_version(bridge);
 430         if (bridge->major_version >= 3)
 431                 check_via_agp3(bridge);
 432
 433         /* Fill in the mode register */
 434         pci_read_config_dword(pdev,
 435                         bridge->capndx+PCI_AGP_STATUS, &bridge->mode);
 436
 437         pci_set_drvdata(pdev, bridge);
 438         return agp_add_bridge(bridge);
 439 }
 440
 441 static void __devexit agp_via_remove(struct pci_dev *pdev)
 442 {
 443         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
 444
 445         agp_remove_bridge(bridge);
 446         agp_put_bridge(bridge);
 447 }
 448
 449 #ifdef CONFIG_PM
 450
 451 static int agp_via_suspend(struct pci_dev *pdev, pm_message_t state)
 452 {
 453         pci_save_state (pdev);
 454         pci_set_power_state (pdev, PCI_D3hot);
 455
 456         return 0;
 457 }
 458
 459 static int agp_via_resume(struct pci_dev *pdev)
 460 {
 461         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
 462
 463         pci_set_power_state (pdev, PCI_D0);
 464         pci_restore_state(pdev);
 465
 466         if (bridge->driver == &via_agp3_driver)
 467                 return via_configure_agp3();
 468         else if (bridge->driver == &via_driver)
 469                 return via_configure();
 470
 471         return 0;
 472 }
 473
 474 #endif /* CONFIG_PM */
 475
 476 /* must be the same order as name table above */
 477 static struct pci_device_id agp_via_pci_table[] = {
 478 #define ID(x) \
 479         {                                               \
 480         .class          = (PCI_CLASS_BRIDGE_HOST << 8), \
 481         .class_mask     = ~0,                           \
 482         .vendor         = PCI_VENDOR_ID_VIA,            \
 483         .device         = x,                            \
 484         .subvendor      = PCI_ANY_ID,                   \
 485         .subdevice      = PCI_ANY_ID,                   \
 486         }
 487         ID(PCI_DEVICE_ID_VIA_82C597_0),
 488         ID(PCI_DEVICE_ID_VIA_82C598_0),
 489         ID(PCI_DEVICE_ID_VIA_8501_0),
 490         ID(PCI_DEVICE_ID_VIA_8601_0),
 491         ID(PCI_DEVICE_ID_VIA_82C691_0),
 492         ID(PCI_DEVICE_ID_VIA_8371_0),
 493         ID(PCI_DEVICE_ID_VIA_8633_0),
 494         ID(PCI_DEVICE_ID_VIA_XN266),
 495         ID(PCI_DEVICE_ID_VIA_8361),
 496         ID(PCI_DEVICE_ID_VIA_8363_0),
 497         ID(PCI_DEVICE_ID_VIA_8753_0),
 498         ID(PCI_DEVICE_ID_VIA_8367_0),
 499         ID(PCI_DEVICE_ID_VIA_8653_0),
 500         ID(PCI_DEVICE_ID_VIA_XM266),
 501         ID(PCI_DEVICE_ID_VIA_862X_0),
 502         ID(PCI_DEVICE_ID_VIA_8377_0),
 503         ID(PCI_DEVICE_ID_VIA_8605_0),
 504         ID(PCI_DEVICE_ID_VIA_8703_51_0),
 505         ID(PCI_DEVICE_ID_VIA_8754C_0),
 506         ID(PCI_DEVICE_ID_VIA_8763_0),
 507         ID(PCI_DEVICE_ID_VIA_8378_0),
 508         ID(PCI_DEVICE_ID_VIA_PT880),
 509         ID(PCI_DEVICE_ID_VIA_8783_0),
 510         ID(PCI_DEVICE_ID_VIA_PX8X0_0),
 511         ID(PCI_DEVICE_ID_VIA_3269_0),
 512         ID(PCI_DEVICE_ID_VIA_83_87XX_1),
 513         ID(PCI_DEVICE_ID_VIA_3296_0),
 514         { }
 515 };
 516
 517 MODULE_DEVICE_TABLE(pci, agp_via_pci_table);
 518
 519
 520 static struct pci_driver agp_via_pci_driver = {
 521         .name           = "agpgart-via",
 522         .id_table       = agp_via_pci_table,
 523         .probe          = agp_via_probe,
 524         .remove         = agp_via_remove,
 525 #ifdef CONFIG_PM
 526         .suspend        = agp_via_suspend,
 527         .resume         = agp_via_resume,
 528 #endif
 529 };
 530
 531
 532 static int __init agp_via_init(void)
 533 {
 534         if (agp_off)
 535                 return -EINVAL;
 536         return pci_register_driver(&agp_via_pci_driver);
 537 }
 538
 539 static void __exit agp_via_cleanup(void)
 540 {
 541         pci_unregister_driver(&agp_via_pci_driver);
 542 }
 543
 544 module_init(agp_via_init);
 545 module_exit(agp_via_cleanup);
 546
 547 MODULE_LICENSE("GPL");
 548 MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");