Merge branch 'core-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / drivers / char / xillybus / xillybus_pcie.c
1 /*
2 * linux/drivers/misc/xillybus_pcie.c
3 *
4 * Copyright 2011 Xillybus Ltd, http://xillybus.com
5 *
6 * Driver for the Xillybus FPGA/host framework using PCI Express.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the smems of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 */
12
13 #include <linux/module.h>
14 #include <linux/pci.h>
15 #include <linux/pci-aspm.h>
16 #include <linux/slab.h>
17 #include "xillybus.h"
18
19 MODULE_DESCRIPTION("Xillybus driver for PCIe");
20 MODULE_AUTHOR("Eli Billauer, Xillybus Ltd.");
21 MODULE_VERSION("1.06");
22 MODULE_ALIAS("xillybus_pcie");
23 MODULE_LICENSE("GPL v2");
24
25 #define PCI_DEVICE_ID_XILLYBUS 0xebeb
26
27 #define PCI_VENDOR_ID_ALTERA 0x1172
28 #define PCI_VENDOR_ID_ACTEL 0x11aa
29 #define PCI_VENDOR_ID_LATTICE 0x1204
30
31 static const char xillyname[] = "xillybus_pcie";
32
33 static const struct pci_device_id xillyids[] = {
34 {PCI_DEVICE(PCI_VENDOR_ID_XILINX, PCI_DEVICE_ID_XILLYBUS)},
35 {PCI_DEVICE(PCI_VENDOR_ID_ALTERA, PCI_DEVICE_ID_XILLYBUS)},
36 {PCI_DEVICE(PCI_VENDOR_ID_ACTEL, PCI_DEVICE_ID_XILLYBUS)},
37 {PCI_DEVICE(PCI_VENDOR_ID_LATTICE, PCI_DEVICE_ID_XILLYBUS)},
38 { /* End: all zeroes */ }
39 };
40
41 static int xilly_pci_direction(int direction)
42 {
43 switch (direction) {
44 case DMA_TO_DEVICE:
45 return PCI_DMA_TODEVICE;
46 case DMA_FROM_DEVICE:
47 return PCI_DMA_FROMDEVICE;
48 default:
49 return PCI_DMA_BIDIRECTIONAL;
50 }
51 }
52
53 static void xilly_dma_sync_single_for_cpu_pci(struct xilly_endpoint *ep,
54 dma_addr_t dma_handle,
55 size_t size,
56 int direction)
57 {
58 pci_dma_sync_single_for_cpu(ep->pdev,
59 dma_handle,
60 size,
61 xilly_pci_direction(direction));
62 }
63
64 static void xilly_dma_sync_single_for_device_pci(struct xilly_endpoint *ep,
65 dma_addr_t dma_handle,
66 size_t size,
67 int direction)
68 {
69 pci_dma_sync_single_for_device(ep->pdev,
70 dma_handle,
71 size,
72 xilly_pci_direction(direction));
73 }
74
75 static void xilly_pci_unmap(void *ptr)
76 {
77 struct xilly_mapping *data = ptr;
78
79 pci_unmap_single(data->device, data->dma_addr,
80 data->size, data->direction);
81
82 kfree(ptr);
83 }
84
85 /*
86 * Map either through the PCI DMA mapper or the non_PCI one. Behind the
87 * scenes exactly the same functions are called with the same parameters,
88 * but that can change.
89 */
90
91 static int xilly_map_single_pci(struct xilly_endpoint *ep,
92 void *ptr,
93 size_t size,
94 int direction,
95 dma_addr_t *ret_dma_handle
96 )
97 {
98 int pci_direction;
99 dma_addr_t addr;
100 struct xilly_mapping *this;
101
102 this = kzalloc(sizeof(*this), GFP_KERNEL);
103 if (!this)
104 return -ENOMEM;
105
106 pci_direction = xilly_pci_direction(direction);
107
108 addr = pci_map_single(ep->pdev, ptr, size, pci_direction);
109
110 if (pci_dma_mapping_error(ep->pdev, addr)) {
111 kfree(this);
112 return -ENODEV;
113 }
114
115 this->device = ep->pdev;
116 this->dma_addr = addr;
117 this->size = size;
118 this->direction = pci_direction;
119
120 *ret_dma_handle = addr;
121
122 return devm_add_action_or_reset(ep->dev, xilly_pci_unmap, this);
123 }
124
125 static struct xilly_endpoint_hardware pci_hw = {
126 .owner = THIS_MODULE,
127 .hw_sync_sgl_for_cpu = xilly_dma_sync_single_for_cpu_pci,
128 .hw_sync_sgl_for_device = xilly_dma_sync_single_for_device_pci,
129 .map_single = xilly_map_single_pci,
130 };
131
132 static int xilly_probe(struct pci_dev *pdev,
133 const struct pci_device_id *ent)
134 {
135 struct xilly_endpoint *endpoint;
136 int rc;
137
138 endpoint = xillybus_init_endpoint(pdev, &pdev->dev, &pci_hw);
139
140 if (!endpoint)
141 return -ENOMEM;
142
143 pci_set_drvdata(pdev, endpoint);
144
145 rc = pcim_enable_device(pdev);
146 if (rc) {
147 dev_err(endpoint->dev,
148 "pcim_enable_device() failed. Aborting.\n");
149 return rc;
150 }
151
152 /* L0s has caused packet drops. No power saving, thank you. */
153
154 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
155
156 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
157 dev_err(endpoint->dev,
158 "Incorrect BAR configuration. Aborting.\n");
159 return -ENODEV;
160 }
161
162 rc = pcim_iomap_regions(pdev, 0x01, xillyname);
163 if (rc) {
164 dev_err(endpoint->dev,
165 "pcim_iomap_regions() failed. Aborting.\n");
166 return rc;
167 }
168
169 endpoint->registers = pcim_iomap_table(pdev)[0];
170
171 pci_set_master(pdev);
172
173 /* Set up a single MSI interrupt */
174 if (pci_enable_msi(pdev)) {
175 dev_err(endpoint->dev,
176 "Failed to enable MSI interrupts. Aborting.\n");
177 return -ENODEV;
178 }
179 rc = devm_request_irq(&pdev->dev, pdev->irq, xillybus_isr, 0,
180 xillyname, endpoint);
181 if (rc) {
182 dev_err(endpoint->dev,
183 "Failed to register MSI handler. Aborting.\n");
184 return -ENODEV;
185 }
186
187 /*
188 * Some (old and buggy?) hardware drops 64-bit addressed PCIe packets,
189 * even when the PCIe driver claims that a 64-bit mask is OK. On the
190 * other hand, on some architectures, 64-bit addressing is mandatory.
191 * So go for the 64-bit mask only when failing is the other option.
192 */
193
194 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
195 endpoint->dma_using_dac = 0;
196 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
197 endpoint->dma_using_dac = 1;
198 } else {
199 dev_err(endpoint->dev, "Failed to set DMA mask. Aborting.\n");
200 return -ENODEV;
201 }
202
203 return xillybus_endpoint_discovery(endpoint);
204 }
205
206 static void xilly_remove(struct pci_dev *pdev)
207 {
208 struct xilly_endpoint *endpoint = pci_get_drvdata(pdev);
209
210 xillybus_endpoint_remove(endpoint);
211 }
212
213 MODULE_DEVICE_TABLE(pci, xillyids);
214
215 static struct pci_driver xillybus_driver = {
216 .name = xillyname,
217 .id_table = xillyids,
218 .probe = xilly_probe,
219 .remove = xilly_remove,
220 };
221
222 module_pci_driver(xillybus_driver);
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