2 * Hisilicon clock driver
4 * Copyright (c) 2012-2013 Hisilicon Limited.
5 * Copyright (c) 2012-2013 Linaro Limited.
7 * Author: Haojian Zhuang <haojian.zhuang@linaro.org>
8 * Xin Li <li.xin@linaro.org>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
26 #include <linux/kernel.h>
27 #include <linux/clkdev.h>
28 #include <linux/clk-provider.h>
29 #include <linux/delay.h>
32 #include <linux/of_address.h>
33 #include <linux/of_device.h>
34 #include <linux/slab.h>
38 static DEFINE_SPINLOCK(hisi_clk_lock
);
40 struct hisi_clock_data
*hisi_clk_init(struct device_node
*np
,
43 struct hisi_clock_data
*clk_data
;
44 struct clk
**clk_table
;
47 base
= of_iomap(np
, 0);
49 pr_err("%s: failed to map clock registers\n", __func__
);
53 clk_data
= kzalloc(sizeof(*clk_data
), GFP_KERNEL
);
55 pr_err("%s: could not allocate clock data\n", __func__
);
58 clk_data
->base
= base
;
60 clk_table
= kzalloc(sizeof(struct clk
*) * nr_clks
, GFP_KERNEL
);
62 pr_err("%s: could not allocate clock lookup table\n", __func__
);
65 clk_data
->clk_data
.clks
= clk_table
;
66 clk_data
->clk_data
.clk_num
= nr_clks
;
67 of_clk_add_provider(np
, of_clk_src_onecell_get
, &clk_data
->clk_data
);
74 EXPORT_SYMBOL_GPL(hisi_clk_init
);
76 void hisi_clk_register_fixed_rate(const struct hisi_fixed_rate_clock
*clks
,
77 int nums
, struct hisi_clock_data
*data
)
82 for (i
= 0; i
< nums
; i
++) {
83 clk
= clk_register_fixed_rate(NULL
, clks
[i
].name
,
88 pr_err("%s: failed to register clock %s\n",
89 __func__
, clks
[i
].name
);
92 data
->clk_data
.clks
[clks
[i
].id
] = clk
;
95 EXPORT_SYMBOL_GPL(hisi_clk_register_fixed_rate
);
97 void hisi_clk_register_fixed_factor(const struct hisi_fixed_factor_clock
*clks
,
99 struct hisi_clock_data
*data
)
104 for (i
= 0; i
< nums
; i
++) {
105 clk
= clk_register_fixed_factor(NULL
, clks
[i
].name
,
107 clks
[i
].flags
, clks
[i
].mult
,
110 pr_err("%s: failed to register clock %s\n",
111 __func__
, clks
[i
].name
);
114 data
->clk_data
.clks
[clks
[i
].id
] = clk
;
117 EXPORT_SYMBOL_GPL(hisi_clk_register_fixed_factor
);
119 void hisi_clk_register_mux(const struct hisi_mux_clock
*clks
,
120 int nums
, struct hisi_clock_data
*data
)
123 void __iomem
*base
= data
->base
;
126 for (i
= 0; i
< nums
; i
++) {
127 u32 mask
= BIT(clks
[i
].width
) - 1;
129 clk
= clk_register_mux_table(NULL
, clks
[i
].name
,
130 clks
[i
].parent_names
,
131 clks
[i
].num_parents
, clks
[i
].flags
,
132 base
+ clks
[i
].offset
, clks
[i
].shift
,
133 mask
, clks
[i
].mux_flags
,
134 clks
[i
].table
, &hisi_clk_lock
);
136 pr_err("%s: failed to register clock %s\n",
137 __func__
, clks
[i
].name
);
142 clk_register_clkdev(clk
, clks
[i
].alias
, NULL
);
144 data
->clk_data
.clks
[clks
[i
].id
] = clk
;
147 EXPORT_SYMBOL_GPL(hisi_clk_register_mux
);
149 void hisi_clk_register_divider(const struct hisi_divider_clock
*clks
,
150 int nums
, struct hisi_clock_data
*data
)
153 void __iomem
*base
= data
->base
;
156 for (i
= 0; i
< nums
; i
++) {
157 clk
= clk_register_divider_table(NULL
, clks
[i
].name
,
160 base
+ clks
[i
].offset
,
161 clks
[i
].shift
, clks
[i
].width
,
166 pr_err("%s: failed to register clock %s\n",
167 __func__
, clks
[i
].name
);
172 clk_register_clkdev(clk
, clks
[i
].alias
, NULL
);
174 data
->clk_data
.clks
[clks
[i
].id
] = clk
;
177 EXPORT_SYMBOL_GPL(hisi_clk_register_divider
);
179 void hisi_clk_register_gate(const struct hisi_gate_clock
*clks
,
180 int nums
, struct hisi_clock_data
*data
)
183 void __iomem
*base
= data
->base
;
186 for (i
= 0; i
< nums
; i
++) {
187 clk
= clk_register_gate(NULL
, clks
[i
].name
,
190 base
+ clks
[i
].offset
,
195 pr_err("%s: failed to register clock %s\n",
196 __func__
, clks
[i
].name
);
201 clk_register_clkdev(clk
, clks
[i
].alias
, NULL
);
203 data
->clk_data
.clks
[clks
[i
].id
] = clk
;
206 EXPORT_SYMBOL_GPL(hisi_clk_register_gate
);
208 void hisi_clk_register_gate_sep(const struct hisi_gate_clock
*clks
,
209 int nums
, struct hisi_clock_data
*data
)
212 void __iomem
*base
= data
->base
;
215 for (i
= 0; i
< nums
; i
++) {
216 clk
= hisi_register_clkgate_sep(NULL
, clks
[i
].name
,
219 base
+ clks
[i
].offset
,
224 pr_err("%s: failed to register clock %s\n",
225 __func__
, clks
[i
].name
);
230 clk_register_clkdev(clk
, clks
[i
].alias
, NULL
);
232 data
->clk_data
.clks
[clks
[i
].id
] = clk
;
235 EXPORT_SYMBOL_GPL(hisi_clk_register_gate_sep
);
237 void __init
hi6220_clk_register_divider(const struct hi6220_divider_clock
*clks
,
238 int nums
, struct hisi_clock_data
*data
)
241 void __iomem
*base
= data
->base
;
244 for (i
= 0; i
< nums
; i
++) {
245 clk
= hi6220_register_clkdiv(NULL
, clks
[i
].name
,
248 base
+ clks
[i
].offset
,
254 pr_err("%s: failed to register clock %s\n",
255 __func__
, clks
[i
].name
);
260 clk_register_clkdev(clk
, clks
[i
].alias
, NULL
);
262 data
->clk_data
.clks
[clks
[i
].id
] = clk
;