2 # DMA engine configuration
6 bool "DMA Engine support"
9 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
12 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
16 config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
23 config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
36 config INTEL_MIC_X100_DMA
37 tristate "Intel MIC X100 DMA Driver"
38 depends on 64BIT && X86 && INTEL_MIC_BUS
41 This enables DMA support for the Intel Many Integrated Core
42 (MIC) family of PCIe form factor coprocessor X100 devices that
43 run a 64 bit Linux OS. This driver will be used by both MIC
44 host and card drivers.
46 If you are building host kernel with a MIC device or a card
47 kernel for a MIC device, then say M (recommended) or Y, else
48 say N. If unsure say N.
50 More information about the Intel MIC family as well as the Linux
51 OS and tools for MIC to use with this driver are available from
52 <http://software.intel.com/en-us/mic-developer>.
54 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
58 bool "ARM PrimeCell PL080 or PL081 support"
61 select DMA_VIRTUAL_CHANNELS
63 Platform has a PL08x DMAC device
64 which can provide DMA engine support
67 bool "NXP LPC18xx/43xx DMA MUX for PL080"
68 depends on ARCH_LPC18XX || COMPILE_TEST
69 depends on OF && AMBA_PL08X
72 Enable support for DMA on NXP LPC18xx/43xx platforms
73 with PL080 and multiplexed DMA request lines.
76 tristate "Intel I/OAT DMA support"
77 depends on PCI && X86_64
79 select DMA_ENGINE_RAID
82 Enable support for the Intel(R) I/OAT DMA engine present
83 in recent Intel Xeon chipsets.
85 Say Y here if you have such a chipset.
90 tristate "Intel IOP ADMA support"
91 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
93 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
95 Enable support for the Intel(R) IOP Series RAID engines.
97 source "drivers/dma/dw/Kconfig"
100 tristate "Atmel AHB DMA support"
104 Support the Atmel AHB DMA controller.
107 tristate "Atmel XDMA support"
111 Support the Atmel XDMA controller.
114 tristate "Freescale Elo series DMA support"
117 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
119 Enable support for the Freescale Elo series DMA controllers.
120 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
121 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
122 some Txxx and Bxxx parts.
125 tristate "Freescale RAID engine Support"
126 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
128 select DMA_ENGINE_RAID
130 Enable support for Freescale RAID Engine. RAID Engine is
131 available on some QorIQ SoCs (like P5020/P5040). It has
132 the capability to offload memcpy, xor and pq computation
135 source "drivers/dma/hsu/Kconfig"
138 tristate "Freescale MPC512x built-in DMA engine support"
139 depends on PPC_MPC512x || PPC_MPC831x
142 Enable support for the Freescale MPC512x built-in DMA engine.
144 source "drivers/dma/bestcomm/Kconfig"
147 bool "Marvell XOR engine support"
148 depends on PLAT_ORION
150 select DMA_ENGINE_RAID
151 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
153 Enable support for the Marvell XOR engine.
156 bool "MX3x Image Processing Unit support"
161 If you plan to use the Image Processing unit in the i.MX3x, say
162 Y here. If unsure, select Y.
165 int "Number of dynamically mapped interrupts for IPU"
170 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
171 To avoid bloating the irq_desc[] array we allocate a sufficient
172 number of IRQ slots and map them dynamically to specific sources.
175 bool "PXA DMA support"
176 depends on (ARCH_MMP || ARCH_PXA)
178 select DMA_VIRTUAL_CHANNELS
180 Support the DMA engine for PXA. It is also compatible with MMP PDMA
181 platform. The internal DMA IP of all PXA variants is supported, with
182 16 to 32 channels for peripheral to memory or memory to memory
186 tristate "Toshiba TXx9 SoC DMA support"
187 depends on MACH_TX49XX || MACH_TX39XX
190 Support the TXx9 SoC internal DMA controller. This can be
191 integrated in chips such as the Toshiba TX4927/38/39.
193 config TEGRA20_APB_DMA
194 bool "NVIDIA Tegra20 APB DMA support"
195 depends on ARCH_TEGRA
198 Support for the NVIDIA Tegra20 APB DMA controller driver. The
199 DMA controller is having multiple DMA channel which can be
200 configured for different peripherals like audio, UART, SPI,
201 I2C etc which is in APB bus.
202 This DMA controller transfers data from memory to peripheral fifo
203 or vice versa. It does not support memory to memory data transfer.
206 tristate "Samsung S3C24XX DMA support"
207 depends on ARCH_S3C24XX
209 select DMA_VIRTUAL_CHANNELS
211 Support for the Samsung S3C24XX DMA controller driver. The
212 DMA controller is having multiple DMA channels which can be
213 configured for different peripherals like audio, UART, SPI.
214 The DMA controller can transfer data from memory to peripheral,
215 periphal to memory, periphal to periphal and memory to memory.
217 source "drivers/dma/sh/Kconfig"
220 bool "ST-Ericsson COH901318 DMA support"
224 Enable support for ST-Ericsson COH 901 318 DMA.
227 bool "ST-Ericsson DMA40 support"
228 depends on ARCH_U8500
231 Support for ST-Ericsson DMA40 controller
233 config AMCC_PPC440SPE_ADMA
234 tristate "AMCC PPC440SPe ADMA support"
235 depends on 440SPe || 440SP
237 select DMA_ENGINE_RAID
238 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
239 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
241 Enable support for the AMCC PPC440SPe RAID engines.
244 tristate "Timberdale FPGA DMA support"
245 depends on MFD_TIMBERDALE
248 Enable support for the Timberdale FPGA DMA engine.
251 tristate "CSR SiRFprimaII/SiRFmarco DMA support"
255 Enable support for the CSR SiRFprimaII DMA engine.
258 bool "TI EDMA support"
259 depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE
261 select DMA_VIRTUAL_CHANNELS
265 Enable support for the TI EDMA controller. This DMA
266 engine is found on TI DaVinci and AM33xx parts.
268 config TI_DMA_CROSSBAR
271 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
275 tristate "DMA API Driver for PL330"
279 Select if your platform has one or more PL330 DMACs.
280 You need to provide platform specific settings via
281 platform_data for a dma-pl330 device.
284 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
285 depends on PCI && (X86_32 || COMPILE_TEST)
288 Enable support for Intel EG20T PCH DMA engine.
290 This driver also can be used for LAPIS Semiconductor IOH(Input/
291 Output Hub), ML7213, ML7223 and ML7831.
292 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
293 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
294 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
295 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
298 tristate "i.MX SDMA support"
302 Support the i.MX SDMA engine. This engine is integrated into
303 Freescale i.MX25/31/35/51/53/6 chips.
306 tristate "i.MX DMA support"
310 Support the i.MX DMA engine. This engine is integrated into
311 Freescale i.MX1/21/27 chips.
314 bool "MXS DMA support"
315 depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
319 Support the MXS DMA engine. This engine including APBH-DMA
320 and APBX-DMA is integrated into Freescale i.MX23/28/MX6Q/MX6DL chips.
323 bool "Cirrus Logic EP93xx DMA support"
324 depends on ARCH_EP93XX
327 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
330 tristate "SA-11x0 DMA support"
331 depends on ARCH_SA1100
333 select DMA_VIRTUAL_CHANNELS
335 Support the DMA engine found on Intel StrongARM SA-1100 and
336 SA-1110 SoCs. This DMA engine can only be used with on-chip
340 bool "MMP Two-Channel DMA support"
345 Support the MMP Two-Channel DMA engine.
346 This engine used for MMP Audio DMA and pxa910 SQU.
347 It needs sram driver under mach-mmp.
349 Say Y here if you enabled MMP ADMA, otherwise say N.
352 tristate "OMAP DMA support"
355 select DMA_VIRTUAL_CHANNELS
356 select TI_DMA_CROSSBAR if SOC_DRA7XX
359 tristate "BCM2835 DMA engine support"
360 depends on ARCH_BCM2835
362 select DMA_VIRTUAL_CHANNELS
365 tristate "AM33xx CPPI41 DMA support"
369 The Communications Port Programming Interface (CPPI) 4.1 DMA engine
370 is currently used by the USB driver on AM335x platforms.
373 bool "MMP PDMA support"
374 depends on (ARCH_MMP || ARCH_PXA)
377 Support the MMP PDMA engine for PXA and MMP platform.
380 tristate "JZ4740 DMA support"
381 depends on MACH_JZ4740
383 select DMA_VIRTUAL_CHANNELS
386 tristate "JZ4780 DMA support"
387 depends on MACH_JZ4780
389 select DMA_VIRTUAL_CHANNELS
391 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
392 If you have a board based on such a SoC and wish to use DMA for
393 devices which can use the DMA controller, say Y or M here.
396 tristate "Hisilicon K3 DMA support"
397 depends on ARCH_HI3xxx
399 select DMA_VIRTUAL_CHANNELS
401 Support the DMA engine for Hisilicon K3 platform
405 tristate "MOXART DMA support"
406 depends on ARCH_MOXART
409 select DMA_VIRTUAL_CHANNELS
411 Enable support for the MOXA ART SoC DMA controller.
414 tristate "Freescale eDMA engine support"
417 select DMA_VIRTUAL_CHANNELS
419 Support the Freescale eDMA engine with programmable channel
420 multiplexing capability for DMA request sources(slot).
421 This module can be found on Freescale Vybrid and LS-1 SoCs.
424 tristate "Xilinx AXI VDMA Engine"
425 depends on (ARCH_ZYNQ || MICROBLAZE)
428 Enable support for Xilinx AXI VDMA Soft IP.
430 This engine provides high-bandwidth direct memory access
431 between memory and AXI4-Stream video type target
432 peripherals including peripherals which support AXI4-
433 Stream Video Protocol. It has two stream interfaces/
434 channels, Memory Mapped to Stream (MM2S) and Stream to
435 Memory Mapped (S2MM) for the data transfers.
438 tristate "Allwinner A10 DMA SoCs support"
439 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || COMPILE_TEST
440 default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
443 select DMA_VIRTUAL_CHANNELS
445 Enable support for the DMA controller present in the sun4i,
446 sun5i and sun7i Allwinner ARM SoCs.
449 tristate "Allwinner A31 SoCs DMA support"
450 depends on MACH_SUN6I || MACH_SUN8I || COMPILE_TEST
451 depends on RESET_CONTROLLER
453 select DMA_VIRTUAL_CHANNELS
455 Support for the DMA engine first found in Allwinner A31 SoCs.
458 tristate "Renesas Type-AXI NBPF DMA support"
460 depends on ARM || COMPILE_TEST
462 Support for "Type-AXI" NBPF DMA IPs from Renesas
465 tristate "IMG MDC support"
466 depends on MIPS || COMPILE_TEST
467 depends on MFD_SYSCON
469 select DMA_VIRTUAL_CHANNELS
471 Enable support for the IMG multi-threaded DMA controller (MDC).
474 tristate "APM X-Gene DMA support"
475 depends on ARCH_XGENE || COMPILE_TEST
477 select DMA_ENGINE_RAID
478 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
480 Enable support for the APM X-Gene SoC DMA engine.
485 config DMA_VIRTUAL_CHANNELS
497 comment "DMA Clients"
498 depends on DMA_ENGINE
501 bool "Async_tx: Offload support for the async_tx api"
502 depends on DMA_ENGINE
504 This allows the async_tx api to take advantage of offload engines for
505 memcpy, memset, xor, and raid6 p+q operations. If your platform has
506 a dma engine that can perform raid operations and you have enabled
512 tristate "DMA Test client"
513 depends on DMA_ENGINE
515 Simple DMA test client. Say N unless you're debugging a
518 config DMA_ENGINE_RAID
522 tristate "QCOM BAM DMA support"
523 depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM)
525 select DMA_VIRTUAL_CHANNELS
527 Enable support for the QCOM BAM DMA controller. This controller
528 provides DMA capabilities for a variety of on-chip devices.