Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph...
[deliverable/linux.git] / drivers / dma / Kconfig
1 #
2 # DMA engine configuration
3 #
4
5 menuconfig DMADEVICES
6 bool "DMA Engine support"
7 depends on HAS_DMA
8 help
9 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
12 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
15
16 config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
19 help
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
22
23 config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
26 help
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
30
31
32 if DMADEVICES
33
34 comment "DMA Devices"
35
36 config INTEL_MID_DMAC
37 tristate "Intel MID DMA support for Peripheral DMA controllers"
38 depends on PCI && X86
39 select DMA_ENGINE
40 default n
41 help
42 Enable support for the Intel(R) MID DMA engine present
43 in Intel MID chipsets.
44
45 Say Y here if you have such a chipset.
46
47 If unsure, say N.
48
49 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
50 bool
51
52 config AMBA_PL08X
53 bool "ARM PrimeCell PL080 or PL081 support"
54 depends on ARM_AMBA && EXPERIMENTAL
55 select DMA_ENGINE
56 help
57 Platform has a PL08x DMAC device
58 which can provide DMA engine support
59
60 config INTEL_IOATDMA
61 tristate "Intel I/OAT DMA support"
62 depends on PCI && X86
63 select DMA_ENGINE
64 select DCA
65 select ASYNC_TX_DISABLE_PQ_VAL_DMA
66 select ASYNC_TX_DISABLE_XOR_VAL_DMA
67 help
68 Enable support for the Intel(R) I/OAT DMA engine present
69 in recent Intel Xeon chipsets.
70
71 Say Y here if you have such a chipset.
72
73 If unsure, say N.
74
75 config INTEL_IOP_ADMA
76 tristate "Intel IOP ADMA support"
77 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
78 select DMA_ENGINE
79 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
80 help
81 Enable support for the Intel(R) IOP Series RAID engines.
82
83 config DW_DMAC
84 tristate "Synopsys DesignWare AHB DMA support"
85 depends on HAVE_CLK
86 select DMA_ENGINE
87 default y if CPU_AT32AP7000
88 help
89 Support the Synopsys DesignWare AHB DMA controller. This
90 can be integrated in chips such as the Atmel AT32ap7000.
91
92 config AT_HDMAC
93 tristate "Atmel AHB DMA support"
94 depends on ARCH_AT91
95 select DMA_ENGINE
96 help
97 Support the Atmel AHB DMA controller.
98
99 config FSL_DMA
100 tristate "Freescale Elo and Elo Plus DMA support"
101 depends on FSL_SOC
102 select DMA_ENGINE
103 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
104 ---help---
105 Enable support for the Freescale Elo and Elo Plus DMA controllers.
106 The Elo is the DMA controller on some 82xx and 83xx parts, and the
107 Elo Plus is the DMA controller on 85xx and 86xx parts.
108
109 config MPC512X_DMA
110 tristate "Freescale MPC512x built-in DMA engine support"
111 depends on PPC_MPC512x || PPC_MPC831x
112 select DMA_ENGINE
113 ---help---
114 Enable support for the Freescale MPC512x built-in DMA engine.
115
116 config MV_XOR
117 bool "Marvell XOR engine support"
118 depends on PLAT_ORION
119 select DMA_ENGINE
120 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
121 ---help---
122 Enable support for the Marvell XOR engine.
123
124 config MX3_IPU
125 bool "MX3x Image Processing Unit support"
126 depends on ARCH_MXC
127 select DMA_ENGINE
128 default y
129 help
130 If you plan to use the Image Processing unit in the i.MX3x, say
131 Y here. If unsure, select Y.
132
133 config MX3_IPU_IRQS
134 int "Number of dynamically mapped interrupts for IPU"
135 depends on MX3_IPU
136 range 2 137
137 default 4
138 help
139 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
140 To avoid bloating the irq_desc[] array we allocate a sufficient
141 number of IRQ slots and map them dynamically to specific sources.
142
143 config TXX9_DMAC
144 tristate "Toshiba TXx9 SoC DMA support"
145 depends on MACH_TX49XX || MACH_TX39XX
146 select DMA_ENGINE
147 help
148 Support the TXx9 SoC internal DMA controller. This can be
149 integrated in chips such as the Toshiba TX4927/38/39.
150
151 config TEGRA20_APB_DMA
152 bool "NVIDIA Tegra20 APB DMA support"
153 depends on ARCH_TEGRA
154 select DMA_ENGINE
155 help
156 Support for the NVIDIA Tegra20 APB DMA controller driver. The
157 DMA controller is having multiple DMA channel which can be
158 configured for different peripherals like audio, UART, SPI,
159 I2C etc which is in APB bus.
160 This DMA controller transfers data from memory to peripheral fifo
161 or vice versa. It does not support memory to memory data transfer.
162
163
164
165 config SH_DMAE
166 tristate "Renesas SuperH DMAC support"
167 depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
168 depends on !SH_DMA_API
169 select DMA_ENGINE
170 help
171 Enable support for the Renesas SuperH DMA controllers.
172
173 config COH901318
174 bool "ST-Ericsson COH901318 DMA support"
175 select DMA_ENGINE
176 depends on ARCH_U300
177 help
178 Enable support for ST-Ericsson COH 901 318 DMA.
179
180 config STE_DMA40
181 bool "ST-Ericsson DMA40 support"
182 depends on ARCH_U8500
183 select DMA_ENGINE
184 help
185 Support for ST-Ericsson DMA40 controller
186
187 config AMCC_PPC440SPE_ADMA
188 tristate "AMCC PPC440SPe ADMA support"
189 depends on 440SPe || 440SP
190 select DMA_ENGINE
191 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
192 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
193 help
194 Enable support for the AMCC PPC440SPe RAID engines.
195
196 config TIMB_DMA
197 tristate "Timberdale FPGA DMA support"
198 depends on MFD_TIMBERDALE || HAS_IOMEM
199 select DMA_ENGINE
200 help
201 Enable support for the Timberdale FPGA DMA engine.
202
203 config SIRF_DMA
204 tristate "CSR SiRFprimaII DMA support"
205 depends on ARCH_PRIMA2
206 select DMA_ENGINE
207 help
208 Enable support for the CSR SiRFprimaII DMA engine.
209
210 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
211 bool
212
213 config PL330_DMA
214 tristate "DMA API Driver for PL330"
215 select DMA_ENGINE
216 depends on ARM_AMBA
217 help
218 Select if your platform has one or more PL330 DMACs.
219 You need to provide platform specific settings via
220 platform_data for a dma-pl330 device.
221
222 config PCH_DMA
223 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
224 depends on PCI && X86
225 select DMA_ENGINE
226 help
227 Enable support for Intel EG20T PCH DMA engine.
228
229 This driver also can be used for LAPIS Semiconductor IOH(Input/
230 Output Hub), ML7213, ML7223 and ML7831.
231 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
232 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
233 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
234 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
235
236 config IMX_SDMA
237 tristate "i.MX SDMA support"
238 depends on ARCH_MXC
239 select DMA_ENGINE
240 help
241 Support the i.MX SDMA engine. This engine is integrated into
242 Freescale i.MX25/31/35/51/53 chips.
243
244 config IMX_DMA
245 tristate "i.MX DMA support"
246 depends on ARCH_MXC
247 select DMA_ENGINE
248 help
249 Support the i.MX DMA engine. This engine is integrated into
250 Freescale i.MX1/21/27 chips.
251
252 config MXS_DMA
253 bool "MXS DMA support"
254 depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
255 select STMP_DEVICE
256 select DMA_ENGINE
257 help
258 Support the MXS DMA engine. This engine including APBH-DMA
259 and APBX-DMA is integrated into Freescale i.MX23/28 chips.
260
261 config EP93XX_DMA
262 bool "Cirrus Logic EP93xx DMA support"
263 depends on ARCH_EP93XX
264 select DMA_ENGINE
265 help
266 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
267
268 config DMA_SA11X0
269 tristate "SA-11x0 DMA support"
270 depends on ARCH_SA1100
271 select DMA_ENGINE
272 help
273 Support the DMA engine found on Intel StrongARM SA-1100 and
274 SA-1110 SoCs. This DMA engine can only be used with on-chip
275 devices.
276
277 config MMP_TDMA
278 bool "MMP Two-Channel DMA support"
279 depends on ARCH_MMP
280 select DMA_ENGINE
281 help
282 Support the MMP Two-Channel DMA engine.
283 This engine used for MMP Audio DMA and pxa910 SQU.
284
285 Say Y here if you enabled MMP ADMA, otherwise say N.
286
287 config DMA_ENGINE
288 bool
289
290 comment "DMA Clients"
291 depends on DMA_ENGINE
292
293 config NET_DMA
294 bool "Network: TCP receive copy offload"
295 depends on DMA_ENGINE && NET
296 default (INTEL_IOATDMA || FSL_DMA)
297 help
298 This enables the use of DMA engines in the network stack to
299 offload receive copy-to-user operations, freeing CPU cycles.
300
301 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
302 say N.
303
304 config ASYNC_TX_DMA
305 bool "Async_tx: Offload support for the async_tx api"
306 depends on DMA_ENGINE
307 help
308 This allows the async_tx api to take advantage of offload engines for
309 memcpy, memset, xor, and raid6 p+q operations. If your platform has
310 a dma engine that can perform raid operations and you have enabled
311 MD_RAID456 say Y.
312
313 If unsure, say N.
314
315 config DMATEST
316 tristate "DMA Test client"
317 depends on DMA_ENGINE
318 help
319 Simple DMA test client. Say N unless you're debugging a
320 DMA Device driver.
321
322 endif
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