Merge branches 'acpi-cleanup', 'acpi-dock', 'acpi-pci' and 'acpi-dsm'
[deliverable/linux.git] / drivers / dma / dmaengine.c
1 /*
2 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free
6 * Software Foundation; either version 2 of the License, or (at your option)
7 * any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59
16 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called COPYING.
20 */
21
22 /*
23 * This code implements the DMA subsystem. It provides a HW-neutral interface
24 * for other kernel code to use asynchronous memory copy capabilities,
25 * if present, and allows different HW DMA drivers to register as providing
26 * this capability.
27 *
28 * Due to the fact we are accelerating what is already a relatively fast
29 * operation, the code goes to great lengths to avoid additional overhead,
30 * such as locking.
31 *
32 * LOCKING:
33 *
34 * The subsystem keeps a global list of dma_device structs it is protected by a
35 * mutex, dma_list_mutex.
36 *
37 * A subsystem can get access to a channel by calling dmaengine_get() followed
38 * by dma_find_channel(), or if it has need for an exclusive channel it can call
39 * dma_request_channel(). Once a channel is allocated a reference is taken
40 * against its corresponding driver to disable removal.
41 *
42 * Each device has a channels list, which runs unlocked but is never modified
43 * once the device is registered, it's just setup by the driver.
44 *
45 * See Documentation/dmaengine.txt for more details
46 */
47
48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
49
50 #include <linux/dma-mapping.h>
51 #include <linux/init.h>
52 #include <linux/module.h>
53 #include <linux/mm.h>
54 #include <linux/device.h>
55 #include <linux/dmaengine.h>
56 #include <linux/hardirq.h>
57 #include <linux/spinlock.h>
58 #include <linux/percpu.h>
59 #include <linux/rcupdate.h>
60 #include <linux/mutex.h>
61 #include <linux/jiffies.h>
62 #include <linux/rculist.h>
63 #include <linux/idr.h>
64 #include <linux/slab.h>
65 #include <linux/acpi.h>
66 #include <linux/acpi_dma.h>
67 #include <linux/of_dma.h>
68 #include <linux/mempool.h>
69
70 static DEFINE_MUTEX(dma_list_mutex);
71 static DEFINE_IDR(dma_idr);
72 static LIST_HEAD(dma_device_list);
73 static long dmaengine_ref_count;
74
75 /* --- sysfs implementation --- */
76
77 /**
78 * dev_to_dma_chan - convert a device pointer to the its sysfs container object
79 * @dev - device node
80 *
81 * Must be called under dma_list_mutex
82 */
83 static struct dma_chan *dev_to_dma_chan(struct device *dev)
84 {
85 struct dma_chan_dev *chan_dev;
86
87 chan_dev = container_of(dev, typeof(*chan_dev), device);
88 return chan_dev->chan;
89 }
90
91 static ssize_t memcpy_count_show(struct device *dev,
92 struct device_attribute *attr, char *buf)
93 {
94 struct dma_chan *chan;
95 unsigned long count = 0;
96 int i;
97 int err;
98
99 mutex_lock(&dma_list_mutex);
100 chan = dev_to_dma_chan(dev);
101 if (chan) {
102 for_each_possible_cpu(i)
103 count += per_cpu_ptr(chan->local, i)->memcpy_count;
104 err = sprintf(buf, "%lu\n", count);
105 } else
106 err = -ENODEV;
107 mutex_unlock(&dma_list_mutex);
108
109 return err;
110 }
111 static DEVICE_ATTR_RO(memcpy_count);
112
113 static ssize_t bytes_transferred_show(struct device *dev,
114 struct device_attribute *attr, char *buf)
115 {
116 struct dma_chan *chan;
117 unsigned long count = 0;
118 int i;
119 int err;
120
121 mutex_lock(&dma_list_mutex);
122 chan = dev_to_dma_chan(dev);
123 if (chan) {
124 for_each_possible_cpu(i)
125 count += per_cpu_ptr(chan->local, i)->bytes_transferred;
126 err = sprintf(buf, "%lu\n", count);
127 } else
128 err = -ENODEV;
129 mutex_unlock(&dma_list_mutex);
130
131 return err;
132 }
133 static DEVICE_ATTR_RO(bytes_transferred);
134
135 static ssize_t in_use_show(struct device *dev, struct device_attribute *attr,
136 char *buf)
137 {
138 struct dma_chan *chan;
139 int err;
140
141 mutex_lock(&dma_list_mutex);
142 chan = dev_to_dma_chan(dev);
143 if (chan)
144 err = sprintf(buf, "%d\n", chan->client_count);
145 else
146 err = -ENODEV;
147 mutex_unlock(&dma_list_mutex);
148
149 return err;
150 }
151 static DEVICE_ATTR_RO(in_use);
152
153 static struct attribute *dma_dev_attrs[] = {
154 &dev_attr_memcpy_count.attr,
155 &dev_attr_bytes_transferred.attr,
156 &dev_attr_in_use.attr,
157 NULL,
158 };
159 ATTRIBUTE_GROUPS(dma_dev);
160
161 static void chan_dev_release(struct device *dev)
162 {
163 struct dma_chan_dev *chan_dev;
164
165 chan_dev = container_of(dev, typeof(*chan_dev), device);
166 if (atomic_dec_and_test(chan_dev->idr_ref)) {
167 mutex_lock(&dma_list_mutex);
168 idr_remove(&dma_idr, chan_dev->dev_id);
169 mutex_unlock(&dma_list_mutex);
170 kfree(chan_dev->idr_ref);
171 }
172 kfree(chan_dev);
173 }
174
175 static struct class dma_devclass = {
176 .name = "dma",
177 .dev_groups = dma_dev_groups,
178 .dev_release = chan_dev_release,
179 };
180
181 /* --- client and device registration --- */
182
183 #define dma_device_satisfies_mask(device, mask) \
184 __dma_device_satisfies_mask((device), &(mask))
185 static int
186 __dma_device_satisfies_mask(struct dma_device *device,
187 const dma_cap_mask_t *want)
188 {
189 dma_cap_mask_t has;
190
191 bitmap_and(has.bits, want->bits, device->cap_mask.bits,
192 DMA_TX_TYPE_END);
193 return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END);
194 }
195
196 static struct module *dma_chan_to_owner(struct dma_chan *chan)
197 {
198 return chan->device->dev->driver->owner;
199 }
200
201 /**
202 * balance_ref_count - catch up the channel reference count
203 * @chan - channel to balance ->client_count versus dmaengine_ref_count
204 *
205 * balance_ref_count must be called under dma_list_mutex
206 */
207 static void balance_ref_count(struct dma_chan *chan)
208 {
209 struct module *owner = dma_chan_to_owner(chan);
210
211 while (chan->client_count < dmaengine_ref_count) {
212 __module_get(owner);
213 chan->client_count++;
214 }
215 }
216
217 /**
218 * dma_chan_get - try to grab a dma channel's parent driver module
219 * @chan - channel to grab
220 *
221 * Must be called under dma_list_mutex
222 */
223 static int dma_chan_get(struct dma_chan *chan)
224 {
225 int err = -ENODEV;
226 struct module *owner = dma_chan_to_owner(chan);
227
228 if (chan->client_count) {
229 __module_get(owner);
230 err = 0;
231 } else if (try_module_get(owner))
232 err = 0;
233
234 if (err == 0)
235 chan->client_count++;
236
237 /* allocate upon first client reference */
238 if (chan->client_count == 1 && err == 0) {
239 int desc_cnt = chan->device->device_alloc_chan_resources(chan);
240
241 if (desc_cnt < 0) {
242 err = desc_cnt;
243 chan->client_count = 0;
244 module_put(owner);
245 } else if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask))
246 balance_ref_count(chan);
247 }
248
249 return err;
250 }
251
252 /**
253 * dma_chan_put - drop a reference to a dma channel's parent driver module
254 * @chan - channel to release
255 *
256 * Must be called under dma_list_mutex
257 */
258 static void dma_chan_put(struct dma_chan *chan)
259 {
260 if (!chan->client_count)
261 return; /* this channel failed alloc_chan_resources */
262 chan->client_count--;
263 module_put(dma_chan_to_owner(chan));
264 if (chan->client_count == 0)
265 chan->device->device_free_chan_resources(chan);
266 }
267
268 enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie)
269 {
270 enum dma_status status;
271 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
272
273 dma_async_issue_pending(chan);
274 do {
275 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
276 if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
277 pr_err("%s: timeout!\n", __func__);
278 return DMA_ERROR;
279 }
280 if (status != DMA_IN_PROGRESS)
281 break;
282 cpu_relax();
283 } while (1);
284
285 return status;
286 }
287 EXPORT_SYMBOL(dma_sync_wait);
288
289 /**
290 * dma_cap_mask_all - enable iteration over all operation types
291 */
292 static dma_cap_mask_t dma_cap_mask_all;
293
294 /**
295 * dma_chan_tbl_ent - tracks channel allocations per core/operation
296 * @chan - associated channel for this entry
297 */
298 struct dma_chan_tbl_ent {
299 struct dma_chan *chan;
300 };
301
302 /**
303 * channel_table - percpu lookup table for memory-to-memory offload providers
304 */
305 static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END];
306
307 static int __init dma_channel_table_init(void)
308 {
309 enum dma_transaction_type cap;
310 int err = 0;
311
312 bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END);
313
314 /* 'interrupt', 'private', and 'slave' are channel capabilities,
315 * but are not associated with an operation so they do not need
316 * an entry in the channel_table
317 */
318 clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits);
319 clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits);
320 clear_bit(DMA_SLAVE, dma_cap_mask_all.bits);
321
322 for_each_dma_cap_mask(cap, dma_cap_mask_all) {
323 channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent);
324 if (!channel_table[cap]) {
325 err = -ENOMEM;
326 break;
327 }
328 }
329
330 if (err) {
331 pr_err("initialization failure\n");
332 for_each_dma_cap_mask(cap, dma_cap_mask_all)
333 if (channel_table[cap])
334 free_percpu(channel_table[cap]);
335 }
336
337 return err;
338 }
339 arch_initcall(dma_channel_table_init);
340
341 /**
342 * dma_find_channel - find a channel to carry out the operation
343 * @tx_type: transaction type
344 */
345 struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
346 {
347 return this_cpu_read(channel_table[tx_type]->chan);
348 }
349 EXPORT_SYMBOL(dma_find_channel);
350
351 /*
352 * net_dma_find_channel - find a channel for net_dma
353 * net_dma has alignment requirements
354 */
355 struct dma_chan *net_dma_find_channel(void)
356 {
357 struct dma_chan *chan = dma_find_channel(DMA_MEMCPY);
358 if (chan && !is_dma_copy_aligned(chan->device, 1, 1, 1))
359 return NULL;
360
361 return chan;
362 }
363 EXPORT_SYMBOL(net_dma_find_channel);
364
365 /**
366 * dma_issue_pending_all - flush all pending operations across all channels
367 */
368 void dma_issue_pending_all(void)
369 {
370 struct dma_device *device;
371 struct dma_chan *chan;
372
373 rcu_read_lock();
374 list_for_each_entry_rcu(device, &dma_device_list, global_node) {
375 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
376 continue;
377 list_for_each_entry(chan, &device->channels, device_node)
378 if (chan->client_count)
379 device->device_issue_pending(chan);
380 }
381 rcu_read_unlock();
382 }
383 EXPORT_SYMBOL(dma_issue_pending_all);
384
385 /**
386 * dma_chan_is_local - returns true if the channel is in the same numa-node as the cpu
387 */
388 static bool dma_chan_is_local(struct dma_chan *chan, int cpu)
389 {
390 int node = dev_to_node(chan->device->dev);
391 return node == -1 || cpumask_test_cpu(cpu, cpumask_of_node(node));
392 }
393
394 /**
395 * min_chan - returns the channel with min count and in the same numa-node as the cpu
396 * @cap: capability to match
397 * @cpu: cpu index which the channel should be close to
398 *
399 * If some channels are close to the given cpu, the one with the lowest
400 * reference count is returned. Otherwise, cpu is ignored and only the
401 * reference count is taken into account.
402 * Must be called under dma_list_mutex.
403 */
404 static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu)
405 {
406 struct dma_device *device;
407 struct dma_chan *chan;
408 struct dma_chan *min = NULL;
409 struct dma_chan *localmin = NULL;
410
411 list_for_each_entry(device, &dma_device_list, global_node) {
412 if (!dma_has_cap(cap, device->cap_mask) ||
413 dma_has_cap(DMA_PRIVATE, device->cap_mask))
414 continue;
415 list_for_each_entry(chan, &device->channels, device_node) {
416 if (!chan->client_count)
417 continue;
418 if (!min || chan->table_count < min->table_count)
419 min = chan;
420
421 if (dma_chan_is_local(chan, cpu))
422 if (!localmin ||
423 chan->table_count < localmin->table_count)
424 localmin = chan;
425 }
426 }
427
428 chan = localmin ? localmin : min;
429
430 if (chan)
431 chan->table_count++;
432
433 return chan;
434 }
435
436 /**
437 * dma_channel_rebalance - redistribute the available channels
438 *
439 * Optimize for cpu isolation (each cpu gets a dedicated channel for an
440 * operation type) in the SMP case, and operation isolation (avoid
441 * multi-tasking channels) in the non-SMP case. Must be called under
442 * dma_list_mutex.
443 */
444 static void dma_channel_rebalance(void)
445 {
446 struct dma_chan *chan;
447 struct dma_device *device;
448 int cpu;
449 int cap;
450
451 /* undo the last distribution */
452 for_each_dma_cap_mask(cap, dma_cap_mask_all)
453 for_each_possible_cpu(cpu)
454 per_cpu_ptr(channel_table[cap], cpu)->chan = NULL;
455
456 list_for_each_entry(device, &dma_device_list, global_node) {
457 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
458 continue;
459 list_for_each_entry(chan, &device->channels, device_node)
460 chan->table_count = 0;
461 }
462
463 /* don't populate the channel_table if no clients are available */
464 if (!dmaengine_ref_count)
465 return;
466
467 /* redistribute available channels */
468 for_each_dma_cap_mask(cap, dma_cap_mask_all)
469 for_each_online_cpu(cpu) {
470 chan = min_chan(cap, cpu);
471 per_cpu_ptr(channel_table[cap], cpu)->chan = chan;
472 }
473 }
474
475 static struct dma_chan *private_candidate(const dma_cap_mask_t *mask,
476 struct dma_device *dev,
477 dma_filter_fn fn, void *fn_param)
478 {
479 struct dma_chan *chan;
480
481 if (!__dma_device_satisfies_mask(dev, mask)) {
482 pr_debug("%s: wrong capabilities\n", __func__);
483 return NULL;
484 }
485 /* devices with multiple channels need special handling as we need to
486 * ensure that all channels are either private or public.
487 */
488 if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask))
489 list_for_each_entry(chan, &dev->channels, device_node) {
490 /* some channels are already publicly allocated */
491 if (chan->client_count)
492 return NULL;
493 }
494
495 list_for_each_entry(chan, &dev->channels, device_node) {
496 if (chan->client_count) {
497 pr_debug("%s: %s busy\n",
498 __func__, dma_chan_name(chan));
499 continue;
500 }
501 if (fn && !fn(chan, fn_param)) {
502 pr_debug("%s: %s filter said false\n",
503 __func__, dma_chan_name(chan));
504 continue;
505 }
506 return chan;
507 }
508
509 return NULL;
510 }
511
512 /**
513 * dma_request_slave_channel - try to get specific channel exclusively
514 * @chan: target channel
515 */
516 struct dma_chan *dma_get_slave_channel(struct dma_chan *chan)
517 {
518 int err = -EBUSY;
519
520 /* lock against __dma_request_channel */
521 mutex_lock(&dma_list_mutex);
522
523 if (chan->client_count == 0) {
524 err = dma_chan_get(chan);
525 if (err)
526 pr_debug("%s: failed to get %s: (%d)\n",
527 __func__, dma_chan_name(chan), err);
528 } else
529 chan = NULL;
530
531 mutex_unlock(&dma_list_mutex);
532
533
534 return chan;
535 }
536 EXPORT_SYMBOL_GPL(dma_get_slave_channel);
537
538 struct dma_chan *dma_get_any_slave_channel(struct dma_device *device)
539 {
540 dma_cap_mask_t mask;
541 struct dma_chan *chan;
542 int err;
543
544 dma_cap_zero(mask);
545 dma_cap_set(DMA_SLAVE, mask);
546
547 /* lock against __dma_request_channel */
548 mutex_lock(&dma_list_mutex);
549
550 chan = private_candidate(&mask, device, NULL, NULL);
551 if (chan) {
552 err = dma_chan_get(chan);
553 if (err) {
554 pr_debug("%s: failed to get %s: (%d)\n",
555 __func__, dma_chan_name(chan), err);
556 chan = NULL;
557 }
558 }
559
560 mutex_unlock(&dma_list_mutex);
561
562 return chan;
563 }
564 EXPORT_SYMBOL_GPL(dma_get_any_slave_channel);
565
566 /**
567 * __dma_request_channel - try to allocate an exclusive channel
568 * @mask: capabilities that the channel must satisfy
569 * @fn: optional callback to disposition available channels
570 * @fn_param: opaque parameter to pass to dma_filter_fn
571 *
572 * Returns pointer to appropriate DMA channel on success or NULL.
573 */
574 struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
575 dma_filter_fn fn, void *fn_param)
576 {
577 struct dma_device *device, *_d;
578 struct dma_chan *chan = NULL;
579 int err;
580
581 /* Find a channel */
582 mutex_lock(&dma_list_mutex);
583 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
584 chan = private_candidate(mask, device, fn, fn_param);
585 if (chan) {
586 /* Found a suitable channel, try to grab, prep, and
587 * return it. We first set DMA_PRIVATE to disable
588 * balance_ref_count as this channel will not be
589 * published in the general-purpose allocator
590 */
591 dma_cap_set(DMA_PRIVATE, device->cap_mask);
592 device->privatecnt++;
593 err = dma_chan_get(chan);
594
595 if (err == -ENODEV) {
596 pr_debug("%s: %s module removed\n",
597 __func__, dma_chan_name(chan));
598 list_del_rcu(&device->global_node);
599 } else if (err)
600 pr_debug("%s: failed to get %s: (%d)\n",
601 __func__, dma_chan_name(chan), err);
602 else
603 break;
604 if (--device->privatecnt == 0)
605 dma_cap_clear(DMA_PRIVATE, device->cap_mask);
606 chan = NULL;
607 }
608 }
609 mutex_unlock(&dma_list_mutex);
610
611 pr_debug("%s: %s (%s)\n",
612 __func__,
613 chan ? "success" : "fail",
614 chan ? dma_chan_name(chan) : NULL);
615
616 return chan;
617 }
618 EXPORT_SYMBOL_GPL(__dma_request_channel);
619
620 /**
621 * dma_request_slave_channel - try to allocate an exclusive slave channel
622 * @dev: pointer to client device structure
623 * @name: slave channel name
624 *
625 * Returns pointer to appropriate DMA channel on success or an error pointer.
626 */
627 struct dma_chan *dma_request_slave_channel_reason(struct device *dev,
628 const char *name)
629 {
630 struct dma_chan *chan;
631
632 /* If device-tree is present get slave info from here */
633 if (dev->of_node)
634 return of_dma_request_slave_channel(dev->of_node, name);
635
636 /* If device was enumerated by ACPI get slave info from here */
637 if (ACPI_HANDLE(dev)) {
638 chan = acpi_dma_request_slave_chan_by_name(dev, name);
639 if (chan)
640 return chan;
641 }
642
643 return ERR_PTR(-ENODEV);
644 }
645 EXPORT_SYMBOL_GPL(dma_request_slave_channel_reason);
646
647 /**
648 * dma_request_slave_channel - try to allocate an exclusive slave channel
649 * @dev: pointer to client device structure
650 * @name: slave channel name
651 *
652 * Returns pointer to appropriate DMA channel on success or NULL.
653 */
654 struct dma_chan *dma_request_slave_channel(struct device *dev,
655 const char *name)
656 {
657 struct dma_chan *ch = dma_request_slave_channel_reason(dev, name);
658 if (IS_ERR(ch))
659 return NULL;
660 return ch;
661 }
662 EXPORT_SYMBOL_GPL(dma_request_slave_channel);
663
664 void dma_release_channel(struct dma_chan *chan)
665 {
666 mutex_lock(&dma_list_mutex);
667 WARN_ONCE(chan->client_count != 1,
668 "chan reference count %d != 1\n", chan->client_count);
669 dma_chan_put(chan);
670 /* drop PRIVATE cap enabled by __dma_request_channel() */
671 if (--chan->device->privatecnt == 0)
672 dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask);
673 mutex_unlock(&dma_list_mutex);
674 }
675 EXPORT_SYMBOL_GPL(dma_release_channel);
676
677 /**
678 * dmaengine_get - register interest in dma_channels
679 */
680 void dmaengine_get(void)
681 {
682 struct dma_device *device, *_d;
683 struct dma_chan *chan;
684 int err;
685
686 mutex_lock(&dma_list_mutex);
687 dmaengine_ref_count++;
688
689 /* try to grab channels */
690 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
691 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
692 continue;
693 list_for_each_entry(chan, &device->channels, device_node) {
694 err = dma_chan_get(chan);
695 if (err == -ENODEV) {
696 /* module removed before we could use it */
697 list_del_rcu(&device->global_node);
698 break;
699 } else if (err)
700 pr_debug("%s: failed to get %s: (%d)\n",
701 __func__, dma_chan_name(chan), err);
702 }
703 }
704
705 /* if this is the first reference and there were channels
706 * waiting we need to rebalance to get those channels
707 * incorporated into the channel table
708 */
709 if (dmaengine_ref_count == 1)
710 dma_channel_rebalance();
711 mutex_unlock(&dma_list_mutex);
712 }
713 EXPORT_SYMBOL(dmaengine_get);
714
715 /**
716 * dmaengine_put - let dma drivers be removed when ref_count == 0
717 */
718 void dmaengine_put(void)
719 {
720 struct dma_device *device;
721 struct dma_chan *chan;
722
723 mutex_lock(&dma_list_mutex);
724 dmaengine_ref_count--;
725 BUG_ON(dmaengine_ref_count < 0);
726 /* drop channel references */
727 list_for_each_entry(device, &dma_device_list, global_node) {
728 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
729 continue;
730 list_for_each_entry(chan, &device->channels, device_node)
731 dma_chan_put(chan);
732 }
733 mutex_unlock(&dma_list_mutex);
734 }
735 EXPORT_SYMBOL(dmaengine_put);
736
737 static bool device_has_all_tx_types(struct dma_device *device)
738 {
739 /* A device that satisfies this test has channels that will never cause
740 * an async_tx channel switch event as all possible operation types can
741 * be handled.
742 */
743 #ifdef CONFIG_ASYNC_TX_DMA
744 if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask))
745 return false;
746 #endif
747
748 #if defined(CONFIG_ASYNC_MEMCPY) || defined(CONFIG_ASYNC_MEMCPY_MODULE)
749 if (!dma_has_cap(DMA_MEMCPY, device->cap_mask))
750 return false;
751 #endif
752
753 #if defined(CONFIG_ASYNC_XOR) || defined(CONFIG_ASYNC_XOR_MODULE)
754 if (!dma_has_cap(DMA_XOR, device->cap_mask))
755 return false;
756
757 #ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
758 if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask))
759 return false;
760 #endif
761 #endif
762
763 #if defined(CONFIG_ASYNC_PQ) || defined(CONFIG_ASYNC_PQ_MODULE)
764 if (!dma_has_cap(DMA_PQ, device->cap_mask))
765 return false;
766
767 #ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA
768 if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask))
769 return false;
770 #endif
771 #endif
772
773 return true;
774 }
775
776 static int get_dma_id(struct dma_device *device)
777 {
778 int rc;
779
780 mutex_lock(&dma_list_mutex);
781
782 rc = idr_alloc(&dma_idr, NULL, 0, 0, GFP_KERNEL);
783 if (rc >= 0)
784 device->dev_id = rc;
785
786 mutex_unlock(&dma_list_mutex);
787 return rc < 0 ? rc : 0;
788 }
789
790 /**
791 * dma_async_device_register - registers DMA devices found
792 * @device: &dma_device
793 */
794 int dma_async_device_register(struct dma_device *device)
795 {
796 int chancnt = 0, rc;
797 struct dma_chan* chan;
798 atomic_t *idr_ref;
799
800 if (!device)
801 return -ENODEV;
802
803 /* validate device routines */
804 BUG_ON(dma_has_cap(DMA_MEMCPY, device->cap_mask) &&
805 !device->device_prep_dma_memcpy);
806 BUG_ON(dma_has_cap(DMA_XOR, device->cap_mask) &&
807 !device->device_prep_dma_xor);
808 BUG_ON(dma_has_cap(DMA_XOR_VAL, device->cap_mask) &&
809 !device->device_prep_dma_xor_val);
810 BUG_ON(dma_has_cap(DMA_PQ, device->cap_mask) &&
811 !device->device_prep_dma_pq);
812 BUG_ON(dma_has_cap(DMA_PQ_VAL, device->cap_mask) &&
813 !device->device_prep_dma_pq_val);
814 BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) &&
815 !device->device_prep_dma_interrupt);
816 BUG_ON(dma_has_cap(DMA_SG, device->cap_mask) &&
817 !device->device_prep_dma_sg);
818 BUG_ON(dma_has_cap(DMA_CYCLIC, device->cap_mask) &&
819 !device->device_prep_dma_cyclic);
820 BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) &&
821 !device->device_control);
822 BUG_ON(dma_has_cap(DMA_INTERLEAVE, device->cap_mask) &&
823 !device->device_prep_interleaved_dma);
824
825 BUG_ON(!device->device_alloc_chan_resources);
826 BUG_ON(!device->device_free_chan_resources);
827 BUG_ON(!device->device_tx_status);
828 BUG_ON(!device->device_issue_pending);
829 BUG_ON(!device->dev);
830
831 /* note: this only matters in the
832 * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case
833 */
834 if (device_has_all_tx_types(device))
835 dma_cap_set(DMA_ASYNC_TX, device->cap_mask);
836
837 idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL);
838 if (!idr_ref)
839 return -ENOMEM;
840 rc = get_dma_id(device);
841 if (rc != 0) {
842 kfree(idr_ref);
843 return rc;
844 }
845
846 atomic_set(idr_ref, 0);
847
848 /* represent channels in sysfs. Probably want devs too */
849 list_for_each_entry(chan, &device->channels, device_node) {
850 rc = -ENOMEM;
851 chan->local = alloc_percpu(typeof(*chan->local));
852 if (chan->local == NULL)
853 goto err_out;
854 chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL);
855 if (chan->dev == NULL) {
856 free_percpu(chan->local);
857 chan->local = NULL;
858 goto err_out;
859 }
860
861 chan->chan_id = chancnt++;
862 chan->dev->device.class = &dma_devclass;
863 chan->dev->device.parent = device->dev;
864 chan->dev->chan = chan;
865 chan->dev->idr_ref = idr_ref;
866 chan->dev->dev_id = device->dev_id;
867 atomic_inc(idr_ref);
868 dev_set_name(&chan->dev->device, "dma%dchan%d",
869 device->dev_id, chan->chan_id);
870
871 rc = device_register(&chan->dev->device);
872 if (rc) {
873 free_percpu(chan->local);
874 chan->local = NULL;
875 kfree(chan->dev);
876 atomic_dec(idr_ref);
877 goto err_out;
878 }
879 chan->client_count = 0;
880 }
881 device->chancnt = chancnt;
882
883 mutex_lock(&dma_list_mutex);
884 /* take references on public channels */
885 if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask))
886 list_for_each_entry(chan, &device->channels, device_node) {
887 /* if clients are already waiting for channels we need
888 * to take references on their behalf
889 */
890 if (dma_chan_get(chan) == -ENODEV) {
891 /* note we can only get here for the first
892 * channel as the remaining channels are
893 * guaranteed to get a reference
894 */
895 rc = -ENODEV;
896 mutex_unlock(&dma_list_mutex);
897 goto err_out;
898 }
899 }
900 list_add_tail_rcu(&device->global_node, &dma_device_list);
901 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
902 device->privatecnt++; /* Always private */
903 dma_channel_rebalance();
904 mutex_unlock(&dma_list_mutex);
905
906 return 0;
907
908 err_out:
909 /* if we never registered a channel just release the idr */
910 if (atomic_read(idr_ref) == 0) {
911 mutex_lock(&dma_list_mutex);
912 idr_remove(&dma_idr, device->dev_id);
913 mutex_unlock(&dma_list_mutex);
914 kfree(idr_ref);
915 return rc;
916 }
917
918 list_for_each_entry(chan, &device->channels, device_node) {
919 if (chan->local == NULL)
920 continue;
921 mutex_lock(&dma_list_mutex);
922 chan->dev->chan = NULL;
923 mutex_unlock(&dma_list_mutex);
924 device_unregister(&chan->dev->device);
925 free_percpu(chan->local);
926 }
927 return rc;
928 }
929 EXPORT_SYMBOL(dma_async_device_register);
930
931 /**
932 * dma_async_device_unregister - unregister a DMA device
933 * @device: &dma_device
934 *
935 * This routine is called by dma driver exit routines, dmaengine holds module
936 * references to prevent it being called while channels are in use.
937 */
938 void dma_async_device_unregister(struct dma_device *device)
939 {
940 struct dma_chan *chan;
941
942 mutex_lock(&dma_list_mutex);
943 list_del_rcu(&device->global_node);
944 dma_channel_rebalance();
945 mutex_unlock(&dma_list_mutex);
946
947 list_for_each_entry(chan, &device->channels, device_node) {
948 WARN_ONCE(chan->client_count,
949 "%s called while %d clients hold a reference\n",
950 __func__, chan->client_count);
951 mutex_lock(&dma_list_mutex);
952 chan->dev->chan = NULL;
953 mutex_unlock(&dma_list_mutex);
954 device_unregister(&chan->dev->device);
955 free_percpu(chan->local);
956 }
957 }
958 EXPORT_SYMBOL(dma_async_device_unregister);
959
960 struct dmaengine_unmap_pool {
961 struct kmem_cache *cache;
962 const char *name;
963 mempool_t *pool;
964 size_t size;
965 };
966
967 #define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) }
968 static struct dmaengine_unmap_pool unmap_pool[] = {
969 __UNMAP_POOL(2),
970 #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
971 __UNMAP_POOL(16),
972 __UNMAP_POOL(128),
973 __UNMAP_POOL(256),
974 #endif
975 };
976
977 static struct dmaengine_unmap_pool *__get_unmap_pool(int nr)
978 {
979 int order = get_count_order(nr);
980
981 switch (order) {
982 case 0 ... 1:
983 return &unmap_pool[0];
984 case 2 ... 4:
985 return &unmap_pool[1];
986 case 5 ... 7:
987 return &unmap_pool[2];
988 case 8:
989 return &unmap_pool[3];
990 default:
991 BUG();
992 return NULL;
993 }
994 }
995
996 static void dmaengine_unmap(struct kref *kref)
997 {
998 struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref);
999 struct device *dev = unmap->dev;
1000 int cnt, i;
1001
1002 cnt = unmap->to_cnt;
1003 for (i = 0; i < cnt; i++)
1004 dma_unmap_page(dev, unmap->addr[i], unmap->len,
1005 DMA_TO_DEVICE);
1006 cnt += unmap->from_cnt;
1007 for (; i < cnt; i++)
1008 dma_unmap_page(dev, unmap->addr[i], unmap->len,
1009 DMA_FROM_DEVICE);
1010 cnt += unmap->bidi_cnt;
1011 for (; i < cnt; i++) {
1012 if (unmap->addr[i] == 0)
1013 continue;
1014 dma_unmap_page(dev, unmap->addr[i], unmap->len,
1015 DMA_BIDIRECTIONAL);
1016 }
1017 mempool_free(unmap, __get_unmap_pool(cnt)->pool);
1018 }
1019
1020 void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap)
1021 {
1022 if (unmap)
1023 kref_put(&unmap->kref, dmaengine_unmap);
1024 }
1025 EXPORT_SYMBOL_GPL(dmaengine_unmap_put);
1026
1027 static void dmaengine_destroy_unmap_pool(void)
1028 {
1029 int i;
1030
1031 for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
1032 struct dmaengine_unmap_pool *p = &unmap_pool[i];
1033
1034 if (p->pool)
1035 mempool_destroy(p->pool);
1036 p->pool = NULL;
1037 if (p->cache)
1038 kmem_cache_destroy(p->cache);
1039 p->cache = NULL;
1040 }
1041 }
1042
1043 static int __init dmaengine_init_unmap_pool(void)
1044 {
1045 int i;
1046
1047 for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
1048 struct dmaengine_unmap_pool *p = &unmap_pool[i];
1049 size_t size;
1050
1051 size = sizeof(struct dmaengine_unmap_data) +
1052 sizeof(dma_addr_t) * p->size;
1053
1054 p->cache = kmem_cache_create(p->name, size, 0,
1055 SLAB_HWCACHE_ALIGN, NULL);
1056 if (!p->cache)
1057 break;
1058 p->pool = mempool_create_slab_pool(1, p->cache);
1059 if (!p->pool)
1060 break;
1061 }
1062
1063 if (i == ARRAY_SIZE(unmap_pool))
1064 return 0;
1065
1066 dmaengine_destroy_unmap_pool();
1067 return -ENOMEM;
1068 }
1069
1070 struct dmaengine_unmap_data *
1071 dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags)
1072 {
1073 struct dmaengine_unmap_data *unmap;
1074
1075 unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags);
1076 if (!unmap)
1077 return NULL;
1078
1079 memset(unmap, 0, sizeof(*unmap));
1080 kref_init(&unmap->kref);
1081 unmap->dev = dev;
1082
1083 return unmap;
1084 }
1085 EXPORT_SYMBOL(dmaengine_get_unmap_data);
1086
1087 /**
1088 * dma_async_memcpy_pg_to_pg - offloaded copy from page to page
1089 * @chan: DMA channel to offload copy to
1090 * @dest_pg: destination page
1091 * @dest_off: offset in page to copy to
1092 * @src_pg: source page
1093 * @src_off: offset in page to copy from
1094 * @len: length
1095 *
1096 * Both @dest_page/@dest_off and @src_page/@src_off must be mappable to a bus
1097 * address according to the DMA mapping API rules for streaming mappings.
1098 * Both @dest_page/@dest_off and @src_page/@src_off must stay memory resident
1099 * (kernel memory or locked user space pages).
1100 */
1101 dma_cookie_t
1102 dma_async_memcpy_pg_to_pg(struct dma_chan *chan, struct page *dest_pg,
1103 unsigned int dest_off, struct page *src_pg, unsigned int src_off,
1104 size_t len)
1105 {
1106 struct dma_device *dev = chan->device;
1107 struct dma_async_tx_descriptor *tx;
1108 struct dmaengine_unmap_data *unmap;
1109 dma_cookie_t cookie;
1110 unsigned long flags;
1111
1112 unmap = dmaengine_get_unmap_data(dev->dev, 2, GFP_NOWAIT);
1113 if (!unmap)
1114 return -ENOMEM;
1115
1116 unmap->to_cnt = 1;
1117 unmap->from_cnt = 1;
1118 unmap->addr[0] = dma_map_page(dev->dev, src_pg, src_off, len,
1119 DMA_TO_DEVICE);
1120 unmap->addr[1] = dma_map_page(dev->dev, dest_pg, dest_off, len,
1121 DMA_FROM_DEVICE);
1122 unmap->len = len;
1123 flags = DMA_CTRL_ACK;
1124 tx = dev->device_prep_dma_memcpy(chan, unmap->addr[1], unmap->addr[0],
1125 len, flags);
1126
1127 if (!tx) {
1128 dmaengine_unmap_put(unmap);
1129 return -ENOMEM;
1130 }
1131
1132 dma_set_unmap(tx, unmap);
1133 cookie = tx->tx_submit(tx);
1134 dmaengine_unmap_put(unmap);
1135
1136 preempt_disable();
1137 __this_cpu_add(chan->local->bytes_transferred, len);
1138 __this_cpu_inc(chan->local->memcpy_count);
1139 preempt_enable();
1140
1141 return cookie;
1142 }
1143 EXPORT_SYMBOL(dma_async_memcpy_pg_to_pg);
1144
1145 /**
1146 * dma_async_memcpy_buf_to_buf - offloaded copy between virtual addresses
1147 * @chan: DMA channel to offload copy to
1148 * @dest: destination address (virtual)
1149 * @src: source address (virtual)
1150 * @len: length
1151 *
1152 * Both @dest and @src must be mappable to a bus address according to the
1153 * DMA mapping API rules for streaming mappings.
1154 * Both @dest and @src must stay memory resident (kernel memory or locked
1155 * user space pages).
1156 */
1157 dma_cookie_t
1158 dma_async_memcpy_buf_to_buf(struct dma_chan *chan, void *dest,
1159 void *src, size_t len)
1160 {
1161 return dma_async_memcpy_pg_to_pg(chan, virt_to_page(dest),
1162 (unsigned long) dest & ~PAGE_MASK,
1163 virt_to_page(src),
1164 (unsigned long) src & ~PAGE_MASK, len);
1165 }
1166 EXPORT_SYMBOL(dma_async_memcpy_buf_to_buf);
1167
1168 /**
1169 * dma_async_memcpy_buf_to_pg - offloaded copy from address to page
1170 * @chan: DMA channel to offload copy to
1171 * @page: destination page
1172 * @offset: offset in page to copy to
1173 * @kdata: source address (virtual)
1174 * @len: length
1175 *
1176 * Both @page/@offset and @kdata must be mappable to a bus address according
1177 * to the DMA mapping API rules for streaming mappings.
1178 * Both @page/@offset and @kdata must stay memory resident (kernel memory or
1179 * locked user space pages)
1180 */
1181 dma_cookie_t
1182 dma_async_memcpy_buf_to_pg(struct dma_chan *chan, struct page *page,
1183 unsigned int offset, void *kdata, size_t len)
1184 {
1185 return dma_async_memcpy_pg_to_pg(chan, page, offset,
1186 virt_to_page(kdata),
1187 (unsigned long) kdata & ~PAGE_MASK, len);
1188 }
1189 EXPORT_SYMBOL(dma_async_memcpy_buf_to_pg);
1190
1191 void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
1192 struct dma_chan *chan)
1193 {
1194 tx->chan = chan;
1195 #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
1196 spin_lock_init(&tx->lock);
1197 #endif
1198 }
1199 EXPORT_SYMBOL(dma_async_tx_descriptor_init);
1200
1201 /* dma_wait_for_async_tx - spin wait for a transaction to complete
1202 * @tx: in-flight transaction to wait on
1203 */
1204 enum dma_status
1205 dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
1206 {
1207 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
1208
1209 if (!tx)
1210 return DMA_COMPLETE;
1211
1212 while (tx->cookie == -EBUSY) {
1213 if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
1214 pr_err("%s timeout waiting for descriptor submission\n",
1215 __func__);
1216 return DMA_ERROR;
1217 }
1218 cpu_relax();
1219 }
1220 return dma_sync_wait(tx->chan, tx->cookie);
1221 }
1222 EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
1223
1224 /* dma_run_dependencies - helper routine for dma drivers to process
1225 * (start) dependent operations on their target channel
1226 * @tx: transaction with dependencies
1227 */
1228 void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
1229 {
1230 struct dma_async_tx_descriptor *dep = txd_next(tx);
1231 struct dma_async_tx_descriptor *dep_next;
1232 struct dma_chan *chan;
1233
1234 if (!dep)
1235 return;
1236
1237 /* we'll submit tx->next now, so clear the link */
1238 txd_clear_next(tx);
1239 chan = dep->chan;
1240
1241 /* keep submitting up until a channel switch is detected
1242 * in that case we will be called again as a result of
1243 * processing the interrupt from async_tx_channel_switch
1244 */
1245 for (; dep; dep = dep_next) {
1246 txd_lock(dep);
1247 txd_clear_parent(dep);
1248 dep_next = txd_next(dep);
1249 if (dep_next && dep_next->chan == chan)
1250 txd_clear_next(dep); /* ->next will be submitted */
1251 else
1252 dep_next = NULL; /* submit current dep and terminate */
1253 txd_unlock(dep);
1254
1255 dep->tx_submit(dep);
1256 }
1257
1258 chan->device->device_issue_pending(chan);
1259 }
1260 EXPORT_SYMBOL_GPL(dma_run_dependencies);
1261
1262 static int __init dma_bus_init(void)
1263 {
1264 int err = dmaengine_init_unmap_pool();
1265
1266 if (err)
1267 return err;
1268 return class_register(&dma_devclass);
1269 }
1270 arch_initcall(dma_bus_init);
1271
1272
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