dmaengine: ioatdma: Ignore IOAT devices under hotplug-capable PCI host bridge
[deliverable/linux.git] / drivers / dma / ioat / pci.c
1 /*
2 * Intel I/OAT DMA Linux driver
3 * Copyright(c) 2007 - 2009 Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in
15 * the file called "COPYING".
16 *
17 */
18
19 /*
20 * This driver supports an Intel I/OAT DMA engine, which does asynchronous
21 * copy operations.
22 */
23
24 #include <linux/init.h>
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/interrupt.h>
28 #include <linux/dca.h>
29 #include <linux/slab.h>
30 #include <linux/acpi.h>
31 #include "dma.h"
32 #include "dma_v2.h"
33 #include "registers.h"
34 #include "hw.h"
35
36 MODULE_VERSION(IOAT_DMA_VERSION);
37 MODULE_LICENSE("Dual BSD/GPL");
38 MODULE_AUTHOR("Intel Corporation");
39
40 static struct pci_device_id ioat_pci_tbl[] = {
41 /* I/OAT v1 platforms */
42 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT) },
43 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_CNB) },
44 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SCNB) },
45 { PCI_VDEVICE(UNISYS, PCI_DEVICE_ID_UNISYS_DMA_DIRECTOR) },
46
47 /* I/OAT v2 platforms */
48 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB) },
49
50 /* I/OAT v3 platforms */
51 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG0) },
52 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG1) },
53 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG2) },
54 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG3) },
55 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG4) },
56 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG5) },
57 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG6) },
58 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG7) },
59
60 /* I/OAT v3.2 platforms */
61 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF0) },
62 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF1) },
63 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF2) },
64 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF3) },
65 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF4) },
66 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF5) },
67 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF6) },
68 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF7) },
69 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF8) },
70 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF9) },
71
72 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB0) },
73 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB1) },
74 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB2) },
75 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB3) },
76 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB4) },
77 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB5) },
78 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB6) },
79 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB7) },
80 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB8) },
81 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB9) },
82
83 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB0) },
84 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB1) },
85 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB2) },
86 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB3) },
87 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB4) },
88 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB5) },
89 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB6) },
90 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB7) },
91 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB8) },
92 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB9) },
93
94 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW0) },
95 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW1) },
96 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW2) },
97 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW3) },
98 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW4) },
99 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW5) },
100 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW6) },
101 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW7) },
102 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW8) },
103 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW9) },
104
105 /* I/OAT v3.3 platforms */
106 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BWD0) },
107 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BWD1) },
108 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BWD2) },
109 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BWD3) },
110
111 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDXDE0) },
112 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDXDE1) },
113 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDXDE2) },
114 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDXDE3) },
115
116 { 0, }
117 };
118 MODULE_DEVICE_TABLE(pci, ioat_pci_tbl);
119
120 static int ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id);
121 static void ioat_remove(struct pci_dev *pdev);
122
123 static int ioat_dca_enabled = 1;
124 module_param(ioat_dca_enabled, int, 0644);
125 MODULE_PARM_DESC(ioat_dca_enabled, "control support of dca service (default: 1)");
126
127 struct kmem_cache *ioat2_cache;
128 struct kmem_cache *ioat3_sed_cache;
129
130 #define DRV_NAME "ioatdma"
131
132 static struct pci_driver ioat_pci_driver = {
133 .name = DRV_NAME,
134 .id_table = ioat_pci_tbl,
135 .probe = ioat_pci_probe,
136 .remove = ioat_remove,
137 };
138
139 static struct ioatdma_device *
140 alloc_ioatdma(struct pci_dev *pdev, void __iomem *iobase)
141 {
142 struct device *dev = &pdev->dev;
143 struct ioatdma_device *d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL);
144
145 if (!d)
146 return NULL;
147 d->pdev = pdev;
148 d->reg_base = iobase;
149 return d;
150 }
151
152 /*
153 * The dmaengine core assumes that async DMA devices will only be removed
154 * when they not used anymore, or it assumes dma_async_device_unregister()
155 * will only be called by dma driver exit routines. But this assumption is
156 * not true for the IOAT driver, which calls dma_async_device_unregister()
157 * from ioat_remove(). So current IOAT driver doesn't support device
158 * hot-removal because it may cause system crash to hot-remove inuse IOAT
159 * devices.
160 *
161 * This is a hack to disable IOAT devices under ejectable PCI host bridge
162 * so it won't break PCI host bridge hot-removal.
163 */
164 static bool ioat_pci_has_ejectable_acpi_ancestor(struct pci_dev *pdev)
165 {
166 #ifdef CONFIG_ACPI
167 struct pci_bus *bus = pdev->bus;
168 struct acpi_device *adev;
169
170 while (bus->parent)
171 bus = bus->parent;
172 for (adev = ACPI_COMPANION(bus->bridge); adev; adev = adev->parent)
173 if (adev->flags.ejectable)
174 return true;
175 #endif
176
177 return false;
178 }
179
180 static int ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
181 {
182 void __iomem * const *iomap;
183 struct device *dev = &pdev->dev;
184 struct ioatdma_device *device;
185 int err;
186
187 if (ioat_pci_has_ejectable_acpi_ancestor(pdev)) {
188 dev_dbg(&pdev->dev, "ignore ejectable IOAT device.\n");
189 return -ENODEV;
190 }
191
192 err = pcim_enable_device(pdev);
193 if (err)
194 return err;
195
196 err = pcim_iomap_regions(pdev, 1 << IOAT_MMIO_BAR, DRV_NAME);
197 if (err)
198 return err;
199 iomap = pcim_iomap_table(pdev);
200 if (!iomap)
201 return -ENOMEM;
202
203 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
204 if (err)
205 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
206 if (err)
207 return err;
208
209 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
210 if (err)
211 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
212 if (err)
213 return err;
214
215 device = alloc_ioatdma(pdev, iomap[IOAT_MMIO_BAR]);
216 if (!device)
217 return -ENOMEM;
218 pci_set_master(pdev);
219 pci_set_drvdata(pdev, device);
220
221 device->version = readb(device->reg_base + IOAT_VER_OFFSET);
222 if (device->version == IOAT_VER_1_2)
223 err = ioat1_dma_probe(device, ioat_dca_enabled);
224 else if (device->version == IOAT_VER_2_0)
225 err = ioat2_dma_probe(device, ioat_dca_enabled);
226 else if (device->version >= IOAT_VER_3_0)
227 err = ioat3_dma_probe(device, ioat_dca_enabled);
228 else
229 return -ENODEV;
230
231 if (err) {
232 dev_err(dev, "Intel(R) I/OAT DMA Engine init failed\n");
233 return -ENODEV;
234 }
235
236 return 0;
237 }
238
239 static void ioat_remove(struct pci_dev *pdev)
240 {
241 struct ioatdma_device *device = pci_get_drvdata(pdev);
242
243 if (!device)
244 return;
245
246 dev_err(&pdev->dev, "Removing dma and dca services\n");
247 if (device->dca) {
248 unregister_dca_provider(device->dca, &pdev->dev);
249 free_dca_provider(device->dca);
250 device->dca = NULL;
251 }
252 ioat_dma_remove(device);
253 }
254
255 static int __init ioat_init_module(void)
256 {
257 int err = -ENOMEM;
258
259 pr_info("%s: Intel(R) QuickData Technology Driver %s\n",
260 DRV_NAME, IOAT_DMA_VERSION);
261
262 ioat2_cache = kmem_cache_create("ioat2", sizeof(struct ioat_ring_ent),
263 0, SLAB_HWCACHE_ALIGN, NULL);
264 if (!ioat2_cache)
265 return -ENOMEM;
266
267 ioat3_sed_cache = KMEM_CACHE(ioat_sed_ent, 0);
268 if (!ioat3_sed_cache)
269 goto err_ioat2_cache;
270
271 err = pci_register_driver(&ioat_pci_driver);
272 if (err)
273 goto err_ioat3_cache;
274
275 return 0;
276
277 err_ioat3_cache:
278 kmem_cache_destroy(ioat3_sed_cache);
279
280 err_ioat2_cache:
281 kmem_cache_destroy(ioat2_cache);
282
283 return err;
284 }
285 module_init(ioat_init_module);
286
287 static void __exit ioat_exit_module(void)
288 {
289 pci_unregister_driver(&ioat_pci_driver);
290 kmem_cache_destroy(ioat2_cache);
291 }
292 module_exit(ioat_exit_module);
This page took 0.104947 seconds and 5 git commands to generate.