firewire: allow explicit flushing of iso packet completions
[deliverable/linux.git] / drivers / firewire / core-iso.c
1 /*
2 * Isochronous I/O functionality:
3 * - Isochronous DMA context management
4 * - Isochronous bus resource management (channels, bandwidth), client side
5 *
6 * Copyright (C) 2006 Kristian Hoegsberg <krh@bitplanet.net>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 */
22
23 #include <linux/dma-mapping.h>
24 #include <linux/errno.h>
25 #include <linux/firewire.h>
26 #include <linux/firewire-constants.h>
27 #include <linux/kernel.h>
28 #include <linux/mm.h>
29 #include <linux/slab.h>
30 #include <linux/spinlock.h>
31 #include <linux/vmalloc.h>
32
33 #include <asm/byteorder.h>
34
35 #include "core.h"
36
37 /*
38 * Isochronous DMA context management
39 */
40
41 int fw_iso_buffer_init(struct fw_iso_buffer *buffer, struct fw_card *card,
42 int page_count, enum dma_data_direction direction)
43 {
44 int i, j;
45 dma_addr_t address;
46
47 buffer->page_count = page_count;
48 buffer->direction = direction;
49
50 buffer->pages = kmalloc(page_count * sizeof(buffer->pages[0]),
51 GFP_KERNEL);
52 if (buffer->pages == NULL)
53 goto out;
54
55 for (i = 0; i < buffer->page_count; i++) {
56 buffer->pages[i] = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO);
57 if (buffer->pages[i] == NULL)
58 goto out_pages;
59
60 address = dma_map_page(card->device, buffer->pages[i],
61 0, PAGE_SIZE, direction);
62 if (dma_mapping_error(card->device, address)) {
63 __free_page(buffer->pages[i]);
64 goto out_pages;
65 }
66 set_page_private(buffer->pages[i], address);
67 }
68
69 return 0;
70
71 out_pages:
72 for (j = 0; j < i; j++) {
73 address = page_private(buffer->pages[j]);
74 dma_unmap_page(card->device, address,
75 PAGE_SIZE, direction);
76 __free_page(buffer->pages[j]);
77 }
78 kfree(buffer->pages);
79 out:
80 buffer->pages = NULL;
81
82 return -ENOMEM;
83 }
84 EXPORT_SYMBOL(fw_iso_buffer_init);
85
86 int fw_iso_buffer_map(struct fw_iso_buffer *buffer, struct vm_area_struct *vma)
87 {
88 unsigned long uaddr;
89 int i, err;
90
91 uaddr = vma->vm_start;
92 for (i = 0; i < buffer->page_count; i++) {
93 err = vm_insert_page(vma, uaddr, buffer->pages[i]);
94 if (err)
95 return err;
96
97 uaddr += PAGE_SIZE;
98 }
99
100 return 0;
101 }
102
103 void fw_iso_buffer_destroy(struct fw_iso_buffer *buffer,
104 struct fw_card *card)
105 {
106 int i;
107 dma_addr_t address;
108
109 for (i = 0; i < buffer->page_count; i++) {
110 address = page_private(buffer->pages[i]);
111 dma_unmap_page(card->device, address,
112 PAGE_SIZE, buffer->direction);
113 __free_page(buffer->pages[i]);
114 }
115
116 kfree(buffer->pages);
117 buffer->pages = NULL;
118 }
119 EXPORT_SYMBOL(fw_iso_buffer_destroy);
120
121 /* Convert DMA address to offset into virtually contiguous buffer. */
122 size_t fw_iso_buffer_lookup(struct fw_iso_buffer *buffer, dma_addr_t completed)
123 {
124 int i;
125 dma_addr_t address;
126 ssize_t offset;
127
128 for (i = 0; i < buffer->page_count; i++) {
129 address = page_private(buffer->pages[i]);
130 offset = (ssize_t)completed - (ssize_t)address;
131 if (offset > 0 && offset <= PAGE_SIZE)
132 return (i << PAGE_SHIFT) + offset;
133 }
134
135 return 0;
136 }
137
138 struct fw_iso_context *fw_iso_context_create(struct fw_card *card,
139 int type, int channel, int speed, size_t header_size,
140 fw_iso_callback_t callback, void *callback_data)
141 {
142 struct fw_iso_context *ctx;
143
144 ctx = card->driver->allocate_iso_context(card,
145 type, channel, header_size);
146 if (IS_ERR(ctx))
147 return ctx;
148
149 ctx->card = card;
150 ctx->type = type;
151 ctx->channel = channel;
152 ctx->speed = speed;
153 ctx->header_size = header_size;
154 ctx->callback.sc = callback;
155 ctx->callback_data = callback_data;
156
157 return ctx;
158 }
159 EXPORT_SYMBOL(fw_iso_context_create);
160
161 void fw_iso_context_destroy(struct fw_iso_context *ctx)
162 {
163 ctx->card->driver->free_iso_context(ctx);
164 }
165 EXPORT_SYMBOL(fw_iso_context_destroy);
166
167 int fw_iso_context_start(struct fw_iso_context *ctx,
168 int cycle, int sync, int tags)
169 {
170 return ctx->card->driver->start_iso(ctx, cycle, sync, tags);
171 }
172 EXPORT_SYMBOL(fw_iso_context_start);
173
174 int fw_iso_context_set_channels(struct fw_iso_context *ctx, u64 *channels)
175 {
176 return ctx->card->driver->set_iso_channels(ctx, channels);
177 }
178
179 int fw_iso_context_queue(struct fw_iso_context *ctx,
180 struct fw_iso_packet *packet,
181 struct fw_iso_buffer *buffer,
182 unsigned long payload)
183 {
184 return ctx->card->driver->queue_iso(ctx, packet, buffer, payload);
185 }
186 EXPORT_SYMBOL(fw_iso_context_queue);
187
188 void fw_iso_context_queue_flush(struct fw_iso_context *ctx)
189 {
190 ctx->card->driver->flush_queue_iso(ctx);
191 }
192 EXPORT_SYMBOL(fw_iso_context_queue_flush);
193
194 int fw_iso_context_flush_completions(struct fw_iso_context *ctx)
195 {
196 return ctx->card->driver->flush_iso_completions(ctx);
197 }
198 EXPORT_SYMBOL(fw_iso_context_flush_completions);
199
200 int fw_iso_context_stop(struct fw_iso_context *ctx)
201 {
202 return ctx->card->driver->stop_iso(ctx);
203 }
204 EXPORT_SYMBOL(fw_iso_context_stop);
205
206 /*
207 * Isochronous bus resource management (channels, bandwidth), client side
208 */
209
210 static int manage_bandwidth(struct fw_card *card, int irm_id, int generation,
211 int bandwidth, bool allocate)
212 {
213 int try, new, old = allocate ? BANDWIDTH_AVAILABLE_INITIAL : 0;
214 __be32 data[2];
215
216 /*
217 * On a 1394a IRM with low contention, try < 1 is enough.
218 * On a 1394-1995 IRM, we need at least try < 2.
219 * Let's just do try < 5.
220 */
221 for (try = 0; try < 5; try++) {
222 new = allocate ? old - bandwidth : old + bandwidth;
223 if (new < 0 || new > BANDWIDTH_AVAILABLE_INITIAL)
224 return -EBUSY;
225
226 data[0] = cpu_to_be32(old);
227 data[1] = cpu_to_be32(new);
228 switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
229 irm_id, generation, SCODE_100,
230 CSR_REGISTER_BASE + CSR_BANDWIDTH_AVAILABLE,
231 data, 8)) {
232 case RCODE_GENERATION:
233 /* A generation change frees all bandwidth. */
234 return allocate ? -EAGAIN : bandwidth;
235
236 case RCODE_COMPLETE:
237 if (be32_to_cpup(data) == old)
238 return bandwidth;
239
240 old = be32_to_cpup(data);
241 /* Fall through. */
242 }
243 }
244
245 return -EIO;
246 }
247
248 static int manage_channel(struct fw_card *card, int irm_id, int generation,
249 u32 channels_mask, u64 offset, bool allocate)
250 {
251 __be32 bit, all, old;
252 __be32 data[2];
253 int channel, ret = -EIO, retry = 5;
254
255 old = all = allocate ? cpu_to_be32(~0) : 0;
256
257 for (channel = 0; channel < 32; channel++) {
258 if (!(channels_mask & 1 << channel))
259 continue;
260
261 ret = -EBUSY;
262
263 bit = cpu_to_be32(1 << (31 - channel));
264 if ((old & bit) != (all & bit))
265 continue;
266
267 data[0] = old;
268 data[1] = old ^ bit;
269 switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
270 irm_id, generation, SCODE_100,
271 offset, data, 8)) {
272 case RCODE_GENERATION:
273 /* A generation change frees all channels. */
274 return allocate ? -EAGAIN : channel;
275
276 case RCODE_COMPLETE:
277 if (data[0] == old)
278 return channel;
279
280 old = data[0];
281
282 /* Is the IRM 1394a-2000 compliant? */
283 if ((data[0] & bit) == (data[1] & bit))
284 continue;
285
286 /* 1394-1995 IRM, fall through to retry. */
287 default:
288 if (retry) {
289 retry--;
290 channel--;
291 } else {
292 ret = -EIO;
293 }
294 }
295 }
296
297 return ret;
298 }
299
300 static void deallocate_channel(struct fw_card *card, int irm_id,
301 int generation, int channel)
302 {
303 u32 mask;
304 u64 offset;
305
306 mask = channel < 32 ? 1 << channel : 1 << (channel - 32);
307 offset = channel < 32 ? CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI :
308 CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO;
309
310 manage_channel(card, irm_id, generation, mask, offset, false);
311 }
312
313 /**
314 * fw_iso_resource_manage() - Allocate or deallocate a channel and/or bandwidth
315 *
316 * In parameters: card, generation, channels_mask, bandwidth, allocate
317 * Out parameters: channel, bandwidth
318 * This function blocks (sleeps) during communication with the IRM.
319 *
320 * Allocates or deallocates at most one channel out of channels_mask.
321 * channels_mask is a bitfield with MSB for channel 63 and LSB for channel 0.
322 * (Note, the IRM's CHANNELS_AVAILABLE is a big-endian bitfield with MSB for
323 * channel 0 and LSB for channel 63.)
324 * Allocates or deallocates as many bandwidth allocation units as specified.
325 *
326 * Returns channel < 0 if no channel was allocated or deallocated.
327 * Returns bandwidth = 0 if no bandwidth was allocated or deallocated.
328 *
329 * If generation is stale, deallocations succeed but allocations fail with
330 * channel = -EAGAIN.
331 *
332 * If channel allocation fails, no bandwidth will be allocated either.
333 * If bandwidth allocation fails, no channel will be allocated either.
334 * But deallocations of channel and bandwidth are tried independently
335 * of each other's success.
336 */
337 void fw_iso_resource_manage(struct fw_card *card, int generation,
338 u64 channels_mask, int *channel, int *bandwidth,
339 bool allocate)
340 {
341 u32 channels_hi = channels_mask; /* channels 31...0 */
342 u32 channels_lo = channels_mask >> 32; /* channels 63...32 */
343 int irm_id, ret, c = -EINVAL;
344
345 spin_lock_irq(&card->lock);
346 irm_id = card->irm_node->node_id;
347 spin_unlock_irq(&card->lock);
348
349 if (channels_hi)
350 c = manage_channel(card, irm_id, generation, channels_hi,
351 CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI,
352 allocate);
353 if (channels_lo && c < 0) {
354 c = manage_channel(card, irm_id, generation, channels_lo,
355 CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO,
356 allocate);
357 if (c >= 0)
358 c += 32;
359 }
360 *channel = c;
361
362 if (allocate && channels_mask != 0 && c < 0)
363 *bandwidth = 0;
364
365 if (*bandwidth == 0)
366 return;
367
368 ret = manage_bandwidth(card, irm_id, generation, *bandwidth, allocate);
369 if (ret < 0)
370 *bandwidth = 0;
371
372 if (allocate && ret < 0) {
373 if (c >= 0)
374 deallocate_channel(card, irm_id, generation, c);
375 *channel = ret;
376 }
377 }
378 EXPORT_SYMBOL(fw_iso_resource_manage);
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