drivers/gpio/basic_mmio_gpio.c

   1 /*
   2  * Driver for basic memory-mapped GPIO controllers.
   3  *
   4  * Copyright 2008 MontaVista Software, Inc.
   5  * Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
   6  *
   7  * This program is free software; you can redistribute  it and/or modify it
   8  * under  the terms of  the GNU General  Public License as published by the
   9  * Free Software Foundation;  either version 2 of the  License, or (at your
  10  * option) any later version.
  11  *
  12  * ....``.```~~~~````.`.`.`.`.```````'',,,.........`````......`.......
  13  * ...``                                                         ```````..
  14  * ..The simplest form of a GPIO controller that the driver supports is``
  15  *  `.just a single "data" register, where GPIO state can be read and/or `
  16  *    `,..written. ,,..``~~~~ .....``.`.`.~~.```.`.........``````.```````
  17  *        `````````
  18                                     ___
  19 _/~~|___/~|   . ```~~~~~~       ___/___\___     ,~.`.`.`.`````.~~...,,,,...
  20 __________|~$@~~~        %~    /o*o*o*o*o*o\   .. Implementing such a GPIO .
  21 o        `                     ~~~~\___/~~~~    ` controller in FPGA is ,.`
  22                                                  `....trivial..'~`.```.```
  23  *                                                    ```````
  24  *  .```````~~~~`..`.``.``.
  25  * .  The driver supports  `...       ,..```.`~~~```````````````....````.``,,
  26  * .   big-endian notation, just`.  .. A bit more sophisticated controllers ,
  27  *  . register the device with -be`. .with a pair of set/clear-bit registers ,
  28  *   `.. suffix.  ```~~`````....`.`   . affecting the data register and the .`
  29  *     ``.`.``...```                  ```.. output pins are also supported.`
  30  *                        ^^             `````.`````````.,``~``~``~~``````
  31  *                                                   .                  ^^
  32  *   ,..`.`.`...````````````......`.`.`.`.`.`..`.`.`..
  33  * .. The expectation is that in at least some cases .    ,-~~~-,
  34  *  .this will be used with roll-your-own ASIC/FPGA .`     \   /
  35  *  .logic in Verilog or VHDL. ~~~`````````..`````~~`       \ /
  36  *  ..````````......```````````                             \o_
  37  *                                                           |
  38  *                              ^^                          / \
  39  *
  40  *           ...`````~~`.....``.`..........``````.`.``.```........``.
  41  *            `  8, 16, 32 and 64 bits registers are supported, and``.
  42  *            . the number of GPIOs is determined by the width of   ~
  43  *             .. the registers. ,............```.`.`..`.`.~~~.`.`.`~
  44  *               `.......````.```
  45  */
  46
  47 #include <linux/init.h>
  48 #include <linux/bug.h>
  49 #include <linux/kernel.h>
  50 #include <linux/module.h>
  51 #include <linux/spinlock.h>
  52 #include <linux/compiler.h>
  53 #include <linux/types.h>
  54 #include <linux/errno.h>
  55 #include <linux/log2.h>
  56 #include <linux/ioport.h>
  57 #include <linux/io.h>
  58 #include <linux/gpio.h>
  59 #include <linux/slab.h>
  60 #include <linux/platform_device.h>
  61 #include <linux/mod_devicetable.h>
  62 #include <linux/basic_mmio_gpio.h>
  63
  64 struct bgpio_chip {
  65         struct gpio_chip gc;
  66
  67         unsigned long (*read_reg)(void __iomem *reg);
  68         void (*write_reg)(void __iomem *reg, unsigned long data);
  69
  70         void __iomem *reg_dat;
  71         void __iomem *reg_set;
  72         void __iomem *reg_clr;
  73
  74         /* Number of bits (GPIOs): <register width> * 8. */
  75         int bits;
  76
  77         /*
  78          * Some GPIO controllers work with the big-endian bits notation,
  79          * e.g. in a 8-bits register, GPIO7 is the least significant bit.
  80          */
  81         unsigned long (*pin2mask)(struct bgpio_chip *bgc, unsigned int pin);
  82
  83         /*
  84          * Used to lock bgpio_chip->data. Also, this is needed to keep
  85          * shadowed and real data registers writes together.
  86          */
  87         spinlock_t lock;
  88
  89         /* Shadowed data register to clear/set bits safely. */
  90         unsigned long data;
  91 };
  92
  93 static struct bgpio_chip *to_bgpio_chip(struct gpio_chip *gc)
  94 {
  95         return container_of(gc, struct bgpio_chip, gc);
  96 }
  97
  98 static void bgpio_write8(void __iomem *reg, unsigned long data)
  99 {
 100         __raw_writeb(data, reg);
 101 }
 102
 103 static unsigned long bgpio_read8(void __iomem *reg)
 104 {
 105         return __raw_readb(reg);
 106 }
 107
 108 static void bgpio_write16(void __iomem *reg, unsigned long data)
 109 {
 110         __raw_writew(data, reg);
 111 }
 112
 113 static unsigned long bgpio_read16(void __iomem *reg)
 114 {
 115         return __raw_readw(reg);
 116 }
 117
 118 static void bgpio_write32(void __iomem *reg, unsigned long data)
 119 {
 120         __raw_writel(data, reg);
 121 }
 122
 123 static unsigned long bgpio_read32(void __iomem *reg)
 124 {
 125         return __raw_readl(reg);
 126 }
 127
 128 #if BITS_PER_LONG >= 64
 129 static void bgpio_write64(void __iomem *reg, unsigned long data)
 130 {
 131         __raw_writeq(data, reg);
 132 }
 133
 134 static unsigned long bgpio_read64(void __iomem *reg)
 135 {
 136         return __raw_readq(reg);
 137 }
 138 #endif /* BITS_PER_LONG >= 64 */
 139
 140 static unsigned long bgpio_pin2mask(struct bgpio_chip *bgc, unsigned int pin)
 141 {
 142         return 1 << pin;
 143 }
 144
 145 static unsigned long bgpio_pin2mask_be(struct bgpio_chip *bgc,
 146                                        unsigned int pin)
 147 {
 148         return 1 << (bgc->bits - 1 - pin);
 149 }
 150
 151 static int bgpio_get(struct gpio_chip *gc, unsigned int gpio)
 152 {
 153         struct bgpio_chip *bgc = to_bgpio_chip(gc);
 154
 155         return bgc->read_reg(bgc->reg_dat) & bgc->pin2mask(bgc, gpio);
 156 }
 157
 158 static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
 159 {
 160         struct bgpio_chip *bgc = to_bgpio_chip(gc);
 161         unsigned long mask = bgc->pin2mask(bgc, gpio);
 162         unsigned long flags;
 163
 164         if (bgc->reg_set) {
 165                 if (val)
 166                         bgc->write_reg(bgc->reg_set, mask);
 167                 else
 168                         bgc->write_reg(bgc->reg_clr, mask);
 169                 return;
 170         }
 171
 172         spin_lock_irqsave(&bgc->lock, flags);
 173
 174         if (val)
 175                 bgc->data |= mask;
 176         else
 177                 bgc->data &= ~mask;
 178
 179         bgc->write_reg(bgc->reg_dat, bgc->data);
 180
 181         spin_unlock_irqrestore(&bgc->lock, flags);
 182 }
 183
 184 static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
 185 {
 186         return 0;
 187 }
 188
 189 static int bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
 190 {
 191         bgpio_set(gc, gpio, val);
 192         return 0;
 193 }
 194
 195 static int bgpio_setup_accessors(struct platform_device *pdev,
 196                                  struct bgpio_chip *bgc)
 197 {
 198         const struct platform_device_id *platid = platform_get_device_id(pdev);
 199
 200         switch (bgc->bits) {
 201         case 8:
 202                 bgc->read_reg   = bgpio_read8;
 203                 bgc->write_reg  = bgpio_write8;
 204                 break;
 205         case 16:
 206                 bgc->read_reg   = bgpio_read16;
 207                 bgc->write_reg  = bgpio_write16;
 208                 break;
 209         case 32:
 210                 bgc->read_reg   = bgpio_read32;
 211                 bgc->write_reg  = bgpio_write32;
 212                 break;
 213 #if BITS_PER_LONG >= 64
 214         case 64:
 215                 bgc->read_reg   = bgpio_read64;
 216                 bgc->write_reg  = bgpio_write64;
 217                 break;
 218 #endif /* BITS_PER_LONG >= 64 */
 219         default:
 220                 dev_err(&pdev->dev, "unsupported data width %u bits\n",
 221                         bgc->bits);
 222                 return -EINVAL;
 223         }
 224
 225         bgc->pin2mask = strcmp(platid->name, "basic-mmio-gpio-be") ?
 226                 bgpio_pin2mask : bgpio_pin2mask_be;
 227
 228         return 0;
 229 }
 230
 231 static int __devinit bgpio_probe(struct platform_device *pdev)
 232 {
 233         struct device *dev = &pdev->dev;
 234         struct bgpio_pdata *pdata = dev_get_platdata(dev);
 235         struct bgpio_chip *bgc;
 236         struct resource *res_dat;
 237         struct resource *res_set;
 238         struct resource *res_clr;
 239         resource_size_t dat_sz;
 240         int bits;
 241         int ret;
 242
 243         res_dat = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat");
 244         if (!res_dat)
 245                 return -EINVAL;
 246
 247         dat_sz = resource_size(res_dat);
 248         if (!is_power_of_2(dat_sz))
 249                 return -EINVAL;
 250
 251         bits = dat_sz * 8;
 252         if (bits > BITS_PER_LONG)
 253                 return -EINVAL;
 254
 255         bgc = devm_kzalloc(dev, sizeof(*bgc), GFP_KERNEL);
 256         if (!bgc)
 257                 return -ENOMEM;
 258
 259         bgc->reg_dat = devm_ioremap(dev, res_dat->start, dat_sz);
 260         if (!bgc->reg_dat)
 261                 return -ENOMEM;
 262
 263         res_set = platform_get_resource_byname(pdev, IORESOURCE_MEM, "set");
 264         res_clr = platform_get_resource_byname(pdev, IORESOURCE_MEM, "clr");
 265         if (res_set && res_clr) {
 266                 if (resource_size(res_set) != resource_size(res_clr) ||
 267                                 resource_size(res_set) != dat_sz)
 268                         return -EINVAL;
 269
 270                 bgc->reg_set = devm_ioremap(dev, res_set->start, dat_sz);
 271                 bgc->reg_clr = devm_ioremap(dev, res_clr->start, dat_sz);
 272                 if (!bgc->reg_set || !bgc->reg_clr)
 273                         return -ENOMEM;
 274         } else if (res_set || res_clr) {
 275                 return -EINVAL;
 276         }
 277
 278         spin_lock_init(&bgc->lock);
 279
 280         bgc->bits = bits;
 281         ret = bgpio_setup_accessors(pdev, bgc);
 282         if (ret)
 283                 return ret;
 284
 285         bgc->data = bgc->read_reg(bgc->reg_dat);
 286         bgc->gc.ngpio = bits;
 287         bgc->gc.direction_input = bgpio_dir_in;
 288         bgc->gc.direction_output = bgpio_dir_out;
 289         bgc->gc.get = bgpio_get;
 290         bgc->gc.set = bgpio_set;
 291         bgc->gc.dev = dev;
 292         bgc->gc.label = dev_name(dev);
 293
 294         if (pdata)
 295                 bgc->gc.base = pdata->base;
 296         else
 297                 bgc->gc.base = -1;
 298
 299         platform_set_drvdata(pdev, bgc);
 300
 301         ret = gpiochip_add(&bgc->gc);
 302         if (ret)
 303                 dev_err(dev, "gpiochip_add() failed: %d\n", ret);
 304
 305         return ret;
 306 }
 307
 308 static int __devexit bgpio_remove(struct platform_device *pdev)
 309 {
 310         struct bgpio_chip *bgc = platform_get_drvdata(pdev);
 311
 312         return gpiochip_remove(&bgc->gc);
 313 }
 314
 315 static const struct platform_device_id bgpio_id_table[] = {
 316         { "basic-mmio-gpio", },
 317         { "basic-mmio-gpio-be", },
 318         {},
 319 };
 320 MODULE_DEVICE_TABLE(platform, bgpio_id_table);
 321
 322 static struct platform_driver bgpio_driver = {
 323         .driver = {
 324                 .name = "basic-mmio-gpio",
 325         },
 326         .id_table = bgpio_id_table,
 327         .probe = bgpio_probe,
 328         .remove = __devexit_p(bgpio_remove),
 329 };
 330
 331 static int __init bgpio_init(void)
 332 {
 333         return platform_driver_register(&bgpio_driver);
 334 }
 335 module_init(bgpio_init);
 336
 337 static void __exit bgpio_exit(void)
 338 {
 339         platform_driver_unregister(&bgpio_driver);
 340 }
 341 module_exit(bgpio_exit);
 342
 343 MODULE_DESCRIPTION("Driver for basic memory-mapped GPIO controllers");
 344 MODULE_AUTHOR("Anton Vorontsov <cbouatmailru@gmail.com>");
 345 MODULE_LICENSE("GPL");