2 * GPIO driver for Fintek Super-I/O F71869, F71869A, F71882 and F71889
4 * Copyright (C) 2010-2013 LaCie
6 * Author: Simon Guinot <simon.guinot@sequanux.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/platform_device.h>
18 #include <linux/gpio.h>
20 #define DRVNAME "gpio-f7188x"
25 #define SIO_LDSEL 0x07 /* Logical device select */
26 #define SIO_DEVID 0x20 /* Device ID (2 bytes) */
27 #define SIO_DEVREV 0x22 /* Device revision */
28 #define SIO_MANID 0x23 /* Fintek ID (2 bytes) */
30 #define SIO_LD_GPIO 0x06 /* GPIO logical device */
31 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
32 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
34 #define SIO_FINTEK_ID 0x1934 /* Manufacturer ID */
35 #define SIO_F71869_ID 0x0814 /* F71869 chipset ID */
36 #define SIO_F71869A_ID 0x1007 /* F71869A chipset ID */
37 #define SIO_F71882_ID 0x0541 /* F71882 chipset ID */
38 #define SIO_F71889_ID 0x0909 /* F71889 chipset ID */
40 enum chips
{ f71869
, f71869a
, f71882fg
, f71889f
};
42 static const char * const f7188x_names
[] = {
54 struct f7188x_gpio_bank
{
55 struct gpio_chip chip
;
57 struct f7188x_gpio_data
*data
;
60 struct f7188x_gpio_data
{
61 struct f7188x_sio
*sio
;
63 struct f7188x_gpio_bank
*bank
;
67 * Super-I/O functions.
70 static inline int superio_inb(int base
, int reg
)
76 static int superio_inw(int base
, int reg
)
81 val
= inb(base
+ 1) << 8;
88 static inline void superio_outb(int base
, int reg
, int val
)
94 static inline int superio_enter(int base
)
96 /* Don't step on other drivers' I/O space by accident. */
97 if (!request_muxed_region(base
, 2, DRVNAME
)) {
98 pr_err(DRVNAME
"I/O address 0x%04x already in use\n", base
);
102 /* According to the datasheet the key must be send twice. */
103 outb(SIO_UNLOCK_KEY
, base
);
104 outb(SIO_UNLOCK_KEY
, base
);
109 static inline void superio_select(int base
, int ld
)
111 outb(SIO_LDSEL
, base
);
115 static inline void superio_exit(int base
)
117 outb(SIO_LOCK_KEY
, base
);
118 release_region(base
, 2);
125 static int f7188x_gpio_direction_in(struct gpio_chip
*chip
, unsigned offset
);
126 static int f7188x_gpio_get(struct gpio_chip
*chip
, unsigned offset
);
127 static int f7188x_gpio_direction_out(struct gpio_chip
*chip
,
128 unsigned offset
, int value
);
129 static void f7188x_gpio_set(struct gpio_chip
*chip
, unsigned offset
, int value
);
131 #define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \
135 .owner = THIS_MODULE, \
136 .direction_input = f7188x_gpio_direction_in, \
137 .get = f7188x_gpio_get, \
138 .direction_output = f7188x_gpio_direction_out, \
139 .set = f7188x_gpio_set, \
144 .regbase = _regbase, \
147 #define gpio_dir(base) (base + 0)
148 #define gpio_data_out(base) (base + 1)
149 #define gpio_data_in(base) (base + 2)
150 /* Output mode register (0:open drain 1:push-pull). */
151 #define gpio_out_mode(base) (base + 3)
153 static struct f7188x_gpio_bank f71869_gpio_bank
[] = {
154 F7188X_GPIO_BANK(0, 6, 0xF0),
155 F7188X_GPIO_BANK(10, 8, 0xE0),
156 F7188X_GPIO_BANK(20, 8, 0xD0),
157 F7188X_GPIO_BANK(30, 8, 0xC0),
158 F7188X_GPIO_BANK(40, 8, 0xB0),
159 F7188X_GPIO_BANK(50, 5, 0xA0),
160 F7188X_GPIO_BANK(60, 6, 0x90),
163 static struct f7188x_gpio_bank f71869a_gpio_bank
[] = {
164 F7188X_GPIO_BANK(0, 6, 0xF0),
165 F7188X_GPIO_BANK(10, 8, 0xE0),
166 F7188X_GPIO_BANK(20, 8, 0xD0),
167 F7188X_GPIO_BANK(30, 8, 0xC0),
168 F7188X_GPIO_BANK(40, 8, 0xB0),
169 F7188X_GPIO_BANK(50, 5, 0xA0),
170 F7188X_GPIO_BANK(60, 8, 0x90),
171 F7188X_GPIO_BANK(70, 8, 0x80),
174 static struct f7188x_gpio_bank f71882_gpio_bank
[] = {
175 F7188X_GPIO_BANK(0, 8, 0xF0),
176 F7188X_GPIO_BANK(10, 8, 0xE0),
177 F7188X_GPIO_BANK(20, 8, 0xD0),
178 F7188X_GPIO_BANK(30, 4, 0xC0),
179 F7188X_GPIO_BANK(40, 4, 0xB0),
182 static struct f7188x_gpio_bank f71889_gpio_bank
[] = {
183 F7188X_GPIO_BANK(0, 7, 0xF0),
184 F7188X_GPIO_BANK(10, 7, 0xE0),
185 F7188X_GPIO_BANK(20, 8, 0xD0),
186 F7188X_GPIO_BANK(30, 8, 0xC0),
187 F7188X_GPIO_BANK(40, 8, 0xB0),
188 F7188X_GPIO_BANK(50, 5, 0xA0),
189 F7188X_GPIO_BANK(60, 8, 0x90),
190 F7188X_GPIO_BANK(70, 8, 0x80),
193 static int f7188x_gpio_direction_in(struct gpio_chip
*chip
, unsigned offset
)
196 struct f7188x_gpio_bank
*bank
= gpiochip_get_data(chip
);
197 struct f7188x_sio
*sio
= bank
->data
->sio
;
200 err
= superio_enter(sio
->addr
);
203 superio_select(sio
->addr
, SIO_LD_GPIO
);
205 dir
= superio_inb(sio
->addr
, gpio_dir(bank
->regbase
));
206 dir
&= ~(1 << offset
);
207 superio_outb(sio
->addr
, gpio_dir(bank
->regbase
), dir
);
209 superio_exit(sio
->addr
);
214 static int f7188x_gpio_get(struct gpio_chip
*chip
, unsigned offset
)
217 struct f7188x_gpio_bank
*bank
= gpiochip_get_data(chip
);
218 struct f7188x_sio
*sio
= bank
->data
->sio
;
221 err
= superio_enter(sio
->addr
);
224 superio_select(sio
->addr
, SIO_LD_GPIO
);
226 dir
= superio_inb(sio
->addr
, gpio_dir(bank
->regbase
));
227 dir
= !!(dir
& (1 << offset
));
229 data
= superio_inb(sio
->addr
, gpio_data_out(bank
->regbase
));
231 data
= superio_inb(sio
->addr
, gpio_data_in(bank
->regbase
));
233 superio_exit(sio
->addr
);
235 return !!(data
& 1 << offset
);
238 static int f7188x_gpio_direction_out(struct gpio_chip
*chip
,
239 unsigned offset
, int value
)
242 struct f7188x_gpio_bank
*bank
= gpiochip_get_data(chip
);
243 struct f7188x_sio
*sio
= bank
->data
->sio
;
246 err
= superio_enter(sio
->addr
);
249 superio_select(sio
->addr
, SIO_LD_GPIO
);
251 data_out
= superio_inb(sio
->addr
, gpio_data_out(bank
->regbase
));
253 data_out
|= (1 << offset
);
255 data_out
&= ~(1 << offset
);
256 superio_outb(sio
->addr
, gpio_data_out(bank
->regbase
), data_out
);
258 dir
= superio_inb(sio
->addr
, gpio_dir(bank
->regbase
));
259 dir
|= (1 << offset
);
260 superio_outb(sio
->addr
, gpio_dir(bank
->regbase
), dir
);
262 superio_exit(sio
->addr
);
267 static void f7188x_gpio_set(struct gpio_chip
*chip
, unsigned offset
, int value
)
270 struct f7188x_gpio_bank
*bank
= gpiochip_get_data(chip
);
271 struct f7188x_sio
*sio
= bank
->data
->sio
;
274 err
= superio_enter(sio
->addr
);
277 superio_select(sio
->addr
, SIO_LD_GPIO
);
279 data_out
= superio_inb(sio
->addr
, gpio_data_out(bank
->regbase
));
281 data_out
|= (1 << offset
);
283 data_out
&= ~(1 << offset
);
284 superio_outb(sio
->addr
, gpio_data_out(bank
->regbase
), data_out
);
286 superio_exit(sio
->addr
);
290 * Platform device and driver.
293 static int f7188x_gpio_probe(struct platform_device
*pdev
)
297 struct f7188x_sio
*sio
= dev_get_platdata(&pdev
->dev
);
298 struct f7188x_gpio_data
*data
;
300 data
= devm_kzalloc(&pdev
->dev
, sizeof(*data
), GFP_KERNEL
);
306 data
->nr_bank
= ARRAY_SIZE(f71869_gpio_bank
);
307 data
->bank
= f71869_gpio_bank
;
310 data
->nr_bank
= ARRAY_SIZE(f71869a_gpio_bank
);
311 data
->bank
= f71869a_gpio_bank
;
314 data
->nr_bank
= ARRAY_SIZE(f71882_gpio_bank
);
315 data
->bank
= f71882_gpio_bank
;
318 data
->nr_bank
= ARRAY_SIZE(f71889_gpio_bank
);
319 data
->bank
= f71889_gpio_bank
;
326 platform_set_drvdata(pdev
, data
);
328 /* For each GPIO bank, register a GPIO chip. */
329 for (i
= 0; i
< data
->nr_bank
; i
++) {
330 struct f7188x_gpio_bank
*bank
= &data
->bank
[i
];
332 bank
->chip
.parent
= &pdev
->dev
;
335 err
= gpiochip_add_data(&bank
->chip
, bank
);
338 "Failed to register gpiochip %d: %d\n",
347 for (i
= i
- 1; i
>= 0; i
--) {
348 struct f7188x_gpio_bank
*bank
= &data
->bank
[i
];
349 gpiochip_remove(&bank
->chip
);
355 static int f7188x_gpio_remove(struct platform_device
*pdev
)
358 struct f7188x_gpio_data
*data
= platform_get_drvdata(pdev
);
360 for (i
= 0; i
< data
->nr_bank
; i
++) {
361 struct f7188x_gpio_bank
*bank
= &data
->bank
[i
];
362 gpiochip_remove(&bank
->chip
);
368 static int __init
f7188x_find(int addr
, struct f7188x_sio
*sio
)
373 err
= superio_enter(addr
);
378 devid
= superio_inw(addr
, SIO_MANID
);
379 if (devid
!= SIO_FINTEK_ID
) {
380 pr_debug(DRVNAME
": Not a Fintek device at 0x%08x\n", addr
);
384 devid
= superio_inw(addr
, SIO_DEVID
);
393 sio
->type
= f71882fg
;
399 pr_info(DRVNAME
": Unsupported Fintek device 0x%04x\n", devid
);
405 pr_info(DRVNAME
": Found %s at %#x, revision %d\n",
406 f7188x_names
[sio
->type
],
408 (int) superio_inb(addr
, SIO_DEVREV
));
415 static struct platform_device
*f7188x_gpio_pdev
;
418 f7188x_gpio_device_add(const struct f7188x_sio
*sio
)
422 f7188x_gpio_pdev
= platform_device_alloc(DRVNAME
, -1);
423 if (!f7188x_gpio_pdev
)
426 err
= platform_device_add_data(f7188x_gpio_pdev
,
429 pr_err(DRVNAME
"Platform data allocation failed\n");
433 err
= platform_device_add(f7188x_gpio_pdev
);
435 pr_err(DRVNAME
"Device addition failed\n");
442 platform_device_put(f7188x_gpio_pdev
);
448 * Try to match a supported Fintek device by reading the (hard-wired)
449 * configuration I/O ports. If available, then register both the platform
450 * device and driver to support the GPIOs.
453 static struct platform_driver f7188x_gpio_driver
= {
457 .probe
= f7188x_gpio_probe
,
458 .remove
= f7188x_gpio_remove
,
461 static int __init
f7188x_gpio_init(void)
464 struct f7188x_sio sio
;
466 if (f7188x_find(0x2e, &sio
) &&
467 f7188x_find(0x4e, &sio
))
470 err
= platform_driver_register(&f7188x_gpio_driver
);
472 err
= f7188x_gpio_device_add(&sio
);
474 platform_driver_unregister(&f7188x_gpio_driver
);
479 subsys_initcall(f7188x_gpio_init
);
481 static void __exit
f7188x_gpio_exit(void)
483 platform_device_unregister(f7188x_gpio_pdev
);
484 platform_driver_unregister(&f7188x_gpio_driver
);
486 module_exit(f7188x_gpio_exit
);
488 MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG and F71889F");
489 MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>");
490 MODULE_LICENSE("GPL");