2 * MXC GPIO support. (c) 2008 Daniel Mack <daniel@caiaq.de>
3 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
5 * Based on code from Freescale,
6 * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
23 #include <linux/init.h>
24 #include <linux/interrupt.h>
26 #include <linux/irq.h>
27 #include <linux/gpio.h>
28 #include <linux/platform_device.h>
29 #include <linux/slab.h>
30 #include <linux/basic_mmio_gpio.h>
31 #include <linux/module.h>
36 #define PINCTRL_DOUT(p) ((is_imx23_gpio(p) ? 0x0500 : 0x0700) + (p->id) * 0x10)
37 #define PINCTRL_DIN(p) ((is_imx23_gpio(p) ? 0x0600 : 0x0900) + (p->id) * 0x10)
38 #define PINCTRL_DOE(p) ((is_imx23_gpio(p) ? 0x0700 : 0x0b00) + (p->id) * 0x10)
39 #define PINCTRL_PIN2IRQ(p) ((is_imx23_gpio(p) ? 0x0800 : 0x1000) + (p->id) * 0x10)
40 #define PINCTRL_IRQEN(p) ((is_imx23_gpio(p) ? 0x0900 : 0x1100) + (p->id) * 0x10)
41 #define PINCTRL_IRQLEV(p) ((is_imx23_gpio(p) ? 0x0a00 : 0x1200) + (p->id) * 0x10)
42 #define PINCTRL_IRQPOL(p) ((is_imx23_gpio(p) ? 0x0b00 : 0x1300) + (p->id) * 0x10)
43 #define PINCTRL_IRQSTAT(p) ((is_imx23_gpio(p) ? 0x0c00 : 0x1400) + (p->id) * 0x10)
45 #define GPIO_INT_FALL_EDGE 0x0
46 #define GPIO_INT_LOW_LEV 0x1
47 #define GPIO_INT_RISE_EDGE 0x2
48 #define GPIO_INT_HIGH_LEV 0x3
49 #define GPIO_INT_LEV_MASK (1 << 0)
50 #define GPIO_INT_POL_MASK (1 << 1)
52 #define irq_to_gpio(irq) ((irq) - MXS_GPIO_IRQ_START)
59 struct mxs_gpio_port
{
63 int virtual_irq_start
;
64 struct bgpio_chip bgc
;
65 enum mxs_gpio_id devid
;
68 static inline int is_imx23_gpio(struct mxs_gpio_port
*port
)
70 return port
->devid
== IMX23_GPIO
;
73 static inline int is_imx28_gpio(struct mxs_gpio_port
*port
)
75 return port
->devid
== IMX28_GPIO
;
78 /* Note: This driver assumes 32 GPIOs are handled in one register */
80 static int mxs_gpio_set_irq_type(struct irq_data
*d
, unsigned int type
)
82 u32 gpio
= irq_to_gpio(d
->irq
);
83 u32 pin_mask
= 1 << (gpio
& 31);
84 struct irq_chip_generic
*gc
= irq_data_get_irq_chip_data(d
);
85 struct mxs_gpio_port
*port
= gc
->private;
86 void __iomem
*pin_addr
;
90 case IRQ_TYPE_EDGE_RISING
:
91 edge
= GPIO_INT_RISE_EDGE
;
93 case IRQ_TYPE_EDGE_FALLING
:
94 edge
= GPIO_INT_FALL_EDGE
;
96 case IRQ_TYPE_LEVEL_LOW
:
97 edge
= GPIO_INT_LOW_LEV
;
99 case IRQ_TYPE_LEVEL_HIGH
:
100 edge
= GPIO_INT_HIGH_LEV
;
106 /* set level or edge */
107 pin_addr
= port
->base
+ PINCTRL_IRQLEV(port
);
108 if (edge
& GPIO_INT_LEV_MASK
)
109 writel(pin_mask
, pin_addr
+ MXS_SET
);
111 writel(pin_mask
, pin_addr
+ MXS_CLR
);
114 pin_addr
= port
->base
+ PINCTRL_IRQPOL(port
);
115 if (edge
& GPIO_INT_POL_MASK
)
116 writel(pin_mask
, pin_addr
+ MXS_SET
);
118 writel(pin_mask
, pin_addr
+ MXS_CLR
);
120 writel(1 << (gpio
& 0x1f),
121 port
->base
+ PINCTRL_IRQSTAT(port
) + MXS_CLR
);
126 /* MXS has one interrupt *per* gpio port */
127 static void mxs_gpio_irq_handler(u32 irq
, struct irq_desc
*desc
)
130 struct mxs_gpio_port
*port
= irq_get_handler_data(irq
);
131 u32 gpio_irq_no_base
= port
->virtual_irq_start
;
133 desc
->irq_data
.chip
->irq_ack(&desc
->irq_data
);
135 irq_stat
= readl(port
->base
+ PINCTRL_IRQSTAT(port
)) &
136 readl(port
->base
+ PINCTRL_IRQEN(port
));
138 while (irq_stat
!= 0) {
139 int irqoffset
= fls(irq_stat
) - 1;
140 generic_handle_irq(gpio_irq_no_base
+ irqoffset
);
141 irq_stat
&= ~(1 << irqoffset
);
146 * Set interrupt number "irq" in the GPIO as a wake-up source.
147 * While system is running, all registered GPIO interrupts need to have
148 * wake-up enabled. When system is suspended, only selected GPIO interrupts
149 * need to have wake-up enabled.
150 * @param irq interrupt source number
151 * @param enable enable as wake-up if equal to non-zero
152 * @return This function returns 0 on success.
154 static int mxs_gpio_set_wake_irq(struct irq_data
*d
, unsigned int enable
)
156 struct irq_chip_generic
*gc
= irq_data_get_irq_chip_data(d
);
157 struct mxs_gpio_port
*port
= gc
->private;
160 enable_irq_wake(port
->irq
);
162 disable_irq_wake(port
->irq
);
167 static void __init
mxs_gpio_init_gc(struct mxs_gpio_port
*port
)
169 struct irq_chip_generic
*gc
;
170 struct irq_chip_type
*ct
;
172 gc
= irq_alloc_generic_chip("gpio-mxs", 1, port
->virtual_irq_start
,
173 port
->base
, handle_level_irq
);
177 ct
->chip
.irq_ack
= irq_gc_ack_set_bit
;
178 ct
->chip
.irq_mask
= irq_gc_mask_clr_bit
;
179 ct
->chip
.irq_unmask
= irq_gc_mask_set_bit
;
180 ct
->chip
.irq_set_type
= mxs_gpio_set_irq_type
;
181 ct
->chip
.irq_set_wake
= mxs_gpio_set_wake_irq
;
182 ct
->regs
.ack
= PINCTRL_IRQSTAT(port
) + MXS_CLR
;
183 ct
->regs
.mask
= PINCTRL_IRQEN(port
);
185 irq_setup_generic_chip(gc
, IRQ_MSK(32), 0, IRQ_NOREQUEST
, 0);
188 static int mxs_gpio_to_irq(struct gpio_chip
*gc
, unsigned offset
)
190 struct bgpio_chip
*bgc
= to_bgpio_chip(gc
);
191 struct mxs_gpio_port
*port
=
192 container_of(bgc
, struct mxs_gpio_port
, bgc
);
194 return port
->virtual_irq_start
+ offset
;
197 static struct platform_device_id mxs_gpio_ids
[] = {
199 .name
= "imx23-gpio",
200 .driver_data
= IMX23_GPIO
,
202 .name
= "imx28-gpio",
203 .driver_data
= IMX28_GPIO
,
208 MODULE_DEVICE_TABLE(platform
, mxs_gpio_ids
);
210 static int __devinit
mxs_gpio_probe(struct platform_device
*pdev
)
212 static void __iomem
*base
;
213 struct mxs_gpio_port
*port
;
214 struct resource
*iores
= NULL
;
217 port
= devm_kzalloc(&pdev
->dev
, sizeof(*port
), GFP_KERNEL
);
222 port
->devid
= pdev
->id_entry
->driver_data
;
223 port
->virtual_irq_start
= MXS_GPIO_IRQ_START
+ port
->id
* 32;
225 port
->irq
= platform_get_irq(pdev
, 0);
230 * map memory region only once, as all the gpio ports
234 iores
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
235 base
= devm_request_and_ioremap(&pdev
->dev
, iores
);
237 return -EADDRNOTAVAIL
;
242 * select the pin interrupt functionality but initially
243 * disable the interrupts
245 writel(~0U, port
->base
+ PINCTRL_PIN2IRQ(port
));
246 writel(0, port
->base
+ PINCTRL_IRQEN(port
));
248 /* clear address has to be used to clear IRQSTAT bits */
249 writel(~0U, port
->base
+ PINCTRL_IRQSTAT(port
) + MXS_CLR
);
251 /* gpio-mxs can be a generic irq chip */
252 mxs_gpio_init_gc(port
);
254 /* setup one handler for each entry */
255 irq_set_chained_handler(port
->irq
, mxs_gpio_irq_handler
);
256 irq_set_handler_data(port
->irq
, port
);
258 err
= bgpio_init(&port
->bgc
, &pdev
->dev
, 4,
259 port
->base
+ PINCTRL_DIN(port
),
260 port
->base
+ PINCTRL_DOUT(port
), NULL
,
261 port
->base
+ PINCTRL_DOE(port
), NULL
, false);
265 port
->bgc
.gc
.to_irq
= mxs_gpio_to_irq
;
266 port
->bgc
.gc
.base
= port
->id
* 32;
268 err
= gpiochip_add(&port
->bgc
.gc
);
270 bgpio_remove(&port
->bgc
);
277 static struct platform_driver mxs_gpio_driver
= {
280 .owner
= THIS_MODULE
,
282 .probe
= mxs_gpio_probe
,
283 .id_table
= mxs_gpio_ids
,
286 static int __init
mxs_gpio_init(void)
288 return platform_driver_register(&mxs_gpio_driver
);
290 postcore_initcall(mxs_gpio_init
);
292 MODULE_AUTHOR("Freescale Semiconductor, "
293 "Daniel Mack <danielncaiaq.de>, "
294 "Juergen Beisert <kernel@pengutronix.de>");
295 MODULE_DESCRIPTION("Freescale MXS GPIO");
296 MODULE_LICENSE("GPL");