drivers/gpio/gpio-pca953x.c

   1 /*
   2  *  PCA953x 4/8/16/24/40 bit I/O ports
   3  *
   4  *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
   5  *  Copyright (C) 2007 Marvell International Ltd.
   6  *
   7  *  Derived from drivers/i2c/chips/pca9539.c
   8  *
   9  *  This program is free software; you can redistribute it and/or modify
  10  *  it under the terms of the GNU General Public License as published by
  11  *  the Free Software Foundation; version 2 of the License.
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/init.h>
  16 #include <linux/gpio.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/i2c.h>
  19 #include <linux/platform_data/pca953x.h>
  20 #include <linux/slab.h>
  21 #include <asm/unaligned.h>
  22 #include <linux/of_platform.h>
  23 #include <linux/acpi.h>
  24
  25 #define PCA953X_INPUT           0
  26 #define PCA953X_OUTPUT          1
  27 #define PCA953X_INVERT          2
  28 #define PCA953X_DIRECTION       3
  29
  30 #define REG_ADDR_AI             0x80
  31
  32 #define PCA957X_IN              0
  33 #define PCA957X_INVRT           1
  34 #define PCA957X_BKEN            2
  35 #define PCA957X_PUPD            3
  36 #define PCA957X_CFG             4
  37 #define PCA957X_OUT             5
  38 #define PCA957X_MSK             6
  39 #define PCA957X_INTS            7
  40
  41 #define PCA_GPIO_MASK           0x00FF
  42 #define PCA_INT                 0x0100
  43 #define PCA953X_TYPE            0x1000
  44 #define PCA957X_TYPE            0x2000
  45 #define PCA_TYPE_MASK           0xF000
  46
  47 #define PCA_CHIP_TYPE(x)        ((x) & PCA_TYPE_MASK)
  48
  49 static const struct i2c_device_id pca953x_id[] = {
  50         { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
  51         { "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
  52         { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
  53         { "pca9536", 4  | PCA953X_TYPE, },
  54         { "pca9537", 4  | PCA953X_TYPE | PCA_INT, },
  55         { "pca9538", 8  | PCA953X_TYPE | PCA_INT, },
  56         { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
  57         { "pca9554", 8  | PCA953X_TYPE | PCA_INT, },
  58         { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
  59         { "pca9556", 8  | PCA953X_TYPE, },
  60         { "pca9557", 8  | PCA953X_TYPE, },
  61         { "pca9574", 8  | PCA957X_TYPE | PCA_INT, },
  62         { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
  63         { "pca9698", 40 | PCA953X_TYPE, },
  64
  65         { "max7310", 8  | PCA953X_TYPE, },
  66         { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
  67         { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
  68         { "max7315", 8  | PCA953X_TYPE | PCA_INT, },
  69         { "pca6107", 8  | PCA953X_TYPE | PCA_INT, },
  70         { "tca6408", 8  | PCA953X_TYPE | PCA_INT, },
  71         { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
  72         { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
  73         { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
  74         { "xra1202", 8  | PCA953X_TYPE },
  75         { }
  76 };
  77 MODULE_DEVICE_TABLE(i2c, pca953x_id);
  78
  79 static const struct acpi_device_id pca953x_acpi_ids[] = {
  80         { "INT3491", 16 | PCA953X_TYPE | PCA_INT, },
  81         { }
  82 };
  83 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
  84
  85 #define MAX_BANK 5
  86 #define BANK_SZ 8
  87
  88 #define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ)
  89
  90 struct pca953x_chip {
  91         unsigned gpio_start;
  92         u8 reg_output[MAX_BANK];
  93         u8 reg_direction[MAX_BANK];
  94         struct mutex i2c_lock;
  95
  96 #ifdef CONFIG_GPIO_PCA953X_IRQ
  97         struct mutex irq_lock;
  98         u8 irq_mask[MAX_BANK];
  99         u8 irq_stat[MAX_BANK];
 100         u8 irq_trig_raise[MAX_BANK];
 101         u8 irq_trig_fall[MAX_BANK];
 102 #endif
 103
 104         struct i2c_client *client;
 105         struct gpio_chip gpio_chip;
 106         const char *const *names;
 107         int     chip_type;
 108         unsigned long driver_data;
 109 };
 110
 111 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
 112                                 int off)
 113 {
 114         int ret;
 115         int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 116         int offset = off / BANK_SZ;
 117
 118         ret = i2c_smbus_read_byte_data(chip->client,
 119                                 (reg << bank_shift) + offset);
 120         *val = ret;
 121
 122         if (ret < 0) {
 123                 dev_err(&chip->client->dev, "failed reading register\n");
 124                 return ret;
 125         }
 126
 127         return 0;
 128 }
 129
 130 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
 131                                 int off)
 132 {
 133         int ret = 0;
 134         int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 135         int offset = off / BANK_SZ;
 136
 137         ret = i2c_smbus_write_byte_data(chip->client,
 138                                         (reg << bank_shift) + offset, val);
 139
 140         if (ret < 0) {
 141                 dev_err(&chip->client->dev, "failed writing register\n");
 142                 return ret;
 143         }
 144
 145         return 0;
 146 }
 147
 148 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
 149 {
 150         int ret = 0;
 151
 152         if (chip->gpio_chip.ngpio <= 8)
 153                 ret = i2c_smbus_write_byte_data(chip->client, reg, *val);
 154         else if (chip->gpio_chip.ngpio >= 24) {
 155                 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 156                 ret = i2c_smbus_write_i2c_block_data(chip->client,
 157                                         (reg << bank_shift) | REG_ADDR_AI,
 158                                         NBANK(chip), val);
 159         } else {
 160                 switch (chip->chip_type) {
 161                 case PCA953X_TYPE:
 162                         ret = i2c_smbus_write_word_data(chip->client,
 163                             reg << 1, cpu_to_le16(get_unaligned((u16 *)val)));
 164                         break;
 165                 case PCA957X_TYPE:
 166                         ret = i2c_smbus_write_byte_data(chip->client, reg << 1,
 167                                                         val[0]);
 168                         if (ret < 0)
 169                                 break;
 170                         ret = i2c_smbus_write_byte_data(chip->client,
 171                                                         (reg << 1) + 1,
 172                                                         val[1]);
 173                         break;
 174                 }
 175         }
 176
 177         if (ret < 0) {
 178                 dev_err(&chip->client->dev, "failed writing register\n");
 179                 return ret;
 180         }
 181
 182         return 0;
 183 }
 184
 185 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
 186 {
 187         int ret;
 188
 189         if (chip->gpio_chip.ngpio <= 8) {
 190                 ret = i2c_smbus_read_byte_data(chip->client, reg);
 191                 *val = ret;
 192         } else if (chip->gpio_chip.ngpio >= 24) {
 193                 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 194
 195                 ret = i2c_smbus_read_i2c_block_data(chip->client,
 196                                         (reg << bank_shift) | REG_ADDR_AI,
 197                                         NBANK(chip), val);
 198         } else {
 199                 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
 200                 val[0] = (u16)ret & 0xFF;
 201                 val[1] = (u16)ret >> 8;
 202         }
 203         if (ret < 0) {
 204                 dev_err(&chip->client->dev, "failed reading register\n");
 205                 return ret;
 206         }
 207
 208         return 0;
 209 }
 210
 211 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
 212 {
 213         struct pca953x_chip *chip = gpiochip_get_data(gc);
 214         u8 reg_val;
 215         int ret, offset = 0;
 216
 217         mutex_lock(&chip->i2c_lock);
 218         reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
 219
 220         switch (chip->chip_type) {
 221         case PCA953X_TYPE:
 222                 offset = PCA953X_DIRECTION;
 223                 break;
 224         case PCA957X_TYPE:
 225                 offset = PCA957X_CFG;
 226                 break;
 227         }
 228         ret = pca953x_write_single(chip, offset, reg_val, off);
 229         if (ret)
 230                 goto exit;
 231
 232         chip->reg_direction[off / BANK_SZ] = reg_val;
 233         ret = 0;
 234 exit:
 235         mutex_unlock(&chip->i2c_lock);
 236         return ret;
 237 }
 238
 239 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
 240                 unsigned off, int val)
 241 {
 242         struct pca953x_chip *chip = gpiochip_get_data(gc);
 243         u8 reg_val;
 244         int ret, offset = 0;
 245
 246         mutex_lock(&chip->i2c_lock);
 247         /* set output level */
 248         if (val)
 249                 reg_val = chip->reg_output[off / BANK_SZ]
 250                         | (1u << (off % BANK_SZ));
 251         else
 252                 reg_val = chip->reg_output[off / BANK_SZ]
 253                         & ~(1u << (off % BANK_SZ));
 254
 255         switch (chip->chip_type) {
 256         case PCA953X_TYPE:
 257                 offset = PCA953X_OUTPUT;
 258                 break;
 259         case PCA957X_TYPE:
 260                 offset = PCA957X_OUT;
 261                 break;
 262         }
 263         ret = pca953x_write_single(chip, offset, reg_val, off);
 264         if (ret)
 265                 goto exit;
 266
 267         chip->reg_output[off / BANK_SZ] = reg_val;
 268
 269         /* then direction */
 270         reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
 271         switch (chip->chip_type) {
 272         case PCA953X_TYPE:
 273                 offset = PCA953X_DIRECTION;
 274                 break;
 275         case PCA957X_TYPE:
 276                 offset = PCA957X_CFG;
 277                 break;
 278         }
 279         ret = pca953x_write_single(chip, offset, reg_val, off);
 280         if (ret)
 281                 goto exit;
 282
 283         chip->reg_direction[off / BANK_SZ] = reg_val;
 284         ret = 0;
 285 exit:
 286         mutex_unlock(&chip->i2c_lock);
 287         return ret;
 288 }
 289
 290 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
 291 {
 292         struct pca953x_chip *chip = gpiochip_get_data(gc);
 293         u32 reg_val;
 294         int ret, offset = 0;
 295
 296         mutex_lock(&chip->i2c_lock);
 297         switch (chip->chip_type) {
 298         case PCA953X_TYPE:
 299                 offset = PCA953X_INPUT;
 300                 break;
 301         case PCA957X_TYPE:
 302                 offset = PCA957X_IN;
 303                 break;
 304         }
 305         ret = pca953x_read_single(chip, offset, &reg_val, off);
 306         mutex_unlock(&chip->i2c_lock);
 307         if (ret < 0) {
 308                 /* NOTE:  diagnostic already emitted; that's all we should
 309                  * do unless gpio_*_value_cansleep() calls become different
 310                  * from their nonsleeping siblings (and report faults).
 311                  */
 312                 return 0;
 313         }
 314
 315         return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
 316 }
 317
 318 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
 319 {
 320         struct pca953x_chip *chip = gpiochip_get_data(gc);
 321         u8 reg_val;
 322         int ret, offset = 0;
 323
 324         mutex_lock(&chip->i2c_lock);
 325         if (val)
 326                 reg_val = chip->reg_output[off / BANK_SZ]
 327                         | (1u << (off % BANK_SZ));
 328         else
 329                 reg_val = chip->reg_output[off / BANK_SZ]
 330                         & ~(1u << (off % BANK_SZ));
 331
 332         switch (chip->chip_type) {
 333         case PCA953X_TYPE:
 334                 offset = PCA953X_OUTPUT;
 335                 break;
 336         case PCA957X_TYPE:
 337                 offset = PCA957X_OUT;
 338                 break;
 339         }
 340         ret = pca953x_write_single(chip, offset, reg_val, off);
 341         if (ret)
 342                 goto exit;
 343
 344         chip->reg_output[off / BANK_SZ] = reg_val;
 345 exit:
 346         mutex_unlock(&chip->i2c_lock);
 347 }
 348
 349
 350 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
 351                 unsigned long *mask, unsigned long *bits)
 352 {
 353         struct pca953x_chip *chip = gpiochip_get_data(gc);
 354         u8 reg_val[MAX_BANK];
 355         int ret, offset = 0;
 356         int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 357         int bank;
 358
 359         switch (chip->chip_type) {
 360         case PCA953X_TYPE:
 361                 offset = PCA953X_OUTPUT;
 362                 break;
 363         case PCA957X_TYPE:
 364                 offset = PCA957X_OUT;
 365                 break;
 366         }
 367
 368         memcpy(reg_val, chip->reg_output, NBANK(chip));
 369         mutex_lock(&chip->i2c_lock);
 370         for(bank=0; bank<NBANK(chip); bank++) {
 371                 unsigned bankmask = mask[bank / sizeof(*mask)] >>
 372                                     ((bank % sizeof(*mask)) * 8);
 373                 if(bankmask) {
 374                         unsigned bankval  = bits[bank / sizeof(*bits)] >>
 375                                             ((bank % sizeof(*bits)) * 8);
 376                         reg_val[bank] = (reg_val[bank] & ~bankmask) | bankval;
 377                 }
 378         }
 379         ret = i2c_smbus_write_i2c_block_data(chip->client, offset << bank_shift, NBANK(chip), reg_val);
 380         if (ret)
 381                 goto exit;
 382
 383         memcpy(chip->reg_output, reg_val, NBANK(chip));
 384 exit:
 385         mutex_unlock(&chip->i2c_lock);
 386 }
 387
 388 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
 389 {
 390         struct gpio_chip *gc;
 391
 392         gc = &chip->gpio_chip;
 393
 394         gc->direction_input  = pca953x_gpio_direction_input;
 395         gc->direction_output = pca953x_gpio_direction_output;
 396         gc->get = pca953x_gpio_get_value;
 397         gc->set = pca953x_gpio_set_value;
 398         gc->set_multiple = pca953x_gpio_set_multiple;
 399         gc->can_sleep = true;
 400
 401         gc->base = chip->gpio_start;
 402         gc->ngpio = gpios;
 403         gc->label = chip->client->name;
 404         gc->parent = &chip->client->dev;
 405         gc->owner = THIS_MODULE;
 406         gc->names = chip->names;
 407 }
 408
 409 #ifdef CONFIG_GPIO_PCA953X_IRQ
 410 static void pca953x_irq_mask(struct irq_data *d)
 411 {
 412         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 413         struct pca953x_chip *chip = gpiochip_get_data(gc);
 414
 415         chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
 416 }
 417
 418 static void pca953x_irq_unmask(struct irq_data *d)
 419 {
 420         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 421         struct pca953x_chip *chip = gpiochip_get_data(gc);
 422
 423         chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
 424 }
 425
 426 static void pca953x_irq_bus_lock(struct irq_data *d)
 427 {
 428         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 429         struct pca953x_chip *chip = gpiochip_get_data(gc);
 430
 431         mutex_lock(&chip->irq_lock);
 432 }
 433
 434 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
 435 {
 436         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 437         struct pca953x_chip *chip = gpiochip_get_data(gc);
 438         u8 new_irqs;
 439         int level, i;
 440
 441         /* Look for any newly setup interrupt */
 442         for (i = 0; i < NBANK(chip); i++) {
 443                 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
 444                 new_irqs &= ~chip->reg_direction[i];
 445
 446                 while (new_irqs) {
 447                         level = __ffs(new_irqs);
 448                         pca953x_gpio_direction_input(&chip->gpio_chip,
 449                                                         level + (BANK_SZ * i));
 450                         new_irqs &= ~(1 << level);
 451                 }
 452         }
 453
 454         mutex_unlock(&chip->irq_lock);
 455 }
 456
 457 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
 458 {
 459         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 460         struct pca953x_chip *chip = gpiochip_get_data(gc);
 461         int bank_nb = d->hwirq / BANK_SZ;
 462         u8 mask = 1 << (d->hwirq % BANK_SZ);
 463
 464         if (!(type & IRQ_TYPE_EDGE_BOTH)) {
 465                 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
 466                         d->irq, type);
 467                 return -EINVAL;
 468         }
 469
 470         if (type & IRQ_TYPE_EDGE_FALLING)
 471                 chip->irq_trig_fall[bank_nb] |= mask;
 472         else
 473                 chip->irq_trig_fall[bank_nb] &= ~mask;
 474
 475         if (type & IRQ_TYPE_EDGE_RISING)
 476                 chip->irq_trig_raise[bank_nb] |= mask;
 477         else
 478                 chip->irq_trig_raise[bank_nb] &= ~mask;
 479
 480         return 0;
 481 }
 482
 483 static struct irq_chip pca953x_irq_chip = {
 484         .name                   = "pca953x",
 485         .irq_mask               = pca953x_irq_mask,
 486         .irq_unmask             = pca953x_irq_unmask,
 487         .irq_bus_lock           = pca953x_irq_bus_lock,
 488         .irq_bus_sync_unlock    = pca953x_irq_bus_sync_unlock,
 489         .irq_set_type           = pca953x_irq_set_type,
 490 };
 491
 492 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
 493 {
 494         u8 cur_stat[MAX_BANK];
 495         u8 old_stat[MAX_BANK];
 496         bool pending_seen = false;
 497         bool trigger_seen = false;
 498         u8 trigger[MAX_BANK];
 499         int ret, i, offset = 0;
 500
 501         switch (chip->chip_type) {
 502         case PCA953X_TYPE:
 503                 offset = PCA953X_INPUT;
 504                 break;
 505         case PCA957X_TYPE:
 506                 offset = PCA957X_IN;
 507                 break;
 508         }
 509         ret = pca953x_read_regs(chip, offset, cur_stat);
 510         if (ret)
 511                 return false;
 512
 513         /* Remove output pins from the equation */
 514         for (i = 0; i < NBANK(chip); i++)
 515                 cur_stat[i] &= chip->reg_direction[i];
 516
 517         memcpy(old_stat, chip->irq_stat, NBANK(chip));
 518
 519         for (i = 0; i < NBANK(chip); i++) {
 520                 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
 521                 if (trigger[i])
 522                         trigger_seen = true;
 523         }
 524
 525         if (!trigger_seen)
 526                 return false;
 527
 528         memcpy(chip->irq_stat, cur_stat, NBANK(chip));
 529
 530         for (i = 0; i < NBANK(chip); i++) {
 531                 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
 532                         (cur_stat[i] & chip->irq_trig_raise[i]);
 533                 pending[i] &= trigger[i];
 534                 if (pending[i])
 535                         pending_seen = true;
 536         }
 537
 538         return pending_seen;
 539 }
 540
 541 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
 542 {
 543         struct pca953x_chip *chip = devid;
 544         u8 pending[MAX_BANK];
 545         u8 level;
 546         unsigned nhandled = 0;
 547         int i;
 548
 549         if (!pca953x_irq_pending(chip, pending))
 550                 return IRQ_NONE;
 551
 552         for (i = 0; i < NBANK(chip); i++) {
 553                 while (pending[i]) {
 554                         level = __ffs(pending[i]);
 555                         handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain,
 556                                                         level + (BANK_SZ * i)));
 557                         pending[i] &= ~(1 << level);
 558                         nhandled++;
 559                 }
 560         }
 561
 562         return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
 563 }
 564
 565 static int pca953x_irq_setup(struct pca953x_chip *chip,
 566                              int irq_base)
 567 {
 568         struct i2c_client *client = chip->client;
 569         int ret, i, offset = 0;
 570
 571         if (client->irq && irq_base != -1
 572                         && (chip->driver_data & PCA_INT)) {
 573
 574                 switch (chip->chip_type) {
 575                 case PCA953X_TYPE:
 576                         offset = PCA953X_INPUT;
 577                         break;
 578                 case PCA957X_TYPE:
 579                         offset = PCA957X_IN;
 580                         break;
 581                 }
 582                 ret = pca953x_read_regs(chip, offset, chip->irq_stat);
 583                 if (ret)
 584                         return ret;
 585
 586                 /*
 587                  * There is no way to know which GPIO line generated the
 588                  * interrupt.  We have to rely on the previous read for
 589                  * this purpose.
 590                  */
 591                 for (i = 0; i < NBANK(chip); i++)
 592                         chip->irq_stat[i] &= chip->reg_direction[i];
 593                 mutex_init(&chip->irq_lock);
 594
 595                 ret = devm_request_threaded_irq(&client->dev,
 596                                         client->irq,
 597                                            NULL,
 598                                            pca953x_irq_handler,
 599                                            IRQF_TRIGGER_LOW | IRQF_ONESHOT |
 600                                                    IRQF_SHARED,
 601                                            dev_name(&client->dev), chip);
 602                 if (ret) {
 603                         dev_err(&client->dev, "failed to request irq %d\n",
 604                                 client->irq);
 605                         return ret;
 606                 }
 607
 608                 ret =  gpiochip_irqchip_add(&chip->gpio_chip,
 609                                             &pca953x_irq_chip,
 610                                             irq_base,
 611                                             handle_simple_irq,
 612                                             IRQ_TYPE_NONE);
 613                 if (ret) {
 614                         dev_err(&client->dev,
 615                                 "could not connect irqchip to gpiochip\n");
 616                         return ret;
 617                 }
 618
 619                 gpiochip_set_chained_irqchip(&chip->gpio_chip,
 620                                              &pca953x_irq_chip,
 621                                              client->irq, NULL);
 622         }
 623
 624         return 0;
 625 }
 626
 627 #else /* CONFIG_GPIO_PCA953X_IRQ */
 628 static int pca953x_irq_setup(struct pca953x_chip *chip,
 629                              int irq_base)
 630 {
 631         struct i2c_client *client = chip->client;
 632
 633         if (irq_base != -1 && (chip->driver_data & PCA_INT))
 634                 dev_warn(&client->dev, "interrupt support not compiled in\n");
 635
 636         return 0;
 637 }
 638 #endif
 639
 640 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
 641 {
 642         int ret;
 643         u8 val[MAX_BANK];
 644
 645         ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output);
 646         if (ret)
 647                 goto out;
 648
 649         ret = pca953x_read_regs(chip, PCA953X_DIRECTION,
 650                                chip->reg_direction);
 651         if (ret)
 652                 goto out;
 653
 654         /* set platform specific polarity inversion */
 655         if (invert)
 656                 memset(val, 0xFF, NBANK(chip));
 657         else
 658                 memset(val, 0, NBANK(chip));
 659
 660         ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
 661 out:
 662         return ret;
 663 }
 664
 665 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
 666 {
 667         int ret;
 668         u8 val[MAX_BANK];
 669
 670         ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output);
 671         if (ret)
 672                 goto out;
 673         ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction);
 674         if (ret)
 675                 goto out;
 676
 677         /* set platform specific polarity inversion */
 678         if (invert)
 679                 memset(val, 0xFF, NBANK(chip));
 680         else
 681                 memset(val, 0, NBANK(chip));
 682         ret = pca953x_write_regs(chip, PCA957X_INVRT, val);
 683         if (ret)
 684                 goto out;
 685
 686         /* To enable register 6, 7 to control pull up and pull down */
 687         memset(val, 0x02, NBANK(chip));
 688         ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
 689         if (ret)
 690                 goto out;
 691
 692         return 0;
 693 out:
 694         return ret;
 695 }
 696
 697 static const struct of_device_id pca953x_dt_ids[];
 698
 699 static int pca953x_probe(struct i2c_client *client,
 700                                    const struct i2c_device_id *id)
 701 {
 702         struct pca953x_platform_data *pdata;
 703         struct pca953x_chip *chip;
 704         int irq_base = 0;
 705         int ret;
 706         u32 invert = 0;
 707
 708         chip = devm_kzalloc(&client->dev,
 709                         sizeof(struct pca953x_chip), GFP_KERNEL);
 710         if (chip == NULL)
 711                 return -ENOMEM;
 712
 713         pdata = dev_get_platdata(&client->dev);
 714         if (pdata) {
 715                 irq_base = pdata->irq_base;
 716                 chip->gpio_start = pdata->gpio_base;
 717                 invert = pdata->invert;
 718                 chip->names = pdata->names;
 719         } else {
 720                 chip->gpio_start = -1;
 721                 irq_base = 0;
 722         }
 723
 724         chip->client = client;
 725
 726         if (id) {
 727                 chip->driver_data = id->driver_data;
 728         } else {
 729                 const struct acpi_device_id *id;
 730                 const struct of_device_id *match;
 731
 732                 match = of_match_device(pca953x_dt_ids, &client->dev);
 733                 if (match) {
 734                         chip->driver_data = (int)(uintptr_t)match->data;
 735                 } else {
 736                         id = acpi_match_device(pca953x_acpi_ids, &client->dev);
 737                         if (!id)
 738                                 return -ENODEV;
 739
 740                         chip->driver_data = id->driver_data;
 741                 }
 742         }
 743
 744         chip->chip_type = PCA_CHIP_TYPE(chip->driver_data);
 745
 746         mutex_init(&chip->i2c_lock);
 747
 748         /* initialize cached registers from their original values.
 749          * we can't share this chip with another i2c master.
 750          */
 751         pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
 752
 753         if (chip->chip_type == PCA953X_TYPE)
 754                 ret = device_pca953x_init(chip, invert);
 755         else
 756                 ret = device_pca957x_init(chip, invert);
 757         if (ret)
 758                 return ret;
 759
 760         ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
 761         if (ret)
 762                 return ret;
 763
 764         ret = pca953x_irq_setup(chip, irq_base);
 765         if (ret)
 766                 return ret;
 767
 768         if (pdata && pdata->setup) {
 769                 ret = pdata->setup(client, chip->gpio_chip.base,
 770                                 chip->gpio_chip.ngpio, pdata->context);
 771                 if (ret < 0)
 772                         dev_warn(&client->dev, "setup failed, %d\n", ret);
 773         }
 774
 775         i2c_set_clientdata(client, chip);
 776         return 0;
 777 }
 778
 779 static int pca953x_remove(struct i2c_client *client)
 780 {
 781         struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
 782         struct pca953x_chip *chip = i2c_get_clientdata(client);
 783         int ret = 0;
 784
 785         if (pdata && pdata->teardown) {
 786                 ret = pdata->teardown(client, chip->gpio_chip.base,
 787                                 chip->gpio_chip.ngpio, pdata->context);
 788                 if (ret < 0) {
 789                         dev_err(&client->dev, "%s failed, %d\n",
 790                                         "teardown", ret);
 791                         return ret;
 792                 }
 793         }
 794
 795         return 0;
 796 }
 797
 798 /* convenience to stop overlong match-table lines */
 799 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
 800 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
 801
 802 static const struct of_device_id pca953x_dt_ids[] = {
 803         { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
 804         { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
 805         { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
 806         { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
 807         { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
 808         { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
 809         { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
 810         { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
 811         { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
 812         { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
 813         { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
 814         { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
 815         { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
 816         { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
 817
 818         { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
 819         { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
 820         { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
 821         { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
 822
 823         { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
 824         { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
 825         { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
 826         { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
 827
 828         { .compatible = "onsemi,pca9654", .data = OF_953X( 8, PCA_INT), },
 829
 830         { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
 831         { }
 832 };
 833
 834 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
 835
 836 static struct i2c_driver pca953x_driver = {
 837         .driver = {
 838                 .name   = "pca953x",
 839                 .of_match_table = pca953x_dt_ids,
 840                 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
 841         },
 842         .probe          = pca953x_probe,
 843         .remove         = pca953x_remove,
 844         .id_table       = pca953x_id,
 845 };
 846
 847 static int __init pca953x_init(void)
 848 {
 849         return i2c_add_driver(&pca953x_driver);
 850 }
 851 /* register after i2c postcore initcall and before
 852  * subsys initcalls that may rely on these GPIOs
 853  */
 854 subsys_initcall(pca953x_init);
 855
 856 static void __exit pca953x_exit(void)
 857 {
 858         i2c_del_driver(&pca953x_driver);
 859 }
 860 module_exit(pca953x_exit);
 861
 862 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
 863 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
 864 MODULE_LICENSE("GPL");