Merge tag 'pwm/for-4.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry...
[deliverable/linux.git] / drivers / gpio / gpio-tc3589x.c
1 /*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License, version 2
5 * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> for ST-Ericsson
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
7 */
8
9 #include <linux/module.h>
10 #include <linux/init.h>
11 #include <linux/platform_device.h>
12 #include <linux/slab.h>
13 #include <linux/gpio.h>
14 #include <linux/of.h>
15 #include <linux/interrupt.h>
16 #include <linux/mfd/tc3589x.h>
17
18 /*
19 * These registers are modified under the irq bus lock and cached to avoid
20 * unnecessary writes in bus_sync_unlock.
21 */
22 enum { REG_IBE, REG_IEV, REG_IS, REG_IE };
23
24 #define CACHE_NR_REGS 4
25 #define CACHE_NR_BANKS 3
26
27 struct tc3589x_gpio {
28 struct gpio_chip chip;
29 struct tc3589x *tc3589x;
30 struct device *dev;
31 struct mutex irq_lock;
32 /* Caches of interrupt control registers for bus_lock */
33 u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS];
34 u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS];
35 };
36
37 static int tc3589x_gpio_get(struct gpio_chip *chip, unsigned offset)
38 {
39 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
40 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
41 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
42 u8 mask = 1 << (offset % 8);
43 int ret;
44
45 ret = tc3589x_reg_read(tc3589x, reg);
46 if (ret < 0)
47 return ret;
48
49 return !!(ret & mask);
50 }
51
52 static void tc3589x_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
53 {
54 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
55 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
56 u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2;
57 unsigned pos = offset % 8;
58 u8 data[] = {!!val << pos, 1 << pos};
59
60 tc3589x_block_write(tc3589x, reg, ARRAY_SIZE(data), data);
61 }
62
63 static int tc3589x_gpio_direction_output(struct gpio_chip *chip,
64 unsigned offset, int val)
65 {
66 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
67 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
68 u8 reg = TC3589x_GPIODIR0 + offset / 8;
69 unsigned pos = offset % 8;
70
71 tc3589x_gpio_set(chip, offset, val);
72
73 return tc3589x_set_bits(tc3589x, reg, 1 << pos, 1 << pos);
74 }
75
76 static int tc3589x_gpio_direction_input(struct gpio_chip *chip,
77 unsigned offset)
78 {
79 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip);
80 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
81 u8 reg = TC3589x_GPIODIR0 + offset / 8;
82 unsigned pos = offset % 8;
83
84 return tc3589x_set_bits(tc3589x, reg, 1 << pos, 0);
85 }
86
87 static struct gpio_chip template_chip = {
88 .label = "tc3589x",
89 .owner = THIS_MODULE,
90 .direction_input = tc3589x_gpio_direction_input,
91 .get = tc3589x_gpio_get,
92 .direction_output = tc3589x_gpio_direction_output,
93 .set = tc3589x_gpio_set,
94 .can_sleep = true,
95 };
96
97 static int tc3589x_gpio_irq_set_type(struct irq_data *d, unsigned int type)
98 {
99 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
100 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
101 int offset = d->hwirq;
102 int regoffset = offset / 8;
103 int mask = 1 << (offset % 8);
104
105 if (type == IRQ_TYPE_EDGE_BOTH) {
106 tc3589x_gpio->regs[REG_IBE][regoffset] |= mask;
107 return 0;
108 }
109
110 tc3589x_gpio->regs[REG_IBE][regoffset] &= ~mask;
111
112 if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH)
113 tc3589x_gpio->regs[REG_IS][regoffset] |= mask;
114 else
115 tc3589x_gpio->regs[REG_IS][regoffset] &= ~mask;
116
117 if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH)
118 tc3589x_gpio->regs[REG_IEV][regoffset] |= mask;
119 else
120 tc3589x_gpio->regs[REG_IEV][regoffset] &= ~mask;
121
122 return 0;
123 }
124
125 static void tc3589x_gpio_irq_lock(struct irq_data *d)
126 {
127 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
128 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
129
130 mutex_lock(&tc3589x_gpio->irq_lock);
131 }
132
133 static void tc3589x_gpio_irq_sync_unlock(struct irq_data *d)
134 {
135 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
136 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
137 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
138 static const u8 regmap[] = {
139 [REG_IBE] = TC3589x_GPIOIBE0,
140 [REG_IEV] = TC3589x_GPIOIEV0,
141 [REG_IS] = TC3589x_GPIOIS0,
142 [REG_IE] = TC3589x_GPIOIE0,
143 };
144 int i, j;
145
146 for (i = 0; i < CACHE_NR_REGS; i++) {
147 for (j = 0; j < CACHE_NR_BANKS; j++) {
148 u8 old = tc3589x_gpio->oldregs[i][j];
149 u8 new = tc3589x_gpio->regs[i][j];
150
151 if (new == old)
152 continue;
153
154 tc3589x_gpio->oldregs[i][j] = new;
155 tc3589x_reg_write(tc3589x, regmap[i] + j * 8, new);
156 }
157 }
158
159 mutex_unlock(&tc3589x_gpio->irq_lock);
160 }
161
162 static void tc3589x_gpio_irq_mask(struct irq_data *d)
163 {
164 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
165 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
166 int offset = d->hwirq;
167 int regoffset = offset / 8;
168 int mask = 1 << (offset % 8);
169
170 tc3589x_gpio->regs[REG_IE][regoffset] &= ~mask;
171 }
172
173 static void tc3589x_gpio_irq_unmask(struct irq_data *d)
174 {
175 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
176 struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc);
177 int offset = d->hwirq;
178 int regoffset = offset / 8;
179 int mask = 1 << (offset % 8);
180
181 tc3589x_gpio->regs[REG_IE][regoffset] |= mask;
182 }
183
184 static struct irq_chip tc3589x_gpio_irq_chip = {
185 .name = "tc3589x-gpio",
186 .irq_bus_lock = tc3589x_gpio_irq_lock,
187 .irq_bus_sync_unlock = tc3589x_gpio_irq_sync_unlock,
188 .irq_mask = tc3589x_gpio_irq_mask,
189 .irq_unmask = tc3589x_gpio_irq_unmask,
190 .irq_set_type = tc3589x_gpio_irq_set_type,
191 };
192
193 static irqreturn_t tc3589x_gpio_irq(int irq, void *dev)
194 {
195 struct tc3589x_gpio *tc3589x_gpio = dev;
196 struct tc3589x *tc3589x = tc3589x_gpio->tc3589x;
197 u8 status[CACHE_NR_BANKS];
198 int ret;
199 int i;
200
201 ret = tc3589x_block_read(tc3589x, TC3589x_GPIOMIS0,
202 ARRAY_SIZE(status), status);
203 if (ret < 0)
204 return IRQ_NONE;
205
206 for (i = 0; i < ARRAY_SIZE(status); i++) {
207 unsigned int stat = status[i];
208 if (!stat)
209 continue;
210
211 while (stat) {
212 int bit = __ffs(stat);
213 int line = i * 8 + bit;
214 int irq = irq_find_mapping(tc3589x_gpio->chip.irqdomain,
215 line);
216
217 handle_nested_irq(irq);
218 stat &= ~(1 << bit);
219 }
220
221 tc3589x_reg_write(tc3589x, TC3589x_GPIOIC0 + i, status[i]);
222 }
223
224 return IRQ_HANDLED;
225 }
226
227 static int tc3589x_gpio_probe(struct platform_device *pdev)
228 {
229 struct tc3589x *tc3589x = dev_get_drvdata(pdev->dev.parent);
230 struct device_node *np = pdev->dev.of_node;
231 struct tc3589x_gpio *tc3589x_gpio;
232 int ret;
233 int irq;
234
235 if (!np) {
236 dev_err(&pdev->dev, "No Device Tree node found\n");
237 return -EINVAL;
238 }
239
240 irq = platform_get_irq(pdev, 0);
241 if (irq < 0)
242 return irq;
243
244 tc3589x_gpio = devm_kzalloc(&pdev->dev, sizeof(struct tc3589x_gpio),
245 GFP_KERNEL);
246 if (!tc3589x_gpio)
247 return -ENOMEM;
248
249 mutex_init(&tc3589x_gpio->irq_lock);
250
251 tc3589x_gpio->dev = &pdev->dev;
252 tc3589x_gpio->tc3589x = tc3589x;
253
254 tc3589x_gpio->chip = template_chip;
255 tc3589x_gpio->chip.ngpio = tc3589x->num_gpio;
256 tc3589x_gpio->chip.parent = &pdev->dev;
257 tc3589x_gpio->chip.base = -1;
258 tc3589x_gpio->chip.of_node = np;
259
260 /* Bring the GPIO module out of reset */
261 ret = tc3589x_set_bits(tc3589x, TC3589x_RSTCTRL,
262 TC3589x_RSTCTRL_GPIRST, 0);
263 if (ret < 0)
264 return ret;
265
266 ret = devm_request_threaded_irq(&pdev->dev,
267 irq, NULL, tc3589x_gpio_irq,
268 IRQF_ONESHOT, "tc3589x-gpio",
269 tc3589x_gpio);
270 if (ret) {
271 dev_err(&pdev->dev, "unable to get irq: %d\n", ret);
272 return ret;
273 }
274
275 ret = gpiochip_add_data(&tc3589x_gpio->chip, tc3589x_gpio);
276 if (ret) {
277 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
278 return ret;
279 }
280
281 ret = gpiochip_irqchip_add(&tc3589x_gpio->chip,
282 &tc3589x_gpio_irq_chip,
283 0,
284 handle_simple_irq,
285 IRQ_TYPE_NONE);
286 if (ret) {
287 dev_err(&pdev->dev,
288 "could not connect irqchip to gpiochip\n");
289 return ret;
290 }
291
292 gpiochip_set_chained_irqchip(&tc3589x_gpio->chip,
293 &tc3589x_gpio_irq_chip,
294 irq,
295 NULL);
296
297 platform_set_drvdata(pdev, tc3589x_gpio);
298
299 return 0;
300 }
301
302 static int tc3589x_gpio_remove(struct platform_device *pdev)
303 {
304 struct tc3589x_gpio *tc3589x_gpio = platform_get_drvdata(pdev);
305
306 gpiochip_remove(&tc3589x_gpio->chip);
307
308 return 0;
309 }
310
311 static struct platform_driver tc3589x_gpio_driver = {
312 .driver.name = "tc3589x-gpio",
313 .driver.owner = THIS_MODULE,
314 .probe = tc3589x_gpio_probe,
315 .remove = tc3589x_gpio_remove,
316 };
317
318 static int __init tc3589x_gpio_init(void)
319 {
320 return platform_driver_register(&tc3589x_gpio_driver);
321 }
322 subsys_initcall(tc3589x_gpio_init);
323
324 static void __exit tc3589x_gpio_exit(void)
325 {
326 platform_driver_unregister(&tc3589x_gpio_driver);
327 }
328 module_exit(tc3589x_gpio_exit);
329
330 MODULE_LICENSE("GPL v2");
331 MODULE_DESCRIPTION("TC3589x GPIO driver");
332 MODULE_AUTHOR("Hanumath Prasad, Rabin Vincent");
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