drm/amdgpu: add core driver (v4)
[deliverable/linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_fb.c
1 /*
2 * Copyright © 2007 David Airlie
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * David Airlie
25 */
26 #include <linux/module.h>
27 #include <linux/slab.h>
28 #include <linux/fb.h>
29
30 #include <drm/drmP.h>
31 #include <drm/drm_crtc.h>
32 #include <drm/drm_crtc_helper.h>
33 #include <drm/amdgpu_drm.h>
34 #include "amdgpu.h"
35
36 #include <drm/drm_fb_helper.h>
37
38 #include <linux/vga_switcheroo.h>
39
40 /* object hierarchy -
41 this contains a helper + a amdgpu fb
42 the helper contains a pointer to amdgpu framebuffer baseclass.
43 */
44 struct amdgpu_fbdev {
45 struct drm_fb_helper helper;
46 struct amdgpu_framebuffer rfb;
47 struct list_head fbdev_list;
48 struct amdgpu_device *adev;
49 };
50
51 static struct fb_ops amdgpufb_ops = {
52 .owner = THIS_MODULE,
53 .fb_check_var = drm_fb_helper_check_var,
54 .fb_set_par = drm_fb_helper_set_par,
55 .fb_fillrect = cfb_fillrect,
56 .fb_copyarea = cfb_copyarea,
57 .fb_imageblit = cfb_imageblit,
58 .fb_pan_display = drm_fb_helper_pan_display,
59 .fb_blank = drm_fb_helper_blank,
60 .fb_setcmap = drm_fb_helper_setcmap,
61 .fb_debug_enter = drm_fb_helper_debug_enter,
62 .fb_debug_leave = drm_fb_helper_debug_leave,
63 };
64
65
66 int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int bpp, bool tiled)
67 {
68 int aligned = width;
69 int pitch_mask = 0;
70
71 switch (bpp / 8) {
72 case 1:
73 pitch_mask = 255;
74 break;
75 case 2:
76 pitch_mask = 127;
77 break;
78 case 3:
79 case 4:
80 pitch_mask = 63;
81 break;
82 }
83
84 aligned += pitch_mask;
85 aligned &= ~pitch_mask;
86 return aligned;
87 }
88
89 static void amdgpufb_destroy_pinned_object(struct drm_gem_object *gobj)
90 {
91 struct amdgpu_bo *rbo = gem_to_amdgpu_bo(gobj);
92 int ret;
93
94 ret = amdgpu_bo_reserve(rbo, false);
95 if (likely(ret == 0)) {
96 amdgpu_bo_kunmap(rbo);
97 amdgpu_bo_unpin(rbo);
98 amdgpu_bo_unreserve(rbo);
99 }
100 drm_gem_object_unreference_unlocked(gobj);
101 }
102
103 static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
104 struct drm_mode_fb_cmd2 *mode_cmd,
105 struct drm_gem_object **gobj_p)
106 {
107 struct amdgpu_device *adev = rfbdev->adev;
108 struct drm_gem_object *gobj = NULL;
109 struct amdgpu_bo *rbo = NULL;
110 bool fb_tiled = false; /* useful for testing */
111 u32 tiling_flags = 0;
112 int ret;
113 int aligned_size, size;
114 int height = mode_cmd->height;
115 u32 bpp, depth;
116
117 drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp);
118
119 /* need to align pitch with crtc limits */
120 mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, bpp,
121 fb_tiled) * ((bpp + 1) / 8);
122
123 height = ALIGN(mode_cmd->height, 8);
124 size = mode_cmd->pitches[0] * height;
125 aligned_size = ALIGN(size, PAGE_SIZE);
126 ret = amdgpu_gem_object_create(adev, aligned_size, 0,
127 AMDGPU_GEM_DOMAIN_VRAM,
128 0, true,
129 &gobj);
130 if (ret) {
131 printk(KERN_ERR "failed to allocate framebuffer (%d)\n",
132 aligned_size);
133 return -ENOMEM;
134 }
135 rbo = gem_to_amdgpu_bo(gobj);
136
137 if (fb_tiled)
138 tiling_flags = AMDGPU_TILING_MACRO;
139
140 #ifdef __BIG_ENDIAN
141 switch (bpp) {
142 case 32:
143 tiling_flags |= AMDGPU_TILING_SWAP_32BIT;
144 break;
145 case 16:
146 tiling_flags |= AMDGPU_TILING_SWAP_16BIT;
147 default:
148 break;
149 }
150 #endif
151
152 ret = amdgpu_bo_reserve(rbo, false);
153 if (unlikely(ret != 0))
154 goto out_unref;
155
156 if (tiling_flags) {
157 ret = amdgpu_bo_set_tiling_flags(rbo,
158 tiling_flags | AMDGPU_TILING_SURFACE);
159 if (ret)
160 dev_err(adev->dev, "FB failed to set tiling flags\n");
161 }
162
163
164 ret = amdgpu_bo_pin_restricted(rbo, AMDGPU_GEM_DOMAIN_VRAM, 0, NULL);
165 if (ret) {
166 amdgpu_bo_unreserve(rbo);
167 goto out_unref;
168 }
169 ret = amdgpu_bo_kmap(rbo, NULL);
170 amdgpu_bo_unreserve(rbo);
171 if (ret) {
172 goto out_unref;
173 }
174
175 *gobj_p = gobj;
176 return 0;
177 out_unref:
178 amdgpufb_destroy_pinned_object(gobj);
179 *gobj_p = NULL;
180 return ret;
181 }
182
183 static int amdgpufb_create(struct drm_fb_helper *helper,
184 struct drm_fb_helper_surface_size *sizes)
185 {
186 struct amdgpu_fbdev *rfbdev = (struct amdgpu_fbdev *)helper;
187 struct amdgpu_device *adev = rfbdev->adev;
188 struct fb_info *info;
189 struct drm_framebuffer *fb = NULL;
190 struct drm_mode_fb_cmd2 mode_cmd;
191 struct drm_gem_object *gobj = NULL;
192 struct amdgpu_bo *rbo = NULL;
193 struct device *device = &adev->pdev->dev;
194 int ret;
195 unsigned long tmp;
196
197 mode_cmd.width = sizes->surface_width;
198 mode_cmd.height = sizes->surface_height;
199
200 if (sizes->surface_bpp == 24)
201 sizes->surface_bpp = 32;
202
203 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
204 sizes->surface_depth);
205
206 ret = amdgpufb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
207 if (ret) {
208 DRM_ERROR("failed to create fbcon object %d\n", ret);
209 return ret;
210 }
211
212 rbo = gem_to_amdgpu_bo(gobj);
213
214 /* okay we have an object now allocate the framebuffer */
215 info = framebuffer_alloc(0, device);
216 if (info == NULL) {
217 ret = -ENOMEM;
218 goto out_unref;
219 }
220
221 info->par = rfbdev;
222
223 ret = amdgpu_framebuffer_init(adev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
224 if (ret) {
225 DRM_ERROR("failed to initialize framebuffer %d\n", ret);
226 goto out_unref;
227 }
228
229 fb = &rfbdev->rfb.base;
230
231 /* setup helper */
232 rfbdev->helper.fb = fb;
233 rfbdev->helper.fbdev = info;
234
235 memset_io(rbo->kptr, 0x0, amdgpu_bo_size(rbo));
236
237 strcpy(info->fix.id, "amdgpudrmfb");
238
239 drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
240
241 info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
242 info->fbops = &amdgpufb_ops;
243
244 tmp = amdgpu_bo_gpu_offset(rbo) - adev->mc.vram_start;
245 info->fix.smem_start = adev->mc.aper_base + tmp;
246 info->fix.smem_len = amdgpu_bo_size(rbo);
247 info->screen_base = rbo->kptr;
248 info->screen_size = amdgpu_bo_size(rbo);
249
250 drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height);
251
252 /* setup aperture base/size for vesafb takeover */
253 info->apertures = alloc_apertures(1);
254 if (!info->apertures) {
255 ret = -ENOMEM;
256 goto out_unref;
257 }
258 info->apertures->ranges[0].base = adev->ddev->mode_config.fb_base;
259 info->apertures->ranges[0].size = adev->mc.aper_size;
260
261 /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
262
263 if (info->screen_base == NULL) {
264 ret = -ENOSPC;
265 goto out_unref;
266 }
267
268 ret = fb_alloc_cmap(&info->cmap, 256, 0);
269 if (ret) {
270 ret = -ENOMEM;
271 goto out_unref;
272 }
273
274 DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
275 DRM_INFO("vram apper at 0x%lX\n", (unsigned long)adev->mc.aper_base);
276 DRM_INFO("size %lu\n", (unsigned long)amdgpu_bo_size(rbo));
277 DRM_INFO("fb depth is %d\n", fb->depth);
278 DRM_INFO(" pitch is %d\n", fb->pitches[0]);
279
280 vga_switcheroo_client_fb_set(adev->ddev->pdev, info);
281 return 0;
282
283 out_unref:
284 if (rbo) {
285
286 }
287 if (fb && ret) {
288 drm_gem_object_unreference(gobj);
289 drm_framebuffer_unregister_private(fb);
290 drm_framebuffer_cleanup(fb);
291 kfree(fb);
292 }
293 return ret;
294 }
295
296 void amdgpu_fb_output_poll_changed(struct amdgpu_device *adev)
297 {
298 if (adev->mode_info.rfbdev)
299 drm_fb_helper_hotplug_event(&adev->mode_info.rfbdev->helper);
300 }
301
302 static int amdgpu_fbdev_destroy(struct drm_device *dev, struct amdgpu_fbdev *rfbdev)
303 {
304 struct fb_info *info;
305 struct amdgpu_framebuffer *rfb = &rfbdev->rfb;
306
307 if (rfbdev->helper.fbdev) {
308 info = rfbdev->helper.fbdev;
309
310 unregister_framebuffer(info);
311 if (info->cmap.len)
312 fb_dealloc_cmap(&info->cmap);
313 framebuffer_release(info);
314 }
315
316 if (rfb->obj) {
317 amdgpufb_destroy_pinned_object(rfb->obj);
318 rfb->obj = NULL;
319 }
320 drm_fb_helper_fini(&rfbdev->helper);
321 drm_framebuffer_unregister_private(&rfb->base);
322 drm_framebuffer_cleanup(&rfb->base);
323
324 return 0;
325 }
326
327 /** Sets the color ramps on behalf of fbcon */
328 static void amdgpu_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
329 u16 blue, int regno)
330 {
331 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
332
333 amdgpu_crtc->lut_r[regno] = red >> 6;
334 amdgpu_crtc->lut_g[regno] = green >> 6;
335 amdgpu_crtc->lut_b[regno] = blue >> 6;
336 }
337
338 /** Gets the color ramps on behalf of fbcon */
339 static void amdgpu_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
340 u16 *blue, int regno)
341 {
342 struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
343
344 *red = amdgpu_crtc->lut_r[regno] << 6;
345 *green = amdgpu_crtc->lut_g[regno] << 6;
346 *blue = amdgpu_crtc->lut_b[regno] << 6;
347 }
348
349 static const struct drm_fb_helper_funcs amdgpu_fb_helper_funcs = {
350 .gamma_set = amdgpu_crtc_fb_gamma_set,
351 .gamma_get = amdgpu_crtc_fb_gamma_get,
352 .fb_probe = amdgpufb_create,
353 };
354
355 int amdgpu_fbdev_init(struct amdgpu_device *adev)
356 {
357 struct amdgpu_fbdev *rfbdev;
358 int bpp_sel = 32;
359 int ret;
360
361 /* don't init fbdev on hw without DCE */
362 if (!adev->mode_info.mode_config_initialized)
363 return 0;
364
365 /* select 8 bpp console on low vram cards */
366 if (adev->mc.real_vram_size <= (32*1024*1024))
367 bpp_sel = 8;
368
369 rfbdev = kzalloc(sizeof(struct amdgpu_fbdev), GFP_KERNEL);
370 if (!rfbdev)
371 return -ENOMEM;
372
373 rfbdev->adev = adev;
374 adev->mode_info.rfbdev = rfbdev;
375
376 drm_fb_helper_prepare(adev->ddev, &rfbdev->helper,
377 &amdgpu_fb_helper_funcs);
378
379 ret = drm_fb_helper_init(adev->ddev, &rfbdev->helper,
380 adev->mode_info.num_crtc,
381 AMDGPUFB_CONN_LIMIT);
382 if (ret) {
383 kfree(rfbdev);
384 return ret;
385 }
386
387 drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
388
389 /* disable all the possible outputs/crtcs before entering KMS mode */
390 drm_helper_disable_unused_functions(adev->ddev);
391
392 drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
393 return 0;
394 }
395
396 void amdgpu_fbdev_fini(struct amdgpu_device *adev)
397 {
398 if (!adev->mode_info.rfbdev)
399 return;
400
401 amdgpu_fbdev_destroy(adev->ddev, adev->mode_info.rfbdev);
402 kfree(adev->mode_info.rfbdev);
403 adev->mode_info.rfbdev = NULL;
404 }
405
406 void amdgpu_fbdev_set_suspend(struct amdgpu_device *adev, int state)
407 {
408 if (adev->mode_info.rfbdev)
409 fb_set_suspend(adev->mode_info.rfbdev->helper.fbdev, state);
410 }
411
412 int amdgpu_fbdev_total_size(struct amdgpu_device *adev)
413 {
414 struct amdgpu_bo *robj;
415 int size = 0;
416
417 if (!adev->mode_info.rfbdev)
418 return 0;
419
420 robj = gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.obj);
421 size += amdgpu_bo_size(robj);
422 return size;
423 }
424
425 bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo *robj)
426 {
427 if (!adev->mode_info.rfbdev)
428 return false;
429 if (robj == gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.obj))
430 return true;
431 return false;
432 }
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