drivers/gpu/drm/amd/amdgpu/cz_smumgr.h

   1 /*
   2  * Copyright 2014 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23 #ifndef __CZ_SMC_H__
  24 #define __CZ_SMC_H__
  25
  26 #define MAX_NUM_FIRMWARE                        8
  27 #define MAX_NUM_SCRATCH                         11
  28 #define CZ_SCRATCH_SIZE_NONGFX_CLOCKGATING      1024
  29 #define CZ_SCRATCH_SIZE_NONGFX_GOLDENSETTING    2048
  30 #define CZ_SCRATCH_SIZE_SDMA_METADATA           1024
  31 #define CZ_SCRATCH_SIZE_IH                      ((2*256+1)*4)
  32
  33 enum cz_scratch_entry {
  34         CZ_SCRATCH_ENTRY_UCODE_ID_SDMA0 = 0,
  35         CZ_SCRATCH_ENTRY_UCODE_ID_SDMA1,
  36         CZ_SCRATCH_ENTRY_UCODE_ID_CP_CE,
  37         CZ_SCRATCH_ENTRY_UCODE_ID_CP_PFP,
  38         CZ_SCRATCH_ENTRY_UCODE_ID_CP_ME,
  39         CZ_SCRATCH_ENTRY_UCODE_ID_CP_MEC_JT1,
  40         CZ_SCRATCH_ENTRY_UCODE_ID_CP_MEC_JT2,
  41         CZ_SCRATCH_ENTRY_UCODE_ID_GMCON_RENG,
  42         CZ_SCRATCH_ENTRY_UCODE_ID_RLC_G,
  43         CZ_SCRATCH_ENTRY_UCODE_ID_RLC_SCRATCH,
  44         CZ_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_ARAM,
  45         CZ_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_DRAM,
  46         CZ_SCRATCH_ENTRY_UCODE_ID_DMCU_ERAM,
  47         CZ_SCRATCH_ENTRY_UCODE_ID_DMCU_IRAM,
  48         CZ_SCRATCH_ENTRY_UCODE_ID_POWER_PROFILING,
  49         CZ_SCRATCH_ENTRY_DATA_ID_SDMA_HALT,
  50         CZ_SCRATCH_ENTRY_DATA_ID_SYS_CLOCKGATING,
  51         CZ_SCRATCH_ENTRY_DATA_ID_SDMA_RING_REGS,
  52         CZ_SCRATCH_ENTRY_DATA_ID_NONGFX_REINIT,
  53         CZ_SCRATCH_ENTRY_DATA_ID_SDMA_START,
  54         CZ_SCRATCH_ENTRY_DATA_ID_IH_REGISTERS,
  55         CZ_SCRATCH_ENTRY_SMU8_FUSION_CLKTABLE
  56 };
  57
  58 struct cz_buffer_entry {
  59         uint32_t        data_size;
  60         uint32_t        mc_addr_low;
  61         uint32_t        mc_addr_high;
  62         void            *kaddr;
  63         enum cz_scratch_entry firmware_ID;
  64 };
  65
  66 struct cz_register_index_data_pair {
  67         uint32_t        offset;
  68         uint32_t        value;
  69 };
  70
  71 struct cz_ih_meta_data {
  72         uint32_t        command;
  73         struct cz_register_index_data_pair register_index_value_pair[1];
  74 };
  75
  76 struct cz_smu_private_data {
  77         uint8_t         driver_buffer_length;
  78         uint8_t         scratch_buffer_length;
  79         uint16_t        toc_entry_used_count;
  80         uint16_t        toc_entry_initialize_index;
  81         uint16_t        toc_entry_power_profiling_index;
  82         uint16_t        toc_entry_aram;
  83         uint16_t        toc_entry_ih_register_restore_task_index;
  84         uint16_t        toc_entry_clock_table;
  85         uint16_t        ih_register_restore_task_size;
  86         uint16_t        smu_buffer_used_bytes;
  87
  88         struct cz_buffer_entry  toc_buffer;
  89         struct cz_buffer_entry  smu_buffer;
  90         struct cz_buffer_entry  driver_buffer[MAX_NUM_FIRMWARE];
  91         struct cz_buffer_entry  scratch_buffer[MAX_NUM_SCRATCH];
  92 };
  93
  94 #endif