drivers/gpu/drm/amd/scheduler/sched_fence.c

   1 /*
   2  * Copyright 2015 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  *
  23  */
  24 #include <linux/kthread.h>
  25 #include <linux/wait.h>
  26 #include <linux/sched.h>
  27 #include <drm/drmP.h>
  28 #include "gpu_scheduler.h"
  29
  30 struct amd_sched_fence *amd_sched_fence_create(struct amd_sched_entity *s_entity, void *owner)
  31 {
  32         struct amd_sched_fence *fence = NULL;
  33         unsigned seq;
  34
  35         fence = kmem_cache_zalloc(sched_fence_slab, GFP_KERNEL);
  36         if (fence == NULL)
  37                 return NULL;
  38
  39         INIT_LIST_HEAD(&fence->scheduled_cb);
  40         fence->owner = owner;
  41         fence->sched = s_entity->sched;
  42         spin_lock_init(&fence->lock);
  43
  44         seq = atomic_inc_return(&s_entity->fence_seq);
  45         fence_init(&fence->base, &amd_sched_fence_ops, &fence->lock,
  46                    s_entity->fence_context, seq);
  47
  48         return fence;
  49 }
  50
  51 void amd_sched_fence_signal(struct amd_sched_fence *fence)
  52 {
  53         int ret = fence_signal(&fence->base);
  54         if (!ret)
  55                 FENCE_TRACE(&fence->base, "signaled from irq context\n");
  56         else
  57                 FENCE_TRACE(&fence->base, "was already signaled\n");
  58 }
  59
  60 void amd_sched_fence_scheduled(struct amd_sched_fence *s_fence)
  61 {
  62         struct fence_cb *cur, *tmp;
  63
  64         set_bit(AMD_SCHED_FENCE_SCHEDULED_BIT, &s_fence->base.flags);
  65         list_for_each_entry_safe(cur, tmp, &s_fence->scheduled_cb, node) {
  66                 list_del_init(&cur->node);
  67                 cur->func(&s_fence->base, cur);
  68         }
  69 }
  70
  71 static const char *amd_sched_fence_get_driver_name(struct fence *fence)
  72 {
  73         return "amd_sched";
  74 }
  75
  76 static const char *amd_sched_fence_get_timeline_name(struct fence *f)
  77 {
  78         struct amd_sched_fence *fence = to_amd_sched_fence(f);
  79         return (const char *)fence->sched->name;
  80 }
  81
  82 static bool amd_sched_fence_enable_signaling(struct fence *f)
  83 {
  84         return true;
  85 }
  86
  87 static void amd_sched_fence_release(struct fence *f)
  88 {
  89         struct amd_sched_fence *fence = to_amd_sched_fence(f);
  90         kmem_cache_free(sched_fence_slab, fence);
  91 }
  92
  93 const struct fence_ops amd_sched_fence_ops = {
  94         .get_driver_name = amd_sched_fence_get_driver_name,
  95         .get_timeline_name = amd_sched_fence_get_timeline_name,
  96         .enable_signaling = amd_sched_fence_enable_signaling,
  97         .signaled = NULL,
  98         .wait = fence_default_wait,
  99         .release = amd_sched_fence_release,
 100 };