2 * Copyright (C) 2012 Samsung Electronics Co.Ltd
3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundationr
10 #include <linux/kernel.h>
11 #include <linux/clk.h>
12 #include <linux/err.h>
13 #include <linux/interrupt.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/slab.h>
18 #include <linux/workqueue.h>
19 #include <linux/dma-mapping.h>
23 #include <drm/exynos_drm.h>
24 #include "exynos_drm_drv.h"
25 #include "exynos_drm_g2d.h"
26 #include "exynos_drm_gem.h"
27 #include "exynos_drm_iommu.h"
29 #define G2D_HW_MAJOR_VER 4
30 #define G2D_HW_MINOR_VER 1
32 /* vaild register range set from user: 0x0104 ~ 0x0880 */
33 #define G2D_VALID_START 0x0104
34 #define G2D_VALID_END 0x0880
36 /* general registers */
37 #define G2D_SOFT_RESET 0x0000
38 #define G2D_INTEN 0x0004
39 #define G2D_INTC_PEND 0x000C
40 #define G2D_DMA_SFR_BASE_ADDR 0x0080
41 #define G2D_DMA_COMMAND 0x0084
42 #define G2D_DMA_STATUS 0x008C
43 #define G2D_DMA_HOLD_CMD 0x0090
45 /* command registers */
46 #define G2D_BITBLT_START 0x0100
48 /* registers for base address */
49 #define G2D_SRC_BASE_ADDR 0x0304
50 #define G2D_SRC_STRIDE 0x0308
51 #define G2D_SRC_COLOR_MODE 0x030C
52 #define G2D_SRC_LEFT_TOP 0x0310
53 #define G2D_SRC_RIGHT_BOTTOM 0x0314
54 #define G2D_SRC_PLANE2_BASE_ADDR 0x0318
55 #define G2D_DST_BASE_ADDR 0x0404
56 #define G2D_DST_STRIDE 0x0408
57 #define G2D_DST_COLOR_MODE 0x040C
58 #define G2D_DST_LEFT_TOP 0x0410
59 #define G2D_DST_RIGHT_BOTTOM 0x0414
60 #define G2D_DST_PLANE2_BASE_ADDR 0x0418
61 #define G2D_PAT_BASE_ADDR 0x0500
62 #define G2D_MSK_BASE_ADDR 0x0520
65 #define G2D_SFRCLEAR (1 << 1)
66 #define G2D_R (1 << 0)
69 #define G2D_INTEN_ACF (1 << 3)
70 #define G2D_INTEN_UCF (1 << 2)
71 #define G2D_INTEN_GCF (1 << 1)
72 #define G2D_INTEN_SCF (1 << 0)
75 #define G2D_INTP_ACMD_FIN (1 << 3)
76 #define G2D_INTP_UCMD_FIN (1 << 2)
77 #define G2D_INTP_GCMD_FIN (1 << 1)
78 #define G2D_INTP_SCMD_FIN (1 << 0)
81 #define G2D_DMA_HALT (1 << 2)
82 #define G2D_DMA_CONTINUE (1 << 1)
83 #define G2D_DMA_START (1 << 0)
86 #define G2D_DMA_LIST_DONE_COUNT (0xFF << 17)
87 #define G2D_DMA_BITBLT_DONE_COUNT (0xFFFF << 1)
88 #define G2D_DMA_DONE (1 << 0)
89 #define G2D_DMA_LIST_DONE_COUNT_OFFSET 17
91 /* G2D_DMA_HOLD_CMD */
92 #define G2D_USER_HOLD (1 << 2)
93 #define G2D_LIST_HOLD (1 << 1)
94 #define G2D_BITBLT_HOLD (1 << 0)
96 /* G2D_BITBLT_START */
97 #define G2D_START_CASESEL (1 << 2)
98 #define G2D_START_NHOLT (1 << 1)
99 #define G2D_START_BITBLT (1 << 0)
101 /* buffer color format */
102 #define G2D_FMT_XRGB8888 0
103 #define G2D_FMT_ARGB8888 1
104 #define G2D_FMT_RGB565 2
105 #define G2D_FMT_XRGB1555 3
106 #define G2D_FMT_ARGB1555 4
107 #define G2D_FMT_XRGB4444 5
108 #define G2D_FMT_ARGB4444 6
109 #define G2D_FMT_PACKED_RGB888 7
110 #define G2D_FMT_A8 11
111 #define G2D_FMT_L8 12
113 /* buffer valid length */
114 #define G2D_LEN_MIN 1
115 #define G2D_LEN_MAX 8000
117 #define G2D_CMDLIST_SIZE (PAGE_SIZE / 4)
118 #define G2D_CMDLIST_NUM 64
119 #define G2D_CMDLIST_POOL_SIZE (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
120 #define G2D_CMDLIST_DATA_NUM (G2D_CMDLIST_SIZE / sizeof(u32) - 2)
122 /* maximum buffer pool size of userptr is 64MB as default */
123 #define MAX_POOL (64 * 1024 * 1024)
141 /* cmdlist data structure */
144 unsigned long data
[G2D_CMDLIST_DATA_NUM
];
145 u32 last
; /* last data offset */
149 * A structure of buffer description
151 * @format: color format
152 * @stride: buffer stride/pitch in bytes
153 * @left_x: the x coordinates of left top corner
154 * @top_y: the y coordinates of left top corner
155 * @right_x: the x coordinates of right bottom corner
156 * @bottom_y: the y coordinates of right bottom corner
159 struct g2d_buf_desc
{
164 unsigned int right_x
;
165 unsigned int bottom_y
;
169 * A structure of buffer information
171 * @map_nr: manages the number of mapped buffers
172 * @reg_types: stores regitster type in the order of requested command
173 * @handles: stores buffer handle in its reg_type position
174 * @types: stores buffer type in its reg_type position
175 * @descs: stores buffer description in its reg_type position
178 struct g2d_buf_info
{
180 enum g2d_reg_type reg_types
[MAX_REG_TYPE_NR
];
181 unsigned long handles
[MAX_REG_TYPE_NR
];
182 unsigned int types
[MAX_REG_TYPE_NR
];
183 struct g2d_buf_desc descs
[MAX_REG_TYPE_NR
];
186 struct drm_exynos_pending_g2d_event
{
187 struct drm_pending_event base
;
188 struct drm_exynos_g2d_event event
;
191 struct g2d_cmdlist_userptr
{
192 struct list_head list
;
194 unsigned long userptr
;
196 struct frame_vector
*vec
;
197 struct sg_table
*sgt
;
202 struct g2d_cmdlist_node
{
203 struct list_head list
;
204 struct g2d_cmdlist
*cmdlist
;
206 struct g2d_buf_info buf_info
;
208 struct drm_exynos_pending_g2d_event
*event
;
211 struct g2d_runqueue_node
{
212 struct list_head list
;
213 struct list_head run_cmdlist
;
214 struct list_head event_list
;
215 struct drm_file
*filp
;
217 struct completion complete
;
223 struct clk
*gate_clk
;
226 struct workqueue_struct
*g2d_workq
;
227 struct work_struct runqueue_work
;
228 struct exynos_drm_subdrv subdrv
;
232 struct g2d_cmdlist_node
*cmdlist_node
;
233 struct list_head free_cmdlist
;
234 struct mutex cmdlist_mutex
;
235 dma_addr_t cmdlist_pool
;
236 void *cmdlist_pool_virt
;
237 unsigned long cmdlist_dma_attrs
;
240 struct g2d_runqueue_node
*runqueue_node
;
241 struct list_head runqueue
;
242 struct mutex runqueue_mutex
;
243 struct kmem_cache
*runqueue_slab
;
245 unsigned long current_pool
;
246 unsigned long max_pool
;
249 static int g2d_init_cmdlist(struct g2d_data
*g2d
)
251 struct device
*dev
= g2d
->dev
;
252 struct g2d_cmdlist_node
*node
= g2d
->cmdlist_node
;
253 struct exynos_drm_subdrv
*subdrv
= &g2d
->subdrv
;
256 struct g2d_buf_info
*buf_info
;
258 g2d
->cmdlist_dma_attrs
= DMA_ATTR_WRITE_COMBINE
;
260 g2d
->cmdlist_pool_virt
= dma_alloc_attrs(to_dma_dev(subdrv
->drm_dev
),
261 G2D_CMDLIST_POOL_SIZE
,
262 &g2d
->cmdlist_pool
, GFP_KERNEL
,
263 g2d
->cmdlist_dma_attrs
);
264 if (!g2d
->cmdlist_pool_virt
) {
265 dev_err(dev
, "failed to allocate dma memory\n");
269 node
= kcalloc(G2D_CMDLIST_NUM
, sizeof(*node
), GFP_KERNEL
);
271 dev_err(dev
, "failed to allocate memory\n");
276 for (nr
= 0; nr
< G2D_CMDLIST_NUM
; nr
++) {
280 g2d
->cmdlist_pool_virt
+ nr
* G2D_CMDLIST_SIZE
;
282 g2d
->cmdlist_pool
+ nr
* G2D_CMDLIST_SIZE
;
284 buf_info
= &node
[nr
].buf_info
;
285 for (i
= 0; i
< MAX_REG_TYPE_NR
; i
++)
286 buf_info
->reg_types
[i
] = REG_TYPE_NONE
;
288 list_add_tail(&node
[nr
].list
, &g2d
->free_cmdlist
);
294 dma_free_attrs(to_dma_dev(subdrv
->drm_dev
), G2D_CMDLIST_POOL_SIZE
,
295 g2d
->cmdlist_pool_virt
,
296 g2d
->cmdlist_pool
, g2d
->cmdlist_dma_attrs
);
300 static void g2d_fini_cmdlist(struct g2d_data
*g2d
)
302 struct exynos_drm_subdrv
*subdrv
= &g2d
->subdrv
;
304 kfree(g2d
->cmdlist_node
);
306 if (g2d
->cmdlist_pool_virt
&& g2d
->cmdlist_pool
) {
307 dma_free_attrs(to_dma_dev(subdrv
->drm_dev
),
308 G2D_CMDLIST_POOL_SIZE
,
309 g2d
->cmdlist_pool_virt
,
310 g2d
->cmdlist_pool
, g2d
->cmdlist_dma_attrs
);
314 static struct g2d_cmdlist_node
*g2d_get_cmdlist(struct g2d_data
*g2d
)
316 struct device
*dev
= g2d
->dev
;
317 struct g2d_cmdlist_node
*node
;
319 mutex_lock(&g2d
->cmdlist_mutex
);
320 if (list_empty(&g2d
->free_cmdlist
)) {
321 dev_err(dev
, "there is no free cmdlist\n");
322 mutex_unlock(&g2d
->cmdlist_mutex
);
326 node
= list_first_entry(&g2d
->free_cmdlist
, struct g2d_cmdlist_node
,
328 list_del_init(&node
->list
);
329 mutex_unlock(&g2d
->cmdlist_mutex
);
334 static void g2d_put_cmdlist(struct g2d_data
*g2d
, struct g2d_cmdlist_node
*node
)
336 mutex_lock(&g2d
->cmdlist_mutex
);
337 list_move_tail(&node
->list
, &g2d
->free_cmdlist
);
338 mutex_unlock(&g2d
->cmdlist_mutex
);
341 static void g2d_add_cmdlist_to_inuse(struct exynos_drm_g2d_private
*g2d_priv
,
342 struct g2d_cmdlist_node
*node
)
344 struct g2d_cmdlist_node
*lnode
;
346 if (list_empty(&g2d_priv
->inuse_cmdlist
))
349 /* this links to base address of new cmdlist */
350 lnode
= list_entry(g2d_priv
->inuse_cmdlist
.prev
,
351 struct g2d_cmdlist_node
, list
);
352 lnode
->cmdlist
->data
[lnode
->cmdlist
->last
] = node
->dma_addr
;
355 list_add_tail(&node
->list
, &g2d_priv
->inuse_cmdlist
);
358 list_add_tail(&node
->event
->base
.link
, &g2d_priv
->event_list
);
361 static void g2d_userptr_put_dma_addr(struct drm_device
*drm_dev
,
365 struct g2d_cmdlist_userptr
*g2d_userptr
=
366 (struct g2d_cmdlist_userptr
*)obj
;
375 atomic_dec(&g2d_userptr
->refcount
);
377 if (atomic_read(&g2d_userptr
->refcount
) > 0)
380 if (g2d_userptr
->in_pool
)
384 dma_unmap_sg(to_dma_dev(drm_dev
), g2d_userptr
->sgt
->sgl
,
385 g2d_userptr
->sgt
->nents
, DMA_BIDIRECTIONAL
);
387 pages
= frame_vector_pages(g2d_userptr
->vec
);
388 if (!IS_ERR(pages
)) {
391 for (i
= 0; i
< frame_vector_count(g2d_userptr
->vec
); i
++)
392 set_page_dirty_lock(pages
[i
]);
394 put_vaddr_frames(g2d_userptr
->vec
);
395 frame_vector_destroy(g2d_userptr
->vec
);
397 if (!g2d_userptr
->out_of_list
)
398 list_del_init(&g2d_userptr
->list
);
400 sg_free_table(g2d_userptr
->sgt
);
401 kfree(g2d_userptr
->sgt
);
405 static dma_addr_t
*g2d_userptr_get_dma_addr(struct drm_device
*drm_dev
,
406 unsigned long userptr
,
408 struct drm_file
*filp
,
411 struct drm_exynos_file_private
*file_priv
= filp
->driver_priv
;
412 struct exynos_drm_g2d_private
*g2d_priv
= file_priv
->g2d_priv
;
413 struct g2d_cmdlist_userptr
*g2d_userptr
;
414 struct g2d_data
*g2d
;
415 struct sg_table
*sgt
;
416 unsigned long start
, end
;
417 unsigned int npages
, offset
;
421 DRM_ERROR("invalid userptr size.\n");
422 return ERR_PTR(-EINVAL
);
425 g2d
= dev_get_drvdata(g2d_priv
->dev
);
427 /* check if userptr already exists in userptr_list. */
428 list_for_each_entry(g2d_userptr
, &g2d_priv
->userptr_list
, list
) {
429 if (g2d_userptr
->userptr
== userptr
) {
431 * also check size because there could be same address
432 * and different size.
434 if (g2d_userptr
->size
== size
) {
435 atomic_inc(&g2d_userptr
->refcount
);
436 *obj
= (unsigned long)g2d_userptr
;
438 return &g2d_userptr
->dma_addr
;
442 * at this moment, maybe g2d dma is accessing this
443 * g2d_userptr memory region so just remove this
444 * g2d_userptr object from userptr_list not to be
445 * referred again and also except it the userptr
446 * pool to be released after the dma access completion.
448 g2d_userptr
->out_of_list
= true;
449 g2d_userptr
->in_pool
= false;
450 list_del_init(&g2d_userptr
->list
);
456 g2d_userptr
= kzalloc(sizeof(*g2d_userptr
), GFP_KERNEL
);
458 return ERR_PTR(-ENOMEM
);
460 atomic_set(&g2d_userptr
->refcount
, 1);
461 g2d_userptr
->size
= size
;
463 start
= userptr
& PAGE_MASK
;
464 offset
= userptr
& ~PAGE_MASK
;
465 end
= PAGE_ALIGN(userptr
+ size
);
466 npages
= (end
- start
) >> PAGE_SHIFT
;
467 g2d_userptr
->vec
= frame_vector_create(npages
);
468 if (!g2d_userptr
->vec
) {
473 ret
= get_vaddr_frames(start
, npages
, true, true, g2d_userptr
->vec
);
475 DRM_ERROR("failed to get user pages from userptr.\n");
477 goto err_destroy_framevec
;
479 goto err_put_framevec
;
481 if (frame_vector_to_pages(g2d_userptr
->vec
) < 0) {
483 goto err_put_framevec
;
486 sgt
= kzalloc(sizeof(*sgt
), GFP_KERNEL
);
489 goto err_put_framevec
;
492 ret
= sg_alloc_table_from_pages(sgt
,
493 frame_vector_pages(g2d_userptr
->vec
),
494 npages
, offset
, size
, GFP_KERNEL
);
496 DRM_ERROR("failed to get sgt from pages.\n");
500 g2d_userptr
->sgt
= sgt
;
502 if (!dma_map_sg(to_dma_dev(drm_dev
), sgt
->sgl
, sgt
->nents
,
503 DMA_BIDIRECTIONAL
)) {
504 DRM_ERROR("failed to map sgt with dma region.\n");
506 goto err_sg_free_table
;
509 g2d_userptr
->dma_addr
= sgt
->sgl
[0].dma_address
;
510 g2d_userptr
->userptr
= userptr
;
512 list_add_tail(&g2d_userptr
->list
, &g2d_priv
->userptr_list
);
514 if (g2d
->current_pool
+ (npages
<< PAGE_SHIFT
) < g2d
->max_pool
) {
515 g2d
->current_pool
+= npages
<< PAGE_SHIFT
;
516 g2d_userptr
->in_pool
= true;
519 *obj
= (unsigned long)g2d_userptr
;
521 return &g2d_userptr
->dma_addr
;
530 put_vaddr_frames(g2d_userptr
->vec
);
532 err_destroy_framevec
:
533 frame_vector_destroy(g2d_userptr
->vec
);
541 static void g2d_userptr_free_all(struct drm_device
*drm_dev
,
542 struct g2d_data
*g2d
,
543 struct drm_file
*filp
)
545 struct drm_exynos_file_private
*file_priv
= filp
->driver_priv
;
546 struct exynos_drm_g2d_private
*g2d_priv
= file_priv
->g2d_priv
;
547 struct g2d_cmdlist_userptr
*g2d_userptr
, *n
;
549 list_for_each_entry_safe(g2d_userptr
, n
, &g2d_priv
->userptr_list
, list
)
550 if (g2d_userptr
->in_pool
)
551 g2d_userptr_put_dma_addr(drm_dev
,
552 (unsigned long)g2d_userptr
,
555 g2d
->current_pool
= 0;
558 static enum g2d_reg_type
g2d_get_reg_type(int reg_offset
)
560 enum g2d_reg_type reg_type
;
562 switch (reg_offset
) {
563 case G2D_SRC_BASE_ADDR
:
565 case G2D_SRC_COLOR_MODE
:
566 case G2D_SRC_LEFT_TOP
:
567 case G2D_SRC_RIGHT_BOTTOM
:
568 reg_type
= REG_TYPE_SRC
;
570 case G2D_SRC_PLANE2_BASE_ADDR
:
571 reg_type
= REG_TYPE_SRC_PLANE2
;
573 case G2D_DST_BASE_ADDR
:
575 case G2D_DST_COLOR_MODE
:
576 case G2D_DST_LEFT_TOP
:
577 case G2D_DST_RIGHT_BOTTOM
:
578 reg_type
= REG_TYPE_DST
;
580 case G2D_DST_PLANE2_BASE_ADDR
:
581 reg_type
= REG_TYPE_DST_PLANE2
;
583 case G2D_PAT_BASE_ADDR
:
584 reg_type
= REG_TYPE_PAT
;
586 case G2D_MSK_BASE_ADDR
:
587 reg_type
= REG_TYPE_MSK
;
590 reg_type
= REG_TYPE_NONE
;
591 DRM_ERROR("Unknown register offset![%d]\n", reg_offset
);
598 static unsigned long g2d_get_buf_bpp(unsigned int format
)
603 case G2D_FMT_XRGB8888
:
604 case G2D_FMT_ARGB8888
:
608 case G2D_FMT_XRGB1555
:
609 case G2D_FMT_ARGB1555
:
610 case G2D_FMT_XRGB4444
:
611 case G2D_FMT_ARGB4444
:
614 case G2D_FMT_PACKED_RGB888
:
625 static bool g2d_check_buf_desc_is_valid(struct g2d_buf_desc
*buf_desc
,
626 enum g2d_reg_type reg_type
,
630 unsigned long bpp
, last_pos
;
633 * check source and destination buffers only.
634 * so the others are always valid.
636 if (reg_type
!= REG_TYPE_SRC
&& reg_type
!= REG_TYPE_DST
)
639 /* This check also makes sure that right_x > left_x. */
640 width
= (int)buf_desc
->right_x
- (int)buf_desc
->left_x
;
641 if (width
< G2D_LEN_MIN
|| width
> G2D_LEN_MAX
) {
642 DRM_ERROR("width[%d] is out of range!\n", width
);
646 /* This check also makes sure that bottom_y > top_y. */
647 height
= (int)buf_desc
->bottom_y
- (int)buf_desc
->top_y
;
648 if (height
< G2D_LEN_MIN
|| height
> G2D_LEN_MAX
) {
649 DRM_ERROR("height[%d] is out of range!\n", height
);
653 bpp
= g2d_get_buf_bpp(buf_desc
->format
);
655 /* Compute the position of the last byte that the engine accesses. */
656 last_pos
= ((unsigned long)buf_desc
->bottom_y
- 1) *
657 (unsigned long)buf_desc
->stride
+
658 (unsigned long)buf_desc
->right_x
* bpp
- 1;
661 * Since right_x > left_x and bottom_y > top_y we already know
662 * that the first_pos < last_pos (first_pos being the position
663 * of the first byte the engine accesses), it just remains to
664 * check if last_pos is smaller then the buffer size.
667 if (last_pos
>= size
) {
668 DRM_ERROR("last engine access position [%lu] "
669 "is out of range [%lu]!\n", last_pos
, size
);
676 static int g2d_map_cmdlist_gem(struct g2d_data
*g2d
,
677 struct g2d_cmdlist_node
*node
,
678 struct drm_device
*drm_dev
,
679 struct drm_file
*file
)
681 struct g2d_cmdlist
*cmdlist
= node
->cmdlist
;
682 struct g2d_buf_info
*buf_info
= &node
->buf_info
;
687 for (i
= 0; i
< buf_info
->map_nr
; i
++) {
688 struct g2d_buf_desc
*buf_desc
;
689 enum g2d_reg_type reg_type
;
691 unsigned long handle
;
694 reg_pos
= cmdlist
->last
- 2 * (i
+ 1);
696 offset
= cmdlist
->data
[reg_pos
];
697 handle
= cmdlist
->data
[reg_pos
+ 1];
699 reg_type
= g2d_get_reg_type(offset
);
700 if (reg_type
== REG_TYPE_NONE
) {
705 buf_desc
= &buf_info
->descs
[reg_type
];
707 if (buf_info
->types
[reg_type
] == BUF_TYPE_GEM
) {
710 size
= exynos_drm_gem_get_size(drm_dev
, handle
, file
);
716 if (!g2d_check_buf_desc_is_valid(buf_desc
, reg_type
,
722 addr
= exynos_drm_gem_get_dma_addr(drm_dev
, handle
,
729 struct drm_exynos_g2d_userptr g2d_userptr
;
731 if (copy_from_user(&g2d_userptr
, (void __user
*)handle
,
732 sizeof(struct drm_exynos_g2d_userptr
))) {
737 if (!g2d_check_buf_desc_is_valid(buf_desc
, reg_type
,
743 addr
= g2d_userptr_get_dma_addr(drm_dev
,
754 cmdlist
->data
[reg_pos
+ 1] = *addr
;
755 buf_info
->reg_types
[i
] = reg_type
;
756 buf_info
->handles
[reg_type
] = handle
;
762 buf_info
->map_nr
= i
;
766 static void g2d_unmap_cmdlist_gem(struct g2d_data
*g2d
,
767 struct g2d_cmdlist_node
*node
,
768 struct drm_file
*filp
)
770 struct exynos_drm_subdrv
*subdrv
= &g2d
->subdrv
;
771 struct g2d_buf_info
*buf_info
= &node
->buf_info
;
774 for (i
= 0; i
< buf_info
->map_nr
; i
++) {
775 struct g2d_buf_desc
*buf_desc
;
776 enum g2d_reg_type reg_type
;
777 unsigned long handle
;
779 reg_type
= buf_info
->reg_types
[i
];
781 buf_desc
= &buf_info
->descs
[reg_type
];
782 handle
= buf_info
->handles
[reg_type
];
784 if (buf_info
->types
[reg_type
] == BUF_TYPE_GEM
)
785 exynos_drm_gem_put_dma_addr(subdrv
->drm_dev
, handle
,
788 g2d_userptr_put_dma_addr(subdrv
->drm_dev
, handle
,
791 buf_info
->reg_types
[i
] = REG_TYPE_NONE
;
792 buf_info
->handles
[reg_type
] = 0;
793 buf_info
->types
[reg_type
] = 0;
794 memset(buf_desc
, 0x00, sizeof(*buf_desc
));
797 buf_info
->map_nr
= 0;
800 static void g2d_dma_start(struct g2d_data
*g2d
,
801 struct g2d_runqueue_node
*runqueue_node
)
803 struct g2d_cmdlist_node
*node
=
804 list_first_entry(&runqueue_node
->run_cmdlist
,
805 struct g2d_cmdlist_node
, list
);
808 ret
= pm_runtime_get_sync(g2d
->dev
);
812 writel_relaxed(node
->dma_addr
, g2d
->regs
+ G2D_DMA_SFR_BASE_ADDR
);
813 writel_relaxed(G2D_DMA_START
, g2d
->regs
+ G2D_DMA_COMMAND
);
816 static struct g2d_runqueue_node
*g2d_get_runqueue_node(struct g2d_data
*g2d
)
818 struct g2d_runqueue_node
*runqueue_node
;
820 if (list_empty(&g2d
->runqueue
))
823 runqueue_node
= list_first_entry(&g2d
->runqueue
,
824 struct g2d_runqueue_node
, list
);
825 list_del_init(&runqueue_node
->list
);
826 return runqueue_node
;
829 static void g2d_free_runqueue_node(struct g2d_data
*g2d
,
830 struct g2d_runqueue_node
*runqueue_node
)
832 struct g2d_cmdlist_node
*node
;
837 mutex_lock(&g2d
->cmdlist_mutex
);
839 * commands in run_cmdlist have been completed so unmap all gem
840 * objects in each command node so that they are unreferenced.
842 list_for_each_entry(node
, &runqueue_node
->run_cmdlist
, list
)
843 g2d_unmap_cmdlist_gem(g2d
, node
, runqueue_node
->filp
);
844 list_splice_tail_init(&runqueue_node
->run_cmdlist
, &g2d
->free_cmdlist
);
845 mutex_unlock(&g2d
->cmdlist_mutex
);
847 kmem_cache_free(g2d
->runqueue_slab
, runqueue_node
);
850 static void g2d_exec_runqueue(struct g2d_data
*g2d
)
852 g2d
->runqueue_node
= g2d_get_runqueue_node(g2d
);
853 if (g2d
->runqueue_node
)
854 g2d_dma_start(g2d
, g2d
->runqueue_node
);
857 static void g2d_runqueue_worker(struct work_struct
*work
)
859 struct g2d_data
*g2d
= container_of(work
, struct g2d_data
,
862 mutex_lock(&g2d
->runqueue_mutex
);
863 pm_runtime_put_sync(g2d
->dev
);
865 complete(&g2d
->runqueue_node
->complete
);
866 if (g2d
->runqueue_node
->async
)
867 g2d_free_runqueue_node(g2d
, g2d
->runqueue_node
);
870 g2d
->runqueue_node
= NULL
;
872 g2d_exec_runqueue(g2d
);
873 mutex_unlock(&g2d
->runqueue_mutex
);
876 static void g2d_finish_event(struct g2d_data
*g2d
, u32 cmdlist_no
)
878 struct drm_device
*drm_dev
= g2d
->subdrv
.drm_dev
;
879 struct g2d_runqueue_node
*runqueue_node
= g2d
->runqueue_node
;
880 struct drm_exynos_pending_g2d_event
*e
;
883 if (list_empty(&runqueue_node
->event_list
))
886 e
= list_first_entry(&runqueue_node
->event_list
,
887 struct drm_exynos_pending_g2d_event
, base
.link
);
889 do_gettimeofday(&now
);
890 e
->event
.tv_sec
= now
.tv_sec
;
891 e
->event
.tv_usec
= now
.tv_usec
;
892 e
->event
.cmdlist_no
= cmdlist_no
;
894 drm_send_event(drm_dev
, &e
->base
);
897 static irqreturn_t
g2d_irq_handler(int irq
, void *dev_id
)
899 struct g2d_data
*g2d
= dev_id
;
902 pending
= readl_relaxed(g2d
->regs
+ G2D_INTC_PEND
);
904 writel_relaxed(pending
, g2d
->regs
+ G2D_INTC_PEND
);
906 if (pending
& G2D_INTP_GCMD_FIN
) {
907 u32 cmdlist_no
= readl_relaxed(g2d
->regs
+ G2D_DMA_STATUS
);
909 cmdlist_no
= (cmdlist_no
& G2D_DMA_LIST_DONE_COUNT
) >>
910 G2D_DMA_LIST_DONE_COUNT_OFFSET
;
912 g2d_finish_event(g2d
, cmdlist_no
);
914 writel_relaxed(0, g2d
->regs
+ G2D_DMA_HOLD_CMD
);
915 if (!(pending
& G2D_INTP_ACMD_FIN
)) {
916 writel_relaxed(G2D_DMA_CONTINUE
,
917 g2d
->regs
+ G2D_DMA_COMMAND
);
921 if (pending
& G2D_INTP_ACMD_FIN
)
922 queue_work(g2d
->g2d_workq
, &g2d
->runqueue_work
);
927 static int g2d_check_reg_offset(struct device
*dev
,
928 struct g2d_cmdlist_node
*node
,
929 int nr
, bool for_addr
)
931 struct g2d_cmdlist
*cmdlist
= node
->cmdlist
;
936 for (i
= 0; i
< nr
; i
++) {
937 struct g2d_buf_info
*buf_info
= &node
->buf_info
;
938 struct g2d_buf_desc
*buf_desc
;
939 enum g2d_reg_type reg_type
;
942 index
= cmdlist
->last
- 2 * (i
+ 1);
944 reg_offset
= cmdlist
->data
[index
] & ~0xfffff000;
945 if (reg_offset
< G2D_VALID_START
|| reg_offset
> G2D_VALID_END
)
950 switch (reg_offset
) {
951 case G2D_SRC_BASE_ADDR
:
952 case G2D_SRC_PLANE2_BASE_ADDR
:
953 case G2D_DST_BASE_ADDR
:
954 case G2D_DST_PLANE2_BASE_ADDR
:
955 case G2D_PAT_BASE_ADDR
:
956 case G2D_MSK_BASE_ADDR
:
960 reg_type
= g2d_get_reg_type(reg_offset
);
962 /* check userptr buffer type. */
963 if ((cmdlist
->data
[index
] & ~0x7fffffff) >> 31) {
964 buf_info
->types
[reg_type
] = BUF_TYPE_USERPTR
;
965 cmdlist
->data
[index
] &= ~G2D_BUF_USERPTR
;
967 buf_info
->types
[reg_type
] = BUF_TYPE_GEM
;
974 reg_type
= g2d_get_reg_type(reg_offset
);
976 buf_desc
= &buf_info
->descs
[reg_type
];
977 buf_desc
->stride
= cmdlist
->data
[index
+ 1];
979 case G2D_SRC_COLOR_MODE
:
980 case G2D_DST_COLOR_MODE
:
984 reg_type
= g2d_get_reg_type(reg_offset
);
986 buf_desc
= &buf_info
->descs
[reg_type
];
987 value
= cmdlist
->data
[index
+ 1];
989 buf_desc
->format
= value
& 0xf;
991 case G2D_SRC_LEFT_TOP
:
992 case G2D_DST_LEFT_TOP
:
996 reg_type
= g2d_get_reg_type(reg_offset
);
998 buf_desc
= &buf_info
->descs
[reg_type
];
999 value
= cmdlist
->data
[index
+ 1];
1001 buf_desc
->left_x
= value
& 0x1fff;
1002 buf_desc
->top_y
= (value
& 0x1fff0000) >> 16;
1004 case G2D_SRC_RIGHT_BOTTOM
:
1005 case G2D_DST_RIGHT_BOTTOM
:
1009 reg_type
= g2d_get_reg_type(reg_offset
);
1011 buf_desc
= &buf_info
->descs
[reg_type
];
1012 value
= cmdlist
->data
[index
+ 1];
1014 buf_desc
->right_x
= value
& 0x1fff;
1015 buf_desc
->bottom_y
= (value
& 0x1fff0000) >> 16;
1027 dev_err(dev
, "Bad register offset: 0x%lx\n", cmdlist
->data
[index
]);
1031 /* ioctl functions */
1032 int exynos_g2d_get_ver_ioctl(struct drm_device
*drm_dev
, void *data
,
1033 struct drm_file
*file
)
1035 struct drm_exynos_file_private
*file_priv
= file
->driver_priv
;
1036 struct exynos_drm_g2d_private
*g2d_priv
= file_priv
->g2d_priv
;
1038 struct g2d_data
*g2d
;
1039 struct drm_exynos_g2d_get_ver
*ver
= data
;
1044 dev
= g2d_priv
->dev
;
1048 g2d
= dev_get_drvdata(dev
);
1052 ver
->major
= G2D_HW_MAJOR_VER
;
1053 ver
->minor
= G2D_HW_MINOR_VER
;
1058 int exynos_g2d_set_cmdlist_ioctl(struct drm_device
*drm_dev
, void *data
,
1059 struct drm_file
*file
)
1061 struct drm_exynos_file_private
*file_priv
= file
->driver_priv
;
1062 struct exynos_drm_g2d_private
*g2d_priv
= file_priv
->g2d_priv
;
1064 struct g2d_data
*g2d
;
1065 struct drm_exynos_g2d_set_cmdlist
*req
= data
;
1066 struct drm_exynos_g2d_cmd
*cmd
;
1067 struct drm_exynos_pending_g2d_event
*e
;
1068 struct g2d_cmdlist_node
*node
;
1069 struct g2d_cmdlist
*cmdlist
;
1076 dev
= g2d_priv
->dev
;
1080 g2d
= dev_get_drvdata(dev
);
1084 node
= g2d_get_cmdlist(g2d
);
1090 if (req
->event_type
!= G2D_EVENT_NOT
) {
1091 e
= kzalloc(sizeof(*node
->event
), GFP_KERNEL
);
1097 e
->event
.base
.type
= DRM_EXYNOS_G2D_EVENT
;
1098 e
->event
.base
.length
= sizeof(e
->event
);
1099 e
->event
.user_data
= req
->user_data
;
1101 ret
= drm_event_reserve_init(drm_dev
, file
, &e
->base
, &e
->event
.base
);
1110 cmdlist
= node
->cmdlist
;
1115 * If don't clear SFR registers, the cmdlist is affected by register
1116 * values of previous cmdlist. G2D hw executes SFR clear command and
1117 * a next command at the same time then the next command is ignored and
1118 * is executed rightly from next next command, so needs a dummy command
1119 * to next command of SFR clear command.
1121 cmdlist
->data
[cmdlist
->last
++] = G2D_SOFT_RESET
;
1122 cmdlist
->data
[cmdlist
->last
++] = G2D_SFRCLEAR
;
1123 cmdlist
->data
[cmdlist
->last
++] = G2D_SRC_BASE_ADDR
;
1124 cmdlist
->data
[cmdlist
->last
++] = 0;
1127 * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
1128 * and GCF bit should be set to INTEN register if user wants
1129 * G2D interrupt event once current command list execution is
1131 * Otherwise only ACF bit should be set to INTEN register so
1132 * that one interrupt is occurred after all command lists
1133 * have been completed.
1136 cmdlist
->data
[cmdlist
->last
++] = G2D_INTEN
;
1137 cmdlist
->data
[cmdlist
->last
++] = G2D_INTEN_ACF
| G2D_INTEN_GCF
;
1138 cmdlist
->data
[cmdlist
->last
++] = G2D_DMA_HOLD_CMD
;
1139 cmdlist
->data
[cmdlist
->last
++] = G2D_LIST_HOLD
;
1141 cmdlist
->data
[cmdlist
->last
++] = G2D_INTEN
;
1142 cmdlist
->data
[cmdlist
->last
++] = G2D_INTEN_ACF
;
1145 /* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
1146 size
= cmdlist
->last
+ req
->cmd_nr
* 2 + req
->cmd_buf_nr
* 2 + 2;
1147 if (size
> G2D_CMDLIST_DATA_NUM
) {
1148 dev_err(dev
, "cmdlist size is too big\n");
1150 goto err_free_event
;
1153 cmd
= (struct drm_exynos_g2d_cmd
*)(unsigned long)req
->cmd
;
1155 if (copy_from_user(cmdlist
->data
+ cmdlist
->last
,
1157 sizeof(*cmd
) * req
->cmd_nr
)) {
1159 goto err_free_event
;
1161 cmdlist
->last
+= req
->cmd_nr
* 2;
1163 ret
= g2d_check_reg_offset(dev
, node
, req
->cmd_nr
, false);
1165 goto err_free_event
;
1167 node
->buf_info
.map_nr
= req
->cmd_buf_nr
;
1168 if (req
->cmd_buf_nr
) {
1169 struct drm_exynos_g2d_cmd
*cmd_buf
;
1171 cmd_buf
= (struct drm_exynos_g2d_cmd
*)
1172 (unsigned long)req
->cmd_buf
;
1174 if (copy_from_user(cmdlist
->data
+ cmdlist
->last
,
1175 (void __user
*)cmd_buf
,
1176 sizeof(*cmd_buf
) * req
->cmd_buf_nr
)) {
1178 goto err_free_event
;
1180 cmdlist
->last
+= req
->cmd_buf_nr
* 2;
1182 ret
= g2d_check_reg_offset(dev
, node
, req
->cmd_buf_nr
, true);
1184 goto err_free_event
;
1186 ret
= g2d_map_cmdlist_gem(g2d
, node
, drm_dev
, file
);
1191 cmdlist
->data
[cmdlist
->last
++] = G2D_BITBLT_START
;
1192 cmdlist
->data
[cmdlist
->last
++] = G2D_START_BITBLT
;
1195 cmdlist
->head
= cmdlist
->last
/ 2;
1198 cmdlist
->data
[cmdlist
->last
] = 0;
1200 g2d_add_cmdlist_to_inuse(g2d_priv
, node
);
1205 g2d_unmap_cmdlist_gem(g2d
, node
, file
);
1208 drm_event_cancel_free(drm_dev
, &node
->event
->base
);
1210 g2d_put_cmdlist(g2d
, node
);
1214 int exynos_g2d_exec_ioctl(struct drm_device
*drm_dev
, void *data
,
1215 struct drm_file
*file
)
1217 struct drm_exynos_file_private
*file_priv
= file
->driver_priv
;
1218 struct exynos_drm_g2d_private
*g2d_priv
= file_priv
->g2d_priv
;
1220 struct g2d_data
*g2d
;
1221 struct drm_exynos_g2d_exec
*req
= data
;
1222 struct g2d_runqueue_node
*runqueue_node
;
1223 struct list_head
*run_cmdlist
;
1224 struct list_head
*event_list
;
1229 dev
= g2d_priv
->dev
;
1233 g2d
= dev_get_drvdata(dev
);
1237 runqueue_node
= kmem_cache_alloc(g2d
->runqueue_slab
, GFP_KERNEL
);
1238 if (!runqueue_node
) {
1239 dev_err(dev
, "failed to allocate memory\n");
1242 run_cmdlist
= &runqueue_node
->run_cmdlist
;
1243 event_list
= &runqueue_node
->event_list
;
1244 INIT_LIST_HEAD(run_cmdlist
);
1245 INIT_LIST_HEAD(event_list
);
1246 init_completion(&runqueue_node
->complete
);
1247 runqueue_node
->async
= req
->async
;
1249 list_splice_init(&g2d_priv
->inuse_cmdlist
, run_cmdlist
);
1250 list_splice_init(&g2d_priv
->event_list
, event_list
);
1252 if (list_empty(run_cmdlist
)) {
1253 dev_err(dev
, "there is no inuse cmdlist\n");
1254 kmem_cache_free(g2d
->runqueue_slab
, runqueue_node
);
1258 mutex_lock(&g2d
->runqueue_mutex
);
1259 runqueue_node
->pid
= current
->pid
;
1260 runqueue_node
->filp
= file
;
1261 list_add_tail(&runqueue_node
->list
, &g2d
->runqueue
);
1262 if (!g2d
->runqueue_node
)
1263 g2d_exec_runqueue(g2d
);
1264 mutex_unlock(&g2d
->runqueue_mutex
);
1266 if (runqueue_node
->async
)
1269 wait_for_completion(&runqueue_node
->complete
);
1270 g2d_free_runqueue_node(g2d
, runqueue_node
);
1276 static int g2d_subdrv_probe(struct drm_device
*drm_dev
, struct device
*dev
)
1278 struct g2d_data
*g2d
;
1281 g2d
= dev_get_drvdata(dev
);
1285 /* allocate dma-aware cmdlist buffer. */
1286 ret
= g2d_init_cmdlist(g2d
);
1288 dev_err(dev
, "cmdlist init failed\n");
1292 ret
= drm_iommu_attach_device(drm_dev
, dev
);
1294 dev_err(dev
, "failed to enable iommu.\n");
1295 g2d_fini_cmdlist(g2d
);
1302 static void g2d_subdrv_remove(struct drm_device
*drm_dev
, struct device
*dev
)
1304 drm_iommu_detach_device(drm_dev
, dev
);
1307 static int g2d_open(struct drm_device
*drm_dev
, struct device
*dev
,
1308 struct drm_file
*file
)
1310 struct drm_exynos_file_private
*file_priv
= file
->driver_priv
;
1311 struct exynos_drm_g2d_private
*g2d_priv
;
1313 g2d_priv
= kzalloc(sizeof(*g2d_priv
), GFP_KERNEL
);
1317 g2d_priv
->dev
= dev
;
1318 file_priv
->g2d_priv
= g2d_priv
;
1320 INIT_LIST_HEAD(&g2d_priv
->inuse_cmdlist
);
1321 INIT_LIST_HEAD(&g2d_priv
->event_list
);
1322 INIT_LIST_HEAD(&g2d_priv
->userptr_list
);
1327 static void g2d_close(struct drm_device
*drm_dev
, struct device
*dev
,
1328 struct drm_file
*file
)
1330 struct drm_exynos_file_private
*file_priv
= file
->driver_priv
;
1331 struct exynos_drm_g2d_private
*g2d_priv
= file_priv
->g2d_priv
;
1332 struct g2d_data
*g2d
;
1333 struct g2d_cmdlist_node
*node
, *n
;
1338 g2d
= dev_get_drvdata(dev
);
1342 mutex_lock(&g2d
->cmdlist_mutex
);
1343 list_for_each_entry_safe(node
, n
, &g2d_priv
->inuse_cmdlist
, list
) {
1345 * unmap all gem objects not completed.
1347 * P.S. if current process was terminated forcely then
1348 * there may be some commands in inuse_cmdlist so unmap
1351 g2d_unmap_cmdlist_gem(g2d
, node
, file
);
1352 list_move_tail(&node
->list
, &g2d
->free_cmdlist
);
1354 mutex_unlock(&g2d
->cmdlist_mutex
);
1356 /* release all g2d_userptr in pool. */
1357 g2d_userptr_free_all(drm_dev
, g2d
, file
);
1359 kfree(file_priv
->g2d_priv
);
1362 static int g2d_probe(struct platform_device
*pdev
)
1364 struct device
*dev
= &pdev
->dev
;
1365 struct resource
*res
;
1366 struct g2d_data
*g2d
;
1367 struct exynos_drm_subdrv
*subdrv
;
1370 g2d
= devm_kzalloc(dev
, sizeof(*g2d
), GFP_KERNEL
);
1374 g2d
->runqueue_slab
= kmem_cache_create("g2d_runqueue_slab",
1375 sizeof(struct g2d_runqueue_node
), 0, 0, NULL
);
1376 if (!g2d
->runqueue_slab
)
1381 g2d
->g2d_workq
= create_singlethread_workqueue("g2d");
1382 if (!g2d
->g2d_workq
) {
1383 dev_err(dev
, "failed to create workqueue\n");
1385 goto err_destroy_slab
;
1388 INIT_WORK(&g2d
->runqueue_work
, g2d_runqueue_worker
);
1389 INIT_LIST_HEAD(&g2d
->free_cmdlist
);
1390 INIT_LIST_HEAD(&g2d
->runqueue
);
1392 mutex_init(&g2d
->cmdlist_mutex
);
1393 mutex_init(&g2d
->runqueue_mutex
);
1395 g2d
->gate_clk
= devm_clk_get(dev
, "fimg2d");
1396 if (IS_ERR(g2d
->gate_clk
)) {
1397 dev_err(dev
, "failed to get gate clock\n");
1398 ret
= PTR_ERR(g2d
->gate_clk
);
1399 goto err_destroy_workqueue
;
1402 pm_runtime_enable(dev
);
1404 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1406 g2d
->regs
= devm_ioremap_resource(dev
, res
);
1407 if (IS_ERR(g2d
->regs
)) {
1408 ret
= PTR_ERR(g2d
->regs
);
1412 g2d
->irq
= platform_get_irq(pdev
, 0);
1414 dev_err(dev
, "failed to get irq\n");
1419 ret
= devm_request_irq(dev
, g2d
->irq
, g2d_irq_handler
, 0,
1422 dev_err(dev
, "irq request failed\n");
1426 g2d
->max_pool
= MAX_POOL
;
1428 platform_set_drvdata(pdev
, g2d
);
1430 subdrv
= &g2d
->subdrv
;
1432 subdrv
->probe
= g2d_subdrv_probe
;
1433 subdrv
->remove
= g2d_subdrv_remove
;
1434 subdrv
->open
= g2d_open
;
1435 subdrv
->close
= g2d_close
;
1437 ret
= exynos_drm_subdrv_register(subdrv
);
1439 dev_err(dev
, "failed to register drm g2d device\n");
1443 dev_info(dev
, "The exynos g2d(ver %d.%d) successfully probed\n",
1444 G2D_HW_MAJOR_VER
, G2D_HW_MINOR_VER
);
1449 pm_runtime_disable(dev
);
1450 err_destroy_workqueue
:
1451 destroy_workqueue(g2d
->g2d_workq
);
1453 kmem_cache_destroy(g2d
->runqueue_slab
);
1457 static int g2d_remove(struct platform_device
*pdev
)
1459 struct g2d_data
*g2d
= platform_get_drvdata(pdev
);
1461 cancel_work_sync(&g2d
->runqueue_work
);
1462 exynos_drm_subdrv_unregister(&g2d
->subdrv
);
1464 while (g2d
->runqueue_node
) {
1465 g2d_free_runqueue_node(g2d
, g2d
->runqueue_node
);
1466 g2d
->runqueue_node
= g2d_get_runqueue_node(g2d
);
1469 pm_runtime_disable(&pdev
->dev
);
1471 g2d_fini_cmdlist(g2d
);
1472 destroy_workqueue(g2d
->g2d_workq
);
1473 kmem_cache_destroy(g2d
->runqueue_slab
);
1478 #ifdef CONFIG_PM_SLEEP
1479 static int g2d_suspend(struct device
*dev
)
1481 struct g2d_data
*g2d
= dev_get_drvdata(dev
);
1483 mutex_lock(&g2d
->runqueue_mutex
);
1484 g2d
->suspended
= true;
1485 mutex_unlock(&g2d
->runqueue_mutex
);
1487 while (g2d
->runqueue_node
)
1488 /* FIXME: good range? */
1489 usleep_range(500, 1000);
1491 flush_work(&g2d
->runqueue_work
);
1496 static int g2d_resume(struct device
*dev
)
1498 struct g2d_data
*g2d
= dev_get_drvdata(dev
);
1500 g2d
->suspended
= false;
1501 g2d_exec_runqueue(g2d
);
1508 static int g2d_runtime_suspend(struct device
*dev
)
1510 struct g2d_data
*g2d
= dev_get_drvdata(dev
);
1512 clk_disable_unprepare(g2d
->gate_clk
);
1517 static int g2d_runtime_resume(struct device
*dev
)
1519 struct g2d_data
*g2d
= dev_get_drvdata(dev
);
1522 ret
= clk_prepare_enable(g2d
->gate_clk
);
1524 dev_warn(dev
, "failed to enable clock.\n");
1530 static const struct dev_pm_ops g2d_pm_ops
= {
1531 SET_SYSTEM_SLEEP_PM_OPS(g2d_suspend
, g2d_resume
)
1532 SET_RUNTIME_PM_OPS(g2d_runtime_suspend
, g2d_runtime_resume
, NULL
)
1535 static const struct of_device_id exynos_g2d_match
[] = {
1536 { .compatible
= "samsung,exynos5250-g2d" },
1537 { .compatible
= "samsung,exynos4212-g2d" },
1540 MODULE_DEVICE_TABLE(of
, exynos_g2d_match
);
1542 struct platform_driver g2d_driver
= {
1544 .remove
= g2d_remove
,
1547 .owner
= THIS_MODULE
,
1549 .of_match_table
= exynos_g2d_match
,