drivers/gpu/drm/exynos/exynos_drm_plane.c

   1 /*
   2  * Copyright (C) 2011 Samsung Electronics Co.Ltd
   3  * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
   4  *
   5  * This program is free software; you can redistribute  it and/or modify it
   6  * under  the terms of  the GNU General  Public License as published by the
   7  * Free Software Foundation;  either version 2 of the  License, or (at your
   8  * option) any later version.
   9  *
  10  */
  11
  12 #include <drm/drmP.h>
  13
  14 #include <drm/exynos_drm.h>
  15 #include "exynos_drm_drv.h"
  16 #include "exynos_drm_encoder.h"
  17 #include "exynos_drm_fb.h"
  18 #include "exynos_drm_gem.h"
  19
  20 #define to_exynos_plane(x)      container_of(x, struct exynos_plane, base)
  21
  22 struct exynos_plane {
  23         struct drm_plane                base;
  24         struct exynos_drm_overlay       overlay;
  25         bool                            enabled;
  26 };
  27
  28 static const uint32_t formats[] = {
  29         DRM_FORMAT_XRGB8888,
  30         DRM_FORMAT_ARGB8888,
  31         DRM_FORMAT_NV12,
  32         DRM_FORMAT_NV12MT,
  33 };
  34
  35 /*
  36  * This function is to get X or Y size shown via screen. This needs length and
  37  * start position of CRTC.
  38  *
  39  *      <--- length --->
  40  * CRTC ----------------
  41  *      ^ start        ^ end
  42  *
  43  * There are six cases from a to f.
  44  *
  45  *             <----- SCREEN ----->
  46  *             0                 last
  47  *   ----------|------------------|----------
  48  * CRTCs
  49  * a -------
  50  *        b -------
  51  *        c --------------------------
  52  *                 d --------
  53  *                           e -------
  54  *                                  f -------
  55  */
  56 static int exynos_plane_get_size(int start, unsigned length, unsigned last)
  57 {
  58         int end = start + length;
  59         int size = 0;
  60
  61         if (start <= 0) {
  62                 if (end > 0)
  63                         size = min_t(unsigned, end, last);
  64         } else if (start <= last) {
  65                 size = min_t(unsigned, last - start, length);
  66         }
  67
  68         return size;
  69 }
  70
  71 int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
  72                           struct drm_framebuffer *fb, int crtc_x, int crtc_y,
  73                           unsigned int crtc_w, unsigned int crtc_h,
  74                           uint32_t src_x, uint32_t src_y,
  75                           uint32_t src_w, uint32_t src_h)
  76 {
  77         struct exynos_plane *exynos_plane = to_exynos_plane(plane);
  78         struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
  79         unsigned int actual_w;
  80         unsigned int actual_h;
  81         int nr;
  82         int i;
  83
  84         nr = exynos_drm_fb_get_buf_cnt(fb);
  85         for (i = 0; i < nr; i++) {
  86                 struct exynos_drm_gem_buf *buffer = exynos_drm_fb_buffer(fb, i);
  87
  88                 if (!buffer) {
  89                         DRM_LOG_KMS("buffer is null\n");
  90                         return -EFAULT;
  91                 }
  92
  93                 overlay->dma_addr[i] = buffer->dma_addr;
  94
  95                 DRM_DEBUG_KMS("buffer: %d, dma_addr = 0x%lx\n",
  96                                 i, (unsigned long)overlay->dma_addr[i]);
  97         }
  98
  99         actual_w = exynos_plane_get_size(crtc_x, crtc_w, crtc->mode.hdisplay);
 100         actual_h = exynos_plane_get_size(crtc_y, crtc_h, crtc->mode.vdisplay);
 101
 102         if (crtc_x < 0) {
 103                 if (actual_w)
 104                         src_x -= crtc_x;
 105                 crtc_x = 0;
 106         }
 107
 108         if (crtc_y < 0) {
 109                 if (actual_h)
 110                         src_y -= crtc_y;
 111                 crtc_y = 0;
 112         }
 113
 114         /* set drm framebuffer data. */
 115         overlay->fb_x = src_x;
 116         overlay->fb_y = src_y;
 117         overlay->fb_width = fb->width;
 118         overlay->fb_height = fb->height;
 119         overlay->src_width = src_w;
 120         overlay->src_height = src_h;
 121         overlay->bpp = fb->bits_per_pixel;
 122         overlay->pitch = fb->pitches[0];
 123         overlay->pixel_format = fb->pixel_format;
 124
 125         /* set overlay range to be displayed. */
 126         overlay->crtc_x = crtc_x;
 127         overlay->crtc_y = crtc_y;
 128         overlay->crtc_width = actual_w;
 129         overlay->crtc_height = actual_h;
 130
 131         /* set drm mode data. */
 132         overlay->mode_width = crtc->mode.hdisplay;
 133         overlay->mode_height = crtc->mode.vdisplay;
 134         overlay->refresh = crtc->mode.vrefresh;
 135         overlay->scan_flag = crtc->mode.flags;
 136
 137         DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
 138                         overlay->crtc_x, overlay->crtc_y,
 139                         overlay->crtc_width, overlay->crtc_height);
 140
 141         exynos_drm_fn_encoder(crtc, overlay, exynos_drm_encoder_plane_mode_set);
 142
 143         return 0;
 144 }
 145
 146 void exynos_plane_commit(struct drm_plane *plane)
 147 {
 148         struct exynos_plane *exynos_plane = to_exynos_plane(plane);
 149         struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
 150
 151         exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
 152                         exynos_drm_encoder_plane_commit);
 153 }
 154
 155 void exynos_plane_dpms(struct drm_plane *plane, int mode)
 156 {
 157         struct exynos_plane *exynos_plane = to_exynos_plane(plane);
 158         struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
 159
 160         if (mode == DRM_MODE_DPMS_ON) {
 161                 if (exynos_plane->enabled)
 162                         return;
 163
 164                 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
 165                                 exynos_drm_encoder_plane_enable);
 166
 167                 exynos_plane->enabled = true;
 168         } else {
 169                 if (!exynos_plane->enabled)
 170                         return;
 171
 172                 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
 173                                 exynos_drm_encoder_plane_disable);
 174
 175                 exynos_plane->enabled = false;
 176         }
 177 }
 178
 179 static int
 180 exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
 181                      struct drm_framebuffer *fb, int crtc_x, int crtc_y,
 182                      unsigned int crtc_w, unsigned int crtc_h,
 183                      uint32_t src_x, uint32_t src_y,
 184                      uint32_t src_w, uint32_t src_h)
 185 {
 186         int ret;
 187
 188         ret = exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y,
 189                         crtc_w, crtc_h, src_x >> 16, src_y >> 16,
 190                         src_w >> 16, src_h >> 16);
 191         if (ret < 0)
 192                 return ret;
 193
 194         plane->crtc = crtc;
 195
 196         exynos_plane_commit(plane);
 197         exynos_plane_dpms(plane, DRM_MODE_DPMS_ON);
 198
 199         return 0;
 200 }
 201
 202 static int exynos_disable_plane(struct drm_plane *plane)
 203 {
 204         exynos_plane_dpms(plane, DRM_MODE_DPMS_OFF);
 205
 206         return 0;
 207 }
 208
 209 static void exynos_plane_destroy(struct drm_plane *plane)
 210 {
 211         struct exynos_plane *exynos_plane = to_exynos_plane(plane);
 212
 213         exynos_disable_plane(plane);
 214         drm_plane_cleanup(plane);
 215         kfree(exynos_plane);
 216 }
 217
 218 static int exynos_plane_set_property(struct drm_plane *plane,
 219                                      struct drm_property *property,
 220                                      uint64_t val)
 221 {
 222         struct drm_device *dev = plane->dev;
 223         struct exynos_plane *exynos_plane = to_exynos_plane(plane);
 224         struct exynos_drm_private *dev_priv = dev->dev_private;
 225
 226         if (property == dev_priv->plane_zpos_property) {
 227                 exynos_plane->overlay.zpos = val;
 228                 return 0;
 229         }
 230
 231         return -EINVAL;
 232 }
 233
 234 static struct drm_plane_funcs exynos_plane_funcs = {
 235         .update_plane   = exynos_update_plane,
 236         .disable_plane  = exynos_disable_plane,
 237         .destroy        = exynos_plane_destroy,
 238         .set_property   = exynos_plane_set_property,
 239 };
 240
 241 static void exynos_plane_attach_zpos_property(struct drm_plane *plane)
 242 {
 243         struct drm_device *dev = plane->dev;
 244         struct exynos_drm_private *dev_priv = dev->dev_private;
 245         struct drm_property *prop;
 246
 247         prop = dev_priv->plane_zpos_property;
 248         if (!prop) {
 249                 prop = drm_property_create_range(dev, 0, "zpos", 0,
 250                                                  MAX_PLANE - 1);
 251                 if (!prop)
 252                         return;
 253
 254                 dev_priv->plane_zpos_property = prop;
 255         }
 256
 257         drm_object_attach_property(&plane->base, prop, 0);
 258 }
 259
 260 struct drm_plane *exynos_plane_init(struct drm_device *dev,
 261                                     unsigned int possible_crtcs, bool priv)
 262 {
 263         struct exynos_plane *exynos_plane;
 264         int err;
 265
 266         exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL);
 267         if (!exynos_plane) {
 268                 DRM_ERROR("failed to allocate plane\n");
 269                 return NULL;
 270         }
 271
 272         err = drm_plane_init(dev, &exynos_plane->base, possible_crtcs,
 273                               &exynos_plane_funcs, formats, ARRAY_SIZE(formats),
 274                               priv);
 275         if (err) {
 276                 DRM_ERROR("failed to initialize plane\n");
 277                 kfree(exynos_plane);
 278                 return NULL;
 279         }
 280
 281         if (priv)
 282                 exynos_plane->overlay.zpos = DEFAULT_ZPOS;
 283         else
 284                 exynos_plane_attach_zpos_property(&exynos_plane->base);
 285
 286         return &exynos_plane->base;
 287 }