2 * Copyright © 2008 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
29 #include <linux/seq_file.h>
30 #include <linux/circ_buf.h>
31 #include <linux/ctype.h>
32 #include <linux/debugfs.h>
33 #include <linux/slab.h>
34 #include <linux/export.h>
35 #include <linux/list_sort.h>
36 #include <asm/msr-index.h>
38 #include "intel_drv.h"
39 #include "intel_ringbuffer.h"
40 #include <drm/i915_drm.h>
43 #if defined(CONFIG_DEBUG_FS)
51 static const char *yesno(int v
)
53 return v
? "yes" : "no";
56 static int i915_capabilities(struct seq_file
*m
, void *data
)
58 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
59 struct drm_device
*dev
= node
->minor
->dev
;
60 const struct intel_device_info
*info
= INTEL_INFO(dev
);
62 seq_printf(m
, "gen: %d\n", info
->gen
);
63 seq_printf(m
, "pch: %d\n", INTEL_PCH_TYPE(dev
));
64 #define PRINT_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x))
65 #define SEP_SEMICOLON ;
66 DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG
, SEP_SEMICOLON
);
73 static const char *get_pin_flag(struct drm_i915_gem_object
*obj
)
75 if (obj
->user_pin_count
> 0)
77 else if (obj
->pin_count
> 0)
83 static const char *get_tiling_flag(struct drm_i915_gem_object
*obj
)
85 switch (obj
->tiling_mode
) {
87 case I915_TILING_NONE
: return " ";
88 case I915_TILING_X
: return "X";
89 case I915_TILING_Y
: return "Y";
93 static inline const char *get_global_flag(struct drm_i915_gem_object
*obj
)
95 return obj
->has_global_gtt_mapping
? "g" : " ";
99 describe_obj(struct seq_file
*m
, struct drm_i915_gem_object
*obj
)
101 struct i915_vma
*vma
;
102 seq_printf(m
, "%pK: %s%s%s %8zdKiB %02x %02x %u %u %u%s%s%s",
105 get_tiling_flag(obj
),
106 get_global_flag(obj
),
107 obj
->base
.size
/ 1024,
108 obj
->base
.read_domains
,
109 obj
->base
.write_domain
,
110 obj
->last_read_seqno
,
111 obj
->last_write_seqno
,
112 obj
->last_fenced_seqno
,
113 i915_cache_level_str(obj
->cache_level
),
114 obj
->dirty
? " dirty" : "",
115 obj
->madv
== I915_MADV_DONTNEED
? " purgeable" : "");
117 seq_printf(m
, " (name: %d)", obj
->base
.name
);
119 seq_printf(m
, " (pinned x %d)", obj
->pin_count
);
120 if (obj
->pin_display
)
121 seq_printf(m
, " (display)");
122 if (obj
->fence_reg
!= I915_FENCE_REG_NONE
)
123 seq_printf(m
, " (fence: %d)", obj
->fence_reg
);
124 list_for_each_entry(vma
, &obj
->vma_list
, vma_link
) {
125 if (!i915_is_ggtt(vma
->vm
))
129 seq_printf(m
, "gtt offset: %08lx, size: %08lx)",
130 vma
->node
.start
, vma
->node
.size
);
133 seq_printf(m
, " (stolen: %08lx)", obj
->stolen
->start
);
134 if (obj
->pin_mappable
|| obj
->fault_mappable
) {
136 if (obj
->pin_mappable
)
138 if (obj
->fault_mappable
)
141 seq_printf(m
, " (%s mappable)", s
);
143 if (obj
->ring
!= NULL
)
144 seq_printf(m
, " (%s)", obj
->ring
->name
);
147 static void describe_ctx(struct seq_file
*m
, struct i915_hw_context
*ctx
)
149 seq_putc(m
, ctx
->is_initialized
? 'I' : 'i');
150 seq_putc(m
, ctx
->remap_slice
? 'R' : 'r');
154 static int i915_gem_object_list_info(struct seq_file
*m
, void *data
)
156 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
157 uintptr_t list
= (uintptr_t) node
->info_ent
->data
;
158 struct list_head
*head
;
159 struct drm_device
*dev
= node
->minor
->dev
;
160 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
161 struct i915_address_space
*vm
= &dev_priv
->gtt
.base
;
162 struct i915_vma
*vma
;
163 size_t total_obj_size
, total_gtt_size
;
166 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
170 /* FIXME: the user of this interface might want more than just GGTT */
173 seq_puts(m
, "Active:\n");
174 head
= &vm
->active_list
;
177 seq_puts(m
, "Inactive:\n");
178 head
= &vm
->inactive_list
;
181 mutex_unlock(&dev
->struct_mutex
);
185 total_obj_size
= total_gtt_size
= count
= 0;
186 list_for_each_entry(vma
, head
, mm_list
) {
188 describe_obj(m
, vma
->obj
);
190 total_obj_size
+= vma
->obj
->base
.size
;
191 total_gtt_size
+= vma
->node
.size
;
194 mutex_unlock(&dev
->struct_mutex
);
196 seq_printf(m
, "Total %d objects, %zu bytes, %zu GTT size\n",
197 count
, total_obj_size
, total_gtt_size
);
201 static int obj_rank_by_stolen(void *priv
,
202 struct list_head
*A
, struct list_head
*B
)
204 struct drm_i915_gem_object
*a
=
205 container_of(A
, struct drm_i915_gem_object
, obj_exec_link
);
206 struct drm_i915_gem_object
*b
=
207 container_of(B
, struct drm_i915_gem_object
, obj_exec_link
);
209 return a
->stolen
->start
- b
->stolen
->start
;
212 static int i915_gem_stolen_list_info(struct seq_file
*m
, void *data
)
214 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
215 struct drm_device
*dev
= node
->minor
->dev
;
216 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
217 struct drm_i915_gem_object
*obj
;
218 size_t total_obj_size
, total_gtt_size
;
222 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
226 total_obj_size
= total_gtt_size
= count
= 0;
227 list_for_each_entry(obj
, &dev_priv
->mm
.bound_list
, global_list
) {
228 if (obj
->stolen
== NULL
)
231 list_add(&obj
->obj_exec_link
, &stolen
);
233 total_obj_size
+= obj
->base
.size
;
234 total_gtt_size
+= i915_gem_obj_ggtt_size(obj
);
237 list_for_each_entry(obj
, &dev_priv
->mm
.unbound_list
, global_list
) {
238 if (obj
->stolen
== NULL
)
241 list_add(&obj
->obj_exec_link
, &stolen
);
243 total_obj_size
+= obj
->base
.size
;
246 list_sort(NULL
, &stolen
, obj_rank_by_stolen
);
247 seq_puts(m
, "Stolen:\n");
248 while (!list_empty(&stolen
)) {
249 obj
= list_first_entry(&stolen
, typeof(*obj
), obj_exec_link
);
251 describe_obj(m
, obj
);
253 list_del_init(&obj
->obj_exec_link
);
255 mutex_unlock(&dev
->struct_mutex
);
257 seq_printf(m
, "Total %d objects, %zu bytes, %zu GTT size\n",
258 count
, total_obj_size
, total_gtt_size
);
262 #define count_objects(list, member) do { \
263 list_for_each_entry(obj, list, member) { \
264 size += i915_gem_obj_ggtt_size(obj); \
266 if (obj->map_and_fenceable) { \
267 mappable_size += i915_gem_obj_ggtt_size(obj); \
275 size_t total
, active
, inactive
, unbound
;
278 static int per_file_stats(int id
, void *ptr
, void *data
)
280 struct drm_i915_gem_object
*obj
= ptr
;
281 struct file_stats
*stats
= data
;
284 stats
->total
+= obj
->base
.size
;
286 if (i915_gem_obj_ggtt_bound(obj
)) {
287 if (!list_empty(&obj
->ring_list
))
288 stats
->active
+= obj
->base
.size
;
290 stats
->inactive
+= obj
->base
.size
;
292 if (!list_empty(&obj
->global_list
))
293 stats
->unbound
+= obj
->base
.size
;
299 #define count_vmas(list, member) do { \
300 list_for_each_entry(vma, list, member) { \
301 size += i915_gem_obj_ggtt_size(vma->obj); \
303 if (vma->obj->map_and_fenceable) { \
304 mappable_size += i915_gem_obj_ggtt_size(vma->obj); \
310 static int i915_gem_object_info(struct seq_file
*m
, void* data
)
312 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
313 struct drm_device
*dev
= node
->minor
->dev
;
314 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
315 u32 count
, mappable_count
, purgeable_count
;
316 size_t size
, mappable_size
, purgeable_size
;
317 struct drm_i915_gem_object
*obj
;
318 struct i915_address_space
*vm
= &dev_priv
->gtt
.base
;
319 struct drm_file
*file
;
320 struct i915_vma
*vma
;
323 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
327 seq_printf(m
, "%u objects, %zu bytes\n",
328 dev_priv
->mm
.object_count
,
329 dev_priv
->mm
.object_memory
);
331 size
= count
= mappable_size
= mappable_count
= 0;
332 count_objects(&dev_priv
->mm
.bound_list
, global_list
);
333 seq_printf(m
, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
334 count
, mappable_count
, size
, mappable_size
);
336 size
= count
= mappable_size
= mappable_count
= 0;
337 count_vmas(&vm
->active_list
, mm_list
);
338 seq_printf(m
, " %u [%u] active objects, %zu [%zu] bytes\n",
339 count
, mappable_count
, size
, mappable_size
);
341 size
= count
= mappable_size
= mappable_count
= 0;
342 count_vmas(&vm
->inactive_list
, mm_list
);
343 seq_printf(m
, " %u [%u] inactive objects, %zu [%zu] bytes\n",
344 count
, mappable_count
, size
, mappable_size
);
346 size
= count
= purgeable_size
= purgeable_count
= 0;
347 list_for_each_entry(obj
, &dev_priv
->mm
.unbound_list
, global_list
) {
348 size
+= obj
->base
.size
, ++count
;
349 if (obj
->madv
== I915_MADV_DONTNEED
)
350 purgeable_size
+= obj
->base
.size
, ++purgeable_count
;
352 seq_printf(m
, "%u unbound objects, %zu bytes\n", count
, size
);
354 size
= count
= mappable_size
= mappable_count
= 0;
355 list_for_each_entry(obj
, &dev_priv
->mm
.bound_list
, global_list
) {
356 if (obj
->fault_mappable
) {
357 size
+= i915_gem_obj_ggtt_size(obj
);
360 if (obj
->pin_mappable
) {
361 mappable_size
+= i915_gem_obj_ggtt_size(obj
);
364 if (obj
->madv
== I915_MADV_DONTNEED
) {
365 purgeable_size
+= obj
->base
.size
;
369 seq_printf(m
, "%u purgeable objects, %zu bytes\n",
370 purgeable_count
, purgeable_size
);
371 seq_printf(m
, "%u pinned mappable objects, %zu bytes\n",
372 mappable_count
, mappable_size
);
373 seq_printf(m
, "%u fault mappable objects, %zu bytes\n",
376 seq_printf(m
, "%zu [%lu] gtt total\n",
377 dev_priv
->gtt
.base
.total
,
378 dev_priv
->gtt
.mappable_end
- dev_priv
->gtt
.base
.start
);
381 list_for_each_entry_reverse(file
, &dev
->filelist
, lhead
) {
382 struct file_stats stats
;
384 memset(&stats
, 0, sizeof(stats
));
385 idr_for_each(&file
->object_idr
, per_file_stats
, &stats
);
386 seq_printf(m
, "%s: %u objects, %zu bytes (%zu active, %zu inactive, %zu unbound)\n",
387 get_pid_task(file
->pid
, PIDTYPE_PID
)->comm
,
395 mutex_unlock(&dev
->struct_mutex
);
400 static int i915_gem_gtt_info(struct seq_file
*m
, void *data
)
402 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
403 struct drm_device
*dev
= node
->minor
->dev
;
404 uintptr_t list
= (uintptr_t) node
->info_ent
->data
;
405 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
406 struct drm_i915_gem_object
*obj
;
407 size_t total_obj_size
, total_gtt_size
;
410 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
414 total_obj_size
= total_gtt_size
= count
= 0;
415 list_for_each_entry(obj
, &dev_priv
->mm
.bound_list
, global_list
) {
416 if (list
== PINNED_LIST
&& obj
->pin_count
== 0)
420 describe_obj(m
, obj
);
422 total_obj_size
+= obj
->base
.size
;
423 total_gtt_size
+= i915_gem_obj_ggtt_size(obj
);
427 mutex_unlock(&dev
->struct_mutex
);
429 seq_printf(m
, "Total %d objects, %zu bytes, %zu GTT size\n",
430 count
, total_obj_size
, total_gtt_size
);
435 static int i915_gem_pageflip_info(struct seq_file
*m
, void *data
)
437 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
438 struct drm_device
*dev
= node
->minor
->dev
;
440 struct intel_crtc
*crtc
;
442 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, base
.head
) {
443 const char pipe
= pipe_name(crtc
->pipe
);
444 const char plane
= plane_name(crtc
->plane
);
445 struct intel_unpin_work
*work
;
447 spin_lock_irqsave(&dev
->event_lock
, flags
);
448 work
= crtc
->unpin_work
;
450 seq_printf(m
, "No flip due on pipe %c (plane %c)\n",
453 if (atomic_read(&work
->pending
) < INTEL_FLIP_COMPLETE
) {
454 seq_printf(m
, "Flip queued on pipe %c (plane %c)\n",
457 seq_printf(m
, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
460 if (work
->enable_stall_check
)
461 seq_puts(m
, "Stall check enabled, ");
463 seq_puts(m
, "Stall check waiting for page flip ioctl, ");
464 seq_printf(m
, "%d prepares\n", atomic_read(&work
->pending
));
466 if (work
->old_fb_obj
) {
467 struct drm_i915_gem_object
*obj
= work
->old_fb_obj
;
469 seq_printf(m
, "Old framebuffer gtt_offset 0x%08lx\n",
470 i915_gem_obj_ggtt_offset(obj
));
472 if (work
->pending_flip_obj
) {
473 struct drm_i915_gem_object
*obj
= work
->pending_flip_obj
;
475 seq_printf(m
, "New framebuffer gtt_offset 0x%08lx\n",
476 i915_gem_obj_ggtt_offset(obj
));
479 spin_unlock_irqrestore(&dev
->event_lock
, flags
);
485 static int i915_gem_request_info(struct seq_file
*m
, void *data
)
487 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
488 struct drm_device
*dev
= node
->minor
->dev
;
489 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
490 struct intel_ring_buffer
*ring
;
491 struct drm_i915_gem_request
*gem_request
;
494 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
499 for_each_ring(ring
, dev_priv
, i
) {
500 if (list_empty(&ring
->request_list
))
503 seq_printf(m
, "%s requests:\n", ring
->name
);
504 list_for_each_entry(gem_request
,
507 seq_printf(m
, " %d @ %d\n",
509 (int) (jiffies
- gem_request
->emitted_jiffies
));
513 mutex_unlock(&dev
->struct_mutex
);
516 seq_puts(m
, "No requests\n");
521 static void i915_ring_seqno_info(struct seq_file
*m
,
522 struct intel_ring_buffer
*ring
)
524 if (ring
->get_seqno
) {
525 seq_printf(m
, "Current sequence (%s): %u\n",
526 ring
->name
, ring
->get_seqno(ring
, false));
530 static int i915_gem_seqno_info(struct seq_file
*m
, void *data
)
532 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
533 struct drm_device
*dev
= node
->minor
->dev
;
534 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
535 struct intel_ring_buffer
*ring
;
538 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
542 for_each_ring(ring
, dev_priv
, i
)
543 i915_ring_seqno_info(m
, ring
);
545 mutex_unlock(&dev
->struct_mutex
);
551 static int i915_interrupt_info(struct seq_file
*m
, void *data
)
553 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
554 struct drm_device
*dev
= node
->minor
->dev
;
555 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
556 struct intel_ring_buffer
*ring
;
559 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
563 if (IS_VALLEYVIEW(dev
)) {
564 seq_printf(m
, "Display IER:\t%08x\n",
566 seq_printf(m
, "Display IIR:\t%08x\n",
568 seq_printf(m
, "Display IIR_RW:\t%08x\n",
569 I915_READ(VLV_IIR_RW
));
570 seq_printf(m
, "Display IMR:\t%08x\n",
573 seq_printf(m
, "Pipe %c stat:\t%08x\n",
575 I915_READ(PIPESTAT(pipe
)));
577 seq_printf(m
, "Master IER:\t%08x\n",
578 I915_READ(VLV_MASTER_IER
));
580 seq_printf(m
, "Render IER:\t%08x\n",
582 seq_printf(m
, "Render IIR:\t%08x\n",
584 seq_printf(m
, "Render IMR:\t%08x\n",
587 seq_printf(m
, "PM IER:\t\t%08x\n",
588 I915_READ(GEN6_PMIER
));
589 seq_printf(m
, "PM IIR:\t\t%08x\n",
590 I915_READ(GEN6_PMIIR
));
591 seq_printf(m
, "PM IMR:\t\t%08x\n",
592 I915_READ(GEN6_PMIMR
));
594 seq_printf(m
, "Port hotplug:\t%08x\n",
595 I915_READ(PORT_HOTPLUG_EN
));
596 seq_printf(m
, "DPFLIPSTAT:\t%08x\n",
597 I915_READ(VLV_DPFLIPSTAT
));
598 seq_printf(m
, "DPINVGTT:\t%08x\n",
599 I915_READ(DPINVGTT
));
601 } else if (!HAS_PCH_SPLIT(dev
)) {
602 seq_printf(m
, "Interrupt enable: %08x\n",
604 seq_printf(m
, "Interrupt identity: %08x\n",
606 seq_printf(m
, "Interrupt mask: %08x\n",
609 seq_printf(m
, "Pipe %c stat: %08x\n",
611 I915_READ(PIPESTAT(pipe
)));
613 seq_printf(m
, "North Display Interrupt enable: %08x\n",
615 seq_printf(m
, "North Display Interrupt identity: %08x\n",
617 seq_printf(m
, "North Display Interrupt mask: %08x\n",
619 seq_printf(m
, "South Display Interrupt enable: %08x\n",
621 seq_printf(m
, "South Display Interrupt identity: %08x\n",
623 seq_printf(m
, "South Display Interrupt mask: %08x\n",
625 seq_printf(m
, "Graphics Interrupt enable: %08x\n",
627 seq_printf(m
, "Graphics Interrupt identity: %08x\n",
629 seq_printf(m
, "Graphics Interrupt mask: %08x\n",
632 seq_printf(m
, "Interrupts received: %d\n",
633 atomic_read(&dev_priv
->irq_received
));
634 for_each_ring(ring
, dev_priv
, i
) {
635 if (IS_GEN6(dev
) || IS_GEN7(dev
)) {
637 "Graphics Interrupt mask (%s): %08x\n",
638 ring
->name
, I915_READ_IMR(ring
));
640 i915_ring_seqno_info(m
, ring
);
642 mutex_unlock(&dev
->struct_mutex
);
647 static int i915_gem_fence_regs_info(struct seq_file
*m
, void *data
)
649 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
650 struct drm_device
*dev
= node
->minor
->dev
;
651 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
654 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
658 seq_printf(m
, "Reserved fences = %d\n", dev_priv
->fence_reg_start
);
659 seq_printf(m
, "Total fences = %d\n", dev_priv
->num_fence_regs
);
660 for (i
= 0; i
< dev_priv
->num_fence_regs
; i
++) {
661 struct drm_i915_gem_object
*obj
= dev_priv
->fence_regs
[i
].obj
;
663 seq_printf(m
, "Fence %d, pin count = %d, object = ",
664 i
, dev_priv
->fence_regs
[i
].pin_count
);
666 seq_puts(m
, "unused");
668 describe_obj(m
, obj
);
672 mutex_unlock(&dev
->struct_mutex
);
676 static int i915_hws_info(struct seq_file
*m
, void *data
)
678 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
679 struct drm_device
*dev
= node
->minor
->dev
;
680 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
681 struct intel_ring_buffer
*ring
;
685 ring
= &dev_priv
->ring
[(uintptr_t)node
->info_ent
->data
];
686 hws
= ring
->status_page
.page_addr
;
690 for (i
= 0; i
< 4096 / sizeof(u32
) / 4; i
+= 4) {
691 seq_printf(m
, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
693 hws
[i
], hws
[i
+ 1], hws
[i
+ 2], hws
[i
+ 3]);
699 i915_error_state_write(struct file
*filp
,
700 const char __user
*ubuf
,
704 struct i915_error_state_file_priv
*error_priv
= filp
->private_data
;
705 struct drm_device
*dev
= error_priv
->dev
;
708 DRM_DEBUG_DRIVER("Resetting error state\n");
710 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
714 i915_destroy_error_state(dev
);
715 mutex_unlock(&dev
->struct_mutex
);
720 static int i915_error_state_open(struct inode
*inode
, struct file
*file
)
722 struct drm_device
*dev
= inode
->i_private
;
723 struct i915_error_state_file_priv
*error_priv
;
725 error_priv
= kzalloc(sizeof(*error_priv
), GFP_KERNEL
);
729 error_priv
->dev
= dev
;
731 i915_error_state_get(dev
, error_priv
);
733 file
->private_data
= error_priv
;
738 static int i915_error_state_release(struct inode
*inode
, struct file
*file
)
740 struct i915_error_state_file_priv
*error_priv
= file
->private_data
;
742 i915_error_state_put(error_priv
);
748 static ssize_t
i915_error_state_read(struct file
*file
, char __user
*userbuf
,
749 size_t count
, loff_t
*pos
)
751 struct i915_error_state_file_priv
*error_priv
= file
->private_data
;
752 struct drm_i915_error_state_buf error_str
;
754 ssize_t ret_count
= 0;
757 ret
= i915_error_state_buf_init(&error_str
, count
, *pos
);
761 ret
= i915_error_state_to_str(&error_str
, error_priv
);
765 ret_count
= simple_read_from_buffer(userbuf
, count
, &tmp_pos
,
772 *pos
= error_str
.start
+ ret_count
;
774 i915_error_state_buf_release(&error_str
);
775 return ret
?: ret_count
;
778 static const struct file_operations i915_error_state_fops
= {
779 .owner
= THIS_MODULE
,
780 .open
= i915_error_state_open
,
781 .read
= i915_error_state_read
,
782 .write
= i915_error_state_write
,
783 .llseek
= default_llseek
,
784 .release
= i915_error_state_release
,
788 i915_next_seqno_get(void *data
, u64
*val
)
790 struct drm_device
*dev
= data
;
791 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
794 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
798 *val
= dev_priv
->next_seqno
;
799 mutex_unlock(&dev
->struct_mutex
);
805 i915_next_seqno_set(void *data
, u64 val
)
807 struct drm_device
*dev
= data
;
810 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
814 ret
= i915_gem_set_seqno(dev
, val
);
815 mutex_unlock(&dev
->struct_mutex
);
820 DEFINE_SIMPLE_ATTRIBUTE(i915_next_seqno_fops
,
821 i915_next_seqno_get
, i915_next_seqno_set
,
824 static int i915_rstdby_delays(struct seq_file
*m
, void *unused
)
826 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
827 struct drm_device
*dev
= node
->minor
->dev
;
828 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
832 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
836 crstanddelay
= I915_READ16(CRSTANDVID
);
838 mutex_unlock(&dev
->struct_mutex
);
840 seq_printf(m
, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay
>> 8) & 0x3f, (crstanddelay
& 0x3f));
845 static int i915_cur_delayinfo(struct seq_file
*m
, void *unused
)
847 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
848 struct drm_device
*dev
= node
->minor
->dev
;
849 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
852 flush_delayed_work(&dev_priv
->rps
.delayed_resume_work
);
855 u16 rgvswctl
= I915_READ16(MEMSWCTL
);
856 u16 rgvstat
= I915_READ16(MEMSTAT_ILK
);
858 seq_printf(m
, "Requested P-state: %d\n", (rgvswctl
>> 8) & 0xf);
859 seq_printf(m
, "Requested VID: %d\n", rgvswctl
& 0x3f);
860 seq_printf(m
, "Current VID: %d\n", (rgvstat
& MEMSTAT_VID_MASK
) >>
862 seq_printf(m
, "Current P-state: %d\n",
863 (rgvstat
& MEMSTAT_PSTATE_MASK
) >> MEMSTAT_PSTATE_SHIFT
);
864 } else if ((IS_GEN6(dev
) || IS_GEN7(dev
)) && !IS_VALLEYVIEW(dev
)) {
865 u32 gt_perf_status
= I915_READ(GEN6_GT_PERF_STATUS
);
866 u32 rp_state_limits
= I915_READ(GEN6_RP_STATE_LIMITS
);
867 u32 rp_state_cap
= I915_READ(GEN6_RP_STATE_CAP
);
868 u32 rpstat
, cagf
, reqf
;
869 u32 rpupei
, rpcurup
, rpprevup
;
870 u32 rpdownei
, rpcurdown
, rpprevdown
;
873 /* RPSTAT1 is in the GT power well */
874 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
878 gen6_gt_force_wake_get(dev_priv
);
880 reqf
= I915_READ(GEN6_RPNSWREQ
);
881 reqf
&= ~GEN6_TURBO_DISABLE
;
886 reqf
*= GT_FREQUENCY_MULTIPLIER
;
888 rpstat
= I915_READ(GEN6_RPSTAT1
);
889 rpupei
= I915_READ(GEN6_RP_CUR_UP_EI
);
890 rpcurup
= I915_READ(GEN6_RP_CUR_UP
);
891 rpprevup
= I915_READ(GEN6_RP_PREV_UP
);
892 rpdownei
= I915_READ(GEN6_RP_CUR_DOWN_EI
);
893 rpcurdown
= I915_READ(GEN6_RP_CUR_DOWN
);
894 rpprevdown
= I915_READ(GEN6_RP_PREV_DOWN
);
896 cagf
= (rpstat
& HSW_CAGF_MASK
) >> HSW_CAGF_SHIFT
;
898 cagf
= (rpstat
& GEN6_CAGF_MASK
) >> GEN6_CAGF_SHIFT
;
899 cagf
*= GT_FREQUENCY_MULTIPLIER
;
901 gen6_gt_force_wake_put(dev_priv
);
902 mutex_unlock(&dev
->struct_mutex
);
904 seq_printf(m
, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status
);
905 seq_printf(m
, "RPSTAT1: 0x%08x\n", rpstat
);
906 seq_printf(m
, "Render p-state ratio: %d\n",
907 (gt_perf_status
& 0xff00) >> 8);
908 seq_printf(m
, "Render p-state VID: %d\n",
909 gt_perf_status
& 0xff);
910 seq_printf(m
, "Render p-state limit: %d\n",
911 rp_state_limits
& 0xff);
912 seq_printf(m
, "RPNSWREQ: %dMHz\n", reqf
);
913 seq_printf(m
, "CAGF: %dMHz\n", cagf
);
914 seq_printf(m
, "RP CUR UP EI: %dus\n", rpupei
&
916 seq_printf(m
, "RP CUR UP: %dus\n", rpcurup
&
917 GEN6_CURBSYTAVG_MASK
);
918 seq_printf(m
, "RP PREV UP: %dus\n", rpprevup
&
919 GEN6_CURBSYTAVG_MASK
);
920 seq_printf(m
, "RP CUR DOWN EI: %dus\n", rpdownei
&
922 seq_printf(m
, "RP CUR DOWN: %dus\n", rpcurdown
&
923 GEN6_CURBSYTAVG_MASK
);
924 seq_printf(m
, "RP PREV DOWN: %dus\n", rpprevdown
&
925 GEN6_CURBSYTAVG_MASK
);
927 max_freq
= (rp_state_cap
& 0xff0000) >> 16;
928 seq_printf(m
, "Lowest (RPN) frequency: %dMHz\n",
929 max_freq
* GT_FREQUENCY_MULTIPLIER
);
931 max_freq
= (rp_state_cap
& 0xff00) >> 8;
932 seq_printf(m
, "Nominal (RP1) frequency: %dMHz\n",
933 max_freq
* GT_FREQUENCY_MULTIPLIER
);
935 max_freq
= rp_state_cap
& 0xff;
936 seq_printf(m
, "Max non-overclocked (RP0) frequency: %dMHz\n",
937 max_freq
* GT_FREQUENCY_MULTIPLIER
);
939 seq_printf(m
, "Max overclocked frequency: %dMHz\n",
940 dev_priv
->rps
.hw_max
* GT_FREQUENCY_MULTIPLIER
);
941 } else if (IS_VALLEYVIEW(dev
)) {
944 mutex_lock(&dev_priv
->rps
.hw_lock
);
945 freq_sts
= vlv_punit_read(dev_priv
, PUNIT_REG_GPU_FREQ_STS
);
946 seq_printf(m
, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts
);
947 seq_printf(m
, "DDR freq: %d MHz\n", dev_priv
->mem_freq
);
949 val
= vlv_punit_read(dev_priv
, PUNIT_FUSE_BUS1
);
950 seq_printf(m
, "max GPU freq: %d MHz\n",
951 vlv_gpu_freq(dev_priv
->mem_freq
, val
));
953 val
= vlv_punit_read(dev_priv
, PUNIT_REG_GPU_LFM
);
954 seq_printf(m
, "min GPU freq: %d MHz\n",
955 vlv_gpu_freq(dev_priv
->mem_freq
, val
));
957 seq_printf(m
, "current GPU freq: %d MHz\n",
958 vlv_gpu_freq(dev_priv
->mem_freq
,
959 (freq_sts
>> 8) & 0xff));
960 mutex_unlock(&dev_priv
->rps
.hw_lock
);
962 seq_puts(m
, "no P-state info available\n");
968 static int i915_delayfreq_table(struct seq_file
*m
, void *unused
)
970 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
971 struct drm_device
*dev
= node
->minor
->dev
;
972 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
976 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
980 for (i
= 0; i
< 16; i
++) {
981 delayfreq
= I915_READ(PXVFREQ_BASE
+ i
* 4);
982 seq_printf(m
, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i
, delayfreq
,
983 (delayfreq
& PXVFREQ_PX_MASK
) >> PXVFREQ_PX_SHIFT
);
986 mutex_unlock(&dev
->struct_mutex
);
991 static inline int MAP_TO_MV(int map
)
993 return 1250 - (map
* 25);
996 static int i915_inttoext_table(struct seq_file
*m
, void *unused
)
998 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
999 struct drm_device
*dev
= node
->minor
->dev
;
1000 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1004 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1008 for (i
= 1; i
<= 32; i
++) {
1009 inttoext
= I915_READ(INTTOEXT_BASE_ILK
+ i
* 4);
1010 seq_printf(m
, "INTTOEXT%02d: 0x%08x\n", i
, inttoext
);
1013 mutex_unlock(&dev
->struct_mutex
);
1018 static int ironlake_drpc_info(struct seq_file
*m
)
1020 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1021 struct drm_device
*dev
= node
->minor
->dev
;
1022 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1023 u32 rgvmodectl
, rstdbyctl
;
1027 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1031 rgvmodectl
= I915_READ(MEMMODECTL
);
1032 rstdbyctl
= I915_READ(RSTDBYCTL
);
1033 crstandvid
= I915_READ16(CRSTANDVID
);
1035 mutex_unlock(&dev
->struct_mutex
);
1037 seq_printf(m
, "HD boost: %s\n", (rgvmodectl
& MEMMODE_BOOST_EN
) ?
1039 seq_printf(m
, "Boost freq: %d\n",
1040 (rgvmodectl
& MEMMODE_BOOST_FREQ_MASK
) >>
1041 MEMMODE_BOOST_FREQ_SHIFT
);
1042 seq_printf(m
, "HW control enabled: %s\n",
1043 rgvmodectl
& MEMMODE_HWIDLE_EN
? "yes" : "no");
1044 seq_printf(m
, "SW control enabled: %s\n",
1045 rgvmodectl
& MEMMODE_SWMODE_EN
? "yes" : "no");
1046 seq_printf(m
, "Gated voltage change: %s\n",
1047 rgvmodectl
& MEMMODE_RCLK_GATE
? "yes" : "no");
1048 seq_printf(m
, "Starting frequency: P%d\n",
1049 (rgvmodectl
& MEMMODE_FSTART_MASK
) >> MEMMODE_FSTART_SHIFT
);
1050 seq_printf(m
, "Max P-state: P%d\n",
1051 (rgvmodectl
& MEMMODE_FMAX_MASK
) >> MEMMODE_FMAX_SHIFT
);
1052 seq_printf(m
, "Min P-state: P%d\n", (rgvmodectl
& MEMMODE_FMIN_MASK
));
1053 seq_printf(m
, "RS1 VID: %d\n", (crstandvid
& 0x3f));
1054 seq_printf(m
, "RS2 VID: %d\n", ((crstandvid
>> 8) & 0x3f));
1055 seq_printf(m
, "Render standby enabled: %s\n",
1056 (rstdbyctl
& RCX_SW_EXIT
) ? "no" : "yes");
1057 seq_puts(m
, "Current RS state: ");
1058 switch (rstdbyctl
& RSX_STATUS_MASK
) {
1060 seq_puts(m
, "on\n");
1062 case RSX_STATUS_RC1
:
1063 seq_puts(m
, "RC1\n");
1065 case RSX_STATUS_RC1E
:
1066 seq_puts(m
, "RC1E\n");
1068 case RSX_STATUS_RS1
:
1069 seq_puts(m
, "RS1\n");
1071 case RSX_STATUS_RS2
:
1072 seq_puts(m
, "RS2 (RC6)\n");
1074 case RSX_STATUS_RS3
:
1075 seq_puts(m
, "RC3 (RC6+)\n");
1078 seq_puts(m
, "unknown\n");
1085 static int gen6_drpc_info(struct seq_file
*m
)
1088 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1089 struct drm_device
*dev
= node
->minor
->dev
;
1090 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1091 u32 rpmodectl1
, gt_core_status
, rcctl1
, rc6vids
= 0;
1092 unsigned forcewake_count
;
1095 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1099 spin_lock_irq(&dev_priv
->uncore
.lock
);
1100 forcewake_count
= dev_priv
->uncore
.forcewake_count
;
1101 spin_unlock_irq(&dev_priv
->uncore
.lock
);
1103 if (forcewake_count
) {
1104 seq_puts(m
, "RC information inaccurate because somebody "
1105 "holds a forcewake reference \n");
1107 /* NB: we cannot use forcewake, else we read the wrong values */
1108 while (count
++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK
) & 1))
1110 seq_printf(m
, "RC information accurate: %s\n", yesno(count
< 51));
1113 gt_core_status
= readl(dev_priv
->regs
+ GEN6_GT_CORE_STATUS
);
1114 trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS
, gt_core_status
, 4, true);
1116 rpmodectl1
= I915_READ(GEN6_RP_CONTROL
);
1117 rcctl1
= I915_READ(GEN6_RC_CONTROL
);
1118 mutex_unlock(&dev
->struct_mutex
);
1119 mutex_lock(&dev_priv
->rps
.hw_lock
);
1120 sandybridge_pcode_read(dev_priv
, GEN6_PCODE_READ_RC6VIDS
, &rc6vids
);
1121 mutex_unlock(&dev_priv
->rps
.hw_lock
);
1123 seq_printf(m
, "Video Turbo Mode: %s\n",
1124 yesno(rpmodectl1
& GEN6_RP_MEDIA_TURBO
));
1125 seq_printf(m
, "HW control enabled: %s\n",
1126 yesno(rpmodectl1
& GEN6_RP_ENABLE
));
1127 seq_printf(m
, "SW control enabled: %s\n",
1128 yesno((rpmodectl1
& GEN6_RP_MEDIA_MODE_MASK
) ==
1129 GEN6_RP_MEDIA_SW_MODE
));
1130 seq_printf(m
, "RC1e Enabled: %s\n",
1131 yesno(rcctl1
& GEN6_RC_CTL_RC1e_ENABLE
));
1132 seq_printf(m
, "RC6 Enabled: %s\n",
1133 yesno(rcctl1
& GEN6_RC_CTL_RC6_ENABLE
));
1134 seq_printf(m
, "Deep RC6 Enabled: %s\n",
1135 yesno(rcctl1
& GEN6_RC_CTL_RC6p_ENABLE
));
1136 seq_printf(m
, "Deepest RC6 Enabled: %s\n",
1137 yesno(rcctl1
& GEN6_RC_CTL_RC6pp_ENABLE
));
1138 seq_puts(m
, "Current RC state: ");
1139 switch (gt_core_status
& GEN6_RCn_MASK
) {
1141 if (gt_core_status
& GEN6_CORE_CPD_STATE_MASK
)
1142 seq_puts(m
, "Core Power Down\n");
1144 seq_puts(m
, "on\n");
1147 seq_puts(m
, "RC3\n");
1150 seq_puts(m
, "RC6\n");
1153 seq_puts(m
, "RC7\n");
1156 seq_puts(m
, "Unknown\n");
1160 seq_printf(m
, "Core Power Down: %s\n",
1161 yesno(gt_core_status
& GEN6_CORE_CPD_STATE_MASK
));
1163 /* Not exactly sure what this is */
1164 seq_printf(m
, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1165 I915_READ(GEN6_GT_GFX_RC6_LOCKED
));
1166 seq_printf(m
, "RC6 residency since boot: %u\n",
1167 I915_READ(GEN6_GT_GFX_RC6
));
1168 seq_printf(m
, "RC6+ residency since boot: %u\n",
1169 I915_READ(GEN6_GT_GFX_RC6p
));
1170 seq_printf(m
, "RC6++ residency since boot: %u\n",
1171 I915_READ(GEN6_GT_GFX_RC6pp
));
1173 seq_printf(m
, "RC6 voltage: %dmV\n",
1174 GEN6_DECODE_RC6_VID(((rc6vids
>> 0) & 0xff)));
1175 seq_printf(m
, "RC6+ voltage: %dmV\n",
1176 GEN6_DECODE_RC6_VID(((rc6vids
>> 8) & 0xff)));
1177 seq_printf(m
, "RC6++ voltage: %dmV\n",
1178 GEN6_DECODE_RC6_VID(((rc6vids
>> 16) & 0xff)));
1182 static int i915_drpc_info(struct seq_file
*m
, void *unused
)
1184 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1185 struct drm_device
*dev
= node
->minor
->dev
;
1187 if (IS_GEN6(dev
) || IS_GEN7(dev
))
1188 return gen6_drpc_info(m
);
1190 return ironlake_drpc_info(m
);
1193 static int i915_fbc_status(struct seq_file
*m
, void *unused
)
1195 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1196 struct drm_device
*dev
= node
->minor
->dev
;
1197 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1199 if (!I915_HAS_FBC(dev
)) {
1200 seq_puts(m
, "FBC unsupported on this chipset\n");
1204 if (intel_fbc_enabled(dev
)) {
1205 seq_puts(m
, "FBC enabled\n");
1207 seq_puts(m
, "FBC disabled: ");
1208 switch (dev_priv
->fbc
.no_fbc_reason
) {
1210 seq_puts(m
, "FBC actived, but currently disabled in hardware");
1212 case FBC_UNSUPPORTED
:
1213 seq_puts(m
, "unsupported by this chipset");
1216 seq_puts(m
, "no outputs");
1218 case FBC_STOLEN_TOO_SMALL
:
1219 seq_puts(m
, "not enough stolen memory");
1221 case FBC_UNSUPPORTED_MODE
:
1222 seq_puts(m
, "mode not supported");
1224 case FBC_MODE_TOO_LARGE
:
1225 seq_puts(m
, "mode too large");
1228 seq_puts(m
, "FBC unsupported on plane");
1231 seq_puts(m
, "scanout buffer not tiled");
1233 case FBC_MULTIPLE_PIPES
:
1234 seq_puts(m
, "multiple pipes are enabled");
1236 case FBC_MODULE_PARAM
:
1237 seq_puts(m
, "disabled per module param (default off)");
1239 case FBC_CHIP_DEFAULT
:
1240 seq_puts(m
, "disabled per chip default");
1243 seq_puts(m
, "unknown reason");
1250 static int i915_ips_status(struct seq_file
*m
, void *unused
)
1252 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1253 struct drm_device
*dev
= node
->minor
->dev
;
1254 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1256 if (!HAS_IPS(dev
)) {
1257 seq_puts(m
, "not supported\n");
1261 if (I915_READ(IPS_CTL
) & IPS_ENABLE
)
1262 seq_puts(m
, "enabled\n");
1264 seq_puts(m
, "disabled\n");
1269 static int i915_sr_status(struct seq_file
*m
, void *unused
)
1271 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1272 struct drm_device
*dev
= node
->minor
->dev
;
1273 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1274 bool sr_enabled
= false;
1276 if (HAS_PCH_SPLIT(dev
))
1277 sr_enabled
= I915_READ(WM1_LP_ILK
) & WM1_LP_SR_EN
;
1278 else if (IS_CRESTLINE(dev
) || IS_I945G(dev
) || IS_I945GM(dev
))
1279 sr_enabled
= I915_READ(FW_BLC_SELF
) & FW_BLC_SELF_EN
;
1280 else if (IS_I915GM(dev
))
1281 sr_enabled
= I915_READ(INSTPM
) & INSTPM_SELF_EN
;
1282 else if (IS_PINEVIEW(dev
))
1283 sr_enabled
= I915_READ(DSPFW3
) & PINEVIEW_SELF_REFRESH_EN
;
1285 seq_printf(m
, "self-refresh: %s\n",
1286 sr_enabled
? "enabled" : "disabled");
1291 static int i915_emon_status(struct seq_file
*m
, void *unused
)
1293 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1294 struct drm_device
*dev
= node
->minor
->dev
;
1295 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1296 unsigned long temp
, chipset
, gfx
;
1302 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1306 temp
= i915_mch_val(dev_priv
);
1307 chipset
= i915_chipset_val(dev_priv
);
1308 gfx
= i915_gfx_val(dev_priv
);
1309 mutex_unlock(&dev
->struct_mutex
);
1311 seq_printf(m
, "GMCH temp: %ld\n", temp
);
1312 seq_printf(m
, "Chipset power: %ld\n", chipset
);
1313 seq_printf(m
, "GFX power: %ld\n", gfx
);
1314 seq_printf(m
, "Total power: %ld\n", chipset
+ gfx
);
1319 static int i915_ring_freq_table(struct seq_file
*m
, void *unused
)
1321 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1322 struct drm_device
*dev
= node
->minor
->dev
;
1323 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1325 int gpu_freq
, ia_freq
;
1327 if (!(IS_GEN6(dev
) || IS_GEN7(dev
))) {
1328 seq_puts(m
, "unsupported on this chipset\n");
1332 flush_delayed_work(&dev_priv
->rps
.delayed_resume_work
);
1334 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
1338 seq_puts(m
, "GPU freq (MHz)\tEffective CPU freq (MHz)\tEffective Ring freq (MHz)\n");
1340 for (gpu_freq
= dev_priv
->rps
.min_delay
;
1341 gpu_freq
<= dev_priv
->rps
.max_delay
;
1344 sandybridge_pcode_read(dev_priv
,
1345 GEN6_PCODE_READ_MIN_FREQ_TABLE
,
1347 seq_printf(m
, "%d\t\t%d\t\t\t\t%d\n",
1348 gpu_freq
* GT_FREQUENCY_MULTIPLIER
,
1349 ((ia_freq
>> 0) & 0xff) * 100,
1350 ((ia_freq
>> 8) & 0xff) * 100);
1353 mutex_unlock(&dev_priv
->rps
.hw_lock
);
1358 static int i915_gfxec(struct seq_file
*m
, void *unused
)
1360 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1361 struct drm_device
*dev
= node
->minor
->dev
;
1362 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1365 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1369 seq_printf(m
, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1371 mutex_unlock(&dev
->struct_mutex
);
1376 static int i915_opregion(struct seq_file
*m
, void *unused
)
1378 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1379 struct drm_device
*dev
= node
->minor
->dev
;
1380 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1381 struct intel_opregion
*opregion
= &dev_priv
->opregion
;
1382 void *data
= kmalloc(OPREGION_SIZE
, GFP_KERNEL
);
1388 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1392 if (opregion
->header
) {
1393 memcpy_fromio(data
, opregion
->header
, OPREGION_SIZE
);
1394 seq_write(m
, data
, OPREGION_SIZE
);
1397 mutex_unlock(&dev
->struct_mutex
);
1404 static int i915_gem_framebuffer_info(struct seq_file
*m
, void *data
)
1406 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1407 struct drm_device
*dev
= node
->minor
->dev
;
1408 struct intel_fbdev
*ifbdev
= NULL
;
1409 struct intel_framebuffer
*fb
;
1411 #ifdef CONFIG_DRM_I915_FBDEV
1412 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1413 int ret
= mutex_lock_interruptible(&dev
->mode_config
.mutex
);
1417 ifbdev
= dev_priv
->fbdev
;
1418 fb
= to_intel_framebuffer(ifbdev
->helper
.fb
);
1420 seq_printf(m
, "fbcon size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1424 fb
->base
.bits_per_pixel
,
1425 atomic_read(&fb
->base
.refcount
.refcount
));
1426 describe_obj(m
, fb
->obj
);
1428 mutex_unlock(&dev
->mode_config
.mutex
);
1431 mutex_lock(&dev
->mode_config
.fb_lock
);
1432 list_for_each_entry(fb
, &dev
->mode_config
.fb_list
, base
.head
) {
1433 if (&fb
->base
== ifbdev
->helper
.fb
)
1436 seq_printf(m
, "user size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1440 fb
->base
.bits_per_pixel
,
1441 atomic_read(&fb
->base
.refcount
.refcount
));
1442 describe_obj(m
, fb
->obj
);
1445 mutex_unlock(&dev
->mode_config
.fb_lock
);
1450 static int i915_context_status(struct seq_file
*m
, void *unused
)
1452 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1453 struct drm_device
*dev
= node
->minor
->dev
;
1454 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1455 struct intel_ring_buffer
*ring
;
1456 struct i915_hw_context
*ctx
;
1459 ret
= mutex_lock_interruptible(&dev
->mode_config
.mutex
);
1463 if (dev_priv
->ips
.pwrctx
) {
1464 seq_puts(m
, "power context ");
1465 describe_obj(m
, dev_priv
->ips
.pwrctx
);
1469 if (dev_priv
->ips
.renderctx
) {
1470 seq_puts(m
, "render context ");
1471 describe_obj(m
, dev_priv
->ips
.renderctx
);
1475 list_for_each_entry(ctx
, &dev_priv
->context_list
, link
) {
1476 seq_puts(m
, "HW context ");
1477 describe_ctx(m
, ctx
);
1478 for_each_ring(ring
, dev_priv
, i
)
1479 if (ring
->default_context
== ctx
)
1480 seq_printf(m
, "(default context %s) ", ring
->name
);
1482 describe_obj(m
, ctx
->obj
);
1486 mutex_unlock(&dev
->mode_config
.mutex
);
1491 static int i915_gen6_forcewake_count_info(struct seq_file
*m
, void *data
)
1493 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1494 struct drm_device
*dev
= node
->minor
->dev
;
1495 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1496 unsigned forcewake_count
;
1498 spin_lock_irq(&dev_priv
->uncore
.lock
);
1499 forcewake_count
= dev_priv
->uncore
.forcewake_count
;
1500 spin_unlock_irq(&dev_priv
->uncore
.lock
);
1502 seq_printf(m
, "forcewake count = %u\n", forcewake_count
);
1507 static const char *swizzle_string(unsigned swizzle
)
1510 case I915_BIT_6_SWIZZLE_NONE
:
1512 case I915_BIT_6_SWIZZLE_9
:
1514 case I915_BIT_6_SWIZZLE_9_10
:
1515 return "bit9/bit10";
1516 case I915_BIT_6_SWIZZLE_9_11
:
1517 return "bit9/bit11";
1518 case I915_BIT_6_SWIZZLE_9_10_11
:
1519 return "bit9/bit10/bit11";
1520 case I915_BIT_6_SWIZZLE_9_17
:
1521 return "bit9/bit17";
1522 case I915_BIT_6_SWIZZLE_9_10_17
:
1523 return "bit9/bit10/bit17";
1524 case I915_BIT_6_SWIZZLE_UNKNOWN
:
1531 static int i915_swizzle_info(struct seq_file
*m
, void *data
)
1533 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1534 struct drm_device
*dev
= node
->minor
->dev
;
1535 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1538 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1542 seq_printf(m
, "bit6 swizzle for X-tiling = %s\n",
1543 swizzle_string(dev_priv
->mm
.bit_6_swizzle_x
));
1544 seq_printf(m
, "bit6 swizzle for Y-tiling = %s\n",
1545 swizzle_string(dev_priv
->mm
.bit_6_swizzle_y
));
1547 if (IS_GEN3(dev
) || IS_GEN4(dev
)) {
1548 seq_printf(m
, "DDC = 0x%08x\n",
1550 seq_printf(m
, "C0DRB3 = 0x%04x\n",
1551 I915_READ16(C0DRB3
));
1552 seq_printf(m
, "C1DRB3 = 0x%04x\n",
1553 I915_READ16(C1DRB3
));
1554 } else if (IS_GEN6(dev
) || IS_GEN7(dev
)) {
1555 seq_printf(m
, "MAD_DIMM_C0 = 0x%08x\n",
1556 I915_READ(MAD_DIMM_C0
));
1557 seq_printf(m
, "MAD_DIMM_C1 = 0x%08x\n",
1558 I915_READ(MAD_DIMM_C1
));
1559 seq_printf(m
, "MAD_DIMM_C2 = 0x%08x\n",
1560 I915_READ(MAD_DIMM_C2
));
1561 seq_printf(m
, "TILECTL = 0x%08x\n",
1562 I915_READ(TILECTL
));
1563 seq_printf(m
, "ARB_MODE = 0x%08x\n",
1564 I915_READ(ARB_MODE
));
1565 seq_printf(m
, "DISP_ARB_CTL = 0x%08x\n",
1566 I915_READ(DISP_ARB_CTL
));
1568 mutex_unlock(&dev
->struct_mutex
);
1573 static int i915_ppgtt_info(struct seq_file
*m
, void *data
)
1575 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1576 struct drm_device
*dev
= node
->minor
->dev
;
1577 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1578 struct intel_ring_buffer
*ring
;
1582 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1585 if (INTEL_INFO(dev
)->gen
== 6)
1586 seq_printf(m
, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE
));
1588 for_each_ring(ring
, dev_priv
, i
) {
1589 seq_printf(m
, "%s\n", ring
->name
);
1590 if (INTEL_INFO(dev
)->gen
== 7)
1591 seq_printf(m
, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring
)));
1592 seq_printf(m
, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring
)));
1593 seq_printf(m
, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring
)));
1594 seq_printf(m
, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring
)));
1596 if (dev_priv
->mm
.aliasing_ppgtt
) {
1597 struct i915_hw_ppgtt
*ppgtt
= dev_priv
->mm
.aliasing_ppgtt
;
1599 seq_puts(m
, "aliasing PPGTT:\n");
1600 seq_printf(m
, "pd gtt offset: 0x%08x\n", ppgtt
->pd_offset
);
1602 seq_printf(m
, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK
));
1603 mutex_unlock(&dev
->struct_mutex
);
1608 static int i915_dpio_info(struct seq_file
*m
, void *data
)
1610 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1611 struct drm_device
*dev
= node
->minor
->dev
;
1612 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1616 if (!IS_VALLEYVIEW(dev
)) {
1617 seq_puts(m
, "unsupported\n");
1621 ret
= mutex_lock_interruptible(&dev_priv
->dpio_lock
);
1625 seq_printf(m
, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL
));
1627 seq_printf(m
, "DPIO_DIV_A: 0x%08x\n",
1628 vlv_dpio_read(dev_priv
, PIPE_A
, _DPIO_DIV_A
));
1629 seq_printf(m
, "DPIO_DIV_B: 0x%08x\n",
1630 vlv_dpio_read(dev_priv
, PIPE_A
, _DPIO_DIV_B
));
1632 seq_printf(m
, "DPIO_REFSFR_A: 0x%08x\n",
1633 vlv_dpio_read(dev_priv
, PIPE_A
, _DPIO_REFSFR_A
));
1634 seq_printf(m
, "DPIO_REFSFR_B: 0x%08x\n",
1635 vlv_dpio_read(dev_priv
, PIPE_A
, _DPIO_REFSFR_B
));
1637 seq_printf(m
, "DPIO_CORE_CLK_A: 0x%08x\n",
1638 vlv_dpio_read(dev_priv
, PIPE_A
, _DPIO_CORE_CLK_A
));
1639 seq_printf(m
, "DPIO_CORE_CLK_B: 0x%08x\n",
1640 vlv_dpio_read(dev_priv
, PIPE_A
, _DPIO_CORE_CLK_B
));
1642 seq_printf(m
, "DPIO_LPF_COEFF_A: 0x%08x\n",
1643 vlv_dpio_read(dev_priv
, PIPE_A
, _DPIO_LPF_COEFF_A
));
1644 seq_printf(m
, "DPIO_LPF_COEFF_B: 0x%08x\n",
1645 vlv_dpio_read(dev_priv
, PIPE_A
, _DPIO_LPF_COEFF_B
));
1647 seq_printf(m
, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1648 vlv_dpio_read(dev_priv
, PIPE_A
, DPIO_FASTCLK_DISABLE
));
1650 mutex_unlock(&dev_priv
->dpio_lock
);
1655 static int i915_llc(struct seq_file
*m
, void *data
)
1657 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1658 struct drm_device
*dev
= node
->minor
->dev
;
1659 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1661 /* Size calculation for LLC is a bit of a pain. Ignore for now. */
1662 seq_printf(m
, "LLC: %s\n", yesno(HAS_LLC(dev
)));
1663 seq_printf(m
, "eLLC: %zuMB\n", dev_priv
->ellc_size
);
1668 static int i915_edp_psr_status(struct seq_file
*m
, void *data
)
1670 struct drm_info_node
*node
= m
->private;
1671 struct drm_device
*dev
= node
->minor
->dev
;
1672 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1674 bool enabled
= false;
1676 seq_printf(m
, "Sink_Support: %s\n", yesno(dev_priv
->psr
.sink_support
));
1677 seq_printf(m
, "Source_OK: %s\n", yesno(dev_priv
->psr
.source_ok
));
1679 enabled
= HAS_PSR(dev
) &&
1680 I915_READ(EDP_PSR_CTL(dev
)) & EDP_PSR_ENABLE
;
1681 seq_printf(m
, "Enabled: %s\n", yesno(enabled
));
1684 psrperf
= I915_READ(EDP_PSR_PERF_CNT(dev
)) &
1685 EDP_PSR_PERF_CNT_MASK
;
1686 seq_printf(m
, "Performance_Counter: %u\n", psrperf
);
1691 static int i915_energy_uJ(struct seq_file
*m
, void *data
)
1693 struct drm_info_node
*node
= m
->private;
1694 struct drm_device
*dev
= node
->minor
->dev
;
1695 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1699 if (INTEL_INFO(dev
)->gen
< 6)
1702 rdmsrl(MSR_RAPL_POWER_UNIT
, power
);
1703 power
= (power
& 0x1f00) >> 8;
1704 units
= 1000000 / (1 << power
); /* convert to uJ */
1705 power
= I915_READ(MCH_SECP_NRG_STTS
);
1708 seq_printf(m
, "%llu", (long long unsigned)power
);
1713 static int i915_pc8_status(struct seq_file
*m
, void *unused
)
1715 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1716 struct drm_device
*dev
= node
->minor
->dev
;
1717 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1719 if (!IS_HASWELL(dev
)) {
1720 seq_puts(m
, "not supported\n");
1724 mutex_lock(&dev_priv
->pc8
.lock
);
1725 seq_printf(m
, "Requirements met: %s\n",
1726 yesno(dev_priv
->pc8
.requirements_met
));
1727 seq_printf(m
, "GPU idle: %s\n", yesno(dev_priv
->pc8
.gpu_idle
));
1728 seq_printf(m
, "Disable count: %d\n", dev_priv
->pc8
.disable_count
);
1729 seq_printf(m
, "IRQs disabled: %s\n",
1730 yesno(dev_priv
->pc8
.irqs_disabled
));
1731 seq_printf(m
, "Enabled: %s\n", yesno(dev_priv
->pc8
.enabled
));
1732 mutex_unlock(&dev_priv
->pc8
.lock
);
1737 static int i915_pipe_crc(struct seq_file
*m
, void *data
)
1739 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1740 struct drm_device
*dev
= node
->minor
->dev
;
1741 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1742 enum pipe pipe
= (enum pipe
)node
->info_ent
->data
;
1743 struct intel_pipe_crc
*pipe_crc
= &dev_priv
->pipe_crc
[pipe
];
1746 if (dev_priv
->pipe_crc
[pipe
].source
== INTEL_PIPE_CRC_SOURCE_NONE
) {
1747 seq_puts(m
, "none\n");
1751 seq_puts(m
, " frame CRC1 CRC2 CRC3 CRC4 CRC5\n");
1752 head
= atomic_read(&pipe_crc
->head
);
1753 tail
= atomic_read(&pipe_crc
->tail
);
1755 while (CIRC_CNT(head
, tail
, INTEL_PIPE_CRC_ENTRIES_NR
) >= 1) {
1756 struct intel_pipe_crc_entry
*entry
= &pipe_crc
->entries
[tail
];
1758 seq_printf(m
, "%8u %8x %8x %8x %8x %8x\n", entry
->frame
,
1759 entry
->crc
[0], entry
->crc
[1], entry
->crc
[2],
1760 entry
->crc
[3], entry
->crc
[4]);
1762 BUILD_BUG_ON_NOT_POWER_OF_2(INTEL_PIPE_CRC_ENTRIES_NR
);
1763 tail
= (tail
+ 1) & (INTEL_PIPE_CRC_ENTRIES_NR
- 1);
1764 atomic_set(&pipe_crc
->tail
, tail
);
1770 static const char *pipe_crc_sources
[] = {
1777 static const char *pipe_crc_source_name(enum intel_pipe_crc_source source
)
1779 BUILD_BUG_ON(ARRAY_SIZE(pipe_crc_sources
) != INTEL_PIPE_CRC_SOURCE_MAX
);
1780 return pipe_crc_sources
[source
];
1783 static int pipe_crc_ctl_show(struct seq_file
*m
, void *data
)
1785 struct drm_device
*dev
= m
->private;
1786 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1789 for (i
= 0; i
< I915_MAX_PIPES
; i
++)
1790 seq_printf(m
, "%c %s\n", pipe_name(i
),
1791 pipe_crc_source_name(dev_priv
->pipe_crc
[i
].source
));
1796 static int pipe_crc_ctl_open(struct inode
*inode
, struct file
*file
)
1798 struct drm_device
*dev
= inode
->i_private
;
1800 return single_open(file
, pipe_crc_ctl_show
, dev
);
1803 static int pipe_crc_set_source(struct drm_device
*dev
, enum pipe pipe
,
1804 enum intel_pipe_crc_source source
)
1806 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1807 struct intel_pipe_crc
*pipe_crc
= &dev_priv
->pipe_crc
[pipe
];
1813 if (!IS_IVYBRIDGE(dev
))
1816 if (pipe_crc
->source
== source
)
1819 /* forbid changing the source without going back to 'none' */
1820 if (pipe_crc
->source
&& source
)
1823 /* none -> real source transition */
1825 atomic_set(&pipe_crc
->head
, 0);
1826 atomic_set(&pipe_crc
->tail
, 0);
1829 pipe_crc
->source
= source
;
1832 case INTEL_PIPE_CRC_SOURCE_PLANE1
:
1833 val
= PIPE_CRC_ENABLE
| PIPE_CRC_SOURCE_PRIMARY_IVB
;
1835 case INTEL_PIPE_CRC_SOURCE_PLANE2
:
1836 val
= PIPE_CRC_ENABLE
| PIPE_CRC_SOURCE_SPRITE_IVB
;
1838 case INTEL_PIPE_CRC_SOURCE_PF
:
1839 val
= PIPE_CRC_ENABLE
| PIPE_CRC_SOURCE_PF_IVB
;
1841 case INTEL_PIPE_CRC_SOURCE_NONE
:
1847 I915_WRITE(PIPE_CRC_CTL(pipe
), val
);
1848 POSTING_READ(PIPE_CRC_CTL(pipe
));
1854 * Parse pipe CRC command strings:
1855 * command: wsp* pipe wsp+ source wsp*
1857 * source: (none | plane1 | plane2 | pf)
1858 * wsp: (#0x20 | #0x9 | #0xA)+
1861 * "A plane1" -> Start CRC computations on plane1 of pipe A
1862 * "A none" -> Stop CRC
1864 static int pipe_crc_ctl_tokenize(char *buf
, char *words
[], int max_words
)
1871 /* skip leading white space */
1872 buf
= skip_spaces(buf
);
1874 break; /* end of buffer */
1876 /* find end of word */
1877 for (end
= buf
; *end
&& !isspace(*end
); end
++)
1880 if (n_words
== max_words
) {
1881 DRM_DEBUG_DRIVER("too many words, allowed <= %d\n",
1883 return -EINVAL
; /* ran out of words[] before bytes */
1888 words
[n_words
++] = buf
;
1895 static int pipe_crc_ctl_parse_pipe(const char *buf
, enum pipe
*pipe
)
1897 const char name
= buf
[0];
1899 if (name
< 'A' || name
>= pipe_name(I915_MAX_PIPES
))
1908 pipe_crc_ctl_parse_source(const char *buf
, enum intel_pipe_crc_source
*source
)
1912 for (i
= 0; i
< ARRAY_SIZE(pipe_crc_sources
); i
++)
1913 if (!strcmp(buf
, pipe_crc_sources
[i
])) {
1921 static int pipe_crc_ctl_parse(struct drm_device
*dev
, char *buf
, size_t len
)
1925 char *words
[MAX_WORDS
];
1927 enum intel_pipe_crc_source source
;
1929 n_words
= pipe_crc_ctl_tokenize(buf
, words
, MAX_WORDS
);
1931 DRM_DEBUG_DRIVER("tokenize failed, a command is 2 words\n");
1935 if (pipe_crc_ctl_parse_pipe(words
[0], &pipe
) < 0) {
1936 DRM_DEBUG_DRIVER("unknown pipe %s\n", words
[0]);
1940 if (pipe_crc_ctl_parse_source(words
[1], &source
) < 0) {
1941 DRM_DEBUG_DRIVER("unknown source %s\n", words
[1]);
1945 return pipe_crc_set_source(dev
, pipe
, source
);
1948 static ssize_t
pipe_crc_ctl_write(struct file
*file
, const char __user
*ubuf
,
1949 size_t len
, loff_t
*offp
)
1951 struct seq_file
*m
= file
->private_data
;
1952 struct drm_device
*dev
= m
->private;
1959 if (len
> PAGE_SIZE
- 1) {
1960 DRM_DEBUG_DRIVER("expected <%lu bytes into pipe crc control\n",
1965 tmpbuf
= kmalloc(len
+ 1, GFP_KERNEL
);
1969 if (copy_from_user(tmpbuf
, ubuf
, len
)) {
1975 ret
= pipe_crc_ctl_parse(dev
, tmpbuf
, len
);
1986 static const struct file_operations i915_pipe_crc_ctl_fops
= {
1987 .owner
= THIS_MODULE
,
1988 .open
= pipe_crc_ctl_open
,
1990 .llseek
= seq_lseek
,
1991 .release
= single_release
,
1992 .write
= pipe_crc_ctl_write
1996 i915_wedged_get(void *data
, u64
*val
)
1998 struct drm_device
*dev
= data
;
1999 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
2001 *val
= atomic_read(&dev_priv
->gpu_error
.reset_counter
);
2007 i915_wedged_set(void *data
, u64 val
)
2009 struct drm_device
*dev
= data
;
2011 DRM_INFO("Manually setting wedged to %llu\n", val
);
2012 i915_handle_error(dev
, val
);
2017 DEFINE_SIMPLE_ATTRIBUTE(i915_wedged_fops
,
2018 i915_wedged_get
, i915_wedged_set
,
2022 i915_ring_stop_get(void *data
, u64
*val
)
2024 struct drm_device
*dev
= data
;
2025 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
2027 *val
= dev_priv
->gpu_error
.stop_rings
;
2033 i915_ring_stop_set(void *data
, u64 val
)
2035 struct drm_device
*dev
= data
;
2036 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2039 DRM_DEBUG_DRIVER("Stopping rings 0x%08llx\n", val
);
2041 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
2045 dev_priv
->gpu_error
.stop_rings
= val
;
2046 mutex_unlock(&dev
->struct_mutex
);
2051 DEFINE_SIMPLE_ATTRIBUTE(i915_ring_stop_fops
,
2052 i915_ring_stop_get
, i915_ring_stop_set
,
2056 i915_ring_missed_irq_get(void *data
, u64
*val
)
2058 struct drm_device
*dev
= data
;
2059 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2061 *val
= dev_priv
->gpu_error
.missed_irq_rings
;
2066 i915_ring_missed_irq_set(void *data
, u64 val
)
2068 struct drm_device
*dev
= data
;
2069 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2072 /* Lock against concurrent debugfs callers */
2073 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
2076 dev_priv
->gpu_error
.missed_irq_rings
= val
;
2077 mutex_unlock(&dev
->struct_mutex
);
2082 DEFINE_SIMPLE_ATTRIBUTE(i915_ring_missed_irq_fops
,
2083 i915_ring_missed_irq_get
, i915_ring_missed_irq_set
,
2087 i915_ring_test_irq_get(void *data
, u64
*val
)
2089 struct drm_device
*dev
= data
;
2090 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2092 *val
= dev_priv
->gpu_error
.test_irq_rings
;
2098 i915_ring_test_irq_set(void *data
, u64 val
)
2100 struct drm_device
*dev
= data
;
2101 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2104 DRM_DEBUG_DRIVER("Masking interrupts on rings 0x%08llx\n", val
);
2106 /* Lock against concurrent debugfs callers */
2107 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
2111 dev_priv
->gpu_error
.test_irq_rings
= val
;
2112 mutex_unlock(&dev
->struct_mutex
);
2117 DEFINE_SIMPLE_ATTRIBUTE(i915_ring_test_irq_fops
,
2118 i915_ring_test_irq_get
, i915_ring_test_irq_set
,
2121 #define DROP_UNBOUND 0x1
2122 #define DROP_BOUND 0x2
2123 #define DROP_RETIRE 0x4
2124 #define DROP_ACTIVE 0x8
2125 #define DROP_ALL (DROP_UNBOUND | \
2130 i915_drop_caches_get(void *data
, u64
*val
)
2138 i915_drop_caches_set(void *data
, u64 val
)
2140 struct drm_device
*dev
= data
;
2141 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2142 struct drm_i915_gem_object
*obj
, *next
;
2143 struct i915_address_space
*vm
;
2144 struct i915_vma
*vma
, *x
;
2147 DRM_DEBUG_DRIVER("Dropping caches: 0x%08llx\n", val
);
2149 /* No need to check and wait for gpu resets, only libdrm auto-restarts
2150 * on ioctls on -EAGAIN. */
2151 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
2155 if (val
& DROP_ACTIVE
) {
2156 ret
= i915_gpu_idle(dev
);
2161 if (val
& (DROP_RETIRE
| DROP_ACTIVE
))
2162 i915_gem_retire_requests(dev
);
2164 if (val
& DROP_BOUND
) {
2165 list_for_each_entry(vm
, &dev_priv
->vm_list
, global_link
) {
2166 list_for_each_entry_safe(vma
, x
, &vm
->inactive_list
,
2168 if (vma
->obj
->pin_count
)
2171 ret
= i915_vma_unbind(vma
);
2178 if (val
& DROP_UNBOUND
) {
2179 list_for_each_entry_safe(obj
, next
, &dev_priv
->mm
.unbound_list
,
2181 if (obj
->pages_pin_count
== 0) {
2182 ret
= i915_gem_object_put_pages(obj
);
2189 mutex_unlock(&dev
->struct_mutex
);
2194 DEFINE_SIMPLE_ATTRIBUTE(i915_drop_caches_fops
,
2195 i915_drop_caches_get
, i915_drop_caches_set
,
2199 i915_max_freq_get(void *data
, u64
*val
)
2201 struct drm_device
*dev
= data
;
2202 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
2205 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
2208 flush_delayed_work(&dev_priv
->rps
.delayed_resume_work
);
2210 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
2214 if (IS_VALLEYVIEW(dev
))
2215 *val
= vlv_gpu_freq(dev_priv
->mem_freq
,
2216 dev_priv
->rps
.max_delay
);
2218 *val
= dev_priv
->rps
.max_delay
* GT_FREQUENCY_MULTIPLIER
;
2219 mutex_unlock(&dev_priv
->rps
.hw_lock
);
2225 i915_max_freq_set(void *data
, u64 val
)
2227 struct drm_device
*dev
= data
;
2228 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2231 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
2234 flush_delayed_work(&dev_priv
->rps
.delayed_resume_work
);
2236 DRM_DEBUG_DRIVER("Manually setting max freq to %llu\n", val
);
2238 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
2243 * Turbo will still be enabled, but won't go above the set value.
2245 if (IS_VALLEYVIEW(dev
)) {
2246 val
= vlv_freq_opcode(dev_priv
->mem_freq
, val
);
2247 dev_priv
->rps
.max_delay
= val
;
2248 gen6_set_rps(dev
, val
);
2250 do_div(val
, GT_FREQUENCY_MULTIPLIER
);
2251 dev_priv
->rps
.max_delay
= val
;
2252 gen6_set_rps(dev
, val
);
2255 mutex_unlock(&dev_priv
->rps
.hw_lock
);
2260 DEFINE_SIMPLE_ATTRIBUTE(i915_max_freq_fops
,
2261 i915_max_freq_get
, i915_max_freq_set
,
2265 i915_min_freq_get(void *data
, u64
*val
)
2267 struct drm_device
*dev
= data
;
2268 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
2271 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
2274 flush_delayed_work(&dev_priv
->rps
.delayed_resume_work
);
2276 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
2280 if (IS_VALLEYVIEW(dev
))
2281 *val
= vlv_gpu_freq(dev_priv
->mem_freq
,
2282 dev_priv
->rps
.min_delay
);
2284 *val
= dev_priv
->rps
.min_delay
* GT_FREQUENCY_MULTIPLIER
;
2285 mutex_unlock(&dev_priv
->rps
.hw_lock
);
2291 i915_min_freq_set(void *data
, u64 val
)
2293 struct drm_device
*dev
= data
;
2294 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2297 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
2300 flush_delayed_work(&dev_priv
->rps
.delayed_resume_work
);
2302 DRM_DEBUG_DRIVER("Manually setting min freq to %llu\n", val
);
2304 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
2309 * Turbo will still be enabled, but won't go below the set value.
2311 if (IS_VALLEYVIEW(dev
)) {
2312 val
= vlv_freq_opcode(dev_priv
->mem_freq
, val
);
2313 dev_priv
->rps
.min_delay
= val
;
2314 valleyview_set_rps(dev
, val
);
2316 do_div(val
, GT_FREQUENCY_MULTIPLIER
);
2317 dev_priv
->rps
.min_delay
= val
;
2318 gen6_set_rps(dev
, val
);
2320 mutex_unlock(&dev_priv
->rps
.hw_lock
);
2325 DEFINE_SIMPLE_ATTRIBUTE(i915_min_freq_fops
,
2326 i915_min_freq_get
, i915_min_freq_set
,
2330 i915_cache_sharing_get(void *data
, u64
*val
)
2332 struct drm_device
*dev
= data
;
2333 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
2337 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
2340 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
2344 snpcr
= I915_READ(GEN6_MBCUNIT_SNPCR
);
2345 mutex_unlock(&dev_priv
->dev
->struct_mutex
);
2347 *val
= (snpcr
& GEN6_MBC_SNPCR_MASK
) >> GEN6_MBC_SNPCR_SHIFT
;
2353 i915_cache_sharing_set(void *data
, u64 val
)
2355 struct drm_device
*dev
= data
;
2356 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2359 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
2365 DRM_DEBUG_DRIVER("Manually setting uncore sharing to %llu\n", val
);
2367 /* Update the cache sharing policy here as well */
2368 snpcr
= I915_READ(GEN6_MBCUNIT_SNPCR
);
2369 snpcr
&= ~GEN6_MBC_SNPCR_MASK
;
2370 snpcr
|= (val
<< GEN6_MBC_SNPCR_SHIFT
);
2371 I915_WRITE(GEN6_MBCUNIT_SNPCR
, snpcr
);
2376 DEFINE_SIMPLE_ATTRIBUTE(i915_cache_sharing_fops
,
2377 i915_cache_sharing_get
, i915_cache_sharing_set
,
2380 /* As the drm_debugfs_init() routines are called before dev->dev_private is
2381 * allocated we need to hook into the minor for release. */
2383 drm_add_fake_info_node(struct drm_minor
*minor
,
2387 struct drm_info_node
*node
;
2389 node
= kmalloc(sizeof(*node
), GFP_KERNEL
);
2391 debugfs_remove(ent
);
2395 node
->minor
= minor
;
2397 node
->info_ent
= (void *) key
;
2399 mutex_lock(&minor
->debugfs_lock
);
2400 list_add(&node
->list
, &minor
->debugfs_list
);
2401 mutex_unlock(&minor
->debugfs_lock
);
2406 static int i915_forcewake_open(struct inode
*inode
, struct file
*file
)
2408 struct drm_device
*dev
= inode
->i_private
;
2409 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2411 if (INTEL_INFO(dev
)->gen
< 6)
2414 gen6_gt_force_wake_get(dev_priv
);
2419 static int i915_forcewake_release(struct inode
*inode
, struct file
*file
)
2421 struct drm_device
*dev
= inode
->i_private
;
2422 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2424 if (INTEL_INFO(dev
)->gen
< 6)
2427 gen6_gt_force_wake_put(dev_priv
);
2432 static const struct file_operations i915_forcewake_fops
= {
2433 .owner
= THIS_MODULE
,
2434 .open
= i915_forcewake_open
,
2435 .release
= i915_forcewake_release
,
2438 static int i915_forcewake_create(struct dentry
*root
, struct drm_minor
*minor
)
2440 struct drm_device
*dev
= minor
->dev
;
2443 ent
= debugfs_create_file("i915_forcewake_user",
2446 &i915_forcewake_fops
);
2448 return PTR_ERR(ent
);
2450 return drm_add_fake_info_node(minor
, ent
, &i915_forcewake_fops
);
2453 static int i915_debugfs_create(struct dentry
*root
,
2454 struct drm_minor
*minor
,
2456 const struct file_operations
*fops
)
2458 struct drm_device
*dev
= minor
->dev
;
2461 ent
= debugfs_create_file(name
,
2466 return PTR_ERR(ent
);
2468 return drm_add_fake_info_node(minor
, ent
, fops
);
2471 static struct drm_info_list i915_debugfs_list
[] = {
2472 {"i915_capabilities", i915_capabilities
, 0},
2473 {"i915_gem_objects", i915_gem_object_info
, 0},
2474 {"i915_gem_gtt", i915_gem_gtt_info
, 0},
2475 {"i915_gem_pinned", i915_gem_gtt_info
, 0, (void *) PINNED_LIST
},
2476 {"i915_gem_active", i915_gem_object_list_info
, 0, (void *) ACTIVE_LIST
},
2477 {"i915_gem_inactive", i915_gem_object_list_info
, 0, (void *) INACTIVE_LIST
},
2478 {"i915_gem_stolen", i915_gem_stolen_list_info
},
2479 {"i915_gem_pageflip", i915_gem_pageflip_info
, 0},
2480 {"i915_gem_request", i915_gem_request_info
, 0},
2481 {"i915_gem_seqno", i915_gem_seqno_info
, 0},
2482 {"i915_gem_fence_regs", i915_gem_fence_regs_info
, 0},
2483 {"i915_gem_interrupt", i915_interrupt_info
, 0},
2484 {"i915_gem_hws", i915_hws_info
, 0, (void *)RCS
},
2485 {"i915_gem_hws_blt", i915_hws_info
, 0, (void *)BCS
},
2486 {"i915_gem_hws_bsd", i915_hws_info
, 0, (void *)VCS
},
2487 {"i915_gem_hws_vebox", i915_hws_info
, 0, (void *)VECS
},
2488 {"i915_rstdby_delays", i915_rstdby_delays
, 0},
2489 {"i915_cur_delayinfo", i915_cur_delayinfo
, 0},
2490 {"i915_delayfreq_table", i915_delayfreq_table
, 0},
2491 {"i915_inttoext_table", i915_inttoext_table
, 0},
2492 {"i915_drpc_info", i915_drpc_info
, 0},
2493 {"i915_emon_status", i915_emon_status
, 0},
2494 {"i915_ring_freq_table", i915_ring_freq_table
, 0},
2495 {"i915_gfxec", i915_gfxec
, 0},
2496 {"i915_fbc_status", i915_fbc_status
, 0},
2497 {"i915_ips_status", i915_ips_status
, 0},
2498 {"i915_sr_status", i915_sr_status
, 0},
2499 {"i915_opregion", i915_opregion
, 0},
2500 {"i915_gem_framebuffer", i915_gem_framebuffer_info
, 0},
2501 {"i915_context_status", i915_context_status
, 0},
2502 {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info
, 0},
2503 {"i915_swizzle_info", i915_swizzle_info
, 0},
2504 {"i915_ppgtt_info", i915_ppgtt_info
, 0},
2505 {"i915_dpio", i915_dpio_info
, 0},
2506 {"i915_llc", i915_llc
, 0},
2507 {"i915_edp_psr_status", i915_edp_psr_status
, 0},
2508 {"i915_energy_uJ", i915_energy_uJ
, 0},
2509 {"i915_pc8_status", i915_pc8_status
, 0},
2510 {"i915_pipe_A_crc", i915_pipe_crc
, 0, (void *)PIPE_A
},
2511 {"i915_pipe_B_crc", i915_pipe_crc
, 0, (void *)PIPE_B
},
2512 {"i915_pipe_C_crc", i915_pipe_crc
, 0, (void *)PIPE_C
},
2514 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2516 static struct i915_debugfs_files
{
2518 const struct file_operations
*fops
;
2519 } i915_debugfs_files
[] = {
2520 {"i915_wedged", &i915_wedged_fops
},
2521 {"i915_max_freq", &i915_max_freq_fops
},
2522 {"i915_min_freq", &i915_min_freq_fops
},
2523 {"i915_cache_sharing", &i915_cache_sharing_fops
},
2524 {"i915_ring_stop", &i915_ring_stop_fops
},
2525 {"i915_ring_missed_irq", &i915_ring_missed_irq_fops
},
2526 {"i915_ring_test_irq", &i915_ring_test_irq_fops
},
2527 {"i915_gem_drop_caches", &i915_drop_caches_fops
},
2528 {"i915_error_state", &i915_error_state_fops
},
2529 {"i915_next_seqno", &i915_next_seqno_fops
},
2530 {"i915_pipe_crc_ctl", &i915_pipe_crc_ctl_fops
},
2533 int i915_debugfs_init(struct drm_minor
*minor
)
2537 ret
= i915_forcewake_create(minor
->debugfs_root
, minor
);
2541 for (i
= 0; i
< ARRAY_SIZE(i915_debugfs_files
); i
++) {
2542 ret
= i915_debugfs_create(minor
->debugfs_root
, minor
,
2543 i915_debugfs_files
[i
].name
,
2544 i915_debugfs_files
[i
].fops
);
2549 return drm_debugfs_create_files(i915_debugfs_list
,
2550 I915_DEBUGFS_ENTRIES
,
2551 minor
->debugfs_root
, minor
);
2554 void i915_debugfs_cleanup(struct drm_minor
*minor
)
2558 drm_debugfs_remove_files(i915_debugfs_list
,
2559 I915_DEBUGFS_ENTRIES
, minor
);
2560 drm_debugfs_remove_files((struct drm_info_list
*) &i915_forcewake_fops
,
2562 for (i
= 0; i
< ARRAY_SIZE(i915_debugfs_files
); i
++) {
2563 struct drm_info_list
*info_list
=
2564 (struct drm_info_list
*) i915_debugfs_files
[i
].fops
;
2566 drm_debugfs_remove_files(info_list
, 1, minor
);
2570 #endif /* CONFIG_DEBUG_FS */