2 * Copyright © 2008 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
29 #include <linux/seq_file.h>
30 #include <linux/debugfs.h>
31 #include <linux/slab.h>
32 #include <linux/export.h>
33 #include <linux/list_sort.h>
34 #include <asm/msr-index.h>
36 #include "intel_drv.h"
37 #include "intel_ringbuffer.h"
38 #include <drm/i915_drm.h>
41 #define DRM_I915_RING_DEBUG 1
44 #if defined(CONFIG_DEBUG_FS)
52 static const char *yesno(int v
)
54 return v
? "yes" : "no";
57 static int i915_capabilities(struct seq_file
*m
, void *data
)
59 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
60 struct drm_device
*dev
= node
->minor
->dev
;
61 const struct intel_device_info
*info
= INTEL_INFO(dev
);
63 seq_printf(m
, "gen: %d\n", info
->gen
);
64 seq_printf(m
, "pch: %d\n", INTEL_PCH_TYPE(dev
));
65 #define PRINT_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x))
66 #define SEP_SEMICOLON ;
67 DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG
, SEP_SEMICOLON
);
74 static const char *get_pin_flag(struct drm_i915_gem_object
*obj
)
76 if (obj
->user_pin_count
> 0)
78 else if (obj
->pin_count
> 0)
84 static const char *get_tiling_flag(struct drm_i915_gem_object
*obj
)
86 switch (obj
->tiling_mode
) {
88 case I915_TILING_NONE
: return " ";
89 case I915_TILING_X
: return "X";
90 case I915_TILING_Y
: return "Y";
94 static inline const char *get_global_flag(struct drm_i915_gem_object
*obj
)
96 return obj
->has_global_gtt_mapping
? "g" : " ";
100 describe_obj(struct seq_file
*m
, struct drm_i915_gem_object
*obj
)
102 struct i915_vma
*vma
;
103 seq_printf(m
, "%pK: %s%s%s %8zdKiB %02x %02x %u %u %u%s%s%s",
106 get_tiling_flag(obj
),
107 get_global_flag(obj
),
108 obj
->base
.size
/ 1024,
109 obj
->base
.read_domains
,
110 obj
->base
.write_domain
,
111 obj
->last_read_seqno
,
112 obj
->last_write_seqno
,
113 obj
->last_fenced_seqno
,
114 i915_cache_level_str(obj
->cache_level
),
115 obj
->dirty
? " dirty" : "",
116 obj
->madv
== I915_MADV_DONTNEED
? " purgeable" : "");
118 seq_printf(m
, " (name: %d)", obj
->base
.name
);
120 seq_printf(m
, " (pinned x %d)", obj
->pin_count
);
121 if (obj
->pin_display
)
122 seq_printf(m
, " (display)");
123 if (obj
->fence_reg
!= I915_FENCE_REG_NONE
)
124 seq_printf(m
, " (fence: %d)", obj
->fence_reg
);
125 list_for_each_entry(vma
, &obj
->vma_list
, vma_link
) {
126 if (!i915_is_ggtt(vma
->vm
))
130 seq_printf(m
, "gtt offset: %08lx, size: %08lx)",
131 vma
->node
.start
, vma
->node
.size
);
134 seq_printf(m
, " (stolen: %08lx)", obj
->stolen
->start
);
135 if (obj
->pin_mappable
|| obj
->fault_mappable
) {
137 if (obj
->pin_mappable
)
139 if (obj
->fault_mappable
)
142 seq_printf(m
, " (%s mappable)", s
);
144 if (obj
->ring
!= NULL
)
145 seq_printf(m
, " (%s)", obj
->ring
->name
);
148 static void describe_ctx(struct seq_file
*m
, struct i915_hw_context
*ctx
)
150 seq_putc(m
, ctx
->is_initialized
? 'I' : 'i');
151 seq_putc(m
, ctx
->remap_slice
? 'R' : 'r');
155 static int i915_gem_object_list_info(struct seq_file
*m
, void *data
)
157 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
158 uintptr_t list
= (uintptr_t) node
->info_ent
->data
;
159 struct list_head
*head
;
160 struct drm_device
*dev
= node
->minor
->dev
;
161 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
162 struct i915_address_space
*vm
= &dev_priv
->gtt
.base
;
163 struct i915_vma
*vma
;
164 size_t total_obj_size
, total_gtt_size
;
167 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
171 /* FIXME: the user of this interface might want more than just GGTT */
174 seq_puts(m
, "Active:\n");
175 head
= &vm
->active_list
;
178 seq_puts(m
, "Inactive:\n");
179 head
= &vm
->inactive_list
;
182 mutex_unlock(&dev
->struct_mutex
);
186 total_obj_size
= total_gtt_size
= count
= 0;
187 list_for_each_entry(vma
, head
, mm_list
) {
189 describe_obj(m
, vma
->obj
);
191 total_obj_size
+= vma
->obj
->base
.size
;
192 total_gtt_size
+= vma
->node
.size
;
195 mutex_unlock(&dev
->struct_mutex
);
197 seq_printf(m
, "Total %d objects, %zu bytes, %zu GTT size\n",
198 count
, total_obj_size
, total_gtt_size
);
202 static int obj_rank_by_stolen(void *priv
,
203 struct list_head
*A
, struct list_head
*B
)
205 struct drm_i915_gem_object
*a
=
206 container_of(A
, struct drm_i915_gem_object
, obj_exec_link
);
207 struct drm_i915_gem_object
*b
=
208 container_of(B
, struct drm_i915_gem_object
, obj_exec_link
);
210 return a
->stolen
->start
- b
->stolen
->start
;
213 static int i915_gem_stolen_list_info(struct seq_file
*m
, void *data
)
215 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
216 struct drm_device
*dev
= node
->minor
->dev
;
217 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
218 struct drm_i915_gem_object
*obj
;
219 size_t total_obj_size
, total_gtt_size
;
223 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
227 total_obj_size
= total_gtt_size
= count
= 0;
228 list_for_each_entry(obj
, &dev_priv
->mm
.bound_list
, global_list
) {
229 if (obj
->stolen
== NULL
)
232 list_add(&obj
->obj_exec_link
, &stolen
);
234 total_obj_size
+= obj
->base
.size
;
235 total_gtt_size
+= i915_gem_obj_ggtt_size(obj
);
238 list_for_each_entry(obj
, &dev_priv
->mm
.unbound_list
, global_list
) {
239 if (obj
->stolen
== NULL
)
242 list_add(&obj
->obj_exec_link
, &stolen
);
244 total_obj_size
+= obj
->base
.size
;
247 list_sort(NULL
, &stolen
, obj_rank_by_stolen
);
248 seq_puts(m
, "Stolen:\n");
249 while (!list_empty(&stolen
)) {
250 obj
= list_first_entry(&stolen
, typeof(*obj
), obj_exec_link
);
252 describe_obj(m
, obj
);
254 list_del_init(&obj
->obj_exec_link
);
256 mutex_unlock(&dev
->struct_mutex
);
258 seq_printf(m
, "Total %d objects, %zu bytes, %zu GTT size\n",
259 count
, total_obj_size
, total_gtt_size
);
263 #define count_objects(list, member) do { \
264 list_for_each_entry(obj, list, member) { \
265 size += i915_gem_obj_ggtt_size(obj); \
267 if (obj->map_and_fenceable) { \
268 mappable_size += i915_gem_obj_ggtt_size(obj); \
276 size_t total
, active
, inactive
, unbound
;
279 static int per_file_stats(int id
, void *ptr
, void *data
)
281 struct drm_i915_gem_object
*obj
= ptr
;
282 struct file_stats
*stats
= data
;
285 stats
->total
+= obj
->base
.size
;
287 if (i915_gem_obj_ggtt_bound(obj
)) {
288 if (!list_empty(&obj
->ring_list
))
289 stats
->active
+= obj
->base
.size
;
291 stats
->inactive
+= obj
->base
.size
;
293 if (!list_empty(&obj
->global_list
))
294 stats
->unbound
+= obj
->base
.size
;
300 #define count_vmas(list, member) do { \
301 list_for_each_entry(vma, list, member) { \
302 size += i915_gem_obj_ggtt_size(vma->obj); \
304 if (vma->obj->map_and_fenceable) { \
305 mappable_size += i915_gem_obj_ggtt_size(vma->obj); \
311 static int i915_gem_object_info(struct seq_file
*m
, void* data
)
313 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
314 struct drm_device
*dev
= node
->minor
->dev
;
315 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
316 u32 count
, mappable_count
, purgeable_count
;
317 size_t size
, mappable_size
, purgeable_size
;
318 struct drm_i915_gem_object
*obj
;
319 struct i915_address_space
*vm
= &dev_priv
->gtt
.base
;
320 struct drm_file
*file
;
321 struct i915_vma
*vma
;
324 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
328 seq_printf(m
, "%u objects, %zu bytes\n",
329 dev_priv
->mm
.object_count
,
330 dev_priv
->mm
.object_memory
);
332 size
= count
= mappable_size
= mappable_count
= 0;
333 count_objects(&dev_priv
->mm
.bound_list
, global_list
);
334 seq_printf(m
, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
335 count
, mappable_count
, size
, mappable_size
);
337 size
= count
= mappable_size
= mappable_count
= 0;
338 count_vmas(&vm
->active_list
, mm_list
);
339 seq_printf(m
, " %u [%u] active objects, %zu [%zu] bytes\n",
340 count
, mappable_count
, size
, mappable_size
);
342 size
= count
= mappable_size
= mappable_count
= 0;
343 count_vmas(&vm
->inactive_list
, mm_list
);
344 seq_printf(m
, " %u [%u] inactive objects, %zu [%zu] bytes\n",
345 count
, mappable_count
, size
, mappable_size
);
347 size
= count
= purgeable_size
= purgeable_count
= 0;
348 list_for_each_entry(obj
, &dev_priv
->mm
.unbound_list
, global_list
) {
349 size
+= obj
->base
.size
, ++count
;
350 if (obj
->madv
== I915_MADV_DONTNEED
)
351 purgeable_size
+= obj
->base
.size
, ++purgeable_count
;
353 seq_printf(m
, "%u unbound objects, %zu bytes\n", count
, size
);
355 size
= count
= mappable_size
= mappable_count
= 0;
356 list_for_each_entry(obj
, &dev_priv
->mm
.bound_list
, global_list
) {
357 if (obj
->fault_mappable
) {
358 size
+= i915_gem_obj_ggtt_size(obj
);
361 if (obj
->pin_mappable
) {
362 mappable_size
+= i915_gem_obj_ggtt_size(obj
);
365 if (obj
->madv
== I915_MADV_DONTNEED
) {
366 purgeable_size
+= obj
->base
.size
;
370 seq_printf(m
, "%u purgeable objects, %zu bytes\n",
371 purgeable_count
, purgeable_size
);
372 seq_printf(m
, "%u pinned mappable objects, %zu bytes\n",
373 mappable_count
, mappable_size
);
374 seq_printf(m
, "%u fault mappable objects, %zu bytes\n",
377 seq_printf(m
, "%zu [%lu] gtt total\n",
378 dev_priv
->gtt
.base
.total
,
379 dev_priv
->gtt
.mappable_end
- dev_priv
->gtt
.base
.start
);
382 list_for_each_entry_reverse(file
, &dev
->filelist
, lhead
) {
383 struct file_stats stats
;
385 memset(&stats
, 0, sizeof(stats
));
386 idr_for_each(&file
->object_idr
, per_file_stats
, &stats
);
387 seq_printf(m
, "%s: %u objects, %zu bytes (%zu active, %zu inactive, %zu unbound)\n",
388 get_pid_task(file
->pid
, PIDTYPE_PID
)->comm
,
396 mutex_unlock(&dev
->struct_mutex
);
401 static int i915_gem_gtt_info(struct seq_file
*m
, void *data
)
403 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
404 struct drm_device
*dev
= node
->minor
->dev
;
405 uintptr_t list
= (uintptr_t) node
->info_ent
->data
;
406 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
407 struct drm_i915_gem_object
*obj
;
408 size_t total_obj_size
, total_gtt_size
;
411 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
415 total_obj_size
= total_gtt_size
= count
= 0;
416 list_for_each_entry(obj
, &dev_priv
->mm
.bound_list
, global_list
) {
417 if (list
== PINNED_LIST
&& obj
->pin_count
== 0)
421 describe_obj(m
, obj
);
423 total_obj_size
+= obj
->base
.size
;
424 total_gtt_size
+= i915_gem_obj_ggtt_size(obj
);
428 mutex_unlock(&dev
->struct_mutex
);
430 seq_printf(m
, "Total %d objects, %zu bytes, %zu GTT size\n",
431 count
, total_obj_size
, total_gtt_size
);
436 static int i915_gem_pageflip_info(struct seq_file
*m
, void *data
)
438 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
439 struct drm_device
*dev
= node
->minor
->dev
;
441 struct intel_crtc
*crtc
;
443 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, base
.head
) {
444 const char pipe
= pipe_name(crtc
->pipe
);
445 const char plane
= plane_name(crtc
->plane
);
446 struct intel_unpin_work
*work
;
448 spin_lock_irqsave(&dev
->event_lock
, flags
);
449 work
= crtc
->unpin_work
;
451 seq_printf(m
, "No flip due on pipe %c (plane %c)\n",
454 if (atomic_read(&work
->pending
) < INTEL_FLIP_COMPLETE
) {
455 seq_printf(m
, "Flip queued on pipe %c (plane %c)\n",
458 seq_printf(m
, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
461 if (work
->enable_stall_check
)
462 seq_puts(m
, "Stall check enabled, ");
464 seq_puts(m
, "Stall check waiting for page flip ioctl, ");
465 seq_printf(m
, "%d prepares\n", atomic_read(&work
->pending
));
467 if (work
->old_fb_obj
) {
468 struct drm_i915_gem_object
*obj
= work
->old_fb_obj
;
470 seq_printf(m
, "Old framebuffer gtt_offset 0x%08lx\n",
471 i915_gem_obj_ggtt_offset(obj
));
473 if (work
->pending_flip_obj
) {
474 struct drm_i915_gem_object
*obj
= work
->pending_flip_obj
;
476 seq_printf(m
, "New framebuffer gtt_offset 0x%08lx\n",
477 i915_gem_obj_ggtt_offset(obj
));
480 spin_unlock_irqrestore(&dev
->event_lock
, flags
);
486 static int i915_gem_request_info(struct seq_file
*m
, void *data
)
488 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
489 struct drm_device
*dev
= node
->minor
->dev
;
490 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
491 struct intel_ring_buffer
*ring
;
492 struct drm_i915_gem_request
*gem_request
;
495 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
500 for_each_ring(ring
, dev_priv
, i
) {
501 if (list_empty(&ring
->request_list
))
504 seq_printf(m
, "%s requests:\n", ring
->name
);
505 list_for_each_entry(gem_request
,
508 seq_printf(m
, " %d @ %d\n",
510 (int) (jiffies
- gem_request
->emitted_jiffies
));
514 mutex_unlock(&dev
->struct_mutex
);
517 seq_puts(m
, "No requests\n");
522 static void i915_ring_seqno_info(struct seq_file
*m
,
523 struct intel_ring_buffer
*ring
)
525 if (ring
->get_seqno
) {
526 seq_printf(m
, "Current sequence (%s): %u\n",
527 ring
->name
, ring
->get_seqno(ring
, false));
531 static int i915_gem_seqno_info(struct seq_file
*m
, void *data
)
533 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
534 struct drm_device
*dev
= node
->minor
->dev
;
535 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
536 struct intel_ring_buffer
*ring
;
539 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
543 for_each_ring(ring
, dev_priv
, i
)
544 i915_ring_seqno_info(m
, ring
);
546 mutex_unlock(&dev
->struct_mutex
);
552 static int i915_interrupt_info(struct seq_file
*m
, void *data
)
554 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
555 struct drm_device
*dev
= node
->minor
->dev
;
556 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
557 struct intel_ring_buffer
*ring
;
560 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
564 if (IS_VALLEYVIEW(dev
)) {
565 seq_printf(m
, "Display IER:\t%08x\n",
567 seq_printf(m
, "Display IIR:\t%08x\n",
569 seq_printf(m
, "Display IIR_RW:\t%08x\n",
570 I915_READ(VLV_IIR_RW
));
571 seq_printf(m
, "Display IMR:\t%08x\n",
574 seq_printf(m
, "Pipe %c stat:\t%08x\n",
576 I915_READ(PIPESTAT(pipe
)));
578 seq_printf(m
, "Master IER:\t%08x\n",
579 I915_READ(VLV_MASTER_IER
));
581 seq_printf(m
, "Render IER:\t%08x\n",
583 seq_printf(m
, "Render IIR:\t%08x\n",
585 seq_printf(m
, "Render IMR:\t%08x\n",
588 seq_printf(m
, "PM IER:\t\t%08x\n",
589 I915_READ(GEN6_PMIER
));
590 seq_printf(m
, "PM IIR:\t\t%08x\n",
591 I915_READ(GEN6_PMIIR
));
592 seq_printf(m
, "PM IMR:\t\t%08x\n",
593 I915_READ(GEN6_PMIMR
));
595 seq_printf(m
, "Port hotplug:\t%08x\n",
596 I915_READ(PORT_HOTPLUG_EN
));
597 seq_printf(m
, "DPFLIPSTAT:\t%08x\n",
598 I915_READ(VLV_DPFLIPSTAT
));
599 seq_printf(m
, "DPINVGTT:\t%08x\n",
600 I915_READ(DPINVGTT
));
602 } else if (!HAS_PCH_SPLIT(dev
)) {
603 seq_printf(m
, "Interrupt enable: %08x\n",
605 seq_printf(m
, "Interrupt identity: %08x\n",
607 seq_printf(m
, "Interrupt mask: %08x\n",
610 seq_printf(m
, "Pipe %c stat: %08x\n",
612 I915_READ(PIPESTAT(pipe
)));
614 seq_printf(m
, "North Display Interrupt enable: %08x\n",
616 seq_printf(m
, "North Display Interrupt identity: %08x\n",
618 seq_printf(m
, "North Display Interrupt mask: %08x\n",
620 seq_printf(m
, "South Display Interrupt enable: %08x\n",
622 seq_printf(m
, "South Display Interrupt identity: %08x\n",
624 seq_printf(m
, "South Display Interrupt mask: %08x\n",
626 seq_printf(m
, "Graphics Interrupt enable: %08x\n",
628 seq_printf(m
, "Graphics Interrupt identity: %08x\n",
630 seq_printf(m
, "Graphics Interrupt mask: %08x\n",
633 seq_printf(m
, "Interrupts received: %d\n",
634 atomic_read(&dev_priv
->irq_received
));
635 for_each_ring(ring
, dev_priv
, i
) {
636 if (IS_GEN6(dev
) || IS_GEN7(dev
)) {
638 "Graphics Interrupt mask (%s): %08x\n",
639 ring
->name
, I915_READ_IMR(ring
));
641 i915_ring_seqno_info(m
, ring
);
643 mutex_unlock(&dev
->struct_mutex
);
648 static int i915_gem_fence_regs_info(struct seq_file
*m
, void *data
)
650 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
651 struct drm_device
*dev
= node
->minor
->dev
;
652 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
655 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
659 seq_printf(m
, "Reserved fences = %d\n", dev_priv
->fence_reg_start
);
660 seq_printf(m
, "Total fences = %d\n", dev_priv
->num_fence_regs
);
661 for (i
= 0; i
< dev_priv
->num_fence_regs
; i
++) {
662 struct drm_i915_gem_object
*obj
= dev_priv
->fence_regs
[i
].obj
;
664 seq_printf(m
, "Fence %d, pin count = %d, object = ",
665 i
, dev_priv
->fence_regs
[i
].pin_count
);
667 seq_puts(m
, "unused");
669 describe_obj(m
, obj
);
673 mutex_unlock(&dev
->struct_mutex
);
677 static int i915_hws_info(struct seq_file
*m
, void *data
)
679 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
680 struct drm_device
*dev
= node
->minor
->dev
;
681 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
682 struct intel_ring_buffer
*ring
;
686 ring
= &dev_priv
->ring
[(uintptr_t)node
->info_ent
->data
];
687 hws
= ring
->status_page
.page_addr
;
691 for (i
= 0; i
< 4096 / sizeof(u32
) / 4; i
+= 4) {
692 seq_printf(m
, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
694 hws
[i
], hws
[i
+ 1], hws
[i
+ 2], hws
[i
+ 3]);
700 i915_error_state_write(struct file
*filp
,
701 const char __user
*ubuf
,
705 struct i915_error_state_file_priv
*error_priv
= filp
->private_data
;
706 struct drm_device
*dev
= error_priv
->dev
;
709 DRM_DEBUG_DRIVER("Resetting error state\n");
711 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
715 i915_destroy_error_state(dev
);
716 mutex_unlock(&dev
->struct_mutex
);
721 static int i915_error_state_open(struct inode
*inode
, struct file
*file
)
723 struct drm_device
*dev
= inode
->i_private
;
724 struct i915_error_state_file_priv
*error_priv
;
726 error_priv
= kzalloc(sizeof(*error_priv
), GFP_KERNEL
);
730 error_priv
->dev
= dev
;
732 i915_error_state_get(dev
, error_priv
);
734 file
->private_data
= error_priv
;
739 static int i915_error_state_release(struct inode
*inode
, struct file
*file
)
741 struct i915_error_state_file_priv
*error_priv
= file
->private_data
;
743 i915_error_state_put(error_priv
);
749 static ssize_t
i915_error_state_read(struct file
*file
, char __user
*userbuf
,
750 size_t count
, loff_t
*pos
)
752 struct i915_error_state_file_priv
*error_priv
= file
->private_data
;
753 struct drm_i915_error_state_buf error_str
;
755 ssize_t ret_count
= 0;
758 ret
= i915_error_state_buf_init(&error_str
, count
, *pos
);
762 ret
= i915_error_state_to_str(&error_str
, error_priv
);
766 ret_count
= simple_read_from_buffer(userbuf
, count
, &tmp_pos
,
773 *pos
= error_str
.start
+ ret_count
;
775 i915_error_state_buf_release(&error_str
);
776 return ret
?: ret_count
;
779 static const struct file_operations i915_error_state_fops
= {
780 .owner
= THIS_MODULE
,
781 .open
= i915_error_state_open
,
782 .read
= i915_error_state_read
,
783 .write
= i915_error_state_write
,
784 .llseek
= default_llseek
,
785 .release
= i915_error_state_release
,
789 i915_next_seqno_get(void *data
, u64
*val
)
791 struct drm_device
*dev
= data
;
792 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
795 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
799 *val
= dev_priv
->next_seqno
;
800 mutex_unlock(&dev
->struct_mutex
);
806 i915_next_seqno_set(void *data
, u64 val
)
808 struct drm_device
*dev
= data
;
811 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
815 ret
= i915_gem_set_seqno(dev
, val
);
816 mutex_unlock(&dev
->struct_mutex
);
821 DEFINE_SIMPLE_ATTRIBUTE(i915_next_seqno_fops
,
822 i915_next_seqno_get
, i915_next_seqno_set
,
825 static int i915_rstdby_delays(struct seq_file
*m
, void *unused
)
827 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
828 struct drm_device
*dev
= node
->minor
->dev
;
829 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
833 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
837 crstanddelay
= I915_READ16(CRSTANDVID
);
839 mutex_unlock(&dev
->struct_mutex
);
841 seq_printf(m
, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay
>> 8) & 0x3f, (crstanddelay
& 0x3f));
846 static int i915_cur_delayinfo(struct seq_file
*m
, void *unused
)
848 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
849 struct drm_device
*dev
= node
->minor
->dev
;
850 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
854 u16 rgvswctl
= I915_READ16(MEMSWCTL
);
855 u16 rgvstat
= I915_READ16(MEMSTAT_ILK
);
857 seq_printf(m
, "Requested P-state: %d\n", (rgvswctl
>> 8) & 0xf);
858 seq_printf(m
, "Requested VID: %d\n", rgvswctl
& 0x3f);
859 seq_printf(m
, "Current VID: %d\n", (rgvstat
& MEMSTAT_VID_MASK
) >>
861 seq_printf(m
, "Current P-state: %d\n",
862 (rgvstat
& MEMSTAT_PSTATE_MASK
) >> MEMSTAT_PSTATE_SHIFT
);
863 } else if ((IS_GEN6(dev
) || IS_GEN7(dev
)) && !IS_VALLEYVIEW(dev
)) {
864 u32 gt_perf_status
= I915_READ(GEN6_GT_PERF_STATUS
);
865 u32 rp_state_limits
= I915_READ(GEN6_RP_STATE_LIMITS
);
866 u32 rp_state_cap
= I915_READ(GEN6_RP_STATE_CAP
);
867 u32 rpstat
, cagf
, reqf
;
868 u32 rpupei
, rpcurup
, rpprevup
;
869 u32 rpdownei
, rpcurdown
, rpprevdown
;
872 /* RPSTAT1 is in the GT power well */
873 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
877 gen6_gt_force_wake_get(dev_priv
);
879 reqf
= I915_READ(GEN6_RPNSWREQ
);
880 reqf
&= ~GEN6_TURBO_DISABLE
;
885 reqf
*= GT_FREQUENCY_MULTIPLIER
;
887 rpstat
= I915_READ(GEN6_RPSTAT1
);
888 rpupei
= I915_READ(GEN6_RP_CUR_UP_EI
);
889 rpcurup
= I915_READ(GEN6_RP_CUR_UP
);
890 rpprevup
= I915_READ(GEN6_RP_PREV_UP
);
891 rpdownei
= I915_READ(GEN6_RP_CUR_DOWN_EI
);
892 rpcurdown
= I915_READ(GEN6_RP_CUR_DOWN
);
893 rpprevdown
= I915_READ(GEN6_RP_PREV_DOWN
);
895 cagf
= (rpstat
& HSW_CAGF_MASK
) >> HSW_CAGF_SHIFT
;
897 cagf
= (rpstat
& GEN6_CAGF_MASK
) >> GEN6_CAGF_SHIFT
;
898 cagf
*= GT_FREQUENCY_MULTIPLIER
;
900 gen6_gt_force_wake_put(dev_priv
);
901 mutex_unlock(&dev
->struct_mutex
);
903 seq_printf(m
, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status
);
904 seq_printf(m
, "RPSTAT1: 0x%08x\n", rpstat
);
905 seq_printf(m
, "Render p-state ratio: %d\n",
906 (gt_perf_status
& 0xff00) >> 8);
907 seq_printf(m
, "Render p-state VID: %d\n",
908 gt_perf_status
& 0xff);
909 seq_printf(m
, "Render p-state limit: %d\n",
910 rp_state_limits
& 0xff);
911 seq_printf(m
, "RPNSWREQ: %dMHz\n", reqf
);
912 seq_printf(m
, "CAGF: %dMHz\n", cagf
);
913 seq_printf(m
, "RP CUR UP EI: %dus\n", rpupei
&
915 seq_printf(m
, "RP CUR UP: %dus\n", rpcurup
&
916 GEN6_CURBSYTAVG_MASK
);
917 seq_printf(m
, "RP PREV UP: %dus\n", rpprevup
&
918 GEN6_CURBSYTAVG_MASK
);
919 seq_printf(m
, "RP CUR DOWN EI: %dus\n", rpdownei
&
921 seq_printf(m
, "RP CUR DOWN: %dus\n", rpcurdown
&
922 GEN6_CURBSYTAVG_MASK
);
923 seq_printf(m
, "RP PREV DOWN: %dus\n", rpprevdown
&
924 GEN6_CURBSYTAVG_MASK
);
926 max_freq
= (rp_state_cap
& 0xff0000) >> 16;
927 seq_printf(m
, "Lowest (RPN) frequency: %dMHz\n",
928 max_freq
* GT_FREQUENCY_MULTIPLIER
);
930 max_freq
= (rp_state_cap
& 0xff00) >> 8;
931 seq_printf(m
, "Nominal (RP1) frequency: %dMHz\n",
932 max_freq
* GT_FREQUENCY_MULTIPLIER
);
934 max_freq
= rp_state_cap
& 0xff;
935 seq_printf(m
, "Max non-overclocked (RP0) frequency: %dMHz\n",
936 max_freq
* GT_FREQUENCY_MULTIPLIER
);
938 seq_printf(m
, "Max overclocked frequency: %dMHz\n",
939 dev_priv
->rps
.hw_max
* GT_FREQUENCY_MULTIPLIER
);
940 } else if (IS_VALLEYVIEW(dev
)) {
943 mutex_lock(&dev_priv
->rps
.hw_lock
);
944 freq_sts
= vlv_punit_read(dev_priv
, PUNIT_REG_GPU_FREQ_STS
);
945 seq_printf(m
, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts
);
946 seq_printf(m
, "DDR freq: %d MHz\n", dev_priv
->mem_freq
);
948 val
= vlv_punit_read(dev_priv
, PUNIT_FUSE_BUS1
);
949 seq_printf(m
, "max GPU freq: %d MHz\n",
950 vlv_gpu_freq(dev_priv
->mem_freq
, val
));
952 val
= vlv_punit_read(dev_priv
, PUNIT_REG_GPU_LFM
);
953 seq_printf(m
, "min GPU freq: %d MHz\n",
954 vlv_gpu_freq(dev_priv
->mem_freq
, val
));
956 seq_printf(m
, "current GPU freq: %d MHz\n",
957 vlv_gpu_freq(dev_priv
->mem_freq
,
958 (freq_sts
>> 8) & 0xff));
959 mutex_unlock(&dev_priv
->rps
.hw_lock
);
961 seq_puts(m
, "no P-state info available\n");
967 static int i915_delayfreq_table(struct seq_file
*m
, void *unused
)
969 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
970 struct drm_device
*dev
= node
->minor
->dev
;
971 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
975 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
979 for (i
= 0; i
< 16; i
++) {
980 delayfreq
= I915_READ(PXVFREQ_BASE
+ i
* 4);
981 seq_printf(m
, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i
, delayfreq
,
982 (delayfreq
& PXVFREQ_PX_MASK
) >> PXVFREQ_PX_SHIFT
);
985 mutex_unlock(&dev
->struct_mutex
);
990 static inline int MAP_TO_MV(int map
)
992 return 1250 - (map
* 25);
995 static int i915_inttoext_table(struct seq_file
*m
, void *unused
)
997 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
998 struct drm_device
*dev
= node
->minor
->dev
;
999 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1003 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1007 for (i
= 1; i
<= 32; i
++) {
1008 inttoext
= I915_READ(INTTOEXT_BASE_ILK
+ i
* 4);
1009 seq_printf(m
, "INTTOEXT%02d: 0x%08x\n", i
, inttoext
);
1012 mutex_unlock(&dev
->struct_mutex
);
1017 static int ironlake_drpc_info(struct seq_file
*m
)
1019 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1020 struct drm_device
*dev
= node
->minor
->dev
;
1021 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1022 u32 rgvmodectl
, rstdbyctl
;
1026 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1030 rgvmodectl
= I915_READ(MEMMODECTL
);
1031 rstdbyctl
= I915_READ(RSTDBYCTL
);
1032 crstandvid
= I915_READ16(CRSTANDVID
);
1034 mutex_unlock(&dev
->struct_mutex
);
1036 seq_printf(m
, "HD boost: %s\n", (rgvmodectl
& MEMMODE_BOOST_EN
) ?
1038 seq_printf(m
, "Boost freq: %d\n",
1039 (rgvmodectl
& MEMMODE_BOOST_FREQ_MASK
) >>
1040 MEMMODE_BOOST_FREQ_SHIFT
);
1041 seq_printf(m
, "HW control enabled: %s\n",
1042 rgvmodectl
& MEMMODE_HWIDLE_EN
? "yes" : "no");
1043 seq_printf(m
, "SW control enabled: %s\n",
1044 rgvmodectl
& MEMMODE_SWMODE_EN
? "yes" : "no");
1045 seq_printf(m
, "Gated voltage change: %s\n",
1046 rgvmodectl
& MEMMODE_RCLK_GATE
? "yes" : "no");
1047 seq_printf(m
, "Starting frequency: P%d\n",
1048 (rgvmodectl
& MEMMODE_FSTART_MASK
) >> MEMMODE_FSTART_SHIFT
);
1049 seq_printf(m
, "Max P-state: P%d\n",
1050 (rgvmodectl
& MEMMODE_FMAX_MASK
) >> MEMMODE_FMAX_SHIFT
);
1051 seq_printf(m
, "Min P-state: P%d\n", (rgvmodectl
& MEMMODE_FMIN_MASK
));
1052 seq_printf(m
, "RS1 VID: %d\n", (crstandvid
& 0x3f));
1053 seq_printf(m
, "RS2 VID: %d\n", ((crstandvid
>> 8) & 0x3f));
1054 seq_printf(m
, "Render standby enabled: %s\n",
1055 (rstdbyctl
& RCX_SW_EXIT
) ? "no" : "yes");
1056 seq_puts(m
, "Current RS state: ");
1057 switch (rstdbyctl
& RSX_STATUS_MASK
) {
1059 seq_puts(m
, "on\n");
1061 case RSX_STATUS_RC1
:
1062 seq_puts(m
, "RC1\n");
1064 case RSX_STATUS_RC1E
:
1065 seq_puts(m
, "RC1E\n");
1067 case RSX_STATUS_RS1
:
1068 seq_puts(m
, "RS1\n");
1070 case RSX_STATUS_RS2
:
1071 seq_puts(m
, "RS2 (RC6)\n");
1073 case RSX_STATUS_RS3
:
1074 seq_puts(m
, "RC3 (RC6+)\n");
1077 seq_puts(m
, "unknown\n");
1084 static int gen6_drpc_info(struct seq_file
*m
)
1087 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1088 struct drm_device
*dev
= node
->minor
->dev
;
1089 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1090 u32 rpmodectl1
, gt_core_status
, rcctl1
, rc6vids
= 0;
1091 unsigned forcewake_count
;
1094 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1098 spin_lock_irq(&dev_priv
->uncore
.lock
);
1099 forcewake_count
= dev_priv
->uncore
.forcewake_count
;
1100 spin_unlock_irq(&dev_priv
->uncore
.lock
);
1102 if (forcewake_count
) {
1103 seq_puts(m
, "RC information inaccurate because somebody "
1104 "holds a forcewake reference \n");
1106 /* NB: we cannot use forcewake, else we read the wrong values */
1107 while (count
++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK
) & 1))
1109 seq_printf(m
, "RC information accurate: %s\n", yesno(count
< 51));
1112 gt_core_status
= readl(dev_priv
->regs
+ GEN6_GT_CORE_STATUS
);
1113 trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS
, gt_core_status
, 4, true);
1115 rpmodectl1
= I915_READ(GEN6_RP_CONTROL
);
1116 rcctl1
= I915_READ(GEN6_RC_CONTROL
);
1117 mutex_unlock(&dev
->struct_mutex
);
1118 mutex_lock(&dev_priv
->rps
.hw_lock
);
1119 sandybridge_pcode_read(dev_priv
, GEN6_PCODE_READ_RC6VIDS
, &rc6vids
);
1120 mutex_unlock(&dev_priv
->rps
.hw_lock
);
1122 seq_printf(m
, "Video Turbo Mode: %s\n",
1123 yesno(rpmodectl1
& GEN6_RP_MEDIA_TURBO
));
1124 seq_printf(m
, "HW control enabled: %s\n",
1125 yesno(rpmodectl1
& GEN6_RP_ENABLE
));
1126 seq_printf(m
, "SW control enabled: %s\n",
1127 yesno((rpmodectl1
& GEN6_RP_MEDIA_MODE_MASK
) ==
1128 GEN6_RP_MEDIA_SW_MODE
));
1129 seq_printf(m
, "RC1e Enabled: %s\n",
1130 yesno(rcctl1
& GEN6_RC_CTL_RC1e_ENABLE
));
1131 seq_printf(m
, "RC6 Enabled: %s\n",
1132 yesno(rcctl1
& GEN6_RC_CTL_RC6_ENABLE
));
1133 seq_printf(m
, "Deep RC6 Enabled: %s\n",
1134 yesno(rcctl1
& GEN6_RC_CTL_RC6p_ENABLE
));
1135 seq_printf(m
, "Deepest RC6 Enabled: %s\n",
1136 yesno(rcctl1
& GEN6_RC_CTL_RC6pp_ENABLE
));
1137 seq_puts(m
, "Current RC state: ");
1138 switch (gt_core_status
& GEN6_RCn_MASK
) {
1140 if (gt_core_status
& GEN6_CORE_CPD_STATE_MASK
)
1141 seq_puts(m
, "Core Power Down\n");
1143 seq_puts(m
, "on\n");
1146 seq_puts(m
, "RC3\n");
1149 seq_puts(m
, "RC6\n");
1152 seq_puts(m
, "RC7\n");
1155 seq_puts(m
, "Unknown\n");
1159 seq_printf(m
, "Core Power Down: %s\n",
1160 yesno(gt_core_status
& GEN6_CORE_CPD_STATE_MASK
));
1162 /* Not exactly sure what this is */
1163 seq_printf(m
, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1164 I915_READ(GEN6_GT_GFX_RC6_LOCKED
));
1165 seq_printf(m
, "RC6 residency since boot: %u\n",
1166 I915_READ(GEN6_GT_GFX_RC6
));
1167 seq_printf(m
, "RC6+ residency since boot: %u\n",
1168 I915_READ(GEN6_GT_GFX_RC6p
));
1169 seq_printf(m
, "RC6++ residency since boot: %u\n",
1170 I915_READ(GEN6_GT_GFX_RC6pp
));
1172 seq_printf(m
, "RC6 voltage: %dmV\n",
1173 GEN6_DECODE_RC6_VID(((rc6vids
>> 0) & 0xff)));
1174 seq_printf(m
, "RC6+ voltage: %dmV\n",
1175 GEN6_DECODE_RC6_VID(((rc6vids
>> 8) & 0xff)));
1176 seq_printf(m
, "RC6++ voltage: %dmV\n",
1177 GEN6_DECODE_RC6_VID(((rc6vids
>> 16) & 0xff)));
1181 static int i915_drpc_info(struct seq_file
*m
, void *unused
)
1183 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1184 struct drm_device
*dev
= node
->minor
->dev
;
1186 if (IS_GEN6(dev
) || IS_GEN7(dev
))
1187 return gen6_drpc_info(m
);
1189 return ironlake_drpc_info(m
);
1192 static int i915_fbc_status(struct seq_file
*m
, void *unused
)
1194 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1195 struct drm_device
*dev
= node
->minor
->dev
;
1196 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1198 if (!I915_HAS_FBC(dev
)) {
1199 seq_puts(m
, "FBC unsupported on this chipset\n");
1203 if (intel_fbc_enabled(dev
)) {
1204 seq_puts(m
, "FBC enabled\n");
1206 seq_puts(m
, "FBC disabled: ");
1207 switch (dev_priv
->fbc
.no_fbc_reason
) {
1209 seq_puts(m
, "FBC actived, but currently disabled in hardware");
1211 case FBC_UNSUPPORTED
:
1212 seq_puts(m
, "unsupported by this chipset");
1215 seq_puts(m
, "no outputs");
1217 case FBC_STOLEN_TOO_SMALL
:
1218 seq_puts(m
, "not enough stolen memory");
1220 case FBC_UNSUPPORTED_MODE
:
1221 seq_puts(m
, "mode not supported");
1223 case FBC_MODE_TOO_LARGE
:
1224 seq_puts(m
, "mode too large");
1227 seq_puts(m
, "FBC unsupported on plane");
1230 seq_puts(m
, "scanout buffer not tiled");
1232 case FBC_MULTIPLE_PIPES
:
1233 seq_puts(m
, "multiple pipes are enabled");
1235 case FBC_MODULE_PARAM
:
1236 seq_puts(m
, "disabled per module param (default off)");
1238 case FBC_CHIP_DEFAULT
:
1239 seq_puts(m
, "disabled per chip default");
1242 seq_puts(m
, "unknown reason");
1249 static int i915_ips_status(struct seq_file
*m
, void *unused
)
1251 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1252 struct drm_device
*dev
= node
->minor
->dev
;
1253 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1255 if (!HAS_IPS(dev
)) {
1256 seq_puts(m
, "not supported\n");
1260 if (I915_READ(IPS_CTL
) & IPS_ENABLE
)
1261 seq_puts(m
, "enabled\n");
1263 seq_puts(m
, "disabled\n");
1268 static int i915_sr_status(struct seq_file
*m
, void *unused
)
1270 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1271 struct drm_device
*dev
= node
->minor
->dev
;
1272 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1273 bool sr_enabled
= false;
1275 if (HAS_PCH_SPLIT(dev
))
1276 sr_enabled
= I915_READ(WM1_LP_ILK
) & WM1_LP_SR_EN
;
1277 else if (IS_CRESTLINE(dev
) || IS_I945G(dev
) || IS_I945GM(dev
))
1278 sr_enabled
= I915_READ(FW_BLC_SELF
) & FW_BLC_SELF_EN
;
1279 else if (IS_I915GM(dev
))
1280 sr_enabled
= I915_READ(INSTPM
) & INSTPM_SELF_EN
;
1281 else if (IS_PINEVIEW(dev
))
1282 sr_enabled
= I915_READ(DSPFW3
) & PINEVIEW_SELF_REFRESH_EN
;
1284 seq_printf(m
, "self-refresh: %s\n",
1285 sr_enabled
? "enabled" : "disabled");
1290 static int i915_emon_status(struct seq_file
*m
, void *unused
)
1292 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1293 struct drm_device
*dev
= node
->minor
->dev
;
1294 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1295 unsigned long temp
, chipset
, gfx
;
1301 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1305 temp
= i915_mch_val(dev_priv
);
1306 chipset
= i915_chipset_val(dev_priv
);
1307 gfx
= i915_gfx_val(dev_priv
);
1308 mutex_unlock(&dev
->struct_mutex
);
1310 seq_printf(m
, "GMCH temp: %ld\n", temp
);
1311 seq_printf(m
, "Chipset power: %ld\n", chipset
);
1312 seq_printf(m
, "GFX power: %ld\n", gfx
);
1313 seq_printf(m
, "Total power: %ld\n", chipset
+ gfx
);
1318 static int i915_ring_freq_table(struct seq_file
*m
, void *unused
)
1320 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1321 struct drm_device
*dev
= node
->minor
->dev
;
1322 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1324 int gpu_freq
, ia_freq
;
1326 if (!(IS_GEN6(dev
) || IS_GEN7(dev
))) {
1327 seq_puts(m
, "unsupported on this chipset\n");
1331 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
1335 seq_puts(m
, "GPU freq (MHz)\tEffective CPU freq (MHz)\tEffective Ring freq (MHz)\n");
1337 for (gpu_freq
= dev_priv
->rps
.min_delay
;
1338 gpu_freq
<= dev_priv
->rps
.max_delay
;
1341 sandybridge_pcode_read(dev_priv
,
1342 GEN6_PCODE_READ_MIN_FREQ_TABLE
,
1344 seq_printf(m
, "%d\t\t%d\t\t\t\t%d\n",
1345 gpu_freq
* GT_FREQUENCY_MULTIPLIER
,
1346 ((ia_freq
>> 0) & 0xff) * 100,
1347 ((ia_freq
>> 8) & 0xff) * 100);
1350 mutex_unlock(&dev_priv
->rps
.hw_lock
);
1355 static int i915_gfxec(struct seq_file
*m
, void *unused
)
1357 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1358 struct drm_device
*dev
= node
->minor
->dev
;
1359 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1362 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1366 seq_printf(m
, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1368 mutex_unlock(&dev
->struct_mutex
);
1373 static int i915_opregion(struct seq_file
*m
, void *unused
)
1375 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1376 struct drm_device
*dev
= node
->minor
->dev
;
1377 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1378 struct intel_opregion
*opregion
= &dev_priv
->opregion
;
1379 void *data
= kmalloc(OPREGION_SIZE
, GFP_KERNEL
);
1385 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1389 if (opregion
->header
) {
1390 memcpy_fromio(data
, opregion
->header
, OPREGION_SIZE
);
1391 seq_write(m
, data
, OPREGION_SIZE
);
1394 mutex_unlock(&dev
->struct_mutex
);
1401 static int i915_gem_framebuffer_info(struct seq_file
*m
, void *data
)
1403 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1404 struct drm_device
*dev
= node
->minor
->dev
;
1405 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1406 struct intel_fbdev
*ifbdev
;
1407 struct intel_framebuffer
*fb
;
1410 ret
= mutex_lock_interruptible(&dev
->mode_config
.mutex
);
1414 ifbdev
= dev_priv
->fbdev
;
1415 fb
= to_intel_framebuffer(ifbdev
->helper
.fb
);
1417 seq_printf(m
, "fbcon size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1421 fb
->base
.bits_per_pixel
,
1422 atomic_read(&fb
->base
.refcount
.refcount
));
1423 describe_obj(m
, fb
->obj
);
1425 mutex_unlock(&dev
->mode_config
.mutex
);
1427 mutex_lock(&dev
->mode_config
.fb_lock
);
1428 list_for_each_entry(fb
, &dev
->mode_config
.fb_list
, base
.head
) {
1429 if (&fb
->base
== ifbdev
->helper
.fb
)
1432 seq_printf(m
, "user size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1436 fb
->base
.bits_per_pixel
,
1437 atomic_read(&fb
->base
.refcount
.refcount
));
1438 describe_obj(m
, fb
->obj
);
1441 mutex_unlock(&dev
->mode_config
.fb_lock
);
1446 static int i915_context_status(struct seq_file
*m
, void *unused
)
1448 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1449 struct drm_device
*dev
= node
->minor
->dev
;
1450 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1451 struct intel_ring_buffer
*ring
;
1452 struct i915_hw_context
*ctx
;
1455 ret
= mutex_lock_interruptible(&dev
->mode_config
.mutex
);
1459 if (dev_priv
->ips
.pwrctx
) {
1460 seq_puts(m
, "power context ");
1461 describe_obj(m
, dev_priv
->ips
.pwrctx
);
1465 if (dev_priv
->ips
.renderctx
) {
1466 seq_puts(m
, "render context ");
1467 describe_obj(m
, dev_priv
->ips
.renderctx
);
1471 list_for_each_entry(ctx
, &dev_priv
->context_list
, link
) {
1472 seq_puts(m
, "HW context ");
1473 describe_ctx(m
, ctx
);
1474 for_each_ring(ring
, dev_priv
, i
)
1475 if (ring
->default_context
== ctx
)
1476 seq_printf(m
, "(default context %s) ", ring
->name
);
1478 describe_obj(m
, ctx
->obj
);
1482 mutex_unlock(&dev
->mode_config
.mutex
);
1487 static int i915_gen6_forcewake_count_info(struct seq_file
*m
, void *data
)
1489 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1490 struct drm_device
*dev
= node
->minor
->dev
;
1491 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1492 unsigned forcewake_count
;
1494 spin_lock_irq(&dev_priv
->uncore
.lock
);
1495 forcewake_count
= dev_priv
->uncore
.forcewake_count
;
1496 spin_unlock_irq(&dev_priv
->uncore
.lock
);
1498 seq_printf(m
, "forcewake count = %u\n", forcewake_count
);
1503 static const char *swizzle_string(unsigned swizzle
)
1506 case I915_BIT_6_SWIZZLE_NONE
:
1508 case I915_BIT_6_SWIZZLE_9
:
1510 case I915_BIT_6_SWIZZLE_9_10
:
1511 return "bit9/bit10";
1512 case I915_BIT_6_SWIZZLE_9_11
:
1513 return "bit9/bit11";
1514 case I915_BIT_6_SWIZZLE_9_10_11
:
1515 return "bit9/bit10/bit11";
1516 case I915_BIT_6_SWIZZLE_9_17
:
1517 return "bit9/bit17";
1518 case I915_BIT_6_SWIZZLE_9_10_17
:
1519 return "bit9/bit10/bit17";
1520 case I915_BIT_6_SWIZZLE_UNKNOWN
:
1527 static int i915_swizzle_info(struct seq_file
*m
, void *data
)
1529 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1530 struct drm_device
*dev
= node
->minor
->dev
;
1531 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1534 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1538 seq_printf(m
, "bit6 swizzle for X-tiling = %s\n",
1539 swizzle_string(dev_priv
->mm
.bit_6_swizzle_x
));
1540 seq_printf(m
, "bit6 swizzle for Y-tiling = %s\n",
1541 swizzle_string(dev_priv
->mm
.bit_6_swizzle_y
));
1543 if (IS_GEN3(dev
) || IS_GEN4(dev
)) {
1544 seq_printf(m
, "DDC = 0x%08x\n",
1546 seq_printf(m
, "C0DRB3 = 0x%04x\n",
1547 I915_READ16(C0DRB3
));
1548 seq_printf(m
, "C1DRB3 = 0x%04x\n",
1549 I915_READ16(C1DRB3
));
1550 } else if (IS_GEN6(dev
) || IS_GEN7(dev
)) {
1551 seq_printf(m
, "MAD_DIMM_C0 = 0x%08x\n",
1552 I915_READ(MAD_DIMM_C0
));
1553 seq_printf(m
, "MAD_DIMM_C1 = 0x%08x\n",
1554 I915_READ(MAD_DIMM_C1
));
1555 seq_printf(m
, "MAD_DIMM_C2 = 0x%08x\n",
1556 I915_READ(MAD_DIMM_C2
));
1557 seq_printf(m
, "TILECTL = 0x%08x\n",
1558 I915_READ(TILECTL
));
1559 seq_printf(m
, "ARB_MODE = 0x%08x\n",
1560 I915_READ(ARB_MODE
));
1561 seq_printf(m
, "DISP_ARB_CTL = 0x%08x\n",
1562 I915_READ(DISP_ARB_CTL
));
1564 mutex_unlock(&dev
->struct_mutex
);
1569 static int i915_ppgtt_info(struct seq_file
*m
, void *data
)
1571 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1572 struct drm_device
*dev
= node
->minor
->dev
;
1573 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1574 struct intel_ring_buffer
*ring
;
1578 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1581 if (INTEL_INFO(dev
)->gen
== 6)
1582 seq_printf(m
, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE
));
1584 for_each_ring(ring
, dev_priv
, i
) {
1585 seq_printf(m
, "%s\n", ring
->name
);
1586 if (INTEL_INFO(dev
)->gen
== 7)
1587 seq_printf(m
, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring
)));
1588 seq_printf(m
, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring
)));
1589 seq_printf(m
, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring
)));
1590 seq_printf(m
, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring
)));
1592 if (dev_priv
->mm
.aliasing_ppgtt
) {
1593 struct i915_hw_ppgtt
*ppgtt
= dev_priv
->mm
.aliasing_ppgtt
;
1595 seq_puts(m
, "aliasing PPGTT:\n");
1596 seq_printf(m
, "pd gtt offset: 0x%08x\n", ppgtt
->pd_offset
);
1598 seq_printf(m
, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK
));
1599 mutex_unlock(&dev
->struct_mutex
);
1604 static int i915_dpio_info(struct seq_file
*m
, void *data
)
1606 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1607 struct drm_device
*dev
= node
->minor
->dev
;
1608 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1612 if (!IS_VALLEYVIEW(dev
)) {
1613 seq_puts(m
, "unsupported\n");
1617 ret
= mutex_lock_interruptible(&dev_priv
->dpio_lock
);
1621 seq_printf(m
, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL
));
1623 seq_printf(m
, "DPIO_DIV_A: 0x%08x\n",
1624 vlv_dpio_read(dev_priv
, PIPE_A
, _DPIO_DIV_A
));
1625 seq_printf(m
, "DPIO_DIV_B: 0x%08x\n",
1626 vlv_dpio_read(dev_priv
, PIPE_A
, _DPIO_DIV_B
));
1628 seq_printf(m
, "DPIO_REFSFR_A: 0x%08x\n",
1629 vlv_dpio_read(dev_priv
, PIPE_A
, _DPIO_REFSFR_A
));
1630 seq_printf(m
, "DPIO_REFSFR_B: 0x%08x\n",
1631 vlv_dpio_read(dev_priv
, PIPE_A
, _DPIO_REFSFR_B
));
1633 seq_printf(m
, "DPIO_CORE_CLK_A: 0x%08x\n",
1634 vlv_dpio_read(dev_priv
, PIPE_A
, _DPIO_CORE_CLK_A
));
1635 seq_printf(m
, "DPIO_CORE_CLK_B: 0x%08x\n",
1636 vlv_dpio_read(dev_priv
, PIPE_A
, _DPIO_CORE_CLK_B
));
1638 seq_printf(m
, "DPIO_LPF_COEFF_A: 0x%08x\n",
1639 vlv_dpio_read(dev_priv
, PIPE_A
, _DPIO_LPF_COEFF_A
));
1640 seq_printf(m
, "DPIO_LPF_COEFF_B: 0x%08x\n",
1641 vlv_dpio_read(dev_priv
, PIPE_A
, _DPIO_LPF_COEFF_B
));
1643 seq_printf(m
, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1644 vlv_dpio_read(dev_priv
, PIPE_A
, DPIO_FASTCLK_DISABLE
));
1646 mutex_unlock(&dev_priv
->dpio_lock
);
1651 static int i915_llc(struct seq_file
*m
, void *data
)
1653 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1654 struct drm_device
*dev
= node
->minor
->dev
;
1655 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1657 /* Size calculation for LLC is a bit of a pain. Ignore for now. */
1658 seq_printf(m
, "LLC: %s\n", yesno(HAS_LLC(dev
)));
1659 seq_printf(m
, "eLLC: %zuMB\n", dev_priv
->ellc_size
);
1664 static int i915_edp_psr_status(struct seq_file
*m
, void *data
)
1666 struct drm_info_node
*node
= m
->private;
1667 struct drm_device
*dev
= node
->minor
->dev
;
1668 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1669 u32 psrstat
, psrperf
;
1671 if (!HAS_PSR(dev
)) {
1672 seq_puts(m
, "PSR not supported on this platform\n");
1673 } else if (HAS_PSR(dev
) &&
1674 I915_READ(EDP_PSR_CTL(dev
)) & EDP_PSR_ENABLE
) {
1675 seq_puts(m
, "PSR enabled\n");
1677 seq_puts(m
, "PSR disabled: ");
1678 switch (dev_priv
->no_psr_reason
) {
1680 seq_puts(m
, "not supported on this platform");
1683 seq_puts(m
, "not supported by panel");
1685 case PSR_MODULE_PARAM
:
1686 seq_puts(m
, "disabled by flag");
1688 case PSR_CRTC_NOT_ACTIVE
:
1689 seq_puts(m
, "crtc not active");
1691 case PSR_PWR_WELL_ENABLED
:
1692 seq_puts(m
, "power well enabled");
1695 seq_puts(m
, "not tiled");
1697 case PSR_SPRITE_ENABLED
:
1698 seq_puts(m
, "sprite enabled");
1700 case PSR_S3D_ENABLED
:
1701 seq_puts(m
, "stereo 3d enabled");
1703 case PSR_INTERLACED_ENABLED
:
1704 seq_puts(m
, "interlaced enabled");
1706 case PSR_HSW_NOT_DDIA
:
1707 seq_puts(m
, "HSW ties PSR to DDI A (eDP)");
1710 seq_puts(m
, "unknown reason");
1716 psrstat
= I915_READ(EDP_PSR_STATUS_CTL(dev
));
1718 seq_puts(m
, "PSR Current State: ");
1719 switch (psrstat
& EDP_PSR_STATUS_STATE_MASK
) {
1720 case EDP_PSR_STATUS_STATE_IDLE
:
1721 seq_puts(m
, "Reset state\n");
1723 case EDP_PSR_STATUS_STATE_SRDONACK
:
1724 seq_puts(m
, "Wait for TG/Stream to send on frame of data after SRD conditions are met\n");
1726 case EDP_PSR_STATUS_STATE_SRDENT
:
1727 seq_puts(m
, "SRD entry\n");
1729 case EDP_PSR_STATUS_STATE_BUFOFF
:
1730 seq_puts(m
, "Wait for buffer turn off\n");
1732 case EDP_PSR_STATUS_STATE_BUFON
:
1733 seq_puts(m
, "Wait for buffer turn on\n");
1735 case EDP_PSR_STATUS_STATE_AUXACK
:
1736 seq_puts(m
, "Wait for AUX to acknowledge on SRD exit\n");
1738 case EDP_PSR_STATUS_STATE_SRDOFFACK
:
1739 seq_puts(m
, "Wait for TG/Stream to acknowledge the SRD VDM exit\n");
1742 seq_puts(m
, "Unknown\n");
1746 seq_puts(m
, "Link Status: ");
1747 switch (psrstat
& EDP_PSR_STATUS_LINK_MASK
) {
1748 case EDP_PSR_STATUS_LINK_FULL_OFF
:
1749 seq_puts(m
, "Link is fully off\n");
1751 case EDP_PSR_STATUS_LINK_FULL_ON
:
1752 seq_puts(m
, "Link is fully on\n");
1754 case EDP_PSR_STATUS_LINK_STANDBY
:
1755 seq_puts(m
, "Link is in standby\n");
1758 seq_puts(m
, "Unknown\n");
1762 seq_printf(m
, "PSR Entry Count: %u\n",
1763 psrstat
>> EDP_PSR_STATUS_COUNT_SHIFT
&
1764 EDP_PSR_STATUS_COUNT_MASK
);
1766 seq_printf(m
, "Max Sleep Timer Counter: %u\n",
1767 psrstat
>> EDP_PSR_STATUS_MAX_SLEEP_TIMER_SHIFT
&
1768 EDP_PSR_STATUS_MAX_SLEEP_TIMER_MASK
);
1770 seq_printf(m
, "Had AUX error: %s\n",
1771 yesno(psrstat
& EDP_PSR_STATUS_AUX_ERROR
));
1773 seq_printf(m
, "Sending AUX: %s\n",
1774 yesno(psrstat
& EDP_PSR_STATUS_AUX_SENDING
));
1776 seq_printf(m
, "Sending Idle: %s\n",
1777 yesno(psrstat
& EDP_PSR_STATUS_SENDING_IDLE
));
1779 seq_printf(m
, "Sending TP2 TP3: %s\n",
1780 yesno(psrstat
& EDP_PSR_STATUS_SENDING_TP2_TP3
));
1782 seq_printf(m
, "Sending TP1: %s\n",
1783 yesno(psrstat
& EDP_PSR_STATUS_SENDING_TP1
));
1785 seq_printf(m
, "Idle Count: %u\n",
1786 psrstat
& EDP_PSR_STATUS_IDLE_MASK
);
1788 psrperf
= (I915_READ(EDP_PSR_PERF_CNT(dev
))) & EDP_PSR_PERF_CNT_MASK
;
1789 seq_printf(m
, "Performance Counter: %u\n", psrperf
);
1794 static int i915_energy_uJ(struct seq_file
*m
, void *data
)
1796 struct drm_info_node
*node
= m
->private;
1797 struct drm_device
*dev
= node
->minor
->dev
;
1798 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1802 if (INTEL_INFO(dev
)->gen
< 6)
1805 rdmsrl(MSR_RAPL_POWER_UNIT
, power
);
1806 power
= (power
& 0x1f00) >> 8;
1807 units
= 1000000 / (1 << power
); /* convert to uJ */
1808 power
= I915_READ(MCH_SECP_NRG_STTS
);
1811 seq_printf(m
, "%llu", (long long unsigned)power
);
1816 static int i915_pc8_status(struct seq_file
*m
, void *unused
)
1818 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1819 struct drm_device
*dev
= node
->minor
->dev
;
1820 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1822 if (!IS_HASWELL(dev
)) {
1823 seq_puts(m
, "not supported\n");
1827 mutex_lock(&dev_priv
->pc8
.lock
);
1828 seq_printf(m
, "Requirements met: %s\n",
1829 yesno(dev_priv
->pc8
.requirements_met
));
1830 seq_printf(m
, "GPU idle: %s\n", yesno(dev_priv
->pc8
.gpu_idle
));
1831 seq_printf(m
, "Disable count: %d\n", dev_priv
->pc8
.disable_count
);
1832 seq_printf(m
, "IRQs disabled: %s\n",
1833 yesno(dev_priv
->pc8
.irqs_disabled
));
1834 seq_printf(m
, "Enabled: %s\n", yesno(dev_priv
->pc8
.enabled
));
1835 mutex_unlock(&dev_priv
->pc8
.lock
);
1841 i915_wedged_get(void *data
, u64
*val
)
1843 struct drm_device
*dev
= data
;
1844 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1846 *val
= atomic_read(&dev_priv
->gpu_error
.reset_counter
);
1852 i915_wedged_set(void *data
, u64 val
)
1854 struct drm_device
*dev
= data
;
1856 DRM_INFO("Manually setting wedged to %llu\n", val
);
1857 i915_handle_error(dev
, val
);
1862 DEFINE_SIMPLE_ATTRIBUTE(i915_wedged_fops
,
1863 i915_wedged_get
, i915_wedged_set
,
1867 i915_ring_stop_get(void *data
, u64
*val
)
1869 struct drm_device
*dev
= data
;
1870 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1872 *val
= dev_priv
->gpu_error
.stop_rings
;
1878 i915_ring_stop_set(void *data
, u64 val
)
1880 struct drm_device
*dev
= data
;
1881 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1884 DRM_DEBUG_DRIVER("Stopping rings 0x%08llx\n", val
);
1886 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1890 dev_priv
->gpu_error
.stop_rings
= val
;
1891 mutex_unlock(&dev
->struct_mutex
);
1896 DEFINE_SIMPLE_ATTRIBUTE(i915_ring_stop_fops
,
1897 i915_ring_stop_get
, i915_ring_stop_set
,
1900 #define DROP_UNBOUND 0x1
1901 #define DROP_BOUND 0x2
1902 #define DROP_RETIRE 0x4
1903 #define DROP_ACTIVE 0x8
1904 #define DROP_ALL (DROP_UNBOUND | \
1909 i915_drop_caches_get(void *data
, u64
*val
)
1917 i915_drop_caches_set(void *data
, u64 val
)
1919 struct drm_device
*dev
= data
;
1920 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1921 struct drm_i915_gem_object
*obj
, *next
;
1922 struct i915_address_space
*vm
;
1923 struct i915_vma
*vma
, *x
;
1926 DRM_DEBUG_DRIVER("Dropping caches: 0x%08llx\n", val
);
1928 /* No need to check and wait for gpu resets, only libdrm auto-restarts
1929 * on ioctls on -EAGAIN. */
1930 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1934 if (val
& DROP_ACTIVE
) {
1935 ret
= i915_gpu_idle(dev
);
1940 if (val
& (DROP_RETIRE
| DROP_ACTIVE
))
1941 i915_gem_retire_requests(dev
);
1943 if (val
& DROP_BOUND
) {
1944 list_for_each_entry(vm
, &dev_priv
->vm_list
, global_link
) {
1945 list_for_each_entry_safe(vma
, x
, &vm
->inactive_list
,
1947 if (vma
->obj
->pin_count
)
1950 ret
= i915_vma_unbind(vma
);
1957 if (val
& DROP_UNBOUND
) {
1958 list_for_each_entry_safe(obj
, next
, &dev_priv
->mm
.unbound_list
,
1960 if (obj
->pages_pin_count
== 0) {
1961 ret
= i915_gem_object_put_pages(obj
);
1968 mutex_unlock(&dev
->struct_mutex
);
1973 DEFINE_SIMPLE_ATTRIBUTE(i915_drop_caches_fops
,
1974 i915_drop_caches_get
, i915_drop_caches_set
,
1978 i915_max_freq_get(void *data
, u64
*val
)
1980 struct drm_device
*dev
= data
;
1981 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1984 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
1987 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
1991 if (IS_VALLEYVIEW(dev
))
1992 *val
= vlv_gpu_freq(dev_priv
->mem_freq
,
1993 dev_priv
->rps
.max_delay
);
1995 *val
= dev_priv
->rps
.max_delay
* GT_FREQUENCY_MULTIPLIER
;
1996 mutex_unlock(&dev_priv
->rps
.hw_lock
);
2002 i915_max_freq_set(void *data
, u64 val
)
2004 struct drm_device
*dev
= data
;
2005 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2008 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
2011 DRM_DEBUG_DRIVER("Manually setting max freq to %llu\n", val
);
2013 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
2018 * Turbo will still be enabled, but won't go above the set value.
2020 if (IS_VALLEYVIEW(dev
)) {
2021 val
= vlv_freq_opcode(dev_priv
->mem_freq
, val
);
2022 dev_priv
->rps
.max_delay
= val
;
2023 gen6_set_rps(dev
, val
);
2025 do_div(val
, GT_FREQUENCY_MULTIPLIER
);
2026 dev_priv
->rps
.max_delay
= val
;
2027 gen6_set_rps(dev
, val
);
2030 mutex_unlock(&dev_priv
->rps
.hw_lock
);
2035 DEFINE_SIMPLE_ATTRIBUTE(i915_max_freq_fops
,
2036 i915_max_freq_get
, i915_max_freq_set
,
2040 i915_min_freq_get(void *data
, u64
*val
)
2042 struct drm_device
*dev
= data
;
2043 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
2046 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
2049 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
2053 if (IS_VALLEYVIEW(dev
))
2054 *val
= vlv_gpu_freq(dev_priv
->mem_freq
,
2055 dev_priv
->rps
.min_delay
);
2057 *val
= dev_priv
->rps
.min_delay
* GT_FREQUENCY_MULTIPLIER
;
2058 mutex_unlock(&dev_priv
->rps
.hw_lock
);
2064 i915_min_freq_set(void *data
, u64 val
)
2066 struct drm_device
*dev
= data
;
2067 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2070 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
2073 DRM_DEBUG_DRIVER("Manually setting min freq to %llu\n", val
);
2075 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
2080 * Turbo will still be enabled, but won't go below the set value.
2082 if (IS_VALLEYVIEW(dev
)) {
2083 val
= vlv_freq_opcode(dev_priv
->mem_freq
, val
);
2084 dev_priv
->rps
.min_delay
= val
;
2085 valleyview_set_rps(dev
, val
);
2087 do_div(val
, GT_FREQUENCY_MULTIPLIER
);
2088 dev_priv
->rps
.min_delay
= val
;
2089 gen6_set_rps(dev
, val
);
2091 mutex_unlock(&dev_priv
->rps
.hw_lock
);
2096 DEFINE_SIMPLE_ATTRIBUTE(i915_min_freq_fops
,
2097 i915_min_freq_get
, i915_min_freq_set
,
2101 i915_cache_sharing_get(void *data
, u64
*val
)
2103 struct drm_device
*dev
= data
;
2104 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
2108 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
2111 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
2115 snpcr
= I915_READ(GEN6_MBCUNIT_SNPCR
);
2116 mutex_unlock(&dev_priv
->dev
->struct_mutex
);
2118 *val
= (snpcr
& GEN6_MBC_SNPCR_MASK
) >> GEN6_MBC_SNPCR_SHIFT
;
2124 i915_cache_sharing_set(void *data
, u64 val
)
2126 struct drm_device
*dev
= data
;
2127 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2130 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
2136 DRM_DEBUG_DRIVER("Manually setting uncore sharing to %llu\n", val
);
2138 /* Update the cache sharing policy here as well */
2139 snpcr
= I915_READ(GEN6_MBCUNIT_SNPCR
);
2140 snpcr
&= ~GEN6_MBC_SNPCR_MASK
;
2141 snpcr
|= (val
<< GEN6_MBC_SNPCR_SHIFT
);
2142 I915_WRITE(GEN6_MBCUNIT_SNPCR
, snpcr
);
2147 DEFINE_SIMPLE_ATTRIBUTE(i915_cache_sharing_fops
,
2148 i915_cache_sharing_get
, i915_cache_sharing_set
,
2151 /* As the drm_debugfs_init() routines are called before dev->dev_private is
2152 * allocated we need to hook into the minor for release. */
2154 drm_add_fake_info_node(struct drm_minor
*minor
,
2158 struct drm_info_node
*node
;
2160 node
= kmalloc(sizeof(*node
), GFP_KERNEL
);
2162 debugfs_remove(ent
);
2166 node
->minor
= minor
;
2168 node
->info_ent
= (void *) key
;
2170 mutex_lock(&minor
->debugfs_lock
);
2171 list_add(&node
->list
, &minor
->debugfs_list
);
2172 mutex_unlock(&minor
->debugfs_lock
);
2177 static int i915_forcewake_open(struct inode
*inode
, struct file
*file
)
2179 struct drm_device
*dev
= inode
->i_private
;
2180 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2182 if (INTEL_INFO(dev
)->gen
< 6)
2185 gen6_gt_force_wake_get(dev_priv
);
2190 static int i915_forcewake_release(struct inode
*inode
, struct file
*file
)
2192 struct drm_device
*dev
= inode
->i_private
;
2193 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2195 if (INTEL_INFO(dev
)->gen
< 6)
2198 gen6_gt_force_wake_put(dev_priv
);
2203 static const struct file_operations i915_forcewake_fops
= {
2204 .owner
= THIS_MODULE
,
2205 .open
= i915_forcewake_open
,
2206 .release
= i915_forcewake_release
,
2209 static int i915_forcewake_create(struct dentry
*root
, struct drm_minor
*minor
)
2211 struct drm_device
*dev
= minor
->dev
;
2214 ent
= debugfs_create_file("i915_forcewake_user",
2217 &i915_forcewake_fops
);
2219 return PTR_ERR(ent
);
2221 return drm_add_fake_info_node(minor
, ent
, &i915_forcewake_fops
);
2224 static int i915_debugfs_create(struct dentry
*root
,
2225 struct drm_minor
*minor
,
2227 const struct file_operations
*fops
)
2229 struct drm_device
*dev
= minor
->dev
;
2232 ent
= debugfs_create_file(name
,
2237 return PTR_ERR(ent
);
2239 return drm_add_fake_info_node(minor
, ent
, fops
);
2242 static struct drm_info_list i915_debugfs_list
[] = {
2243 {"i915_capabilities", i915_capabilities
, 0},
2244 {"i915_gem_objects", i915_gem_object_info
, 0},
2245 {"i915_gem_gtt", i915_gem_gtt_info
, 0},
2246 {"i915_gem_pinned", i915_gem_gtt_info
, 0, (void *) PINNED_LIST
},
2247 {"i915_gem_active", i915_gem_object_list_info
, 0, (void *) ACTIVE_LIST
},
2248 {"i915_gem_inactive", i915_gem_object_list_info
, 0, (void *) INACTIVE_LIST
},
2249 {"i915_gem_stolen", i915_gem_stolen_list_info
},
2250 {"i915_gem_pageflip", i915_gem_pageflip_info
, 0},
2251 {"i915_gem_request", i915_gem_request_info
, 0},
2252 {"i915_gem_seqno", i915_gem_seqno_info
, 0},
2253 {"i915_gem_fence_regs", i915_gem_fence_regs_info
, 0},
2254 {"i915_gem_interrupt", i915_interrupt_info
, 0},
2255 {"i915_gem_hws", i915_hws_info
, 0, (void *)RCS
},
2256 {"i915_gem_hws_blt", i915_hws_info
, 0, (void *)BCS
},
2257 {"i915_gem_hws_bsd", i915_hws_info
, 0, (void *)VCS
},
2258 {"i915_gem_hws_vebox", i915_hws_info
, 0, (void *)VECS
},
2259 {"i915_rstdby_delays", i915_rstdby_delays
, 0},
2260 {"i915_cur_delayinfo", i915_cur_delayinfo
, 0},
2261 {"i915_delayfreq_table", i915_delayfreq_table
, 0},
2262 {"i915_inttoext_table", i915_inttoext_table
, 0},
2263 {"i915_drpc_info", i915_drpc_info
, 0},
2264 {"i915_emon_status", i915_emon_status
, 0},
2265 {"i915_ring_freq_table", i915_ring_freq_table
, 0},
2266 {"i915_gfxec", i915_gfxec
, 0},
2267 {"i915_fbc_status", i915_fbc_status
, 0},
2268 {"i915_ips_status", i915_ips_status
, 0},
2269 {"i915_sr_status", i915_sr_status
, 0},
2270 {"i915_opregion", i915_opregion
, 0},
2271 {"i915_gem_framebuffer", i915_gem_framebuffer_info
, 0},
2272 {"i915_context_status", i915_context_status
, 0},
2273 {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info
, 0},
2274 {"i915_swizzle_info", i915_swizzle_info
, 0},
2275 {"i915_ppgtt_info", i915_ppgtt_info
, 0},
2276 {"i915_dpio", i915_dpio_info
, 0},
2277 {"i915_llc", i915_llc
, 0},
2278 {"i915_edp_psr_status", i915_edp_psr_status
, 0},
2279 {"i915_energy_uJ", i915_energy_uJ
, 0},
2280 {"i915_pc8_status", i915_pc8_status
, 0},
2282 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2284 static struct i915_debugfs_files
{
2286 const struct file_operations
*fops
;
2287 } i915_debugfs_files
[] = {
2288 {"i915_wedged", &i915_wedged_fops
},
2289 {"i915_max_freq", &i915_max_freq_fops
},
2290 {"i915_min_freq", &i915_min_freq_fops
},
2291 {"i915_cache_sharing", &i915_cache_sharing_fops
},
2292 {"i915_ring_stop", &i915_ring_stop_fops
},
2293 {"i915_gem_drop_caches", &i915_drop_caches_fops
},
2294 {"i915_error_state", &i915_error_state_fops
},
2295 {"i915_next_seqno", &i915_next_seqno_fops
},
2298 int i915_debugfs_init(struct drm_minor
*minor
)
2302 ret
= i915_forcewake_create(minor
->debugfs_root
, minor
);
2306 for (i
= 0; i
< ARRAY_SIZE(i915_debugfs_files
); i
++) {
2307 ret
= i915_debugfs_create(minor
->debugfs_root
, minor
,
2308 i915_debugfs_files
[i
].name
,
2309 i915_debugfs_files
[i
].fops
);
2314 return drm_debugfs_create_files(i915_debugfs_list
,
2315 I915_DEBUGFS_ENTRIES
,
2316 minor
->debugfs_root
, minor
);
2319 void i915_debugfs_cleanup(struct drm_minor
*minor
)
2323 drm_debugfs_remove_files(i915_debugfs_list
,
2324 I915_DEBUGFS_ENTRIES
, minor
);
2325 drm_debugfs_remove_files((struct drm_info_list
*) &i915_forcewake_fops
,
2327 for (i
= 0; i
< ARRAY_SIZE(i915_debugfs_files
); i
++) {
2328 struct drm_info_list
*info_list
=
2329 (struct drm_info_list
*) i915_debugfs_files
[i
].fops
;
2331 drm_debugfs_remove_files(info_list
, 1, minor
);
2335 #endif /* CONFIG_DEBUG_FS */