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drm/i915: tune Sandy Bridge DRPS constants
[deliverable/linux.git] / drivers / gpu / drm / i915 / i915_debugfs.c
1 /*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29 #include <linux/seq_file.h>
30 #include <linux/debugfs.h>
31 #include <linux/slab.h>
32 #include "drmP.h"
33 #include "drm.h"
34 #include "intel_drv.h"
35 #include "intel_ringbuffer.h"
36 #include "i915_drm.h"
37 #include "i915_drv.h"
38
39 #define DRM_I915_RING_DEBUG 1
40
41
42 #if defined(CONFIG_DEBUG_FS)
43
44 enum {
45 ACTIVE_LIST,
46 FLUSHING_LIST,
47 INACTIVE_LIST,
48 PINNED_LIST,
49 DEFERRED_FREE_LIST,
50 };
51
52 static const char *yesno(int v)
53 {
54 return v ? "yes" : "no";
55 }
56
57 static int i915_capabilities(struct seq_file *m, void *data)
58 {
59 struct drm_info_node *node = (struct drm_info_node *) m->private;
60 struct drm_device *dev = node->minor->dev;
61 const struct intel_device_info *info = INTEL_INFO(dev);
62
63 seq_printf(m, "gen: %d\n", info->gen);
64 #define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
65 B(is_mobile);
66 B(is_i85x);
67 B(is_i915g);
68 B(is_i945gm);
69 B(is_g33);
70 B(need_gfx_hws);
71 B(is_g4x);
72 B(is_pineview);
73 B(is_broadwater);
74 B(is_crestline);
75 B(has_fbc);
76 B(has_pipe_cxsr);
77 B(has_hotplug);
78 B(cursor_needs_physical);
79 B(has_overlay);
80 B(overlay_needs_physical);
81 B(supports_tv);
82 B(has_bsd_ring);
83 B(has_blt_ring);
84 #undef B
85
86 return 0;
87 }
88
89 static const char *get_pin_flag(struct drm_i915_gem_object *obj)
90 {
91 if (obj->user_pin_count > 0)
92 return "P";
93 else if (obj->pin_count > 0)
94 return "p";
95 else
96 return " ";
97 }
98
99 static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
100 {
101 switch (obj->tiling_mode) {
102 default:
103 case I915_TILING_NONE: return " ";
104 case I915_TILING_X: return "X";
105 case I915_TILING_Y: return "Y";
106 }
107 }
108
109 static const char *agp_type_str(int type)
110 {
111 switch (type) {
112 case 0: return " uncached";
113 case 1: return " snooped";
114 default: return "";
115 }
116 }
117
118 static void
119 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
120 {
121 seq_printf(m, "%p: %s%s %8zd %04x %04x %d %d%s%s%s",
122 &obj->base,
123 get_pin_flag(obj),
124 get_tiling_flag(obj),
125 obj->base.size,
126 obj->base.read_domains,
127 obj->base.write_domain,
128 obj->last_rendering_seqno,
129 obj->last_fenced_seqno,
130 agp_type_str(obj->agp_type == AGP_USER_CACHED_MEMORY),
131 obj->dirty ? " dirty" : "",
132 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
133 if (obj->base.name)
134 seq_printf(m, " (name: %d)", obj->base.name);
135 if (obj->fence_reg != I915_FENCE_REG_NONE)
136 seq_printf(m, " (fence: %d)", obj->fence_reg);
137 if (obj->gtt_space != NULL)
138 seq_printf(m, " (gtt offset: %08x, size: %08x)",
139 obj->gtt_offset, (unsigned int)obj->gtt_space->size);
140 if (obj->pin_mappable || obj->fault_mappable) {
141 char s[3], *t = s;
142 if (obj->pin_mappable)
143 *t++ = 'p';
144 if (obj->fault_mappable)
145 *t++ = 'f';
146 *t = '\0';
147 seq_printf(m, " (%s mappable)", s);
148 }
149 if (obj->ring != NULL)
150 seq_printf(m, " (%s)", obj->ring->name);
151 }
152
153 static int i915_gem_object_list_info(struct seq_file *m, void *data)
154 {
155 struct drm_info_node *node = (struct drm_info_node *) m->private;
156 uintptr_t list = (uintptr_t) node->info_ent->data;
157 struct list_head *head;
158 struct drm_device *dev = node->minor->dev;
159 drm_i915_private_t *dev_priv = dev->dev_private;
160 struct drm_i915_gem_object *obj;
161 size_t total_obj_size, total_gtt_size;
162 int count, ret;
163
164 ret = mutex_lock_interruptible(&dev->struct_mutex);
165 if (ret)
166 return ret;
167
168 switch (list) {
169 case ACTIVE_LIST:
170 seq_printf(m, "Active:\n");
171 head = &dev_priv->mm.active_list;
172 break;
173 case INACTIVE_LIST:
174 seq_printf(m, "Inactive:\n");
175 head = &dev_priv->mm.inactive_list;
176 break;
177 case PINNED_LIST:
178 seq_printf(m, "Pinned:\n");
179 head = &dev_priv->mm.pinned_list;
180 break;
181 case FLUSHING_LIST:
182 seq_printf(m, "Flushing:\n");
183 head = &dev_priv->mm.flushing_list;
184 break;
185 case DEFERRED_FREE_LIST:
186 seq_printf(m, "Deferred free:\n");
187 head = &dev_priv->mm.deferred_free_list;
188 break;
189 default:
190 mutex_unlock(&dev->struct_mutex);
191 return -EINVAL;
192 }
193
194 total_obj_size = total_gtt_size = count = 0;
195 list_for_each_entry(obj, head, mm_list) {
196 seq_printf(m, " ");
197 describe_obj(m, obj);
198 seq_printf(m, "\n");
199 total_obj_size += obj->base.size;
200 total_gtt_size += obj->gtt_space->size;
201 count++;
202 }
203 mutex_unlock(&dev->struct_mutex);
204
205 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
206 count, total_obj_size, total_gtt_size);
207 return 0;
208 }
209
210 #define count_objects(list, member) do { \
211 list_for_each_entry(obj, list, member) { \
212 size += obj->gtt_space->size; \
213 ++count; \
214 if (obj->map_and_fenceable) { \
215 mappable_size += obj->gtt_space->size; \
216 ++mappable_count; \
217 } \
218 } \
219 } while(0)
220
221 static int i915_gem_object_info(struct seq_file *m, void* data)
222 {
223 struct drm_info_node *node = (struct drm_info_node *) m->private;
224 struct drm_device *dev = node->minor->dev;
225 struct drm_i915_private *dev_priv = dev->dev_private;
226 u32 count, mappable_count;
227 size_t size, mappable_size;
228 struct drm_i915_gem_object *obj;
229 int ret;
230
231 ret = mutex_lock_interruptible(&dev->struct_mutex);
232 if (ret)
233 return ret;
234
235 seq_printf(m, "%u objects, %zu bytes\n",
236 dev_priv->mm.object_count,
237 dev_priv->mm.object_memory);
238
239 size = count = mappable_size = mappable_count = 0;
240 count_objects(&dev_priv->mm.gtt_list, gtt_list);
241 seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
242 count, mappable_count, size, mappable_size);
243
244 size = count = mappable_size = mappable_count = 0;
245 count_objects(&dev_priv->mm.active_list, mm_list);
246 count_objects(&dev_priv->mm.flushing_list, mm_list);
247 seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n",
248 count, mappable_count, size, mappable_size);
249
250 size = count = mappable_size = mappable_count = 0;
251 count_objects(&dev_priv->mm.pinned_list, mm_list);
252 seq_printf(m, " %u [%u] pinned objects, %zu [%zu] bytes\n",
253 count, mappable_count, size, mappable_size);
254
255 size = count = mappable_size = mappable_count = 0;
256 count_objects(&dev_priv->mm.inactive_list, mm_list);
257 seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n",
258 count, mappable_count, size, mappable_size);
259
260 size = count = mappable_size = mappable_count = 0;
261 count_objects(&dev_priv->mm.deferred_free_list, mm_list);
262 seq_printf(m, " %u [%u] freed objects, %zu [%zu] bytes\n",
263 count, mappable_count, size, mappable_size);
264
265 size = count = mappable_size = mappable_count = 0;
266 list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
267 if (obj->fault_mappable) {
268 size += obj->gtt_space->size;
269 ++count;
270 }
271 if (obj->pin_mappable) {
272 mappable_size += obj->gtt_space->size;
273 ++mappable_count;
274 }
275 }
276 seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
277 mappable_count, mappable_size);
278 seq_printf(m, "%u fault mappable objects, %zu bytes\n",
279 count, size);
280
281 seq_printf(m, "%zu [%zu] gtt total\n",
282 dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
283
284 mutex_unlock(&dev->struct_mutex);
285
286 return 0;
287 }
288
289 static int i915_gem_gtt_info(struct seq_file *m, void* data)
290 {
291 struct drm_info_node *node = (struct drm_info_node *) m->private;
292 struct drm_device *dev = node->minor->dev;
293 struct drm_i915_private *dev_priv = dev->dev_private;
294 struct drm_i915_gem_object *obj;
295 size_t total_obj_size, total_gtt_size;
296 int count, ret;
297
298 ret = mutex_lock_interruptible(&dev->struct_mutex);
299 if (ret)
300 return ret;
301
302 total_obj_size = total_gtt_size = count = 0;
303 list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
304 seq_printf(m, " ");
305 describe_obj(m, obj);
306 seq_printf(m, "\n");
307 total_obj_size += obj->base.size;
308 total_gtt_size += obj->gtt_space->size;
309 count++;
310 }
311
312 mutex_unlock(&dev->struct_mutex);
313
314 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
315 count, total_obj_size, total_gtt_size);
316
317 return 0;
318 }
319
320
321 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
322 {
323 struct drm_info_node *node = (struct drm_info_node *) m->private;
324 struct drm_device *dev = node->minor->dev;
325 unsigned long flags;
326 struct intel_crtc *crtc;
327
328 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
329 const char *pipe = crtc->pipe ? "B" : "A";
330 const char *plane = crtc->plane ? "B" : "A";
331 struct intel_unpin_work *work;
332
333 spin_lock_irqsave(&dev->event_lock, flags);
334 work = crtc->unpin_work;
335 if (work == NULL) {
336 seq_printf(m, "No flip due on pipe %s (plane %s)\n",
337 pipe, plane);
338 } else {
339 if (!work->pending) {
340 seq_printf(m, "Flip queued on pipe %s (plane %s)\n",
341 pipe, plane);
342 } else {
343 seq_printf(m, "Flip pending (waiting for vsync) on pipe %s (plane %s)\n",
344 pipe, plane);
345 }
346 if (work->enable_stall_check)
347 seq_printf(m, "Stall check enabled, ");
348 else
349 seq_printf(m, "Stall check waiting for page flip ioctl, ");
350 seq_printf(m, "%d prepares\n", work->pending);
351
352 if (work->old_fb_obj) {
353 struct drm_i915_gem_object *obj = work->old_fb_obj;
354 if (obj)
355 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
356 }
357 if (work->pending_flip_obj) {
358 struct drm_i915_gem_object *obj = work->pending_flip_obj;
359 if (obj)
360 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
361 }
362 }
363 spin_unlock_irqrestore(&dev->event_lock, flags);
364 }
365
366 return 0;
367 }
368
369 static int i915_gem_request_info(struct seq_file *m, void *data)
370 {
371 struct drm_info_node *node = (struct drm_info_node *) m->private;
372 struct drm_device *dev = node->minor->dev;
373 drm_i915_private_t *dev_priv = dev->dev_private;
374 struct drm_i915_gem_request *gem_request;
375 int ret, count;
376
377 ret = mutex_lock_interruptible(&dev->struct_mutex);
378 if (ret)
379 return ret;
380
381 count = 0;
382 if (!list_empty(&dev_priv->ring[RCS].request_list)) {
383 seq_printf(m, "Render requests:\n");
384 list_for_each_entry(gem_request,
385 &dev_priv->ring[RCS].request_list,
386 list) {
387 seq_printf(m, " %d @ %d\n",
388 gem_request->seqno,
389 (int) (jiffies - gem_request->emitted_jiffies));
390 }
391 count++;
392 }
393 if (!list_empty(&dev_priv->ring[VCS].request_list)) {
394 seq_printf(m, "BSD requests:\n");
395 list_for_each_entry(gem_request,
396 &dev_priv->ring[VCS].request_list,
397 list) {
398 seq_printf(m, " %d @ %d\n",
399 gem_request->seqno,
400 (int) (jiffies - gem_request->emitted_jiffies));
401 }
402 count++;
403 }
404 if (!list_empty(&dev_priv->ring[BCS].request_list)) {
405 seq_printf(m, "BLT requests:\n");
406 list_for_each_entry(gem_request,
407 &dev_priv->ring[BCS].request_list,
408 list) {
409 seq_printf(m, " %d @ %d\n",
410 gem_request->seqno,
411 (int) (jiffies - gem_request->emitted_jiffies));
412 }
413 count++;
414 }
415 mutex_unlock(&dev->struct_mutex);
416
417 if (count == 0)
418 seq_printf(m, "No requests\n");
419
420 return 0;
421 }
422
423 static void i915_ring_seqno_info(struct seq_file *m,
424 struct intel_ring_buffer *ring)
425 {
426 if (ring->get_seqno) {
427 seq_printf(m, "Current sequence (%s): %d\n",
428 ring->name, ring->get_seqno(ring));
429 seq_printf(m, "Waiter sequence (%s): %d\n",
430 ring->name, ring->waiting_seqno);
431 seq_printf(m, "IRQ sequence (%s): %d\n",
432 ring->name, ring->irq_seqno);
433 }
434 }
435
436 static int i915_gem_seqno_info(struct seq_file *m, void *data)
437 {
438 struct drm_info_node *node = (struct drm_info_node *) m->private;
439 struct drm_device *dev = node->minor->dev;
440 drm_i915_private_t *dev_priv = dev->dev_private;
441 int ret, i;
442
443 ret = mutex_lock_interruptible(&dev->struct_mutex);
444 if (ret)
445 return ret;
446
447 for (i = 0; i < I915_NUM_RINGS; i++)
448 i915_ring_seqno_info(m, &dev_priv->ring[i]);
449
450 mutex_unlock(&dev->struct_mutex);
451
452 return 0;
453 }
454
455
456 static int i915_interrupt_info(struct seq_file *m, void *data)
457 {
458 struct drm_info_node *node = (struct drm_info_node *) m->private;
459 struct drm_device *dev = node->minor->dev;
460 drm_i915_private_t *dev_priv = dev->dev_private;
461 int ret, i;
462
463 ret = mutex_lock_interruptible(&dev->struct_mutex);
464 if (ret)
465 return ret;
466
467 if (!HAS_PCH_SPLIT(dev)) {
468 seq_printf(m, "Interrupt enable: %08x\n",
469 I915_READ(IER));
470 seq_printf(m, "Interrupt identity: %08x\n",
471 I915_READ(IIR));
472 seq_printf(m, "Interrupt mask: %08x\n",
473 I915_READ(IMR));
474 seq_printf(m, "Pipe A stat: %08x\n",
475 I915_READ(PIPEASTAT));
476 seq_printf(m, "Pipe B stat: %08x\n",
477 I915_READ(PIPEBSTAT));
478 } else {
479 seq_printf(m, "North Display Interrupt enable: %08x\n",
480 I915_READ(DEIER));
481 seq_printf(m, "North Display Interrupt identity: %08x\n",
482 I915_READ(DEIIR));
483 seq_printf(m, "North Display Interrupt mask: %08x\n",
484 I915_READ(DEIMR));
485 seq_printf(m, "South Display Interrupt enable: %08x\n",
486 I915_READ(SDEIER));
487 seq_printf(m, "South Display Interrupt identity: %08x\n",
488 I915_READ(SDEIIR));
489 seq_printf(m, "South Display Interrupt mask: %08x\n",
490 I915_READ(SDEIMR));
491 seq_printf(m, "Graphics Interrupt enable: %08x\n",
492 I915_READ(GTIER));
493 seq_printf(m, "Graphics Interrupt identity: %08x\n",
494 I915_READ(GTIIR));
495 seq_printf(m, "Graphics Interrupt mask: %08x\n",
496 I915_READ(GTIMR));
497 }
498 seq_printf(m, "Interrupts received: %d\n",
499 atomic_read(&dev_priv->irq_received));
500 for (i = 0; i < I915_NUM_RINGS; i++) {
501 if (IS_GEN6(dev)) {
502 seq_printf(m, "Graphics Interrupt mask (%s): %08x\n",
503 dev_priv->ring[i].name,
504 I915_READ_IMR(&dev_priv->ring[i]));
505 }
506 i915_ring_seqno_info(m, &dev_priv->ring[i]);
507 }
508 mutex_unlock(&dev->struct_mutex);
509
510 return 0;
511 }
512
513 static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
514 {
515 struct drm_info_node *node = (struct drm_info_node *) m->private;
516 struct drm_device *dev = node->minor->dev;
517 drm_i915_private_t *dev_priv = dev->dev_private;
518 int i, ret;
519
520 ret = mutex_lock_interruptible(&dev->struct_mutex);
521 if (ret)
522 return ret;
523
524 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
525 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
526 for (i = 0; i < dev_priv->num_fence_regs; i++) {
527 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
528
529 seq_printf(m, "Fenced object[%2d] = ", i);
530 if (obj == NULL)
531 seq_printf(m, "unused");
532 else
533 describe_obj(m, obj);
534 seq_printf(m, "\n");
535 }
536
537 mutex_unlock(&dev->struct_mutex);
538 return 0;
539 }
540
541 static int i915_hws_info(struct seq_file *m, void *data)
542 {
543 struct drm_info_node *node = (struct drm_info_node *) m->private;
544 struct drm_device *dev = node->minor->dev;
545 drm_i915_private_t *dev_priv = dev->dev_private;
546 struct intel_ring_buffer *ring;
547 const volatile u32 __iomem *hws;
548 int i;
549
550 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
551 hws = (volatile u32 __iomem *)ring->status_page.page_addr;
552 if (hws == NULL)
553 return 0;
554
555 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
556 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
557 i * 4,
558 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
559 }
560 return 0;
561 }
562
563 static void i915_dump_object(struct seq_file *m,
564 struct io_mapping *mapping,
565 struct drm_i915_gem_object *obj)
566 {
567 int page, page_count, i;
568
569 page_count = obj->base.size / PAGE_SIZE;
570 for (page = 0; page < page_count; page++) {
571 u32 *mem = io_mapping_map_wc(mapping,
572 obj->gtt_offset + page * PAGE_SIZE);
573 for (i = 0; i < PAGE_SIZE; i += 4)
574 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
575 io_mapping_unmap(mem);
576 }
577 }
578
579 static int i915_batchbuffer_info(struct seq_file *m, void *data)
580 {
581 struct drm_info_node *node = (struct drm_info_node *) m->private;
582 struct drm_device *dev = node->minor->dev;
583 drm_i915_private_t *dev_priv = dev->dev_private;
584 struct drm_i915_gem_object *obj;
585 int ret;
586
587 ret = mutex_lock_interruptible(&dev->struct_mutex);
588 if (ret)
589 return ret;
590
591 list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) {
592 if (obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) {
593 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
594 i915_dump_object(m, dev_priv->mm.gtt_mapping, obj);
595 }
596 }
597
598 mutex_unlock(&dev->struct_mutex);
599 return 0;
600 }
601
602 static int i915_ringbuffer_data(struct seq_file *m, void *data)
603 {
604 struct drm_info_node *node = (struct drm_info_node *) m->private;
605 struct drm_device *dev = node->minor->dev;
606 drm_i915_private_t *dev_priv = dev->dev_private;
607 struct intel_ring_buffer *ring;
608 int ret;
609
610 ret = mutex_lock_interruptible(&dev->struct_mutex);
611 if (ret)
612 return ret;
613
614 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
615 if (!ring->obj) {
616 seq_printf(m, "No ringbuffer setup\n");
617 } else {
618 const u8 __iomem *virt = ring->virtual_start;
619 uint32_t off;
620
621 for (off = 0; off < ring->size; off += 4) {
622 uint32_t *ptr = (uint32_t *)(virt + off);
623 seq_printf(m, "%08x : %08x\n", off, *ptr);
624 }
625 }
626 mutex_unlock(&dev->struct_mutex);
627
628 return 0;
629 }
630
631 static int i915_ringbuffer_info(struct seq_file *m, void *data)
632 {
633 struct drm_info_node *node = (struct drm_info_node *) m->private;
634 struct drm_device *dev = node->minor->dev;
635 drm_i915_private_t *dev_priv = dev->dev_private;
636 struct intel_ring_buffer *ring;
637
638 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
639 if (ring->size == 0)
640 return 0;
641
642 seq_printf(m, "Ring %s:\n", ring->name);
643 seq_printf(m, " Head : %08x\n", I915_READ_HEAD(ring) & HEAD_ADDR);
644 seq_printf(m, " Tail : %08x\n", I915_READ_TAIL(ring) & TAIL_ADDR);
645 seq_printf(m, " Size : %08x\n", ring->size);
646 seq_printf(m, " Active : %08x\n", intel_ring_get_active_head(ring));
647 seq_printf(m, " NOPID : %08x\n", I915_READ_NOPID(ring));
648 if (IS_GEN6(dev)) {
649 seq_printf(m, " Sync 0 : %08x\n", I915_READ_SYNC_0(ring));
650 seq_printf(m, " Sync 1 : %08x\n", I915_READ_SYNC_1(ring));
651 }
652 seq_printf(m, " Control : %08x\n", I915_READ_CTL(ring));
653 seq_printf(m, " Start : %08x\n", I915_READ_START(ring));
654
655 return 0;
656 }
657
658 static const char *ring_str(int ring)
659 {
660 switch (ring) {
661 case RING_RENDER: return " render";
662 case RING_BSD: return " bsd";
663 case RING_BLT: return " blt";
664 default: return "";
665 }
666 }
667
668 static const char *pin_flag(int pinned)
669 {
670 if (pinned > 0)
671 return " P";
672 else if (pinned < 0)
673 return " p";
674 else
675 return "";
676 }
677
678 static const char *tiling_flag(int tiling)
679 {
680 switch (tiling) {
681 default:
682 case I915_TILING_NONE: return "";
683 case I915_TILING_X: return " X";
684 case I915_TILING_Y: return " Y";
685 }
686 }
687
688 static const char *dirty_flag(int dirty)
689 {
690 return dirty ? " dirty" : "";
691 }
692
693 static const char *purgeable_flag(int purgeable)
694 {
695 return purgeable ? " purgeable" : "";
696 }
697
698 static void print_error_buffers(struct seq_file *m,
699 const char *name,
700 struct drm_i915_error_buffer *err,
701 int count)
702 {
703 seq_printf(m, "%s [%d]:\n", name, count);
704
705 while (count--) {
706 seq_printf(m, " %08x %8u %04x %04x %08x%s%s%s%s%s%s",
707 err->gtt_offset,
708 err->size,
709 err->read_domains,
710 err->write_domain,
711 err->seqno,
712 pin_flag(err->pinned),
713 tiling_flag(err->tiling),
714 dirty_flag(err->dirty),
715 purgeable_flag(err->purgeable),
716 ring_str(err->ring),
717 agp_type_str(err->agp_type));
718
719 if (err->name)
720 seq_printf(m, " (name: %d)", err->name);
721 if (err->fence_reg != I915_FENCE_REG_NONE)
722 seq_printf(m, " (fence: %d)", err->fence_reg);
723
724 seq_printf(m, "\n");
725 err++;
726 }
727 }
728
729 static int i915_error_state(struct seq_file *m, void *unused)
730 {
731 struct drm_info_node *node = (struct drm_info_node *) m->private;
732 struct drm_device *dev = node->minor->dev;
733 drm_i915_private_t *dev_priv = dev->dev_private;
734 struct drm_i915_error_state *error;
735 unsigned long flags;
736 int i, page, offset, elt;
737
738 spin_lock_irqsave(&dev_priv->error_lock, flags);
739 if (!dev_priv->first_error) {
740 seq_printf(m, "no error state collected\n");
741 goto out;
742 }
743
744 error = dev_priv->first_error;
745
746 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
747 error->time.tv_usec);
748 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
749 seq_printf(m, "EIR: 0x%08x\n", error->eir);
750 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
751 if (INTEL_INFO(dev)->gen >= 6) {
752 seq_printf(m, "ERROR: 0x%08x\n", error->error);
753 seq_printf(m, "Blitter command stream:\n");
754 seq_printf(m, " ACTHD: 0x%08x\n", error->bcs_acthd);
755 seq_printf(m, " IPEIR: 0x%08x\n", error->bcs_ipeir);
756 seq_printf(m, " IPEHR: 0x%08x\n", error->bcs_ipehr);
757 seq_printf(m, " INSTDONE: 0x%08x\n", error->bcs_instdone);
758 seq_printf(m, " seqno: 0x%08x\n", error->bcs_seqno);
759 seq_printf(m, "Video (BSD) command stream:\n");
760 seq_printf(m, " ACTHD: 0x%08x\n", error->vcs_acthd);
761 seq_printf(m, " IPEIR: 0x%08x\n", error->vcs_ipeir);
762 seq_printf(m, " IPEHR: 0x%08x\n", error->vcs_ipehr);
763 seq_printf(m, " INSTDONE: 0x%08x\n", error->vcs_instdone);
764 seq_printf(m, " seqno: 0x%08x\n", error->vcs_seqno);
765 }
766 seq_printf(m, "Render command stream:\n");
767 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
768 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
769 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
770 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
771 if (INTEL_INFO(dev)->gen >= 4) {
772 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
773 seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
774 }
775 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
776 seq_printf(m, " seqno: 0x%08x\n", error->seqno);
777
778 for (i = 0; i < 16; i++)
779 seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
780
781 if (error->active_bo)
782 print_error_buffers(m, "Active",
783 error->active_bo,
784 error->active_bo_count);
785
786 if (error->pinned_bo)
787 print_error_buffers(m, "Pinned",
788 error->pinned_bo,
789 error->pinned_bo_count);
790
791 for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
792 if (error->batchbuffer[i]) {
793 struct drm_i915_error_object *obj = error->batchbuffer[i];
794
795 seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
796 dev_priv->ring[i].name,
797 obj->gtt_offset);
798 offset = 0;
799 for (page = 0; page < obj->page_count; page++) {
800 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
801 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
802 offset += 4;
803 }
804 }
805 }
806 }
807
808 if (error->ringbuffer) {
809 struct drm_i915_error_object *obj = error->ringbuffer;
810
811 seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
812 offset = 0;
813 for (page = 0; page < obj->page_count; page++) {
814 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
815 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
816 offset += 4;
817 }
818 }
819 }
820
821 if (error->overlay)
822 intel_overlay_print_error_state(m, error->overlay);
823
824 if (error->display)
825 intel_display_print_error_state(m, dev, error->display);
826
827 out:
828 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
829
830 return 0;
831 }
832
833 static int i915_rstdby_delays(struct seq_file *m, void *unused)
834 {
835 struct drm_info_node *node = (struct drm_info_node *) m->private;
836 struct drm_device *dev = node->minor->dev;
837 drm_i915_private_t *dev_priv = dev->dev_private;
838 u16 crstanddelay = I915_READ16(CRSTANDVID);
839
840 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
841
842 return 0;
843 }
844
845 static int i915_cur_delayinfo(struct seq_file *m, void *unused)
846 {
847 struct drm_info_node *node = (struct drm_info_node *) m->private;
848 struct drm_device *dev = node->minor->dev;
849 drm_i915_private_t *dev_priv = dev->dev_private;
850
851 if (IS_GEN5(dev)) {
852 u16 rgvswctl = I915_READ16(MEMSWCTL);
853 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
854
855 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
856 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
857 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
858 MEMSTAT_VID_SHIFT);
859 seq_printf(m, "Current P-state: %d\n",
860 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
861 } else if (IS_GEN6(dev)) {
862 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
863 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
864 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
865 u32 rpstat;
866 u32 rpupei, rpcurup, rpprevup;
867 u32 rpdownei, rpcurdown, rpprevdown;
868 int max_freq;
869
870 /* RPSTAT1 is in the GT power well */
871 __gen6_force_wake_get(dev_priv);
872
873 rpstat = I915_READ(GEN6_RPSTAT1);
874 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
875 rpcurup = I915_READ(GEN6_RP_CUR_UP);
876 rpprevup = I915_READ(GEN6_RP_PREV_UP);
877 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
878 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
879 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
880
881 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
882 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
883 seq_printf(m, "Render p-state ratio: %d\n",
884 (gt_perf_status & 0xff00) >> 8);
885 seq_printf(m, "Render p-state VID: %d\n",
886 gt_perf_status & 0xff);
887 seq_printf(m, "Render p-state limit: %d\n",
888 rp_state_limits & 0xff);
889 seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>
890 GEN6_CAGF_SHIFT) * 100);
891 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
892 GEN6_CURICONT_MASK);
893 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
894 GEN6_CURBSYTAVG_MASK);
895 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
896 GEN6_CURBSYTAVG_MASK);
897 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
898 GEN6_CURIAVG_MASK);
899 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
900 GEN6_CURBSYTAVG_MASK);
901 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
902 GEN6_CURBSYTAVG_MASK);
903
904 max_freq = (rp_state_cap & 0xff0000) >> 16;
905 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
906 max_freq * 100);
907
908 max_freq = (rp_state_cap & 0xff00) >> 8;
909 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
910 max_freq * 100);
911
912 max_freq = rp_state_cap & 0xff;
913 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
914 max_freq * 100);
915
916 __gen6_force_wake_put(dev_priv);
917 } else {
918 seq_printf(m, "no P-state info available\n");
919 }
920
921 return 0;
922 }
923
924 static int i915_delayfreq_table(struct seq_file *m, void *unused)
925 {
926 struct drm_info_node *node = (struct drm_info_node *) m->private;
927 struct drm_device *dev = node->minor->dev;
928 drm_i915_private_t *dev_priv = dev->dev_private;
929 u32 delayfreq;
930 int i;
931
932 for (i = 0; i < 16; i++) {
933 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
934 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
935 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
936 }
937
938 return 0;
939 }
940
941 static inline int MAP_TO_MV(int map)
942 {
943 return 1250 - (map * 25);
944 }
945
946 static int i915_inttoext_table(struct seq_file *m, void *unused)
947 {
948 struct drm_info_node *node = (struct drm_info_node *) m->private;
949 struct drm_device *dev = node->minor->dev;
950 drm_i915_private_t *dev_priv = dev->dev_private;
951 u32 inttoext;
952 int i;
953
954 for (i = 1; i <= 32; i++) {
955 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
956 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
957 }
958
959 return 0;
960 }
961
962 static int i915_drpc_info(struct seq_file *m, void *unused)
963 {
964 struct drm_info_node *node = (struct drm_info_node *) m->private;
965 struct drm_device *dev = node->minor->dev;
966 drm_i915_private_t *dev_priv = dev->dev_private;
967 u32 rgvmodectl = I915_READ(MEMMODECTL);
968 u32 rstdbyctl = I915_READ(RSTDBYCTL);
969 u16 crstandvid = I915_READ16(CRSTANDVID);
970
971 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
972 "yes" : "no");
973 seq_printf(m, "Boost freq: %d\n",
974 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
975 MEMMODE_BOOST_FREQ_SHIFT);
976 seq_printf(m, "HW control enabled: %s\n",
977 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
978 seq_printf(m, "SW control enabled: %s\n",
979 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
980 seq_printf(m, "Gated voltage change: %s\n",
981 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
982 seq_printf(m, "Starting frequency: P%d\n",
983 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
984 seq_printf(m, "Max P-state: P%d\n",
985 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
986 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
987 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
988 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
989 seq_printf(m, "Render standby enabled: %s\n",
990 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
991 seq_printf(m, "Current RS state: ");
992 switch (rstdbyctl & RSX_STATUS_MASK) {
993 case RSX_STATUS_ON:
994 seq_printf(m, "on\n");
995 break;
996 case RSX_STATUS_RC1:
997 seq_printf(m, "RC1\n");
998 break;
999 case RSX_STATUS_RC1E:
1000 seq_printf(m, "RC1E\n");
1001 break;
1002 case RSX_STATUS_RS1:
1003 seq_printf(m, "RS1\n");
1004 break;
1005 case RSX_STATUS_RS2:
1006 seq_printf(m, "RS2 (RC6)\n");
1007 break;
1008 case RSX_STATUS_RS3:
1009 seq_printf(m, "RC3 (RC6+)\n");
1010 break;
1011 default:
1012 seq_printf(m, "unknown\n");
1013 break;
1014 }
1015
1016 return 0;
1017 }
1018
1019 static int i915_fbc_status(struct seq_file *m, void *unused)
1020 {
1021 struct drm_info_node *node = (struct drm_info_node *) m->private;
1022 struct drm_device *dev = node->minor->dev;
1023 drm_i915_private_t *dev_priv = dev->dev_private;
1024
1025 if (!I915_HAS_FBC(dev)) {
1026 seq_printf(m, "FBC unsupported on this chipset\n");
1027 return 0;
1028 }
1029
1030 if (intel_fbc_enabled(dev)) {
1031 seq_printf(m, "FBC enabled\n");
1032 } else {
1033 seq_printf(m, "FBC disabled: ");
1034 switch (dev_priv->no_fbc_reason) {
1035 case FBC_NO_OUTPUT:
1036 seq_printf(m, "no outputs");
1037 break;
1038 case FBC_STOLEN_TOO_SMALL:
1039 seq_printf(m, "not enough stolen memory");
1040 break;
1041 case FBC_UNSUPPORTED_MODE:
1042 seq_printf(m, "mode not supported");
1043 break;
1044 case FBC_MODE_TOO_LARGE:
1045 seq_printf(m, "mode too large");
1046 break;
1047 case FBC_BAD_PLANE:
1048 seq_printf(m, "FBC unsupported on plane");
1049 break;
1050 case FBC_NOT_TILED:
1051 seq_printf(m, "scanout buffer not tiled");
1052 break;
1053 case FBC_MULTIPLE_PIPES:
1054 seq_printf(m, "multiple pipes are enabled");
1055 break;
1056 default:
1057 seq_printf(m, "unknown reason");
1058 }
1059 seq_printf(m, "\n");
1060 }
1061 return 0;
1062 }
1063
1064 static int i915_sr_status(struct seq_file *m, void *unused)
1065 {
1066 struct drm_info_node *node = (struct drm_info_node *) m->private;
1067 struct drm_device *dev = node->minor->dev;
1068 drm_i915_private_t *dev_priv = dev->dev_private;
1069 bool sr_enabled = false;
1070
1071 if (HAS_PCH_SPLIT(dev))
1072 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
1073 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
1074 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1075 else if (IS_I915GM(dev))
1076 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1077 else if (IS_PINEVIEW(dev))
1078 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1079
1080 seq_printf(m, "self-refresh: %s\n",
1081 sr_enabled ? "enabled" : "disabled");
1082
1083 return 0;
1084 }
1085
1086 static int i915_emon_status(struct seq_file *m, void *unused)
1087 {
1088 struct drm_info_node *node = (struct drm_info_node *) m->private;
1089 struct drm_device *dev = node->minor->dev;
1090 drm_i915_private_t *dev_priv = dev->dev_private;
1091 unsigned long temp, chipset, gfx;
1092 int ret;
1093
1094 ret = mutex_lock_interruptible(&dev->struct_mutex);
1095 if (ret)
1096 return ret;
1097
1098 temp = i915_mch_val(dev_priv);
1099 chipset = i915_chipset_val(dev_priv);
1100 gfx = i915_gfx_val(dev_priv);
1101 mutex_unlock(&dev->struct_mutex);
1102
1103 seq_printf(m, "GMCH temp: %ld\n", temp);
1104 seq_printf(m, "Chipset power: %ld\n", chipset);
1105 seq_printf(m, "GFX power: %ld\n", gfx);
1106 seq_printf(m, "Total power: %ld\n", chipset + gfx);
1107
1108 return 0;
1109 }
1110
1111 static int i915_gfxec(struct seq_file *m, void *unused)
1112 {
1113 struct drm_info_node *node = (struct drm_info_node *) m->private;
1114 struct drm_device *dev = node->minor->dev;
1115 drm_i915_private_t *dev_priv = dev->dev_private;
1116
1117 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1118
1119 return 0;
1120 }
1121
1122 static int i915_opregion(struct seq_file *m, void *unused)
1123 {
1124 struct drm_info_node *node = (struct drm_info_node *) m->private;
1125 struct drm_device *dev = node->minor->dev;
1126 drm_i915_private_t *dev_priv = dev->dev_private;
1127 struct intel_opregion *opregion = &dev_priv->opregion;
1128 int ret;
1129
1130 ret = mutex_lock_interruptible(&dev->struct_mutex);
1131 if (ret)
1132 return ret;
1133
1134 if (opregion->header)
1135 seq_write(m, opregion->header, OPREGION_SIZE);
1136
1137 mutex_unlock(&dev->struct_mutex);
1138
1139 return 0;
1140 }
1141
1142 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1143 {
1144 struct drm_info_node *node = (struct drm_info_node *) m->private;
1145 struct drm_device *dev = node->minor->dev;
1146 drm_i915_private_t *dev_priv = dev->dev_private;
1147 struct intel_fbdev *ifbdev;
1148 struct intel_framebuffer *fb;
1149 int ret;
1150
1151 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1152 if (ret)
1153 return ret;
1154
1155 ifbdev = dev_priv->fbdev;
1156 fb = to_intel_framebuffer(ifbdev->helper.fb);
1157
1158 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
1159 fb->base.width,
1160 fb->base.height,
1161 fb->base.depth,
1162 fb->base.bits_per_pixel);
1163 describe_obj(m, fb->obj);
1164 seq_printf(m, "\n");
1165
1166 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1167 if (&fb->base == ifbdev->helper.fb)
1168 continue;
1169
1170 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
1171 fb->base.width,
1172 fb->base.height,
1173 fb->base.depth,
1174 fb->base.bits_per_pixel);
1175 describe_obj(m, fb->obj);
1176 seq_printf(m, "\n");
1177 }
1178
1179 mutex_unlock(&dev->mode_config.mutex);
1180
1181 return 0;
1182 }
1183
1184 static int
1185 i915_wedged_open(struct inode *inode,
1186 struct file *filp)
1187 {
1188 filp->private_data = inode->i_private;
1189 return 0;
1190 }
1191
1192 static ssize_t
1193 i915_wedged_read(struct file *filp,
1194 char __user *ubuf,
1195 size_t max,
1196 loff_t *ppos)
1197 {
1198 struct drm_device *dev = filp->private_data;
1199 drm_i915_private_t *dev_priv = dev->dev_private;
1200 char buf[80];
1201 int len;
1202
1203 len = snprintf(buf, sizeof (buf),
1204 "wedged : %d\n",
1205 atomic_read(&dev_priv->mm.wedged));
1206
1207 if (len > sizeof (buf))
1208 len = sizeof (buf);
1209
1210 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1211 }
1212
1213 static ssize_t
1214 i915_wedged_write(struct file *filp,
1215 const char __user *ubuf,
1216 size_t cnt,
1217 loff_t *ppos)
1218 {
1219 struct drm_device *dev = filp->private_data;
1220 char buf[20];
1221 int val = 1;
1222
1223 if (cnt > 0) {
1224 if (cnt > sizeof (buf) - 1)
1225 return -EINVAL;
1226
1227 if (copy_from_user(buf, ubuf, cnt))
1228 return -EFAULT;
1229 buf[cnt] = 0;
1230
1231 val = simple_strtoul(buf, NULL, 0);
1232 }
1233
1234 DRM_INFO("Manually setting wedged to %d\n", val);
1235 i915_handle_error(dev, val);
1236
1237 return cnt;
1238 }
1239
1240 static const struct file_operations i915_wedged_fops = {
1241 .owner = THIS_MODULE,
1242 .open = i915_wedged_open,
1243 .read = i915_wedged_read,
1244 .write = i915_wedged_write,
1245 .llseek = default_llseek,
1246 };
1247
1248 /* As the drm_debugfs_init() routines are called before dev->dev_private is
1249 * allocated we need to hook into the minor for release. */
1250 static int
1251 drm_add_fake_info_node(struct drm_minor *minor,
1252 struct dentry *ent,
1253 const void *key)
1254 {
1255 struct drm_info_node *node;
1256
1257 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1258 if (node == NULL) {
1259 debugfs_remove(ent);
1260 return -ENOMEM;
1261 }
1262
1263 node->minor = minor;
1264 node->dent = ent;
1265 node->info_ent = (void *) key;
1266 list_add(&node->list, &minor->debugfs_nodes.list);
1267
1268 return 0;
1269 }
1270
1271 static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
1272 {
1273 struct drm_device *dev = minor->dev;
1274 struct dentry *ent;
1275
1276 ent = debugfs_create_file("i915_wedged",
1277 S_IRUGO | S_IWUSR,
1278 root, dev,
1279 &i915_wedged_fops);
1280 if (IS_ERR(ent))
1281 return PTR_ERR(ent);
1282
1283 return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
1284 }
1285
1286 static struct drm_info_list i915_debugfs_list[] = {
1287 {"i915_capabilities", i915_capabilities, 0},
1288 {"i915_gem_objects", i915_gem_object_info, 0},
1289 {"i915_gem_gtt", i915_gem_gtt_info, 0},
1290 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
1291 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
1292 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
1293 {"i915_gem_pinned", i915_gem_object_list_info, 0, (void *) PINNED_LIST},
1294 {"i915_gem_deferred_free", i915_gem_object_list_info, 0, (void *) DEFERRED_FREE_LIST},
1295 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
1296 {"i915_gem_request", i915_gem_request_info, 0},
1297 {"i915_gem_seqno", i915_gem_seqno_info, 0},
1298 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
1299 {"i915_gem_interrupt", i915_interrupt_info, 0},
1300 {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
1301 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
1302 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
1303 {"i915_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RCS},
1304 {"i915_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RCS},
1305 {"i915_bsd_ringbuffer_data", i915_ringbuffer_data, 0, (void *)VCS},
1306 {"i915_bsd_ringbuffer_info", i915_ringbuffer_info, 0, (void *)VCS},
1307 {"i915_blt_ringbuffer_data", i915_ringbuffer_data, 0, (void *)BCS},
1308 {"i915_blt_ringbuffer_info", i915_ringbuffer_info, 0, (void *)BCS},
1309 {"i915_batchbuffers", i915_batchbuffer_info, 0},
1310 {"i915_error_state", i915_error_state, 0},
1311 {"i915_rstdby_delays", i915_rstdby_delays, 0},
1312 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
1313 {"i915_delayfreq_table", i915_delayfreq_table, 0},
1314 {"i915_inttoext_table", i915_inttoext_table, 0},
1315 {"i915_drpc_info", i915_drpc_info, 0},
1316 {"i915_emon_status", i915_emon_status, 0},
1317 {"i915_gfxec", i915_gfxec, 0},
1318 {"i915_fbc_status", i915_fbc_status, 0},
1319 {"i915_sr_status", i915_sr_status, 0},
1320 {"i915_opregion", i915_opregion, 0},
1321 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
1322 };
1323 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
1324
1325 int i915_debugfs_init(struct drm_minor *minor)
1326 {
1327 int ret;
1328
1329 ret = i915_wedged_create(minor->debugfs_root, minor);
1330 if (ret)
1331 return ret;
1332
1333 return drm_debugfs_create_files(i915_debugfs_list,
1334 I915_DEBUGFS_ENTRIES,
1335 minor->debugfs_root, minor);
1336 }
1337
1338 void i915_debugfs_cleanup(struct drm_minor *minor)
1339 {
1340 drm_debugfs_remove_files(i915_debugfs_list,
1341 I915_DEBUGFS_ENTRIES, minor);
1342 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
1343 1, minor);
1344 }
1345
1346 #endif /* CONFIG_DEBUG_FS */
Linux kernel - Deliverables
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