drm/i915/context/: s/CTX/CXT
[deliverable/linux.git] / drivers / gpu / drm / i915 / i915_gem_context.c
1 /*
2 * Copyright © 2011-2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Ben Widawsky <ben@bwidawsk.net>
25 *
26 */
27
28 /*
29 * This file implements HW context support. On gen5+ a HW context consists of an
30 * opaque GPU object which is referenced at times of context saves and restores.
31 * With RC6 enabled, the context is also referenced as the GPU enters and exists
32 * from RC6 (GPU has it's own internal power context, except on gen5). Though
33 * something like a context does exist for the media ring, the code only
34 * supports contexts for the render ring.
35 *
36 * In software, there is a distinction between contexts created by the user,
37 * and the default HW context. The default HW context is used by GPU clients
38 * that do not request setup of their own hardware context. The default
39 * context's state is never restored to help prevent programming errors. This
40 * would happen if a client ran and piggy-backed off another clients GPU state.
41 * The default context only exists to give the GPU some offset to load as the
42 * current to invoke a save of the context we actually care about. In fact, the
43 * code could likely be constructed, albeit in a more complicated fashion, to
44 * never use the default context, though that limits the driver's ability to
45 * swap out, and/or destroy other contexts.
46 *
47 * All other contexts are created as a request by the GPU client. These contexts
48 * store GPU state, and thus allow GPU clients to not re-emit state (and
49 * potentially query certain state) at any time. The kernel driver makes
50 * certain that the appropriate commands are inserted.
51 *
52 * The context life cycle is semi-complicated in that context BOs may live
53 * longer than the context itself because of the way the hardware, and object
54 * tracking works. Below is a very crude representation of the state machine
55 * describing the context life.
56 * refcount pincount active
57 * S0: initial state 0 0 0
58 * S1: context created 1 0 0
59 * S2: context is currently running 2 1 X
60 * S3: GPU referenced, but not current 2 0 1
61 * S4: context is current, but destroyed 1 1 0
62 * S5: like S3, but destroyed 1 0 1
63 *
64 * The most common (but not all) transitions:
65 * S0->S1: client creates a context
66 * S1->S2: client submits execbuf with context
67 * S2->S3: other clients submits execbuf with context
68 * S3->S1: context object was retired
69 * S3->S2: clients submits another execbuf
70 * S2->S4: context destroy called with current context
71 * S3->S5->S0: destroy path
72 * S4->S5->S0: destroy path on current context
73 *
74 * There are two confusing terms used above:
75 * The "current context" means the context which is currently running on the
76 * GPU. The GPU has loaded it's state already and has stored away the gtt
77 * offset of the BO. The GPU is not actively referencing the data at this
78 * offset, but it will on the next context switch. The only way to avoid this
79 * is to do a GPU reset.
80 *
81 * An "active context' is one which was previously the "current context" and is
82 * on the active list waiting for the next context switch to occur. Until this
83 * happens, the object must remain at the same gtt offset. It is therefore
84 * possible to destroy a context, but it is still active.
85 *
86 */
87
88 #include "drmP.h"
89 #include "i915_drm.h"
90 #include "i915_drv.h"
91
92 /* This is a HW constraint. The value below is the largest known requirement
93 * I've seen in a spec to date, and that was a workaround for a non-shipping
94 * part. It should be safe to decrease this, but it's more future proof as is.
95 */
96 #define CONTEXT_ALIGN (64<<10)
97
98 static struct i915_hw_context *
99 i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
100 static int do_switch(struct drm_i915_gem_object *from_obj,
101 struct i915_hw_context *to, u32 seqno);
102
103 static int get_context_size(struct drm_device *dev)
104 {
105 struct drm_i915_private *dev_priv = dev->dev_private;
106 int ret;
107 u32 reg;
108
109 switch (INTEL_INFO(dev)->gen) {
110 case 6:
111 reg = I915_READ(CXT_SIZE);
112 ret = GEN6_CXT_TOTAL_SIZE(reg) * 64;
113 break;
114 case 7:
115 reg = I915_READ(GEN7_CXT_SIZE);
116 ret = GEN7_CXT_TOTAL_SIZE(reg) * 64;
117 break;
118 default:
119 BUG();
120 }
121
122 return ret;
123 }
124
125 static void do_destroy(struct i915_hw_context *ctx)
126 {
127 struct drm_device *dev = ctx->obj->base.dev;
128 struct drm_i915_private *dev_priv = dev->dev_private;
129
130 if (ctx->file_priv)
131 idr_remove(&ctx->file_priv->context_idr, ctx->id);
132 else
133 BUG_ON(ctx != dev_priv->ring[RCS].default_context);
134
135 drm_gem_object_unreference(&ctx->obj->base);
136 kfree(ctx);
137 }
138
139 static struct i915_hw_context *
140 create_hw_context(struct drm_device *dev,
141 struct drm_i915_file_private *file_priv)
142 {
143 struct drm_i915_private *dev_priv = dev->dev_private;
144 struct i915_hw_context *ctx;
145 int ret, id;
146
147 ctx = kzalloc(sizeof(struct drm_i915_file_private), GFP_KERNEL);
148 if (ctx == NULL)
149 return ERR_PTR(-ENOMEM);
150
151 ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
152 if (ctx->obj == NULL) {
153 kfree(ctx);
154 DRM_DEBUG_DRIVER("Context object allocated failed\n");
155 return ERR_PTR(-ENOMEM);
156 }
157
158 /* The ring associated with the context object is handled by the normal
159 * object tracking code. We give an initial ring value simple to pass an
160 * assertion in the context switch code.
161 */
162 ctx->ring = &dev_priv->ring[RCS];
163
164 /* Default context will never have a file_priv */
165 if (file_priv == NULL)
166 return ctx;
167
168 ctx->file_priv = file_priv;
169
170 again:
171 if (idr_pre_get(&file_priv->context_idr, GFP_KERNEL) == 0) {
172 ret = -ENOMEM;
173 DRM_DEBUG_DRIVER("idr allocation failed\n");
174 goto err_out;
175 }
176
177 ret = idr_get_new_above(&file_priv->context_idr, ctx,
178 DEFAULT_CONTEXT_ID + 1, &id);
179 if (ret == 0)
180 ctx->id = id;
181
182 if (ret == -EAGAIN)
183 goto again;
184 else if (ret)
185 goto err_out;
186
187 return ctx;
188
189 err_out:
190 do_destroy(ctx);
191 return ERR_PTR(ret);
192 }
193
194 static inline bool is_default_context(struct i915_hw_context *ctx)
195 {
196 return (ctx == ctx->ring->default_context);
197 }
198
199 /**
200 * The default context needs to exist per ring that uses contexts. It stores the
201 * context state of the GPU for applications that don't utilize HW contexts, as
202 * well as an idle case.
203 */
204 static int create_default_context(struct drm_i915_private *dev_priv)
205 {
206 struct i915_hw_context *ctx;
207 int ret;
208
209 BUG_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
210
211 ctx = create_hw_context(dev_priv->dev, NULL);
212 if (IS_ERR(ctx))
213 return PTR_ERR(ctx);
214
215 /* We may need to do things with the shrinker which require us to
216 * immediately switch back to the default context. This can cause a
217 * problem as pinning the default context also requires GTT space which
218 * may not be available. To avoid this we always pin the
219 * default context.
220 */
221 dev_priv->ring[RCS].default_context = ctx;
222 ret = i915_gem_object_pin(ctx->obj, CONTEXT_ALIGN, false);
223 if (ret) {
224 do_destroy(ctx);
225 return ret;
226 }
227
228 ret = do_switch(NULL, ctx, 0);
229 if (ret) {
230 i915_gem_object_unpin(ctx->obj);
231 do_destroy(ctx);
232 } else {
233 DRM_DEBUG_DRIVER("Default HW context loaded\n");
234 }
235
236 return ret;
237 }
238
239 void i915_gem_context_init(struct drm_device *dev)
240 {
241 struct drm_i915_private *dev_priv = dev->dev_private;
242 uint32_t ctx_size;
243
244 if (!HAS_HW_CONTEXTS(dev)) {
245 dev_priv->hw_contexts_disabled = true;
246 return;
247 }
248
249 /* If called from reset, or thaw... we've been here already */
250 if (dev_priv->hw_contexts_disabled ||
251 dev_priv->ring[RCS].default_context)
252 return;
253
254 ctx_size = get_context_size(dev);
255 dev_priv->hw_context_size = get_context_size(dev);
256 dev_priv->hw_context_size = round_up(dev_priv->hw_context_size, 4096);
257
258 if (ctx_size <= 0 || ctx_size > (1<<20)) {
259 dev_priv->hw_contexts_disabled = true;
260 return;
261 }
262
263 if (create_default_context(dev_priv)) {
264 dev_priv->hw_contexts_disabled = true;
265 return;
266 }
267
268 DRM_DEBUG_DRIVER("HW context support initialized\n");
269 }
270
271 void i915_gem_context_fini(struct drm_device *dev)
272 {
273 struct drm_i915_private *dev_priv = dev->dev_private;
274
275 if (dev_priv->hw_contexts_disabled)
276 return;
277
278 /* The only known way to stop the gpu from accessing the hw context is
279 * to reset it. Do this as the very last operation to avoid confusing
280 * other code, leading to spurious errors. */
281 intel_gpu_reset(dev);
282
283 i915_gem_object_unpin(dev_priv->ring[RCS].default_context->obj);
284
285 do_destroy(dev_priv->ring[RCS].default_context);
286 }
287
288 static int context_idr_cleanup(int id, void *p, void *data)
289 {
290 struct i915_hw_context *ctx = p;
291
292 BUG_ON(id == DEFAULT_CONTEXT_ID);
293
294 do_destroy(ctx);
295
296 return 0;
297 }
298
299 void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
300 {
301 struct drm_i915_file_private *file_priv = file->driver_priv;
302
303 mutex_lock(&dev->struct_mutex);
304 idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
305 idr_destroy(&file_priv->context_idr);
306 mutex_unlock(&dev->struct_mutex);
307 }
308
309 static struct i915_hw_context *
310 i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
311 {
312 return (struct i915_hw_context *)idr_find(&file_priv->context_idr, id);
313 }
314
315 static inline int
316 mi_set_context(struct intel_ring_buffer *ring,
317 struct i915_hw_context *new_context,
318 u32 hw_flags)
319 {
320 int ret;
321
322 /* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB
323 * invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value
324 * explicitly, so we rely on the value at ring init, stored in
325 * itlb_before_ctx_switch.
326 */
327 if (IS_GEN6(ring->dev) && ring->itlb_before_ctx_switch) {
328 ret = ring->flush(ring, 0, 0);
329 if (ret)
330 return ret;
331 }
332
333 ret = intel_ring_begin(ring, 6);
334 if (ret)
335 return ret;
336
337 if (IS_GEN7(ring->dev))
338 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE);
339 else
340 intel_ring_emit(ring, MI_NOOP);
341
342 intel_ring_emit(ring, MI_NOOP);
343 intel_ring_emit(ring, MI_SET_CONTEXT);
344 intel_ring_emit(ring, new_context->obj->gtt_offset |
345 MI_MM_SPACE_GTT |
346 MI_SAVE_EXT_STATE_EN |
347 MI_RESTORE_EXT_STATE_EN |
348 hw_flags);
349 /* w/a: MI_SET_CONTEXT must always be followed by MI_NOOP */
350 intel_ring_emit(ring, MI_NOOP);
351
352 if (IS_GEN7(ring->dev))
353 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE);
354 else
355 intel_ring_emit(ring, MI_NOOP);
356
357 intel_ring_advance(ring);
358
359 return ret;
360 }
361
362 static int do_switch(struct drm_i915_gem_object *from_obj,
363 struct i915_hw_context *to,
364 u32 seqno)
365 {
366 struct intel_ring_buffer *ring = NULL;
367 u32 hw_flags = 0;
368 int ret;
369
370 BUG_ON(to == NULL);
371 BUG_ON(from_obj != NULL && from_obj->pin_count == 0);
372
373 ret = i915_gem_object_pin(to->obj, CONTEXT_ALIGN, false);
374 if (ret)
375 return ret;
376
377 if (!to->obj->has_global_gtt_mapping)
378 i915_gem_gtt_bind_object(to->obj, to->obj->cache_level);
379
380 if (!to->is_initialized || is_default_context(to))
381 hw_flags |= MI_RESTORE_INHIBIT;
382 else if (WARN_ON_ONCE(from_obj == to->obj)) /* not yet expected */
383 hw_flags |= MI_FORCE_RESTORE;
384
385 ring = to->ring;
386 ret = mi_set_context(ring, to, hw_flags);
387 if (ret) {
388 i915_gem_object_unpin(to->obj);
389 return ret;
390 }
391
392 /* The backing object for the context is done after switching to the
393 * *next* context. Therefore we cannot retire the previous context until
394 * the next context has already started running. In fact, the below code
395 * is a bit suboptimal because the retiring can occur simply after the
396 * MI_SET_CONTEXT instead of when the next seqno has completed.
397 */
398 if (from_obj != NULL) {
399 from_obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
400 i915_gem_object_move_to_active(from_obj, ring, seqno);
401 /* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
402 * whole damn pipeline, we don't need to explicitly mark the
403 * object dirty. The only exception is that the context must be
404 * correct in case the object gets swapped out. Ideally we'd be
405 * able to defer doing this until we know the object would be
406 * swapped, but there is no way to do that yet.
407 */
408 from_obj->dirty = 1;
409 BUG_ON(from_obj->ring != to->ring);
410 i915_gem_object_unpin(from_obj);
411 }
412
413 ring->last_context_obj = to->obj;
414 to->is_initialized = true;
415
416 return 0;
417 }
418
419 /**
420 * i915_switch_context() - perform a GPU context switch.
421 * @ring: ring for which we'll execute the context switch
422 * @file_priv: file_priv associated with the context, may be NULL
423 * @id: context id number
424 * @seqno: sequence number by which the new context will be switched to
425 * @flags:
426 *
427 * The context life cycle is simple. The context refcount is incremented and
428 * decremented by 1 and create and destroy. If the context is in use by the GPU,
429 * it will have a refoucnt > 1. This allows us to destroy the context abstract
430 * object while letting the normal object tracking destroy the backing BO.
431 */
432 int i915_switch_context(struct intel_ring_buffer *ring,
433 struct drm_file *file,
434 int to_id)
435 {
436 struct drm_i915_private *dev_priv = ring->dev->dev_private;
437 struct drm_i915_file_private *file_priv = NULL;
438 struct i915_hw_context *to;
439 struct drm_i915_gem_object *from_obj = ring->last_context_obj;
440 int ret;
441
442 if (dev_priv->hw_contexts_disabled)
443 return 0;
444
445 if (ring != &dev_priv->ring[RCS])
446 return 0;
447
448 if (file)
449 file_priv = file->driver_priv;
450
451 if (to_id == DEFAULT_CONTEXT_ID) {
452 to = ring->default_context;
453 } else {
454 to = i915_gem_context_get(file_priv, to_id);
455 if (to == NULL)
456 return -ENOENT;
457 }
458
459 if (from_obj == to->obj)
460 return 0;
461
462 ret = do_switch(from_obj, to, i915_gem_next_request_seqno(to->ring));
463 if (ret)
464 return ret;
465
466 /* Just to make the code a little cleaner we take the object reference
467 * after the switch was successful. It would be more intuitive to ref
468 * the 'to' object before the switch but we know the refcount must be >0
469 * if context_get() succeeded, and we hold struct mutex. So it's safe to
470 * do this here/now
471 */
472 drm_gem_object_reference(&to->obj->base);
473 if (from_obj != NULL)
474 drm_gem_object_unreference(&from_obj->base);
475 return ret;
476 }
477
478 int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
479 struct drm_file *file)
480 {
481 struct drm_i915_private *dev_priv = dev->dev_private;
482 struct drm_i915_gem_context_create *args = data;
483 struct drm_i915_file_private *file_priv = file->driver_priv;
484 struct i915_hw_context *ctx;
485 int ret;
486
487 if (!(dev->driver->driver_features & DRIVER_GEM))
488 return -ENODEV;
489
490 if (dev_priv->hw_contexts_disabled)
491 return -ENODEV;
492
493 ret = i915_mutex_lock_interruptible(dev);
494 if (ret)
495 return ret;
496
497 ctx = create_hw_context(dev, file_priv);
498 mutex_unlock(&dev->struct_mutex);
499
500 args->ctx_id = ctx->id;
501 DRM_DEBUG_DRIVER("HW context %d created\n", args->ctx_id);
502
503 return PTR_RET(ctx);
504 }
505
506 int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
507 struct drm_file *file)
508 {
509 struct drm_i915_gem_context_destroy *args = data;
510 struct drm_i915_file_private *file_priv = file->driver_priv;
511 struct i915_hw_context *ctx;
512 int ret;
513
514 if (!(dev->driver->driver_features & DRIVER_GEM))
515 return -ENODEV;
516
517 ret = i915_mutex_lock_interruptible(dev);
518 if (ret)
519 return ret;
520
521 ctx = i915_gem_context_get(file_priv, args->ctx_id);
522 if (!ctx) {
523 mutex_unlock(&dev->struct_mutex);
524 return -ENOENT;
525 }
526
527 do_destroy(ctx);
528
529 mutex_unlock(&dev->struct_mutex);
530
531 DRM_DEBUG_DRIVER("HW context %d destroyed\n", args->ctx_id);
532 return 0;
533 }
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