2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
32 #include "drm_crtc_helper.h"
33 #include "intel_drv.h"
37 /* Here's the desired hotplug mode */
38 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
39 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
40 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
41 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
42 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
43 ADPA_CRT_HOTPLUG_ENABLE)
46 struct intel_encoder base
;
47 bool force_hotplug_required
;
50 static struct intel_crt
*intel_attached_crt(struct drm_connector
*connector
)
52 return container_of(intel_attached_encoder(connector
),
53 struct intel_crt
, base
);
56 static void intel_crt_dpms(struct drm_encoder
*encoder
, int mode
)
58 struct drm_device
*dev
= encoder
->dev
;
59 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
62 if (HAS_PCH_SPLIT(dev
))
67 temp
= I915_READ(reg
);
68 temp
&= ~(ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
);
69 temp
&= ~ADPA_DAC_ENABLE
;
72 case DRM_MODE_DPMS_ON
:
73 temp
|= ADPA_DAC_ENABLE
;
75 case DRM_MODE_DPMS_STANDBY
:
76 temp
|= ADPA_DAC_ENABLE
| ADPA_HSYNC_CNTL_DISABLE
;
78 case DRM_MODE_DPMS_SUSPEND
:
79 temp
|= ADPA_DAC_ENABLE
| ADPA_VSYNC_CNTL_DISABLE
;
81 case DRM_MODE_DPMS_OFF
:
82 temp
|= ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
;
86 I915_WRITE(reg
, temp
);
89 static int intel_crt_mode_valid(struct drm_connector
*connector
,
90 struct drm_display_mode
*mode
)
92 struct drm_device
*dev
= connector
->dev
;
95 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
96 return MODE_NO_DBLESCAN
;
98 if (mode
->clock
< 25000)
99 return MODE_CLOCK_LOW
;
105 if (mode
->clock
> max_clock
)
106 return MODE_CLOCK_HIGH
;
111 static bool intel_crt_mode_fixup(struct drm_encoder
*encoder
,
112 struct drm_display_mode
*mode
,
113 struct drm_display_mode
*adjusted_mode
)
118 static void intel_crt_mode_set(struct drm_encoder
*encoder
,
119 struct drm_display_mode
*mode
,
120 struct drm_display_mode
*adjusted_mode
)
123 struct drm_device
*dev
= encoder
->dev
;
124 struct drm_crtc
*crtc
= encoder
->crtc
;
125 struct intel_crtc
*intel_crtc
= to_intel_crtc(crtc
);
126 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
131 if (intel_crtc
->pipe
== 0)
132 dpll_md_reg
= DPLL_A_MD
;
134 dpll_md_reg
= DPLL_B_MD
;
136 if (HAS_PCH_SPLIT(dev
))
142 * Disable separate mode multiplier used when cloning SDVO to CRT
143 * XXX this needs to be adjusted when we really are cloning
145 if (INTEL_INFO(dev
)->gen
>= 4 && !HAS_PCH_SPLIT(dev
)) {
146 dpll_md
= I915_READ(dpll_md_reg
);
147 I915_WRITE(dpll_md_reg
,
148 dpll_md
& ~DPLL_MD_UDI_MULTIPLIER_MASK
);
151 adpa
= ADPA_HOTPLUG_BITS
;
152 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
153 adpa
|= ADPA_HSYNC_ACTIVE_HIGH
;
154 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
155 adpa
|= ADPA_VSYNC_ACTIVE_HIGH
;
157 if (intel_crtc
->pipe
== 0) {
158 if (HAS_PCH_CPT(dev
))
159 adpa
|= PORT_TRANS_A_SEL_CPT
;
161 adpa
|= ADPA_PIPE_A_SELECT
;
162 if (!HAS_PCH_SPLIT(dev
))
163 I915_WRITE(BCLRPAT_A
, 0);
165 if (HAS_PCH_CPT(dev
))
166 adpa
|= PORT_TRANS_B_SEL_CPT
;
168 adpa
|= ADPA_PIPE_B_SELECT
;
169 if (!HAS_PCH_SPLIT(dev
))
170 I915_WRITE(BCLRPAT_B
, 0);
173 I915_WRITE(adpa_reg
, adpa
);
176 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector
*connector
)
178 struct drm_device
*dev
= connector
->dev
;
179 struct intel_crt
*crt
= intel_attached_crt(connector
);
180 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
184 /* The first time through, trigger an explicit detection cycle */
185 if (crt
->force_hotplug_required
) {
186 bool turn_off_dac
= HAS_PCH_SPLIT(dev
);
189 crt
->force_hotplug_required
= 0;
191 save_adpa
= adpa
= I915_READ(PCH_ADPA
);
192 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
194 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
196 adpa
&= ~ADPA_DAC_ENABLE
;
198 I915_WRITE(PCH_ADPA
, adpa
);
200 if (wait_for((I915_READ(PCH_ADPA
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
202 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
205 I915_WRITE(PCH_ADPA
, save_adpa
);
206 POSTING_READ(PCH_ADPA
);
210 /* Check the status to see if both blue and green are on now */
211 adpa
= I915_READ(PCH_ADPA
);
212 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
216 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa
, ret
);
222 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
224 * Not for i915G/i915GM
226 * \return true if CRT is connected.
227 * \return false if CRT is disconnected.
229 static bool intel_crt_detect_hotplug(struct drm_connector
*connector
)
231 struct drm_device
*dev
= connector
->dev
;
232 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
233 u32 hotplug_en
, orig
, stat
;
237 if (HAS_PCH_SPLIT(dev
))
238 return intel_ironlake_crt_detect_hotplug(connector
);
241 * On 4 series desktop, CRT detect sequence need to be done twice
242 * to get a reliable result.
245 if (IS_G4X(dev
) && !IS_GM45(dev
))
249 hotplug_en
= orig
= I915_READ(PORT_HOTPLUG_EN
);
250 hotplug_en
|= CRT_HOTPLUG_FORCE_DETECT
;
252 for (i
= 0; i
< tries
; i
++) {
253 /* turn on the FORCE_DETECT */
254 I915_WRITE(PORT_HOTPLUG_EN
, hotplug_en
);
255 /* wait for FORCE_DETECT to go off */
256 if (wait_for((I915_READ(PORT_HOTPLUG_EN
) &
257 CRT_HOTPLUG_FORCE_DETECT
) == 0,
259 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
262 stat
= I915_READ(PORT_HOTPLUG_STAT
);
263 if ((stat
& CRT_HOTPLUG_MONITOR_MASK
) != CRT_HOTPLUG_MONITOR_NONE
)
266 /* clear the interrupt we just generated, if any */
267 I915_WRITE(PORT_HOTPLUG_STAT
, CRT_HOTPLUG_INT_STATUS
);
269 /* and put the bits back */
270 I915_WRITE(PORT_HOTPLUG_EN
, orig
);
275 static bool intel_crt_ddc_probe(struct drm_i915_private
*dev_priv
, int ddc_bus
)
278 struct i2c_msg msgs
[] = {
286 /* DDC monitor detect: Does it ACK a write to 0xA0? */
287 return i2c_transfer(&dev_priv
->gmbus
[ddc_bus
].adapter
, msgs
, 1) == 1;
290 static bool intel_crt_detect_ddc(struct intel_crt
*crt
)
292 struct drm_i915_private
*dev_priv
= crt
->base
.base
.dev
->dev_private
;
294 /* CRT should always be at 0, but check anyway */
295 if (crt
->base
.type
!= INTEL_OUTPUT_ANALOG
)
298 if (intel_crt_ddc_probe(dev_priv
, dev_priv
->crt_ddc_pin
)) {
299 DRM_DEBUG_KMS("CRT detected via DDC:0xa0\n");
303 if (intel_ddc_probe(&crt
->base
, dev_priv
->crt_ddc_pin
)) {
304 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
311 static enum drm_connector_status
312 intel_crt_load_detect(struct drm_crtc
*crtc
, struct intel_crt
*crt
)
314 struct drm_encoder
*encoder
= &crt
->base
.base
;
315 struct drm_device
*dev
= encoder
->dev
;
316 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
317 struct intel_crtc
*intel_crtc
= to_intel_crtc(crtc
);
318 uint32_t pipe
= intel_crtc
->pipe
;
319 uint32_t save_bclrpat
;
320 uint32_t save_vtotal
;
321 uint32_t vtotal
, vactive
;
323 uint32_t vblank
, vblank_start
, vblank_end
;
325 uint32_t bclrpat_reg
;
329 uint32_t pipeconf_reg
;
330 uint32_t pipe_dsl_reg
;
332 enum drm_connector_status status
;
334 DRM_DEBUG_KMS("starting load-detect on CRT\n");
337 bclrpat_reg
= BCLRPAT_A
;
338 vtotal_reg
= VTOTAL_A
;
339 vblank_reg
= VBLANK_A
;
341 pipeconf_reg
= PIPEACONF
;
342 pipe_dsl_reg
= PIPEADSL
;
344 bclrpat_reg
= BCLRPAT_B
;
345 vtotal_reg
= VTOTAL_B
;
346 vblank_reg
= VBLANK_B
;
348 pipeconf_reg
= PIPEBCONF
;
349 pipe_dsl_reg
= PIPEBDSL
;
352 save_bclrpat
= I915_READ(bclrpat_reg
);
353 save_vtotal
= I915_READ(vtotal_reg
);
354 vblank
= I915_READ(vblank_reg
);
356 vtotal
= ((save_vtotal
>> 16) & 0xfff) + 1;
357 vactive
= (save_vtotal
& 0x7ff) + 1;
359 vblank_start
= (vblank
& 0xfff) + 1;
360 vblank_end
= ((vblank
>> 16) & 0xfff) + 1;
362 /* Set the border color to purple. */
363 I915_WRITE(bclrpat_reg
, 0x500050);
366 uint32_t pipeconf
= I915_READ(pipeconf_reg
);
367 I915_WRITE(pipeconf_reg
, pipeconf
| PIPECONF_FORCE_BORDER
);
368 POSTING_READ(pipeconf_reg
);
369 /* Wait for next Vblank to substitue
370 * border color for Color info */
371 intel_wait_for_vblank(dev
, pipe
);
372 st00
= I915_READ8(VGA_MSR_WRITE
);
373 status
= ((st00
& (1 << 4)) != 0) ?
374 connector_status_connected
:
375 connector_status_disconnected
;
377 I915_WRITE(pipeconf_reg
, pipeconf
);
379 bool restore_vblank
= false;
383 * If there isn't any border, add some.
384 * Yes, this will flicker
386 if (vblank_start
<= vactive
&& vblank_end
>= vtotal
) {
387 uint32_t vsync
= I915_READ(vsync_reg
);
388 uint32_t vsync_start
= (vsync
& 0xffff) + 1;
390 vblank_start
= vsync_start
;
391 I915_WRITE(vblank_reg
,
393 ((vblank_end
- 1) << 16));
394 restore_vblank
= true;
396 /* sample in the vertical border, selecting the larger one */
397 if (vblank_start
- vactive
>= vtotal
- vblank_end
)
398 vsample
= (vblank_start
+ vactive
) >> 1;
400 vsample
= (vtotal
+ vblank_end
) >> 1;
403 * Wait for the border to be displayed
405 while (I915_READ(pipe_dsl_reg
) >= vactive
)
407 while ((dsl
= I915_READ(pipe_dsl_reg
)) <= vsample
)
410 * Watch ST00 for an entire scanline
416 /* Read the ST00 VGA status register */
417 st00
= I915_READ8(VGA_MSR_WRITE
);
420 } while ((I915_READ(pipe_dsl_reg
) == dsl
));
422 /* restore vblank if necessary */
424 I915_WRITE(vblank_reg
, vblank
);
426 * If more than 3/4 of the scanline detected a monitor,
427 * then it is assumed to be present. This works even on i830,
428 * where there isn't any way to force the border color across
431 status
= detect
* 4 > count
* 3 ?
432 connector_status_connected
:
433 connector_status_disconnected
;
436 /* Restore previous settings */
437 I915_WRITE(bclrpat_reg
, save_bclrpat
);
442 static enum drm_connector_status
443 intel_crt_detect(struct drm_connector
*connector
, bool force
)
445 struct drm_device
*dev
= connector
->dev
;
446 struct intel_crt
*crt
= intel_attached_crt(connector
);
447 struct drm_crtc
*crtc
;
449 enum drm_connector_status status
;
451 if (I915_HAS_HOTPLUG(dev
)) {
452 if (intel_crt_detect_hotplug(connector
)) {
453 DRM_DEBUG_KMS("CRT detected via hotplug\n");
454 return connector_status_connected
;
456 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
457 return connector_status_disconnected
;
461 if (intel_crt_detect_ddc(crt
))
462 return connector_status_connected
;
465 return connector
->status
;
467 /* for pre-945g platforms use load detect */
468 crtc
= crt
->base
.base
.crtc
;
469 if (crtc
&& crtc
->enabled
) {
470 status
= intel_crt_load_detect(crtc
, crt
);
472 crtc
= intel_get_load_detect_pipe(&crt
->base
, connector
,
475 if (intel_crt_detect_ddc(crt
))
476 status
= connector_status_connected
;
478 status
= intel_crt_load_detect(crtc
, crt
);
479 intel_release_load_detect_pipe(&crt
->base
,
480 connector
, dpms_mode
);
482 status
= connector_status_unknown
;
488 static void intel_crt_destroy(struct drm_connector
*connector
)
490 drm_sysfs_connector_remove(connector
);
491 drm_connector_cleanup(connector
);
495 static int intel_crt_get_modes(struct drm_connector
*connector
)
497 struct drm_device
*dev
= connector
->dev
;
498 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
501 ret
= intel_ddc_get_modes(connector
,
502 &dev_priv
->gmbus
[dev_priv
->crt_ddc_pin
].adapter
);
503 if (ret
|| !IS_G4X(dev
))
506 /* Try to probe digital port for output in DVI-I -> VGA mode. */
507 return intel_ddc_get_modes(connector
,
508 &dev_priv
->gmbus
[GMBUS_PORT_DPB
].adapter
);
511 static int intel_crt_set_property(struct drm_connector
*connector
,
512 struct drm_property
*property
,
519 * Routines for controlling stuff on the analog port
522 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs
= {
523 .dpms
= intel_crt_dpms
,
524 .mode_fixup
= intel_crt_mode_fixup
,
525 .prepare
= intel_encoder_prepare
,
526 .commit
= intel_encoder_commit
,
527 .mode_set
= intel_crt_mode_set
,
530 static const struct drm_connector_funcs intel_crt_connector_funcs
= {
531 .dpms
= drm_helper_connector_dpms
,
532 .detect
= intel_crt_detect
,
533 .fill_modes
= drm_helper_probe_single_connector_modes
,
534 .destroy
= intel_crt_destroy
,
535 .set_property
= intel_crt_set_property
,
538 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs
= {
539 .mode_valid
= intel_crt_mode_valid
,
540 .get_modes
= intel_crt_get_modes
,
541 .best_encoder
= intel_best_encoder
,
544 static const struct drm_encoder_funcs intel_crt_enc_funcs
= {
545 .destroy
= intel_encoder_destroy
,
548 void intel_crt_init(struct drm_device
*dev
)
550 struct drm_connector
*connector
;
551 struct intel_crt
*crt
;
552 struct intel_connector
*intel_connector
;
553 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
555 crt
= kzalloc(sizeof(struct intel_crt
), GFP_KERNEL
);
559 intel_connector
= kzalloc(sizeof(struct intel_connector
), GFP_KERNEL
);
560 if (!intel_connector
) {
565 connector
= &intel_connector
->base
;
566 drm_connector_init(dev
, &intel_connector
->base
,
567 &intel_crt_connector_funcs
, DRM_MODE_CONNECTOR_VGA
);
569 drm_encoder_init(dev
, &crt
->base
.base
, &intel_crt_enc_funcs
,
570 DRM_MODE_ENCODER_DAC
);
572 intel_connector_attach_encoder(intel_connector
, &crt
->base
);
574 crt
->base
.type
= INTEL_OUTPUT_ANALOG
;
575 crt
->base
.clone_mask
= (1 << INTEL_SDVO_NON_TV_CLONE_BIT
|
576 1 << INTEL_ANALOG_CLONE_BIT
|
577 1 << INTEL_SDVO_LVDS_CLONE_BIT
);
578 crt
->base
.crtc_mask
= (1 << 0) | (1 << 1);
579 connector
->interlace_allowed
= 1;
580 connector
->doublescan_allowed
= 0;
582 drm_encoder_helper_add(&crt
->base
.base
, &intel_crt_helper_funcs
);
583 drm_connector_helper_add(connector
, &intel_crt_connector_helper_funcs
);
585 drm_sysfs_connector_add(connector
);
587 if (I915_HAS_HOTPLUG(dev
))
588 connector
->polled
= DRM_CONNECTOR_POLL_HPD
;
590 connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
593 * Configure the automatic hotplug detection stuff
595 crt
->force_hotplug_required
= 0;
596 if (HAS_PCH_SPLIT(dev
)) {
599 adpa
= I915_READ(PCH_ADPA
);
600 adpa
&= ~ADPA_CRT_HOTPLUG_MASK
;
601 adpa
|= ADPA_HOTPLUG_BITS
;
602 I915_WRITE(PCH_ADPA
, adpa
);
603 POSTING_READ(PCH_ADPA
);
605 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa
);
606 crt
->force_hotplug_required
= 1;
609 dev_priv
->hotplug_supported_mask
|= CRT_HOTPLUG_INT_STATUS
;