2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
30 #include <drm/drm_atomic_helper.h>
31 #include <drm/drm_crtc.h>
32 #include "intel_drv.h"
33 #include <drm/i915_drm.h>
37 #define SIL164_ADDR 0x38
38 #define CH7xxx_ADDR 0x76
39 #define TFP410_ADDR 0x38
40 #define NS2501_ADDR 0x38
42 static const struct intel_dvo_device intel_dvo_devices
[] = {
44 .type
= INTEL_DVO_CHIP_TMDS
,
47 .dvo_srcdim_reg
= DVOC_SRCDIM
,
48 .slave_addr
= SIL164_ADDR
,
49 .dev_ops
= &sil164_ops
,
52 .type
= INTEL_DVO_CHIP_TMDS
,
55 .dvo_srcdim_reg
= DVOC_SRCDIM
,
56 .slave_addr
= CH7xxx_ADDR
,
57 .dev_ops
= &ch7xxx_ops
,
60 .type
= INTEL_DVO_CHIP_TMDS
,
63 .dvo_srcdim_reg
= DVOC_SRCDIM
,
64 .slave_addr
= 0x75, /* For some ch7010 */
65 .dev_ops
= &ch7xxx_ops
,
68 .type
= INTEL_DVO_CHIP_LVDS
,
71 .dvo_srcdim_reg
= DVOA_SRCDIM
,
72 .slave_addr
= 0x02, /* Might also be 0x44, 0x84, 0xc4 */
76 .type
= INTEL_DVO_CHIP_TMDS
,
79 .dvo_srcdim_reg
= DVOC_SRCDIM
,
80 .slave_addr
= TFP410_ADDR
,
81 .dev_ops
= &tfp410_ops
,
84 .type
= INTEL_DVO_CHIP_LVDS
,
87 .dvo_srcdim_reg
= DVOC_SRCDIM
,
89 .gpio
= GMBUS_PIN_DPB
,
90 .dev_ops
= &ch7017_ops
,
93 .type
= INTEL_DVO_CHIP_TMDS
,
96 .dvo_srcdim_reg
= DVOB_SRCDIM
,
97 .slave_addr
= NS2501_ADDR
,
98 .dev_ops
= &ns2501_ops
,
103 struct intel_encoder base
;
105 struct intel_dvo_device dev
;
107 struct intel_connector
*attached_connector
;
109 bool panel_wants_dither
;
112 static struct intel_dvo
*enc_to_dvo(struct intel_encoder
*encoder
)
114 return container_of(encoder
, struct intel_dvo
, base
);
117 static struct intel_dvo
*intel_attached_dvo(struct drm_connector
*connector
)
119 return enc_to_dvo(intel_attached_encoder(connector
));
122 static bool intel_dvo_connector_get_hw_state(struct intel_connector
*connector
)
124 struct drm_device
*dev
= connector
->base
.dev
;
125 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
126 struct intel_dvo
*intel_dvo
= intel_attached_dvo(&connector
->base
);
129 tmp
= I915_READ(intel_dvo
->dev
.dvo_reg
);
131 if (!(tmp
& DVO_ENABLE
))
134 return intel_dvo
->dev
.dev_ops
->get_hw_state(&intel_dvo
->dev
);
137 static bool intel_dvo_get_hw_state(struct intel_encoder
*encoder
,
140 struct drm_device
*dev
= encoder
->base
.dev
;
141 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
142 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
145 tmp
= I915_READ(intel_dvo
->dev
.dvo_reg
);
147 if (!(tmp
& DVO_ENABLE
))
150 *pipe
= PORT_TO_PIPE(tmp
);
155 static void intel_dvo_get_config(struct intel_encoder
*encoder
,
156 struct intel_crtc_state
*pipe_config
)
158 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
159 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
162 tmp
= I915_READ(intel_dvo
->dev
.dvo_reg
);
163 if (tmp
& DVO_HSYNC_ACTIVE_HIGH
)
164 flags
|= DRM_MODE_FLAG_PHSYNC
;
166 flags
|= DRM_MODE_FLAG_NHSYNC
;
167 if (tmp
& DVO_VSYNC_ACTIVE_HIGH
)
168 flags
|= DRM_MODE_FLAG_PVSYNC
;
170 flags
|= DRM_MODE_FLAG_NVSYNC
;
172 pipe_config
->base
.adjusted_mode
.flags
|= flags
;
174 pipe_config
->base
.adjusted_mode
.crtc_clock
= pipe_config
->port_clock
;
177 static void intel_disable_dvo(struct intel_encoder
*encoder
)
179 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
180 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
181 i915_reg_t dvo_reg
= intel_dvo
->dev
.dvo_reg
;
182 u32 temp
= I915_READ(dvo_reg
);
184 intel_dvo
->dev
.dev_ops
->dpms(&intel_dvo
->dev
, false);
185 I915_WRITE(dvo_reg
, temp
& ~DVO_ENABLE
);
189 static void intel_enable_dvo(struct intel_encoder
*encoder
)
191 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
192 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
193 struct intel_crtc
*crtc
= to_intel_crtc(encoder
->base
.crtc
);
194 i915_reg_t dvo_reg
= intel_dvo
->dev
.dvo_reg
;
195 u32 temp
= I915_READ(dvo_reg
);
197 intel_dvo
->dev
.dev_ops
->mode_set(&intel_dvo
->dev
,
198 &crtc
->config
->base
.mode
,
199 &crtc
->config
->base
.adjusted_mode
);
201 I915_WRITE(dvo_reg
, temp
| DVO_ENABLE
);
204 intel_dvo
->dev
.dev_ops
->dpms(&intel_dvo
->dev
, true);
207 static enum drm_mode_status
208 intel_dvo_mode_valid(struct drm_connector
*connector
,
209 struct drm_display_mode
*mode
)
211 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
212 const struct drm_display_mode
*fixed_mode
=
213 to_intel_connector(connector
)->panel
.fixed_mode
;
214 int max_dotclk
= to_i915(connector
->dev
)->max_dotclk_freq
;
215 int target_clock
= mode
->clock
;
217 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
218 return MODE_NO_DBLESCAN
;
220 /* XXX: Validate clock range */
223 if (mode
->hdisplay
> fixed_mode
->hdisplay
)
225 if (mode
->vdisplay
> fixed_mode
->vdisplay
)
228 target_clock
= fixed_mode
->clock
;
231 if (target_clock
> max_dotclk
)
232 return MODE_CLOCK_HIGH
;
234 return intel_dvo
->dev
.dev_ops
->mode_valid(&intel_dvo
->dev
, mode
);
237 static bool intel_dvo_compute_config(struct intel_encoder
*encoder
,
238 struct intel_crtc_state
*pipe_config
)
240 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
241 const struct drm_display_mode
*fixed_mode
=
242 intel_dvo
->attached_connector
->panel
.fixed_mode
;
243 struct drm_display_mode
*adjusted_mode
= &pipe_config
->base
.adjusted_mode
;
245 /* If we have timings from the BIOS for the panel, put them in
246 * to the adjusted mode. The CRTC will be set up for this mode,
247 * with the panel scaling set up to source from the H/VDisplay
248 * of the original mode.
251 intel_fixed_panel_mode(fixed_mode
, adjusted_mode
);
256 static void intel_dvo_pre_enable(struct intel_encoder
*encoder
)
258 struct drm_device
*dev
= encoder
->base
.dev
;
259 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
260 struct intel_crtc
*crtc
= to_intel_crtc(encoder
->base
.crtc
);
261 const struct drm_display_mode
*adjusted_mode
= &crtc
->config
->base
.adjusted_mode
;
262 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
263 int pipe
= crtc
->pipe
;
265 i915_reg_t dvo_reg
= intel_dvo
->dev
.dvo_reg
;
266 i915_reg_t dvo_srcdim_reg
= intel_dvo
->dev
.dvo_srcdim_reg
;
268 /* Save the data order, since I don't know what it should be set to. */
269 dvo_val
= I915_READ(dvo_reg
) &
270 (DVO_PRESERVE_MASK
| DVO_DATA_ORDER_GBRG
);
271 dvo_val
|= DVO_DATA_ORDER_FP
| DVO_BORDER_ENABLE
|
272 DVO_BLANK_ACTIVE_HIGH
;
275 dvo_val
|= DVO_PIPE_B_SELECT
;
276 dvo_val
|= DVO_PIPE_STALL
;
277 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
278 dvo_val
|= DVO_HSYNC_ACTIVE_HIGH
;
279 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
280 dvo_val
|= DVO_VSYNC_ACTIVE_HIGH
;
282 /*I915_WRITE(DVOB_SRCDIM,
283 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
284 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
285 I915_WRITE(dvo_srcdim_reg
,
286 (adjusted_mode
->crtc_hdisplay
<< DVO_SRCDIM_HORIZONTAL_SHIFT
) |
287 (adjusted_mode
->crtc_vdisplay
<< DVO_SRCDIM_VERTICAL_SHIFT
));
288 /*I915_WRITE(DVOB, dvo_val);*/
289 I915_WRITE(dvo_reg
, dvo_val
);
293 * Detect the output connection on our DVO device.
297 static enum drm_connector_status
298 intel_dvo_detect(struct drm_connector
*connector
, bool force
)
300 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
301 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
302 connector
->base
.id
, connector
->name
);
303 return intel_dvo
->dev
.dev_ops
->detect(&intel_dvo
->dev
);
306 static int intel_dvo_get_modes(struct drm_connector
*connector
)
308 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
309 const struct drm_display_mode
*fixed_mode
=
310 to_intel_connector(connector
)->panel
.fixed_mode
;
312 /* We should probably have an i2c driver get_modes function for those
313 * devices which will have a fixed set of modes determined by the chip
314 * (TV-out, for example), but for now with just TMDS and LVDS,
315 * that's not the case.
317 intel_ddc_get_modes(connector
,
318 intel_gmbus_get_adapter(dev_priv
, GMBUS_PIN_DPC
));
319 if (!list_empty(&connector
->probed_modes
))
323 struct drm_display_mode
*mode
;
324 mode
= drm_mode_duplicate(connector
->dev
, fixed_mode
);
326 drm_mode_probed_add(connector
, mode
);
334 static void intel_dvo_destroy(struct drm_connector
*connector
)
336 drm_connector_cleanup(connector
);
337 intel_panel_fini(&to_intel_connector(connector
)->panel
);
341 static const struct drm_connector_funcs intel_dvo_connector_funcs
= {
342 .dpms
= drm_atomic_helper_connector_dpms
,
343 .detect
= intel_dvo_detect
,
344 .destroy
= intel_dvo_destroy
,
345 .fill_modes
= drm_helper_probe_single_connector_modes
,
346 .atomic_get_property
= intel_connector_atomic_get_property
,
347 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
348 .atomic_duplicate_state
= drm_atomic_helper_connector_duplicate_state
,
351 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs
= {
352 .mode_valid
= intel_dvo_mode_valid
,
353 .get_modes
= intel_dvo_get_modes
,
354 .best_encoder
= intel_best_encoder
,
357 static void intel_dvo_enc_destroy(struct drm_encoder
*encoder
)
359 struct intel_dvo
*intel_dvo
= enc_to_dvo(to_intel_encoder(encoder
));
361 if (intel_dvo
->dev
.dev_ops
->destroy
)
362 intel_dvo
->dev
.dev_ops
->destroy(&intel_dvo
->dev
);
364 intel_encoder_destroy(encoder
);
367 static const struct drm_encoder_funcs intel_dvo_enc_funcs
= {
368 .destroy
= intel_dvo_enc_destroy
,
372 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
374 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
375 * chip being on DVOB/C and having multiple pipes.
377 static struct drm_display_mode
*
378 intel_dvo_get_current_mode(struct drm_connector
*connector
)
380 struct drm_device
*dev
= connector
->dev
;
381 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
382 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
383 uint32_t dvo_val
= I915_READ(intel_dvo
->dev
.dvo_reg
);
384 struct drm_display_mode
*mode
= NULL
;
386 /* If the DVO port is active, that'll be the LVDS, so we can pull out
387 * its timings to get how the BIOS set up the panel.
389 if (dvo_val
& DVO_ENABLE
) {
390 struct drm_crtc
*crtc
;
391 int pipe
= (dvo_val
& DVO_PIPE_B_SELECT
) ? 1 : 0;
393 crtc
= intel_get_crtc_for_pipe(dev
, pipe
);
395 mode
= intel_crtc_mode_get(dev
, crtc
);
397 mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
398 if (dvo_val
& DVO_HSYNC_ACTIVE_HIGH
)
399 mode
->flags
|= DRM_MODE_FLAG_PHSYNC
;
400 if (dvo_val
& DVO_VSYNC_ACTIVE_HIGH
)
401 mode
->flags
|= DRM_MODE_FLAG_PVSYNC
;
409 void intel_dvo_init(struct drm_device
*dev
)
411 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
412 struct intel_encoder
*intel_encoder
;
413 struct intel_dvo
*intel_dvo
;
414 struct intel_connector
*intel_connector
;
416 int encoder_type
= DRM_MODE_ENCODER_NONE
;
418 intel_dvo
= kzalloc(sizeof(*intel_dvo
), GFP_KERNEL
);
422 intel_connector
= intel_connector_alloc();
423 if (!intel_connector
) {
428 intel_dvo
->attached_connector
= intel_connector
;
430 intel_encoder
= &intel_dvo
->base
;
431 drm_encoder_init(dev
, &intel_encoder
->base
,
432 &intel_dvo_enc_funcs
, encoder_type
, NULL
);
434 intel_encoder
->disable
= intel_disable_dvo
;
435 intel_encoder
->enable
= intel_enable_dvo
;
436 intel_encoder
->get_hw_state
= intel_dvo_get_hw_state
;
437 intel_encoder
->get_config
= intel_dvo_get_config
;
438 intel_encoder
->compute_config
= intel_dvo_compute_config
;
439 intel_encoder
->pre_enable
= intel_dvo_pre_enable
;
440 intel_connector
->get_hw_state
= intel_dvo_connector_get_hw_state
;
441 intel_connector
->unregister
= intel_connector_unregister
;
443 /* Now, try to find a controller */
444 for (i
= 0; i
< ARRAY_SIZE(intel_dvo_devices
); i
++) {
445 struct drm_connector
*connector
= &intel_connector
->base
;
446 const struct intel_dvo_device
*dvo
= &intel_dvo_devices
[i
];
447 struct i2c_adapter
*i2c
;
451 uint32_t dpll
[I915_MAX_PIPES
];
453 /* Allow the I2C driver info to specify the GPIO to be used in
454 * special cases, but otherwise default to what's defined
457 if (intel_gmbus_is_valid_pin(dev_priv
, dvo
->gpio
))
459 else if (dvo
->type
== INTEL_DVO_CHIP_LVDS
)
460 gpio
= GMBUS_PIN_SSC
;
462 gpio
= GMBUS_PIN_DPB
;
464 /* Set up the I2C bus necessary for the chip we're probing.
465 * It appears that everything is on GPIOE except for panels
466 * on i830 laptops, which are on GPIOB (DVOA).
468 i2c
= intel_gmbus_get_adapter(dev_priv
, gpio
);
470 intel_dvo
->dev
= *dvo
;
472 /* GMBUS NAK handling seems to be unstable, hence let the
473 * transmitter detection run in bit banging mode for now.
475 intel_gmbus_force_bit(i2c
, true);
477 /* ns2501 requires the DVO 2x clock before it will
478 * respond to i2c accesses, so make sure we have
479 * have the clock enabled before we attempt to
480 * initialize the device.
482 for_each_pipe(dev_priv
, pipe
) {
483 dpll
[pipe
] = I915_READ(DPLL(pipe
));
484 I915_WRITE(DPLL(pipe
), dpll
[pipe
] | DPLL_DVO_2X_MODE
);
487 dvoinit
= dvo
->dev_ops
->init(&intel_dvo
->dev
, i2c
);
489 /* restore the DVO 2x clock state to original */
490 for_each_pipe(dev_priv
, pipe
) {
491 I915_WRITE(DPLL(pipe
), dpll
[pipe
]);
494 intel_gmbus_force_bit(i2c
, false);
499 intel_encoder
->type
= INTEL_OUTPUT_DVO
;
500 intel_encoder
->crtc_mask
= (1 << 0) | (1 << 1);
502 case INTEL_DVO_CHIP_TMDS
:
503 intel_encoder
->cloneable
= (1 << INTEL_OUTPUT_ANALOG
) |
504 (1 << INTEL_OUTPUT_DVO
);
505 drm_connector_init(dev
, connector
,
506 &intel_dvo_connector_funcs
,
507 DRM_MODE_CONNECTOR_DVII
);
508 encoder_type
= DRM_MODE_ENCODER_TMDS
;
510 case INTEL_DVO_CHIP_LVDS
:
511 intel_encoder
->cloneable
= 0;
512 drm_connector_init(dev
, connector
,
513 &intel_dvo_connector_funcs
,
514 DRM_MODE_CONNECTOR_LVDS
);
515 encoder_type
= DRM_MODE_ENCODER_LVDS
;
519 drm_connector_helper_add(connector
,
520 &intel_dvo_connector_helper_funcs
);
521 connector
->display_info
.subpixel_order
= SubPixelHorizontalRGB
;
522 connector
->interlace_allowed
= false;
523 connector
->doublescan_allowed
= false;
525 intel_connector_attach_encoder(intel_connector
, intel_encoder
);
526 if (dvo
->type
== INTEL_DVO_CHIP_LVDS
) {
527 /* For our LVDS chipsets, we should hopefully be able
528 * to dig the fixed panel mode out of the BIOS data.
529 * However, it's in a different format from the BIOS
530 * data on chipsets with integrated LVDS (stored in AIM
531 * headers, likely), so for now, just get the current
532 * mode being output through DVO.
534 intel_panel_init(&intel_connector
->panel
,
535 intel_dvo_get_current_mode(connector
),
537 intel_dvo
->panel_wants_dither
= true;
540 drm_connector_register(connector
);
544 drm_encoder_cleanup(&intel_encoder
->base
);
546 kfree(intel_connector
);