b0ef55833087b35cb422238da023491279f29841
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_lvds.c
1 /*
2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 */
29
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include <drm/drmP.h>
35 #include <drm/drm_crtc.h>
36 #include <drm/drm_edid.h>
37 #include "intel_drv.h"
38 #include <drm/i915_drm.h>
39 #include "i915_drv.h"
40 #include <linux/acpi.h>
41
42 /* Private structure for the integrated LVDS support */
43 struct intel_lvds_connector {
44 struct intel_connector base;
45
46 struct notifier_block lid_notifier;
47 };
48
49 struct intel_lvds_encoder {
50 struct intel_encoder base;
51
52 bool is_dual_link;
53 u32 reg;
54
55 struct intel_lvds_connector *attached_connector;
56 };
57
58 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
59 {
60 return container_of(encoder, struct intel_lvds_encoder, base.base);
61 }
62
63 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
64 {
65 return container_of(connector, struct intel_lvds_connector, base.base);
66 }
67
68 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
69 enum pipe *pipe)
70 {
71 struct drm_device *dev = encoder->base.dev;
72 struct drm_i915_private *dev_priv = dev->dev_private;
73 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
74 u32 tmp;
75
76 tmp = I915_READ(lvds_encoder->reg);
77
78 if (!(tmp & LVDS_PORT_EN))
79 return false;
80
81 if (HAS_PCH_CPT(dev))
82 *pipe = PORT_TO_PIPE_CPT(tmp);
83 else
84 *pipe = PORT_TO_PIPE(tmp);
85
86 return true;
87 }
88
89 static void intel_lvds_get_config(struct intel_encoder *encoder,
90 struct intel_crtc_config *pipe_config)
91 {
92 struct drm_device *dev = encoder->base.dev;
93 struct drm_i915_private *dev_priv = dev->dev_private;
94 u32 lvds_reg, tmp, flags = 0;
95 int dotclock;
96
97 if (HAS_PCH_SPLIT(dev))
98 lvds_reg = PCH_LVDS;
99 else
100 lvds_reg = LVDS;
101
102 tmp = I915_READ(lvds_reg);
103 if (tmp & LVDS_HSYNC_POLARITY)
104 flags |= DRM_MODE_FLAG_NHSYNC;
105 else
106 flags |= DRM_MODE_FLAG_PHSYNC;
107 if (tmp & LVDS_VSYNC_POLARITY)
108 flags |= DRM_MODE_FLAG_NVSYNC;
109 else
110 flags |= DRM_MODE_FLAG_PVSYNC;
111
112 pipe_config->adjusted_mode.flags |= flags;
113
114 /* gen2/3 store dither state in pfit control, needs to match */
115 if (INTEL_INFO(dev)->gen < 4) {
116 tmp = I915_READ(PFIT_CONTROL);
117
118 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
119 }
120
121 dotclock = pipe_config->port_clock;
122
123 if (HAS_PCH_SPLIT(dev_priv->dev))
124 ironlake_check_encoder_dotclock(pipe_config, dotclock);
125
126 pipe_config->adjusted_mode.crtc_clock = dotclock;
127 }
128
129 /* The LVDS pin pair needs to be on before the DPLLs are enabled.
130 * This is an exception to the general rule that mode_set doesn't turn
131 * things on.
132 */
133 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
134 {
135 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
136 struct drm_device *dev = encoder->base.dev;
137 struct drm_i915_private *dev_priv = dev->dev_private;
138 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
139 const struct drm_display_mode *adjusted_mode =
140 &crtc->config.adjusted_mode;
141 int pipe = crtc->pipe;
142 u32 temp;
143
144 if (HAS_PCH_SPLIT(dev)) {
145 assert_fdi_rx_pll_disabled(dev_priv, pipe);
146 assert_shared_dpll_disabled(dev_priv,
147 intel_crtc_to_shared_dpll(crtc));
148 } else {
149 assert_pll_disabled(dev_priv, pipe);
150 }
151
152 temp = I915_READ(lvds_encoder->reg);
153 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
154
155 if (HAS_PCH_CPT(dev)) {
156 temp &= ~PORT_TRANS_SEL_MASK;
157 temp |= PORT_TRANS_SEL_CPT(pipe);
158 } else {
159 if (pipe == 1) {
160 temp |= LVDS_PIPEB_SELECT;
161 } else {
162 temp &= ~LVDS_PIPEB_SELECT;
163 }
164 }
165
166 /* set the corresponsding LVDS_BORDER bit */
167 temp &= ~LVDS_BORDER_ENABLE;
168 temp |= crtc->config.gmch_pfit.lvds_border_bits;
169 /* Set the B0-B3 data pairs corresponding to whether we're going to
170 * set the DPLLs for dual-channel mode or not.
171 */
172 if (lvds_encoder->is_dual_link)
173 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
174 else
175 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
176
177 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
178 * appropriately here, but we need to look more thoroughly into how
179 * panels behave in the two modes.
180 */
181
182 /* Set the dithering flag on LVDS as needed, note that there is no
183 * special lvds dither control bit on pch-split platforms, dithering is
184 * only controlled through the PIPECONF reg. */
185 if (INTEL_INFO(dev)->gen == 4) {
186 /* Bspec wording suggests that LVDS port dithering only exists
187 * for 18bpp panels. */
188 if (crtc->config.dither && crtc->config.pipe_bpp == 18)
189 temp |= LVDS_ENABLE_DITHER;
190 else
191 temp &= ~LVDS_ENABLE_DITHER;
192 }
193 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
194 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
195 temp |= LVDS_HSYNC_POLARITY;
196 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
197 temp |= LVDS_VSYNC_POLARITY;
198
199 I915_WRITE(lvds_encoder->reg, temp);
200 }
201
202 /**
203 * Sets the power state for the panel.
204 */
205 static void intel_enable_lvds(struct intel_encoder *encoder)
206 {
207 struct drm_device *dev = encoder->base.dev;
208 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
209 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
210 struct drm_i915_private *dev_priv = dev->dev_private;
211 u32 ctl_reg, stat_reg;
212
213 if (HAS_PCH_SPLIT(dev)) {
214 ctl_reg = PCH_PP_CONTROL;
215 stat_reg = PCH_PP_STATUS;
216 } else {
217 ctl_reg = PP_CONTROL;
218 stat_reg = PP_STATUS;
219 }
220
221 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
222
223 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
224 POSTING_READ(lvds_encoder->reg);
225 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
226 DRM_ERROR("timed out waiting for panel to power on\n");
227
228 intel_panel_enable_backlight(dev, intel_crtc->pipe);
229 }
230
231 static void intel_disable_lvds(struct intel_encoder *encoder)
232 {
233 struct drm_device *dev = encoder->base.dev;
234 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
235 struct drm_i915_private *dev_priv = dev->dev_private;
236 u32 ctl_reg, stat_reg;
237
238 if (HAS_PCH_SPLIT(dev)) {
239 ctl_reg = PCH_PP_CONTROL;
240 stat_reg = PCH_PP_STATUS;
241 } else {
242 ctl_reg = PP_CONTROL;
243 stat_reg = PP_STATUS;
244 }
245
246 intel_panel_disable_backlight(dev);
247
248 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
249 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
250 DRM_ERROR("timed out waiting for panel to power off\n");
251
252 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
253 POSTING_READ(lvds_encoder->reg);
254 }
255
256 static int intel_lvds_mode_valid(struct drm_connector *connector,
257 struct drm_display_mode *mode)
258 {
259 struct intel_connector *intel_connector = to_intel_connector(connector);
260 struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
261
262 if (mode->hdisplay > fixed_mode->hdisplay)
263 return MODE_PANEL;
264 if (mode->vdisplay > fixed_mode->vdisplay)
265 return MODE_PANEL;
266
267 return MODE_OK;
268 }
269
270 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
271 struct intel_crtc_config *pipe_config)
272 {
273 struct drm_device *dev = intel_encoder->base.dev;
274 struct drm_i915_private *dev_priv = dev->dev_private;
275 struct intel_lvds_encoder *lvds_encoder =
276 to_lvds_encoder(&intel_encoder->base);
277 struct intel_connector *intel_connector =
278 &lvds_encoder->attached_connector->base;
279 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
280 struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
281 unsigned int lvds_bpp;
282
283 /* Should never happen!! */
284 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
285 DRM_ERROR("Can't support LVDS on pipe A\n");
286 return false;
287 }
288
289 if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
290 LVDS_A3_POWER_UP)
291 lvds_bpp = 8*3;
292 else
293 lvds_bpp = 6*3;
294
295 if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
296 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
297 pipe_config->pipe_bpp, lvds_bpp);
298 pipe_config->pipe_bpp = lvds_bpp;
299 }
300
301 /*
302 * We have timings from the BIOS for the panel, put them in
303 * to the adjusted mode. The CRTC will be set up for this mode,
304 * with the panel scaling set up to source from the H/VDisplay
305 * of the original mode.
306 */
307 intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
308 adjusted_mode);
309
310 if (HAS_PCH_SPLIT(dev)) {
311 pipe_config->has_pch_encoder = true;
312
313 intel_pch_panel_fitting(intel_crtc, pipe_config,
314 intel_connector->panel.fitting_mode);
315 } else {
316 intel_gmch_panel_fitting(intel_crtc, pipe_config,
317 intel_connector->panel.fitting_mode);
318
319 }
320
321 /*
322 * XXX: It would be nice to support lower refresh rates on the
323 * panels to reduce power consumption, and perhaps match the
324 * user's requested refresh rate.
325 */
326
327 return true;
328 }
329
330 static void intel_lvds_mode_set(struct intel_encoder *encoder)
331 {
332 /*
333 * We don't do anything here, the LVDS port is fully set up in the pre
334 * enable hook - the ordering constraints for enabling the lvds port vs.
335 * enabling the display pll are too strict.
336 */
337 }
338
339 /**
340 * Detect the LVDS connection.
341 *
342 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
343 * connected and closed means disconnected. We also send hotplug events as
344 * needed, using lid status notification from the input layer.
345 */
346 static enum drm_connector_status
347 intel_lvds_detect(struct drm_connector *connector, bool force)
348 {
349 struct drm_device *dev = connector->dev;
350 enum drm_connector_status status;
351
352 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
353 connector->base.id, drm_get_connector_name(connector));
354
355 status = intel_panel_detect(dev);
356 if (status != connector_status_unknown)
357 return status;
358
359 return connector_status_connected;
360 }
361
362 /**
363 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
364 */
365 static int intel_lvds_get_modes(struct drm_connector *connector)
366 {
367 struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
368 struct drm_device *dev = connector->dev;
369 struct drm_display_mode *mode;
370
371 /* use cached edid if we have one */
372 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
373 return drm_add_edid_modes(connector, lvds_connector->base.edid);
374
375 mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
376 if (mode == NULL)
377 return 0;
378
379 drm_mode_probed_add(connector, mode);
380 return 1;
381 }
382
383 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
384 {
385 DRM_INFO("Skipping forced modeset for %s\n", id->ident);
386 return 1;
387 }
388
389 /* The GPU hangs up on these systems if modeset is performed on LID open */
390 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
391 {
392 .callback = intel_no_modeset_on_lid_dmi_callback,
393 .ident = "Toshiba Tecra A11",
394 .matches = {
395 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
396 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
397 },
398 },
399
400 { } /* terminating entry */
401 };
402
403 /*
404 * Lid events. Note the use of 'modeset':
405 * - we set it to MODESET_ON_LID_OPEN on lid close,
406 * and set it to MODESET_DONE on open
407 * - we use it as a "only once" bit (ie we ignore
408 * duplicate events where it was already properly set)
409 * - the suspend/resume paths will set it to
410 * MODESET_SUSPENDED and ignore the lid open event,
411 * because they restore the mode ("lid open").
412 */
413 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
414 void *unused)
415 {
416 struct intel_lvds_connector *lvds_connector =
417 container_of(nb, struct intel_lvds_connector, lid_notifier);
418 struct drm_connector *connector = &lvds_connector->base.base;
419 struct drm_device *dev = connector->dev;
420 struct drm_i915_private *dev_priv = dev->dev_private;
421
422 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
423 return NOTIFY_OK;
424
425 mutex_lock(&dev_priv->modeset_restore_lock);
426 if (dev_priv->modeset_restore == MODESET_SUSPENDED)
427 goto exit;
428 /*
429 * check and update the status of LVDS connector after receiving
430 * the LID nofication event.
431 */
432 connector->status = connector->funcs->detect(connector, false);
433
434 /* Don't force modeset on machines where it causes a GPU lockup */
435 if (dmi_check_system(intel_no_modeset_on_lid))
436 goto exit;
437 if (!acpi_lid_open()) {
438 /* do modeset on next lid open event */
439 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
440 goto exit;
441 }
442
443 if (dev_priv->modeset_restore == MODESET_DONE)
444 goto exit;
445
446 drm_modeset_lock_all(dev);
447 intel_modeset_setup_hw_state(dev, true);
448 drm_modeset_unlock_all(dev);
449
450 dev_priv->modeset_restore = MODESET_DONE;
451
452 exit:
453 mutex_unlock(&dev_priv->modeset_restore_lock);
454 return NOTIFY_OK;
455 }
456
457 /**
458 * intel_lvds_destroy - unregister and free LVDS structures
459 * @connector: connector to free
460 *
461 * Unregister the DDC bus for this connector then free the driver private
462 * structure.
463 */
464 static void intel_lvds_destroy(struct drm_connector *connector)
465 {
466 struct intel_lvds_connector *lvds_connector =
467 to_lvds_connector(connector);
468
469 if (lvds_connector->lid_notifier.notifier_call)
470 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
471
472 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
473 kfree(lvds_connector->base.edid);
474
475 intel_panel_fini(&lvds_connector->base.panel);
476
477 drm_connector_cleanup(connector);
478 kfree(connector);
479 }
480
481 static int intel_lvds_set_property(struct drm_connector *connector,
482 struct drm_property *property,
483 uint64_t value)
484 {
485 struct intel_connector *intel_connector = to_intel_connector(connector);
486 struct drm_device *dev = connector->dev;
487
488 if (property == dev->mode_config.scaling_mode_property) {
489 struct drm_crtc *crtc;
490
491 if (value == DRM_MODE_SCALE_NONE) {
492 DRM_DEBUG_KMS("no scaling not supported\n");
493 return -EINVAL;
494 }
495
496 if (intel_connector->panel.fitting_mode == value) {
497 /* the LVDS scaling property is not changed */
498 return 0;
499 }
500 intel_connector->panel.fitting_mode = value;
501
502 crtc = intel_attached_encoder(connector)->base.crtc;
503 if (crtc && crtc->enabled) {
504 /*
505 * If the CRTC is enabled, the display will be changed
506 * according to the new panel fitting mode.
507 */
508 intel_crtc_restore_mode(crtc);
509 }
510 }
511
512 return 0;
513 }
514
515 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
516 .get_modes = intel_lvds_get_modes,
517 .mode_valid = intel_lvds_mode_valid,
518 .best_encoder = intel_best_encoder,
519 };
520
521 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
522 .dpms = intel_connector_dpms,
523 .detect = intel_lvds_detect,
524 .fill_modes = drm_helper_probe_single_connector_modes,
525 .set_property = intel_lvds_set_property,
526 .destroy = intel_lvds_destroy,
527 };
528
529 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
530 .destroy = intel_encoder_destroy,
531 };
532
533 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
534 {
535 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
536 return 1;
537 }
538
539 /* These systems claim to have LVDS, but really don't */
540 static const struct dmi_system_id intel_no_lvds[] = {
541 {
542 .callback = intel_no_lvds_dmi_callback,
543 .ident = "Apple Mac Mini (Core series)",
544 .matches = {
545 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
546 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
547 },
548 },
549 {
550 .callback = intel_no_lvds_dmi_callback,
551 .ident = "Apple Mac Mini (Core 2 series)",
552 .matches = {
553 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
554 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
555 },
556 },
557 {
558 .callback = intel_no_lvds_dmi_callback,
559 .ident = "MSI IM-945GSE-A",
560 .matches = {
561 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
562 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
563 },
564 },
565 {
566 .callback = intel_no_lvds_dmi_callback,
567 .ident = "Dell Studio Hybrid",
568 .matches = {
569 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
570 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
571 },
572 },
573 {
574 .callback = intel_no_lvds_dmi_callback,
575 .ident = "Dell OptiPlex FX170",
576 .matches = {
577 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
578 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
579 },
580 },
581 {
582 .callback = intel_no_lvds_dmi_callback,
583 .ident = "AOpen Mini PC",
584 .matches = {
585 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
586 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
587 },
588 },
589 {
590 .callback = intel_no_lvds_dmi_callback,
591 .ident = "AOpen Mini PC MP915",
592 .matches = {
593 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
594 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
595 },
596 },
597 {
598 .callback = intel_no_lvds_dmi_callback,
599 .ident = "AOpen i915GMm-HFS",
600 .matches = {
601 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
602 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
603 },
604 },
605 {
606 .callback = intel_no_lvds_dmi_callback,
607 .ident = "AOpen i45GMx-I",
608 .matches = {
609 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
610 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
611 },
612 },
613 {
614 .callback = intel_no_lvds_dmi_callback,
615 .ident = "Aopen i945GTt-VFA",
616 .matches = {
617 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
618 },
619 },
620 {
621 .callback = intel_no_lvds_dmi_callback,
622 .ident = "Clientron U800",
623 .matches = {
624 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
625 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
626 },
627 },
628 {
629 .callback = intel_no_lvds_dmi_callback,
630 .ident = "Clientron E830",
631 .matches = {
632 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
633 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
634 },
635 },
636 {
637 .callback = intel_no_lvds_dmi_callback,
638 .ident = "Asus EeeBox PC EB1007",
639 .matches = {
640 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
641 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
642 },
643 },
644 {
645 .callback = intel_no_lvds_dmi_callback,
646 .ident = "Asus AT5NM10T-I",
647 .matches = {
648 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
649 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
650 },
651 },
652 {
653 .callback = intel_no_lvds_dmi_callback,
654 .ident = "Hewlett-Packard HP t5740",
655 .matches = {
656 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
657 DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
658 },
659 },
660 {
661 .callback = intel_no_lvds_dmi_callback,
662 .ident = "Hewlett-Packard t5745",
663 .matches = {
664 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
665 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
666 },
667 },
668 {
669 .callback = intel_no_lvds_dmi_callback,
670 .ident = "Hewlett-Packard st5747",
671 .matches = {
672 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
673 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
674 },
675 },
676 {
677 .callback = intel_no_lvds_dmi_callback,
678 .ident = "MSI Wind Box DC500",
679 .matches = {
680 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
681 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
682 },
683 },
684 {
685 .callback = intel_no_lvds_dmi_callback,
686 .ident = "Gigabyte GA-D525TUD",
687 .matches = {
688 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
689 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
690 },
691 },
692 {
693 .callback = intel_no_lvds_dmi_callback,
694 .ident = "Supermicro X7SPA-H",
695 .matches = {
696 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
697 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
698 },
699 },
700 {
701 .callback = intel_no_lvds_dmi_callback,
702 .ident = "Fujitsu Esprimo Q900",
703 .matches = {
704 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
705 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
706 },
707 },
708 {
709 .callback = intel_no_lvds_dmi_callback,
710 .ident = "Intel D410PT",
711 .matches = {
712 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
713 DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
714 },
715 },
716 {
717 .callback = intel_no_lvds_dmi_callback,
718 .ident = "Intel D425KT",
719 .matches = {
720 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
721 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
722 },
723 },
724 {
725 .callback = intel_no_lvds_dmi_callback,
726 .ident = "Intel D510MO",
727 .matches = {
728 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
729 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
730 },
731 },
732 {
733 .callback = intel_no_lvds_dmi_callback,
734 .ident = "Intel D525MW",
735 .matches = {
736 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
737 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
738 },
739 },
740
741 { } /* terminating entry */
742 };
743
744 /**
745 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
746 * @dev: drm device
747 * @connector: LVDS connector
748 *
749 * Find the reduced downclock for LVDS in EDID.
750 */
751 static void intel_find_lvds_downclock(struct drm_device *dev,
752 struct drm_display_mode *fixed_mode,
753 struct drm_connector *connector)
754 {
755 struct drm_i915_private *dev_priv = dev->dev_private;
756 struct drm_display_mode *scan;
757 int temp_downclock;
758
759 temp_downclock = fixed_mode->clock;
760 list_for_each_entry(scan, &connector->probed_modes, head) {
761 /*
762 * If one mode has the same resolution with the fixed_panel
763 * mode while they have the different refresh rate, it means
764 * that the reduced downclock is found for the LVDS. In such
765 * case we can set the different FPx0/1 to dynamically select
766 * between low and high frequency.
767 */
768 if (scan->hdisplay == fixed_mode->hdisplay &&
769 scan->hsync_start == fixed_mode->hsync_start &&
770 scan->hsync_end == fixed_mode->hsync_end &&
771 scan->htotal == fixed_mode->htotal &&
772 scan->vdisplay == fixed_mode->vdisplay &&
773 scan->vsync_start == fixed_mode->vsync_start &&
774 scan->vsync_end == fixed_mode->vsync_end &&
775 scan->vtotal == fixed_mode->vtotal) {
776 if (scan->clock < temp_downclock) {
777 /*
778 * The downclock is already found. But we
779 * expect to find the lower downclock.
780 */
781 temp_downclock = scan->clock;
782 }
783 }
784 }
785 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
786 /* We found the downclock for LVDS. */
787 dev_priv->lvds_downclock_avail = 1;
788 dev_priv->lvds_downclock = temp_downclock;
789 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
790 "Normal clock %dKhz, downclock %dKhz\n",
791 fixed_mode->clock, temp_downclock);
792 }
793 }
794
795 /*
796 * Enumerate the child dev array parsed from VBT to check whether
797 * the LVDS is present.
798 * If it is present, return 1.
799 * If it is not present, return false.
800 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
801 */
802 static bool lvds_is_present_in_vbt(struct drm_device *dev,
803 u8 *i2c_pin)
804 {
805 struct drm_i915_private *dev_priv = dev->dev_private;
806 int i;
807
808 if (!dev_priv->vbt.child_dev_num)
809 return true;
810
811 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
812 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
813 struct old_child_dev_config *child = &uchild->old;
814
815 /* If the device type is not LFP, continue.
816 * We have to check both the new identifiers as well as the
817 * old for compatibility with some BIOSes.
818 */
819 if (child->device_type != DEVICE_TYPE_INT_LFP &&
820 child->device_type != DEVICE_TYPE_LFP)
821 continue;
822
823 if (intel_gmbus_is_port_valid(child->i2c_pin))
824 *i2c_pin = child->i2c_pin;
825
826 /* However, we cannot trust the BIOS writers to populate
827 * the VBT correctly. Since LVDS requires additional
828 * information from AIM blocks, a non-zero addin offset is
829 * a good indicator that the LVDS is actually present.
830 */
831 if (child->addin_offset)
832 return true;
833
834 /* But even then some BIOS writers perform some black magic
835 * and instantiate the device without reference to any
836 * additional data. Trust that if the VBT was written into
837 * the OpRegion then they have validated the LVDS's existence.
838 */
839 if (dev_priv->opregion.vbt)
840 return true;
841 }
842
843 return false;
844 }
845
846 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
847 {
848 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
849 return 1;
850 }
851
852 static const struct dmi_system_id intel_dual_link_lvds[] = {
853 {
854 .callback = intel_dual_link_lvds_callback,
855 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
856 .matches = {
857 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
858 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
859 },
860 },
861 { } /* terminating entry */
862 };
863
864 bool intel_is_dual_link_lvds(struct drm_device *dev)
865 {
866 struct intel_encoder *encoder;
867 struct intel_lvds_encoder *lvds_encoder;
868
869 list_for_each_entry(encoder, &dev->mode_config.encoder_list,
870 base.head) {
871 if (encoder->type == INTEL_OUTPUT_LVDS) {
872 lvds_encoder = to_lvds_encoder(&encoder->base);
873
874 return lvds_encoder->is_dual_link;
875 }
876 }
877
878 return false;
879 }
880
881 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
882 {
883 struct drm_device *dev = lvds_encoder->base.base.dev;
884 unsigned int val;
885 struct drm_i915_private *dev_priv = dev->dev_private;
886
887 /* use the module option value if specified */
888 if (i915_lvds_channel_mode > 0)
889 return i915_lvds_channel_mode == 2;
890
891 if (dmi_check_system(intel_dual_link_lvds))
892 return true;
893
894 /* BIOS should set the proper LVDS register value at boot, but
895 * in reality, it doesn't set the value when the lid is closed;
896 * we need to check "the value to be set" in VBT when LVDS
897 * register is uninitialized.
898 */
899 val = I915_READ(lvds_encoder->reg);
900 if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
901 val = dev_priv->vbt.bios_lvds_val;
902
903 return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
904 }
905
906 static bool intel_lvds_supported(struct drm_device *dev)
907 {
908 /* With the introduction of the PCH we gained a dedicated
909 * LVDS presence pin, use it. */
910 if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
911 return true;
912
913 /* Otherwise LVDS was only attached to mobile products,
914 * except for the inglorious 830gm */
915 if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
916 return true;
917
918 return false;
919 }
920
921 /**
922 * intel_lvds_init - setup LVDS connectors on this device
923 * @dev: drm device
924 *
925 * Create the connector, register the LVDS DDC bus, and try to figure out what
926 * modes we can display on the LVDS panel (if present).
927 */
928 void intel_lvds_init(struct drm_device *dev)
929 {
930 struct drm_i915_private *dev_priv = dev->dev_private;
931 struct intel_lvds_encoder *lvds_encoder;
932 struct intel_encoder *intel_encoder;
933 struct intel_lvds_connector *lvds_connector;
934 struct intel_connector *intel_connector;
935 struct drm_connector *connector;
936 struct drm_encoder *encoder;
937 struct drm_display_mode *scan; /* *modes, *bios_mode; */
938 struct drm_display_mode *fixed_mode = NULL;
939 struct edid *edid;
940 struct drm_crtc *crtc;
941 u32 lvds;
942 int pipe;
943 u8 pin;
944
945 if (!intel_lvds_supported(dev))
946 return;
947
948 /* Skip init on machines we know falsely report LVDS */
949 if (dmi_check_system(intel_no_lvds))
950 return;
951
952 pin = GMBUS_PORT_PANEL;
953 if (!lvds_is_present_in_vbt(dev, &pin)) {
954 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
955 return;
956 }
957
958 if (HAS_PCH_SPLIT(dev)) {
959 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
960 return;
961 if (dev_priv->vbt.edp_support) {
962 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
963 return;
964 }
965 }
966
967 lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
968 if (!lvds_encoder)
969 return;
970
971 lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
972 if (!lvds_connector) {
973 kfree(lvds_encoder);
974 return;
975 }
976
977 lvds_encoder->attached_connector = lvds_connector;
978
979 intel_encoder = &lvds_encoder->base;
980 encoder = &intel_encoder->base;
981 intel_connector = &lvds_connector->base;
982 connector = &intel_connector->base;
983 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
984 DRM_MODE_CONNECTOR_LVDS);
985
986 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
987 DRM_MODE_ENCODER_LVDS);
988
989 intel_encoder->enable = intel_enable_lvds;
990 intel_encoder->pre_enable = intel_pre_enable_lvds;
991 intel_encoder->compute_config = intel_lvds_compute_config;
992 intel_encoder->mode_set = intel_lvds_mode_set;
993 intel_encoder->disable = intel_disable_lvds;
994 intel_encoder->get_hw_state = intel_lvds_get_hw_state;
995 intel_encoder->get_config = intel_lvds_get_config;
996 intel_connector->get_hw_state = intel_connector_get_hw_state;
997
998 intel_connector_attach_encoder(intel_connector, intel_encoder);
999 intel_encoder->type = INTEL_OUTPUT_LVDS;
1000
1001 intel_encoder->cloneable = false;
1002 if (HAS_PCH_SPLIT(dev))
1003 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
1004 else if (IS_GEN4(dev))
1005 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1006 else
1007 intel_encoder->crtc_mask = (1 << 1);
1008
1009 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1010 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1011 connector->interlace_allowed = false;
1012 connector->doublescan_allowed = false;
1013
1014 if (HAS_PCH_SPLIT(dev)) {
1015 lvds_encoder->reg = PCH_LVDS;
1016 } else {
1017 lvds_encoder->reg = LVDS;
1018 }
1019
1020 /* create the scaling mode property */
1021 drm_mode_create_scaling_mode_property(dev);
1022 drm_object_attach_property(&connector->base,
1023 dev->mode_config.scaling_mode_property,
1024 DRM_MODE_SCALE_ASPECT);
1025 intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1026 /*
1027 * LVDS discovery:
1028 * 1) check for EDID on DDC
1029 * 2) check for VBT data
1030 * 3) check to see if LVDS is already on
1031 * if none of the above, no panel
1032 * 4) make sure lid is open
1033 * if closed, act like it's not there for now
1034 */
1035
1036 /*
1037 * Attempt to get the fixed panel mode from DDC. Assume that the
1038 * preferred mode is the right one.
1039 */
1040 edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1041 if (edid) {
1042 if (drm_add_edid_modes(connector, edid)) {
1043 drm_mode_connector_update_edid_property(connector,
1044 edid);
1045 } else {
1046 kfree(edid);
1047 edid = ERR_PTR(-EINVAL);
1048 }
1049 } else {
1050 edid = ERR_PTR(-ENOENT);
1051 }
1052 lvds_connector->base.edid = edid;
1053
1054 if (IS_ERR_OR_NULL(edid)) {
1055 /* Didn't get an EDID, so
1056 * Set wide sync ranges so we get all modes
1057 * handed to valid_mode for checking
1058 */
1059 connector->display_info.min_vfreq = 0;
1060 connector->display_info.max_vfreq = 200;
1061 connector->display_info.min_hfreq = 0;
1062 connector->display_info.max_hfreq = 200;
1063 }
1064
1065 list_for_each_entry(scan, &connector->probed_modes, head) {
1066 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1067 DRM_DEBUG_KMS("using preferred mode from EDID: ");
1068 drm_mode_debug_printmodeline(scan);
1069
1070 fixed_mode = drm_mode_duplicate(dev, scan);
1071 if (fixed_mode) {
1072 intel_find_lvds_downclock(dev, fixed_mode,
1073 connector);
1074 goto out;
1075 }
1076 }
1077 }
1078
1079 /* Failed to get EDID, what about VBT? */
1080 if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1081 DRM_DEBUG_KMS("using mode from VBT: ");
1082 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1083
1084 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1085 if (fixed_mode) {
1086 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1087 goto out;
1088 }
1089 }
1090
1091 /*
1092 * If we didn't get EDID, try checking if the panel is already turned
1093 * on. If so, assume that whatever is currently programmed is the
1094 * correct mode.
1095 */
1096
1097 /* Ironlake: FIXME if still fail, not try pipe mode now */
1098 if (HAS_PCH_SPLIT(dev))
1099 goto failed;
1100
1101 lvds = I915_READ(LVDS);
1102 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1103 crtc = intel_get_crtc_for_pipe(dev, pipe);
1104
1105 if (crtc && (lvds & LVDS_PORT_EN)) {
1106 fixed_mode = intel_crtc_mode_get(dev, crtc);
1107 if (fixed_mode) {
1108 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1109 drm_mode_debug_printmodeline(fixed_mode);
1110 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1111 goto out;
1112 }
1113 }
1114
1115 /* If we still don't have a mode after all that, give up. */
1116 if (!fixed_mode)
1117 goto failed;
1118
1119 out:
1120 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1121 DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1122 lvds_encoder->is_dual_link ? "dual" : "single");
1123
1124 /*
1125 * Unlock registers and just
1126 * leave them unlocked
1127 */
1128 if (HAS_PCH_SPLIT(dev)) {
1129 I915_WRITE(PCH_PP_CONTROL,
1130 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1131 } else {
1132 I915_WRITE(PP_CONTROL,
1133 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1134 }
1135 lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1136 if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1137 DRM_DEBUG_KMS("lid notifier registration failed\n");
1138 lvds_connector->lid_notifier.notifier_call = NULL;
1139 }
1140 drm_sysfs_connector_add(connector);
1141
1142 intel_panel_init(&intel_connector->panel, fixed_mode);
1143 intel_panel_setup_backlight(connector);
1144
1145 return;
1146
1147 failed:
1148 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1149 drm_connector_cleanup(connector);
1150 drm_encoder_cleanup(encoder);
1151 if (fixed_mode)
1152 drm_mode_destroy(dev, fixed_mode);
1153 kfree(lvds_encoder);
1154 kfree(lvds_connector);
1155 return;
1156 }
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