drivers/gpu/drm/i915/intel_panel.c

   1 /*
   2  * Copyright © 2006-2010 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  *      Chris Wilson <chris@chris-wilson.co.uk>
  29  */
  30
  31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  32
  33 #include <linux/moduleparam.h>
  34 #include "intel_drv.h"
  35
  36 #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
  37
  38 void
  39 intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
  40                        struct drm_display_mode *adjusted_mode)
  41 {
  42         adjusted_mode->hdisplay = fixed_mode->hdisplay;
  43         adjusted_mode->hsync_start = fixed_mode->hsync_start;
  44         adjusted_mode->hsync_end = fixed_mode->hsync_end;
  45         adjusted_mode->htotal = fixed_mode->htotal;
  46
  47         adjusted_mode->vdisplay = fixed_mode->vdisplay;
  48         adjusted_mode->vsync_start = fixed_mode->vsync_start;
  49         adjusted_mode->vsync_end = fixed_mode->vsync_end;
  50         adjusted_mode->vtotal = fixed_mode->vtotal;
  51
  52         adjusted_mode->clock = fixed_mode->clock;
  53 }
  54
  55 /* adjusted_mode has been preset to be the panel's fixed mode */
  56 void
  57 intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
  58                         struct intel_crtc_config *pipe_config,
  59                         int fitting_mode)
  60 {
  61         struct drm_display_mode *mode, *adjusted_mode;
  62         int x, y, width, height;
  63
  64         mode = &pipe_config->requested_mode;
  65         adjusted_mode = &pipe_config->adjusted_mode;
  66
  67         x = y = width = height = 0;
  68
  69         /* Native modes don't need fitting */
  70         if (adjusted_mode->hdisplay == mode->hdisplay &&
  71             adjusted_mode->vdisplay == mode->vdisplay)
  72                 goto done;
  73
  74         switch (fitting_mode) {
  75         case DRM_MODE_SCALE_CENTER:
  76                 width = mode->hdisplay;
  77                 height = mode->vdisplay;
  78                 x = (adjusted_mode->hdisplay - width + 1)/2;
  79                 y = (adjusted_mode->vdisplay - height + 1)/2;
  80                 break;
  81
  82         case DRM_MODE_SCALE_ASPECT:
  83                 /* Scale but preserve the aspect ratio */
  84                 {
  85                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  86                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  87                         if (scaled_width > scaled_height) { /* pillar */
  88                                 width = scaled_height / mode->vdisplay;
  89                                 if (width & 1)
  90                                         width++;
  91                                 x = (adjusted_mode->hdisplay - width + 1) / 2;
  92                                 y = 0;
  93                                 height = adjusted_mode->vdisplay;
  94                         } else if (scaled_width < scaled_height) { /* letter */
  95                                 height = scaled_width / mode->hdisplay;
  96                                 if (height & 1)
  97                                     height++;
  98                                 y = (adjusted_mode->vdisplay - height + 1) / 2;
  99                                 x = 0;
 100                                 width = adjusted_mode->hdisplay;
 101                         } else {
 102                                 x = y = 0;
 103                                 width = adjusted_mode->hdisplay;
 104                                 height = adjusted_mode->vdisplay;
 105                         }
 106                 }
 107                 break;
 108
 109         case DRM_MODE_SCALE_FULLSCREEN:
 110                 x = y = 0;
 111                 width = adjusted_mode->hdisplay;
 112                 height = adjusted_mode->vdisplay;
 113                 break;
 114
 115         default:
 116                 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
 117                 return;
 118         }
 119
 120 done:
 121         pipe_config->pch_pfit.pos = (x << 16) | y;
 122         pipe_config->pch_pfit.size = (width << 16) | height;
 123 }
 124
 125 static void
 126 centre_horizontally(struct drm_display_mode *mode,
 127                     int width)
 128 {
 129         u32 border, sync_pos, blank_width, sync_width;
 130
 131         /* keep the hsync and hblank widths constant */
 132         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
 133         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
 134         sync_pos = (blank_width - sync_width + 1) / 2;
 135
 136         border = (mode->hdisplay - width + 1) / 2;
 137         border += border & 1; /* make the border even */
 138
 139         mode->crtc_hdisplay = width;
 140         mode->crtc_hblank_start = width + border;
 141         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
 142
 143         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
 144         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
 145 }
 146
 147 static void
 148 centre_vertically(struct drm_display_mode *mode,
 149                   int height)
 150 {
 151         u32 border, sync_pos, blank_width, sync_width;
 152
 153         /* keep the vsync and vblank widths constant */
 154         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
 155         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
 156         sync_pos = (blank_width - sync_width + 1) / 2;
 157
 158         border = (mode->vdisplay - height + 1) / 2;
 159
 160         mode->crtc_vdisplay = height;
 161         mode->crtc_vblank_start = height + border;
 162         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
 163
 164         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
 165         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
 166 }
 167
 168 static inline u32 panel_fitter_scaling(u32 source, u32 target)
 169 {
 170         /*
 171          * Floating point operation is not supported. So the FACTOR
 172          * is defined, which can avoid the floating point computation
 173          * when calculating the panel ratio.
 174          */
 175 #define ACCURACY 12
 176 #define FACTOR (1 << ACCURACY)
 177         u32 ratio = source * FACTOR / target;
 178         return (FACTOR * ratio + FACTOR/2) / FACTOR;
 179 }
 180
 181 void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
 182                               struct intel_crtc_config *pipe_config,
 183                               int fitting_mode)
 184 {
 185         struct drm_device *dev = intel_crtc->base.dev;
 186         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
 187         struct drm_display_mode *mode, *adjusted_mode;
 188
 189         mode = &pipe_config->requested_mode;
 190         adjusted_mode = &pipe_config->adjusted_mode;
 191
 192         /* Native modes don't need fitting */
 193         if (adjusted_mode->hdisplay == mode->hdisplay &&
 194             adjusted_mode->vdisplay == mode->vdisplay)
 195                 goto out;
 196
 197         drm_mode_set_crtcinfo(adjusted_mode, 0);
 198         pipe_config->timings_set = true;
 199
 200         switch (fitting_mode) {
 201         case DRM_MODE_SCALE_CENTER:
 202                 /*
 203                  * For centered modes, we have to calculate border widths &
 204                  * heights and modify the values programmed into the CRTC.
 205                  */
 206                 centre_horizontally(adjusted_mode, mode->hdisplay);
 207                 centre_vertically(adjusted_mode, mode->vdisplay);
 208                 border = LVDS_BORDER_ENABLE;
 209                 break;
 210         case DRM_MODE_SCALE_ASPECT:
 211                 /* Scale but preserve the aspect ratio */
 212                 if (INTEL_INFO(dev)->gen >= 4) {
 213                         u32 scaled_width = adjusted_mode->hdisplay *
 214                                 mode->vdisplay;
 215                         u32 scaled_height = mode->hdisplay *
 216                                 adjusted_mode->vdisplay;
 217
 218                         /* 965+ is easy, it does everything in hw */
 219                         if (scaled_width > scaled_height)
 220                                 pfit_control |= PFIT_ENABLE |
 221                                         PFIT_SCALING_PILLAR;
 222                         else if (scaled_width < scaled_height)
 223                                 pfit_control |= PFIT_ENABLE |
 224                                         PFIT_SCALING_LETTER;
 225                         else if (adjusted_mode->hdisplay != mode->hdisplay)
 226                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
 227                 } else {
 228                         u32 scaled_width = adjusted_mode->hdisplay *
 229                                 mode->vdisplay;
 230                         u32 scaled_height = mode->hdisplay *
 231                                 adjusted_mode->vdisplay;
 232                         /*
 233                          * For earlier chips we have to calculate the scaling
 234                          * ratio by hand and program it into the
 235                          * PFIT_PGM_RATIO register
 236                          */
 237                         if (scaled_width > scaled_height) { /* pillar */
 238                                 centre_horizontally(adjusted_mode,
 239                                                     scaled_height /
 240                                                     mode->vdisplay);
 241
 242                                 border = LVDS_BORDER_ENABLE;
 243                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
 244                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
 245                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 246                                                             bits << PFIT_VERT_SCALE_SHIFT);
 247                                         pfit_control |= (PFIT_ENABLE |
 248                                                          VERT_INTERP_BILINEAR |
 249                                                          HORIZ_INTERP_BILINEAR);
 250                                 }
 251                         } else if (scaled_width < scaled_height) { /* letter */
 252                                 centre_vertically(adjusted_mode,
 253                                                   scaled_width /
 254                                                   mode->hdisplay);
 255
 256                                 border = LVDS_BORDER_ENABLE;
 257                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
 258                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
 259                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 260                                                             bits << PFIT_VERT_SCALE_SHIFT);
 261                                         pfit_control |= (PFIT_ENABLE |
 262                                                          VERT_INTERP_BILINEAR |
 263                                                          HORIZ_INTERP_BILINEAR);
 264                                 }
 265                         } else {
 266                                 /* Aspects match, Let hw scale both directions */
 267                                 pfit_control |= (PFIT_ENABLE |
 268                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 269                                                  VERT_INTERP_BILINEAR |
 270                                                  HORIZ_INTERP_BILINEAR);
 271                         }
 272                 }
 273                 break;
 274         case DRM_MODE_SCALE_FULLSCREEN:
 275                 /*
 276                  * Full scaling, even if it changes the aspect ratio.
 277                  * Fortunately this is all done for us in hw.
 278                  */
 279                 if (mode->vdisplay != adjusted_mode->vdisplay ||
 280                     mode->hdisplay != adjusted_mode->hdisplay) {
 281                         pfit_control |= PFIT_ENABLE;
 282                         if (INTEL_INFO(dev)->gen >= 4)
 283                                 pfit_control |= PFIT_SCALING_AUTO;
 284                         else
 285                                 pfit_control |= (VERT_AUTO_SCALE |
 286                                                  VERT_INTERP_BILINEAR |
 287                                                  HORIZ_AUTO_SCALE |
 288                                                  HORIZ_INTERP_BILINEAR);
 289                 }
 290                 break;
 291         default:
 292                 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
 293                 return;
 294         }
 295
 296         /* 965+ wants fuzzy fitting */
 297         /* FIXME: handle multiple panels by failing gracefully */
 298         if (INTEL_INFO(dev)->gen >= 4)
 299                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 300                                  PFIT_FILTER_FUZZY);
 301
 302 out:
 303         if ((pfit_control & PFIT_ENABLE) == 0) {
 304                 pfit_control = 0;
 305                 pfit_pgm_ratios = 0;
 306         }
 307
 308         /* Make sure pre-965 set dither correctly for 18bpp panels. */
 309         if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
 310                 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 311
 312         pipe_config->gmch_pfit.control = pfit_control;
 313         pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
 314         pipe_config->gmch_pfit.lvds_border_bits = border;
 315 }
 316
 317 static int is_backlight_combination_mode(struct drm_device *dev)
 318 {
 319         struct drm_i915_private *dev_priv = dev->dev_private;
 320
 321         if (INTEL_INFO(dev)->gen >= 4)
 322                 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
 323
 324         if (IS_GEN2(dev))
 325                 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
 326
 327         return 0;
 328 }
 329
 330 /* XXX: query mode clock or hardware clock and program max PWM appropriately
 331  * when it's 0.
 332  */
 333 static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
 334 {
 335         struct drm_i915_private *dev_priv = dev->dev_private;
 336         u32 val;
 337
 338         WARN_ON_SMP(!spin_is_locked(&dev_priv->backlight.lock));
 339
 340         /* Restore the CTL value if it lost, e.g. GPU reset */
 341
 342         if (HAS_PCH_SPLIT(dev_priv->dev)) {
 343                 val = I915_READ(BLC_PWM_PCH_CTL2);
 344                 if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
 345                         dev_priv->regfile.saveBLC_PWM_CTL2 = val;
 346                 } else if (val == 0) {
 347                         val = dev_priv->regfile.saveBLC_PWM_CTL2;
 348                         I915_WRITE(BLC_PWM_PCH_CTL2, val);
 349                 }
 350         } else {
 351                 val = I915_READ(BLC_PWM_CTL);
 352                 if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
 353                         dev_priv->regfile.saveBLC_PWM_CTL = val;
 354                         if (INTEL_INFO(dev)->gen >= 4)
 355                                 dev_priv->regfile.saveBLC_PWM_CTL2 =
 356                                         I915_READ(BLC_PWM_CTL2);
 357                 } else if (val == 0) {
 358                         val = dev_priv->regfile.saveBLC_PWM_CTL;
 359                         I915_WRITE(BLC_PWM_CTL, val);
 360                         if (INTEL_INFO(dev)->gen >= 4)
 361                                 I915_WRITE(BLC_PWM_CTL2,
 362                                            dev_priv->regfile.saveBLC_PWM_CTL2);
 363                 }
 364         }
 365
 366         return val;
 367 }
 368
 369 static u32 intel_panel_get_max_backlight(struct drm_device *dev)
 370 {
 371         u32 max;
 372
 373         max = i915_read_blc_pwm_ctl(dev);
 374
 375         if (HAS_PCH_SPLIT(dev)) {
 376                 max >>= 16;
 377         } else {
 378                 if (INTEL_INFO(dev)->gen < 4)
 379                         max >>= 17;
 380                 else
 381                         max >>= 16;
 382
 383                 if (is_backlight_combination_mode(dev))
 384                         max *= 0xff;
 385         }
 386
 387         DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
 388
 389         return max;
 390 }
 391
 392 static int i915_panel_invert_brightness;
 393 MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
 394         "(-1 force normal, 0 machine defaults, 1 force inversion), please "
 395         "report PCI device ID, subsystem vendor and subsystem device ID "
 396         "to dri-devel@lists.freedesktop.org, if your machine needs it. "
 397         "It will then be included in an upcoming module version.");
 398 module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
 399 static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
 400 {
 401         struct drm_i915_private *dev_priv = dev->dev_private;
 402
 403         if (i915_panel_invert_brightness < 0)
 404                 return val;
 405
 406         if (i915_panel_invert_brightness > 0 ||
 407             dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
 408                 u32 max = intel_panel_get_max_backlight(dev);
 409                 if (max)
 410                         return max - val;
 411         }
 412
 413         return val;
 414 }
 415
 416 static u32 intel_panel_get_backlight(struct drm_device *dev)
 417 {
 418         struct drm_i915_private *dev_priv = dev->dev_private;
 419         u32 val;
 420         unsigned long flags;
 421
 422         spin_lock_irqsave(&dev_priv->backlight.lock, flags);
 423
 424         if (HAS_PCH_SPLIT(dev)) {
 425                 val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
 426         } else {
 427                 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
 428                 if (INTEL_INFO(dev)->gen < 4)
 429                         val >>= 1;
 430
 431                 if (is_backlight_combination_mode(dev)) {
 432                         u8 lbpc;
 433
 434                         pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
 435                         val *= lbpc;
 436                 }
 437         }
 438
 439         val = intel_panel_compute_brightness(dev, val);
 440
 441         spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
 442
 443         DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
 444         return val;
 445 }
 446
 447 static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
 448 {
 449         struct drm_i915_private *dev_priv = dev->dev_private;
 450         u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
 451         I915_WRITE(BLC_PWM_CPU_CTL, val | level);
 452 }
 453
 454 static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
 455 {
 456         struct drm_i915_private *dev_priv = dev->dev_private;
 457         u32 tmp;
 458
 459         DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
 460         level = intel_panel_compute_brightness(dev, level);
 461
 462         if (HAS_PCH_SPLIT(dev))
 463                 return intel_pch_panel_set_backlight(dev, level);
 464
 465         if (is_backlight_combination_mode(dev)) {
 466                 u32 max = intel_panel_get_max_backlight(dev);
 467                 u8 lbpc;
 468
 469                 /* we're screwed, but keep behaviour backwards compatible */
 470                 if (!max)
 471                         max = 1;
 472
 473                 lbpc = level * 0xfe / max + 1;
 474                 level /= lbpc;
 475                 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
 476         }
 477
 478         tmp = I915_READ(BLC_PWM_CTL);
 479         if (INTEL_INFO(dev)->gen < 4)
 480                 level <<= 1;
 481         tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
 482         I915_WRITE(BLC_PWM_CTL, tmp | level);
 483 }
 484
 485 /* set backlight brightness to level in range [0..max] */
 486 void intel_panel_set_backlight(struct drm_device *dev, u32 level, u32 max)
 487 {
 488         struct drm_i915_private *dev_priv = dev->dev_private;
 489         u32 freq;
 490         unsigned long flags;
 491
 492         spin_lock_irqsave(&dev_priv->backlight.lock, flags);
 493
 494         freq = intel_panel_get_max_backlight(dev);
 495         if (!freq) {
 496                 /* we are screwed, bail out */
 497                 goto out;
 498         }
 499
 500         /* scale to hardware, but be careful to not overflow */
 501         if (freq < max)
 502                 level = level * freq / max;
 503         else
 504                 level = freq / max * level;
 505
 506         dev_priv->backlight.level = level;
 507         if (dev_priv->backlight.device)
 508                 dev_priv->backlight.device->props.brightness = level;
 509
 510         if (dev_priv->backlight.enabled)
 511                 intel_panel_actually_set_backlight(dev, level);
 512 out:
 513         spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
 514 }
 515
 516 void intel_panel_disable_backlight(struct drm_device *dev)
 517 {
 518         struct drm_i915_private *dev_priv = dev->dev_private;
 519         unsigned long flags;
 520
 521         /*
 522          * Do not disable backlight on the vgaswitcheroo path. When switching
 523          * away from i915, the other client may depend on i915 to handle the
 524          * backlight. This will leave the backlight on unnecessarily when
 525          * another client is not activated.
 526          */
 527         if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
 528                 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
 529                 return;
 530         }
 531
 532         spin_lock_irqsave(&dev_priv->backlight.lock, flags);
 533
 534         dev_priv->backlight.enabled = false;
 535         intel_panel_actually_set_backlight(dev, 0);
 536
 537         if (INTEL_INFO(dev)->gen >= 4) {
 538                 uint32_t reg, tmp;
 539
 540                 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
 541
 542                 I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
 543
 544                 if (HAS_PCH_SPLIT(dev)) {
 545                         tmp = I915_READ(BLC_PWM_PCH_CTL1);
 546                         tmp &= ~BLM_PCH_PWM_ENABLE;
 547                         I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
 548                 }
 549         }
 550
 551         spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
 552 }
 553
 554 void intel_panel_enable_backlight(struct drm_device *dev,
 555                                   enum pipe pipe)
 556 {
 557         struct drm_i915_private *dev_priv = dev->dev_private;
 558         enum transcoder cpu_transcoder =
 559                 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
 560         unsigned long flags;
 561
 562         spin_lock_irqsave(&dev_priv->backlight.lock, flags);
 563
 564         if (dev_priv->backlight.level == 0) {
 565                 dev_priv->backlight.level = intel_panel_get_max_backlight(dev);
 566                 if (dev_priv->backlight.device)
 567                         dev_priv->backlight.device->props.brightness =
 568                                 dev_priv->backlight.level;
 569         }
 570
 571         if (INTEL_INFO(dev)->gen >= 4) {
 572                 uint32_t reg, tmp;
 573
 574                 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
 575
 576
 577                 tmp = I915_READ(reg);
 578
 579                 /* Note that this can also get called through dpms changes. And
 580                  * we don't track the backlight dpms state, hence check whether
 581                  * we have to do anything first. */
 582                 if (tmp & BLM_PWM_ENABLE)
 583                         goto set_level;
 584
 585                 if (INTEL_INFO(dev)->num_pipes == 3)
 586                         tmp &= ~BLM_PIPE_SELECT_IVB;
 587                 else
 588                         tmp &= ~BLM_PIPE_SELECT;
 589
 590                 if (cpu_transcoder == TRANSCODER_EDP)
 591                         tmp |= BLM_TRANSCODER_EDP;
 592                 else
 593                         tmp |= BLM_PIPE(cpu_transcoder);
 594                 tmp &= ~BLM_PWM_ENABLE;
 595
 596                 I915_WRITE(reg, tmp);
 597                 POSTING_READ(reg);
 598                 I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
 599
 600                 if (HAS_PCH_SPLIT(dev) &&
 601                     !(dev_priv->quirks & QUIRK_NO_PCH_PWM_ENABLE)) {
 602                         tmp = I915_READ(BLC_PWM_PCH_CTL1);
 603                         tmp |= BLM_PCH_PWM_ENABLE;
 604                         tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
 605                         I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
 606                 }
 607         }
 608
 609 set_level:
 610         /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
 611          * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
 612          * registers are set.
 613          */
 614         dev_priv->backlight.enabled = true;
 615         intel_panel_actually_set_backlight(dev, dev_priv->backlight.level);
 616
 617         spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
 618 }
 619
 620 static void intel_panel_init_backlight(struct drm_device *dev)
 621 {
 622         struct drm_i915_private *dev_priv = dev->dev_private;
 623
 624         dev_priv->backlight.level = intel_panel_get_backlight(dev);
 625         dev_priv->backlight.enabled = dev_priv->backlight.level != 0;
 626 }
 627
 628 enum drm_connector_status
 629 intel_panel_detect(struct drm_device *dev)
 630 {
 631         struct drm_i915_private *dev_priv = dev->dev_private;
 632
 633         /* Assume that the BIOS does not lie through the OpRegion... */
 634         if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
 635                 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
 636                         connector_status_connected :
 637                         connector_status_disconnected;
 638         }
 639
 640         switch (i915_panel_ignore_lid) {
 641         case -2:
 642                 return connector_status_connected;
 643         case -1:
 644                 return connector_status_disconnected;
 645         default:
 646                 return connector_status_unknown;
 647         }
 648 }
 649
 650 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
 651 static int intel_panel_update_status(struct backlight_device *bd)
 652 {
 653         struct drm_device *dev = bl_get_data(bd);
 654         intel_panel_set_backlight(dev, bd->props.brightness,
 655                                   bd->props.max_brightness);
 656         return 0;
 657 }
 658
 659 static int intel_panel_get_brightness(struct backlight_device *bd)
 660 {
 661         struct drm_device *dev = bl_get_data(bd);
 662         return intel_panel_get_backlight(dev);
 663 }
 664
 665 static const struct backlight_ops intel_panel_bl_ops = {
 666         .update_status = intel_panel_update_status,
 667         .get_brightness = intel_panel_get_brightness,
 668 };
 669
 670 int intel_panel_setup_backlight(struct drm_connector *connector)
 671 {
 672         struct drm_device *dev = connector->dev;
 673         struct drm_i915_private *dev_priv = dev->dev_private;
 674         struct backlight_properties props;
 675         unsigned long flags;
 676
 677         intel_panel_init_backlight(dev);
 678
 679         if (WARN_ON(dev_priv->backlight.device))
 680                 return -ENODEV;
 681
 682         memset(&props, 0, sizeof(props));
 683         props.type = BACKLIGHT_RAW;
 684         props.brightness = dev_priv->backlight.level;
 685
 686         spin_lock_irqsave(&dev_priv->backlight.lock, flags);
 687         props.max_brightness = intel_panel_get_max_backlight(dev);
 688         spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
 689
 690         if (props.max_brightness == 0) {
 691                 DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
 692                 return -ENODEV;
 693         }
 694         dev_priv->backlight.device =
 695                 backlight_device_register("intel_backlight",
 696                                           &connector->kdev, dev,
 697                                           &intel_panel_bl_ops, &props);
 698
 699         if (IS_ERR(dev_priv->backlight.device)) {
 700                 DRM_ERROR("Failed to register backlight: %ld\n",
 701                           PTR_ERR(dev_priv->backlight.device));
 702                 dev_priv->backlight.device = NULL;
 703                 return -ENODEV;
 704         }
 705         return 0;
 706 }
 707
 708 void intel_panel_destroy_backlight(struct drm_device *dev)
 709 {
 710         struct drm_i915_private *dev_priv = dev->dev_private;
 711         if (dev_priv->backlight.device) {
 712                 backlight_device_unregister(dev_priv->backlight.device);
 713                 dev_priv->backlight.device = NULL;
 714         }
 715 }
 716 #else
 717 int intel_panel_setup_backlight(struct drm_connector *connector)
 718 {
 719         intel_panel_init_backlight(connector->dev);
 720         return 0;
 721 }
 722
 723 void intel_panel_destroy_backlight(struct drm_device *dev)
 724 {
 725         return;
 726 }
 727 #endif
 728
 729 int intel_panel_init(struct intel_panel *panel,
 730                      struct drm_display_mode *fixed_mode)
 731 {
 732         panel->fixed_mode = fixed_mode;
 733
 734         return 0;
 735 }
 736
 737 void intel_panel_fini(struct intel_panel *panel)
 738 {
 739         struct intel_connector *intel_connector =
 740                 container_of(panel, struct intel_connector, panel);
 741
 742         if (panel->fixed_mode)
 743                 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
 744 }