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drm/i915/sdvo: Add 'force_audio' property
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_sdvo.c
1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include "drmP.h"
32 #include "drm.h"
33 #include "drm_crtc.h"
34 #include "drm_edid.h"
35 #include "intel_drv.h"
36 #include "i915_drm.h"
37 #include "i915_drv.h"
38 #include "intel_sdvo_regs.h"
39
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
44
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
50 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
51
52
53 static const char *tv_format_names[] = {
54 "NTSC_M" , "NTSC_J" , "NTSC_443",
55 "PAL_B" , "PAL_D" , "PAL_G" ,
56 "PAL_H" , "PAL_I" , "PAL_M" ,
57 "PAL_N" , "PAL_NC" , "PAL_60" ,
58 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
59 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
60 "SECAM_60"
61 };
62
63 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
64
65 struct intel_sdvo {
66 struct intel_encoder base;
67
68 struct i2c_adapter *i2c;
69 u8 slave_addr;
70
71 struct i2c_adapter ddc;
72
73 /* Register for the SDVO device: SDVOB or SDVOC */
74 int sdvo_reg;
75
76 /* Active outputs controlled by this SDVO output */
77 uint16_t controlled_output;
78
79 /*
80 * Capabilities of the SDVO device returned by
81 * i830_sdvo_get_capabilities()
82 */
83 struct intel_sdvo_caps caps;
84
85 /* Pixel clock limitations reported by the SDVO device, in kHz */
86 int pixel_clock_min, pixel_clock_max;
87
88 /*
89 * For multiple function SDVO device,
90 * this is for current attached outputs.
91 */
92 uint16_t attached_output;
93
94 /**
95 * This is set if we're going to treat the device as TV-out.
96 *
97 * While we have these nice friendly flags for output types that ought
98 * to decide this for us, the S-Video output on our HDMI+S-Video card
99 * shows up as RGB1 (VGA).
100 */
101 bool is_tv;
102
103 /* This is for current tv format name */
104 int tv_format_index;
105
106 /**
107 * This is set if we treat the device as HDMI, instead of DVI.
108 */
109 bool is_hdmi;
110 bool has_audio;
111
112 /**
113 * This is set if we detect output of sdvo device as LVDS and
114 * have a valid fixed mode to use with the panel.
115 */
116 bool is_lvds;
117
118 /**
119 * This is sdvo fixed pannel mode pointer
120 */
121 struct drm_display_mode *sdvo_lvds_fixed_mode;
122
123 /*
124 * supported encoding mode, used to determine whether HDMI is
125 * supported
126 */
127 struct intel_sdvo_encode encode;
128
129 /* DDC bus used by this SDVO encoder */
130 uint8_t ddc_bus;
131
132 /* Input timings for adjusted_mode */
133 struct intel_sdvo_dtd input_dtd;
134 };
135
136 struct intel_sdvo_connector {
137 struct intel_connector base;
138
139 /* Mark the type of connector */
140 uint16_t output_flag;
141
142 int force_audio;
143
144 /* This contains all current supported TV format */
145 u8 tv_format_supported[TV_FORMAT_NUM];
146 int format_supported_num;
147 struct drm_property *tv_format;
148
149 struct drm_property *force_audio_property;
150
151 /* add the property for the SDVO-TV */
152 struct drm_property *left;
153 struct drm_property *right;
154 struct drm_property *top;
155 struct drm_property *bottom;
156 struct drm_property *hpos;
157 struct drm_property *vpos;
158 struct drm_property *contrast;
159 struct drm_property *saturation;
160 struct drm_property *hue;
161 struct drm_property *sharpness;
162 struct drm_property *flicker_filter;
163 struct drm_property *flicker_filter_adaptive;
164 struct drm_property *flicker_filter_2d;
165 struct drm_property *tv_chroma_filter;
166 struct drm_property *tv_luma_filter;
167 struct drm_property *dot_crawl;
168
169 /* add the property for the SDVO-TV/LVDS */
170 struct drm_property *brightness;
171
172 /* Add variable to record current setting for the above property */
173 u32 left_margin, right_margin, top_margin, bottom_margin;
174
175 /* this is to get the range of margin.*/
176 u32 max_hscan, max_vscan;
177 u32 max_hpos, cur_hpos;
178 u32 max_vpos, cur_vpos;
179 u32 cur_brightness, max_brightness;
180 u32 cur_contrast, max_contrast;
181 u32 cur_saturation, max_saturation;
182 u32 cur_hue, max_hue;
183 u32 cur_sharpness, max_sharpness;
184 u32 cur_flicker_filter, max_flicker_filter;
185 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
186 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
187 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
188 u32 cur_tv_luma_filter, max_tv_luma_filter;
189 u32 cur_dot_crawl, max_dot_crawl;
190 };
191
192 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
193 {
194 return container_of(encoder, struct intel_sdvo, base.base);
195 }
196
197 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
198 {
199 return container_of(intel_attached_encoder(connector),
200 struct intel_sdvo, base);
201 }
202
203 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
204 {
205 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
206 }
207
208 static bool
209 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
210 static bool
211 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
212 struct intel_sdvo_connector *intel_sdvo_connector,
213 int type);
214 static bool
215 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
216 struct intel_sdvo_connector *intel_sdvo_connector);
217
218 /**
219 * Writes the SDVOB or SDVOC with the given value, but always writes both
220 * SDVOB and SDVOC to work around apparent hardware issues (according to
221 * comments in the BIOS).
222 */
223 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
224 {
225 struct drm_device *dev = intel_sdvo->base.base.dev;
226 struct drm_i915_private *dev_priv = dev->dev_private;
227 u32 bval = val, cval = val;
228 int i;
229
230 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
231 I915_WRITE(intel_sdvo->sdvo_reg, val);
232 I915_READ(intel_sdvo->sdvo_reg);
233 return;
234 }
235
236 if (intel_sdvo->sdvo_reg == SDVOB) {
237 cval = I915_READ(SDVOC);
238 } else {
239 bval = I915_READ(SDVOB);
240 }
241 /*
242 * Write the registers twice for luck. Sometimes,
243 * writing them only once doesn't appear to 'stick'.
244 * The BIOS does this too. Yay, magic
245 */
246 for (i = 0; i < 2; i++)
247 {
248 I915_WRITE(SDVOB, bval);
249 I915_READ(SDVOB);
250 I915_WRITE(SDVOC, cval);
251 I915_READ(SDVOC);
252 }
253 }
254
255 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
256 {
257 struct i2c_msg msgs[] = {
258 {
259 .addr = intel_sdvo->slave_addr,
260 .flags = 0,
261 .len = 1,
262 .buf = &addr,
263 },
264 {
265 .addr = intel_sdvo->slave_addr,
266 .flags = I2C_M_RD,
267 .len = 1,
268 .buf = ch,
269 }
270 };
271 int ret;
272
273 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
274 return true;
275
276 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
277 return false;
278 }
279
280 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
281 /** Mapping of command numbers to names, for debug output */
282 static const struct _sdvo_cmd_name {
283 u8 cmd;
284 const char *name;
285 } sdvo_cmd_names[] = {
286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
329
330 /* Add the op code for SDVO enhancements */
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
375
376 /* HDMI op code */
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
397 };
398
399 #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
400 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
401
402 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
403 const void *args, int args_len)
404 {
405 int i;
406
407 DRM_DEBUG_KMS("%s: W: %02X ",
408 SDVO_NAME(intel_sdvo), cmd);
409 for (i = 0; i < args_len; i++)
410 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
411 for (; i < 8; i++)
412 DRM_LOG_KMS(" ");
413 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
414 if (cmd == sdvo_cmd_names[i].cmd) {
415 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
416 break;
417 }
418 }
419 if (i == ARRAY_SIZE(sdvo_cmd_names))
420 DRM_LOG_KMS("(%02X)", cmd);
421 DRM_LOG_KMS("\n");
422 }
423
424 static const char *cmd_status_names[] = {
425 "Power on",
426 "Success",
427 "Not supported",
428 "Invalid arg",
429 "Pending",
430 "Target not specified",
431 "Scaling not supported"
432 };
433
434 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
435 const void *args, int args_len)
436 {
437 u8 buf[args_len*2 + 2], status;
438 struct i2c_msg msgs[args_len + 3];
439 int i, ret;
440
441 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
442
443 for (i = 0; i < args_len; i++) {
444 msgs[i].addr = intel_sdvo->slave_addr;
445 msgs[i].flags = 0;
446 msgs[i].len = 2;
447 msgs[i].buf = buf + 2 *i;
448 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
449 buf[2*i + 1] = ((u8*)args)[i];
450 }
451 msgs[i].addr = intel_sdvo->slave_addr;
452 msgs[i].flags = 0;
453 msgs[i].len = 2;
454 msgs[i].buf = buf + 2*i;
455 buf[2*i + 0] = SDVO_I2C_OPCODE;
456 buf[2*i + 1] = cmd;
457
458 /* the following two are to read the response */
459 status = SDVO_I2C_CMD_STATUS;
460 msgs[i+1].addr = intel_sdvo->slave_addr;
461 msgs[i+1].flags = 0;
462 msgs[i+1].len = 1;
463 msgs[i+1].buf = &status;
464
465 msgs[i+2].addr = intel_sdvo->slave_addr;
466 msgs[i+2].flags = I2C_M_RD;
467 msgs[i+2].len = 1;
468 msgs[i+2].buf = &status;
469
470 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
471 if (ret < 0) {
472 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
473 return false;
474 }
475 if (ret != i+3) {
476 /* failure in I2C transfer */
477 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
478 return false;
479 }
480
481 i = 3;
482 while (status == SDVO_CMD_STATUS_PENDING && i--) {
483 if (!intel_sdvo_read_byte(intel_sdvo,
484 SDVO_I2C_CMD_STATUS,
485 &status))
486 return false;
487 }
488 if (status != SDVO_CMD_STATUS_SUCCESS) {
489 DRM_DEBUG_KMS("command returns response %s [%d]\n",
490 status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP ? cmd_status_names[status] : "???",
491 status);
492 return false;
493 }
494
495 return true;
496 }
497
498 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
499 void *response, int response_len)
500 {
501 u8 retry = 5;
502 u8 status;
503 int i;
504
505 /*
506 * The documentation states that all commands will be
507 * processed within 15µs, and that we need only poll
508 * the status byte a maximum of 3 times in order for the
509 * command to be complete.
510 *
511 * Check 5 times in case the hardware failed to read the docs.
512 */
513 do {
514 if (!intel_sdvo_read_byte(intel_sdvo,
515 SDVO_I2C_CMD_STATUS,
516 &status))
517 return false;
518 } while (status == SDVO_CMD_STATUS_PENDING && --retry);
519
520 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
521 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
522 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
523 else
524 DRM_LOG_KMS("(??? %d)", status);
525
526 if (status != SDVO_CMD_STATUS_SUCCESS)
527 goto log_fail;
528
529 /* Read the command response */
530 for (i = 0; i < response_len; i++) {
531 if (!intel_sdvo_read_byte(intel_sdvo,
532 SDVO_I2C_RETURN_0 + i,
533 &((u8 *)response)[i]))
534 goto log_fail;
535 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
536 }
537 DRM_LOG_KMS("\n");
538 return true;
539
540 log_fail:
541 DRM_LOG_KMS("\n");
542 return false;
543 }
544
545 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
546 {
547 if (mode->clock >= 100000)
548 return 1;
549 else if (mode->clock >= 50000)
550 return 2;
551 else
552 return 4;
553 }
554
555 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
556 u8 ddc_bus)
557 {
558 return intel_sdvo_write_cmd(intel_sdvo,
559 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
560 &ddc_bus, 1);
561 }
562
563 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
564 {
565 return intel_sdvo_write_cmd(intel_sdvo, cmd, data, len);
566 }
567
568 static bool
569 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
570 {
571 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
572 return false;
573
574 return intel_sdvo_read_response(intel_sdvo, value, len);
575 }
576
577 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
578 {
579 struct intel_sdvo_set_target_input_args targets = {0};
580 return intel_sdvo_set_value(intel_sdvo,
581 SDVO_CMD_SET_TARGET_INPUT,
582 &targets, sizeof(targets));
583 }
584
585 /**
586 * Return whether each input is trained.
587 *
588 * This function is making an assumption about the layout of the response,
589 * which should be checked against the docs.
590 */
591 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
592 {
593 struct intel_sdvo_get_trained_inputs_response response;
594
595 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
596 &response, sizeof(response)))
597 return false;
598
599 *input_1 = response.input0_trained;
600 *input_2 = response.input1_trained;
601 return true;
602 }
603
604 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
605 u16 outputs)
606 {
607 return intel_sdvo_set_value(intel_sdvo,
608 SDVO_CMD_SET_ACTIVE_OUTPUTS,
609 &outputs, sizeof(outputs));
610 }
611
612 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
613 int mode)
614 {
615 u8 state = SDVO_ENCODER_STATE_ON;
616
617 switch (mode) {
618 case DRM_MODE_DPMS_ON:
619 state = SDVO_ENCODER_STATE_ON;
620 break;
621 case DRM_MODE_DPMS_STANDBY:
622 state = SDVO_ENCODER_STATE_STANDBY;
623 break;
624 case DRM_MODE_DPMS_SUSPEND:
625 state = SDVO_ENCODER_STATE_SUSPEND;
626 break;
627 case DRM_MODE_DPMS_OFF:
628 state = SDVO_ENCODER_STATE_OFF;
629 break;
630 }
631
632 return intel_sdvo_set_value(intel_sdvo,
633 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
634 }
635
636 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
637 int *clock_min,
638 int *clock_max)
639 {
640 struct intel_sdvo_pixel_clock_range clocks;
641
642 if (!intel_sdvo_get_value(intel_sdvo,
643 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
644 &clocks, sizeof(clocks)))
645 return false;
646
647 /* Convert the values from units of 10 kHz to kHz. */
648 *clock_min = clocks.min * 10;
649 *clock_max = clocks.max * 10;
650 return true;
651 }
652
653 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
654 u16 outputs)
655 {
656 return intel_sdvo_set_value(intel_sdvo,
657 SDVO_CMD_SET_TARGET_OUTPUT,
658 &outputs, sizeof(outputs));
659 }
660
661 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
662 struct intel_sdvo_dtd *dtd)
663 {
664 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
665 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
666 }
667
668 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
669 struct intel_sdvo_dtd *dtd)
670 {
671 return intel_sdvo_set_timing(intel_sdvo,
672 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
673 }
674
675 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
676 struct intel_sdvo_dtd *dtd)
677 {
678 return intel_sdvo_set_timing(intel_sdvo,
679 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
680 }
681
682 static bool
683 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
684 uint16_t clock,
685 uint16_t width,
686 uint16_t height)
687 {
688 struct intel_sdvo_preferred_input_timing_args args;
689
690 memset(&args, 0, sizeof(args));
691 args.clock = clock;
692 args.width = width;
693 args.height = height;
694 args.interlace = 0;
695
696 if (intel_sdvo->is_lvds &&
697 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
698 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
699 args.scaled = 1;
700
701 return intel_sdvo_set_value(intel_sdvo,
702 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
703 &args, sizeof(args));
704 }
705
706 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
707 struct intel_sdvo_dtd *dtd)
708 {
709 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
710 &dtd->part1, sizeof(dtd->part1)) &&
711 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
712 &dtd->part2, sizeof(dtd->part2));
713 }
714
715 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
716 {
717 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
718 }
719
720 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
721 const struct drm_display_mode *mode)
722 {
723 uint16_t width, height;
724 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
725 uint16_t h_sync_offset, v_sync_offset;
726
727 width = mode->crtc_hdisplay;
728 height = mode->crtc_vdisplay;
729
730 /* do some mode translations */
731 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
732 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
733
734 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
735 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
736
737 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
738 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
739
740 dtd->part1.clock = mode->clock / 10;
741 dtd->part1.h_active = width & 0xff;
742 dtd->part1.h_blank = h_blank_len & 0xff;
743 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
744 ((h_blank_len >> 8) & 0xf);
745 dtd->part1.v_active = height & 0xff;
746 dtd->part1.v_blank = v_blank_len & 0xff;
747 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
748 ((v_blank_len >> 8) & 0xf);
749
750 dtd->part2.h_sync_off = h_sync_offset & 0xff;
751 dtd->part2.h_sync_width = h_sync_len & 0xff;
752 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
753 (v_sync_len & 0xf);
754 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
755 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
756 ((v_sync_len & 0x30) >> 4);
757
758 dtd->part2.dtd_flags = 0x18;
759 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
760 dtd->part2.dtd_flags |= 0x2;
761 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
762 dtd->part2.dtd_flags |= 0x4;
763
764 dtd->part2.sdvo_flags = 0;
765 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
766 dtd->part2.reserved = 0;
767 }
768
769 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
770 const struct intel_sdvo_dtd *dtd)
771 {
772 mode->hdisplay = dtd->part1.h_active;
773 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
774 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
775 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
776 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
777 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
778 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
779 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
780
781 mode->vdisplay = dtd->part1.v_active;
782 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
783 mode->vsync_start = mode->vdisplay;
784 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
785 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
786 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
787 mode->vsync_end = mode->vsync_start +
788 (dtd->part2.v_sync_off_width & 0xf);
789 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
790 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
791 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
792
793 mode->clock = dtd->part1.clock * 10;
794
795 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
796 if (dtd->part2.dtd_flags & 0x2)
797 mode->flags |= DRM_MODE_FLAG_PHSYNC;
798 if (dtd->part2.dtd_flags & 0x4)
799 mode->flags |= DRM_MODE_FLAG_PVSYNC;
800 }
801
802 static bool intel_sdvo_get_supp_encode(struct intel_sdvo *intel_sdvo,
803 struct intel_sdvo_encode *encode)
804 {
805 if (intel_sdvo_get_value(intel_sdvo,
806 SDVO_CMD_GET_SUPP_ENCODE,
807 encode, sizeof(*encode)))
808 return true;
809
810 /* non-support means DVI */
811 memset(encode, 0, sizeof(*encode));
812 return false;
813 }
814
815 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
816 uint8_t mode)
817 {
818 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
819 }
820
821 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
822 uint8_t mode)
823 {
824 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
825 }
826
827 #if 0
828 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
829 {
830 int i, j;
831 uint8_t set_buf_index[2];
832 uint8_t av_split;
833 uint8_t buf_size;
834 uint8_t buf[48];
835 uint8_t *pos;
836
837 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
838
839 for (i = 0; i <= av_split; i++) {
840 set_buf_index[0] = i; set_buf_index[1] = 0;
841 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
842 set_buf_index, 2);
843 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
844 intel_sdvo_read_response(encoder, &buf_size, 1);
845
846 pos = buf;
847 for (j = 0; j <= buf_size; j += 8) {
848 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
849 NULL, 0);
850 intel_sdvo_read_response(encoder, pos, 8);
851 pos += 8;
852 }
853 }
854 }
855 #endif
856
857 static bool intel_sdvo_set_hdmi_buf(struct intel_sdvo *intel_sdvo,
858 int index,
859 uint8_t *data, int8_t size, uint8_t tx_rate)
860 {
861 uint8_t set_buf_index[2];
862
863 set_buf_index[0] = index;
864 set_buf_index[1] = 0;
865
866 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
867 set_buf_index, 2))
868 return false;
869
870 for (; size > 0; size -= 8) {
871 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA, data, 8))
872 return false;
873
874 data += 8;
875 }
876
877 return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE, &tx_rate, 1);
878 }
879
880 static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data, uint8_t size)
881 {
882 uint8_t csum = 0;
883 int i;
884
885 for (i = 0; i < size; i++)
886 csum += data[i];
887
888 return 0x100 - csum;
889 }
890
891 #define DIP_TYPE_AVI 0x82
892 #define DIP_VERSION_AVI 0x2
893 #define DIP_LEN_AVI 13
894
895 struct dip_infoframe {
896 uint8_t type;
897 uint8_t version;
898 uint8_t len;
899 uint8_t checksum;
900 union {
901 struct {
902 /* Packet Byte #1 */
903 uint8_t S:2;
904 uint8_t B:2;
905 uint8_t A:1;
906 uint8_t Y:2;
907 uint8_t rsvd1:1;
908 /* Packet Byte #2 */
909 uint8_t R:4;
910 uint8_t M:2;
911 uint8_t C:2;
912 /* Packet Byte #3 */
913 uint8_t SC:2;
914 uint8_t Q:2;
915 uint8_t EC:3;
916 uint8_t ITC:1;
917 /* Packet Byte #4 */
918 uint8_t VIC:7;
919 uint8_t rsvd2:1;
920 /* Packet Byte #5 */
921 uint8_t PR:4;
922 uint8_t rsvd3:4;
923 /* Packet Byte #6~13 */
924 uint16_t top_bar_end;
925 uint16_t bottom_bar_start;
926 uint16_t left_bar_end;
927 uint16_t right_bar_start;
928 } avi;
929 struct {
930 /* Packet Byte #1 */
931 uint8_t channel_count:3;
932 uint8_t rsvd1:1;
933 uint8_t coding_type:4;
934 /* Packet Byte #2 */
935 uint8_t sample_size:2; /* SS0, SS1 */
936 uint8_t sample_frequency:3;
937 uint8_t rsvd2:3;
938 /* Packet Byte #3 */
939 uint8_t coding_type_private:5;
940 uint8_t rsvd3:3;
941 /* Packet Byte #4 */
942 uint8_t channel_allocation;
943 /* Packet Byte #5 */
944 uint8_t rsvd4:3;
945 uint8_t level_shift:4;
946 uint8_t downmix_inhibit:1;
947 } audio;
948 uint8_t payload[28];
949 } __attribute__ ((packed)) u;
950 } __attribute__((packed));
951
952 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
953 struct drm_display_mode * mode)
954 {
955 struct dip_infoframe avi_if = {
956 .type = DIP_TYPE_AVI,
957 .version = DIP_VERSION_AVI,
958 .len = DIP_LEN_AVI,
959 };
960
961 avi_if.checksum = intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if,
962 4 + avi_if.len);
963 return intel_sdvo_set_hdmi_buf(intel_sdvo, 1, (uint8_t *)&avi_if,
964 4 + avi_if.len,
965 SDVO_HBUF_TX_VSYNC);
966 }
967
968 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
969 {
970 struct intel_sdvo_tv_format format;
971 uint32_t format_map;
972
973 format_map = 1 << intel_sdvo->tv_format_index;
974 memset(&format, 0, sizeof(format));
975 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
976
977 BUILD_BUG_ON(sizeof(format) != 6);
978 return intel_sdvo_set_value(intel_sdvo,
979 SDVO_CMD_SET_TV_FORMAT,
980 &format, sizeof(format));
981 }
982
983 static bool
984 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
985 struct drm_display_mode *mode)
986 {
987 struct intel_sdvo_dtd output_dtd;
988
989 if (!intel_sdvo_set_target_output(intel_sdvo,
990 intel_sdvo->attached_output))
991 return false;
992
993 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
994 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
995 return false;
996
997 return true;
998 }
999
1000 static bool
1001 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
1002 struct drm_display_mode *mode,
1003 struct drm_display_mode *adjusted_mode)
1004 {
1005 /* Reset the input timing to the screen. Assume always input 0. */
1006 if (!intel_sdvo_set_target_input(intel_sdvo))
1007 return false;
1008
1009 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1010 mode->clock / 10,
1011 mode->hdisplay,
1012 mode->vdisplay))
1013 return false;
1014
1015 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1016 &intel_sdvo->input_dtd))
1017 return false;
1018
1019 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
1020
1021 drm_mode_set_crtcinfo(adjusted_mode, 0);
1022 return true;
1023 }
1024
1025 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1026 struct drm_display_mode *mode,
1027 struct drm_display_mode *adjusted_mode)
1028 {
1029 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1030 int multiplier;
1031
1032 /* We need to construct preferred input timings based on our
1033 * output timings. To do that, we have to set the output
1034 * timings, even though this isn't really the right place in
1035 * the sequence to do it. Oh well.
1036 */
1037 if (intel_sdvo->is_tv) {
1038 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1039 return false;
1040
1041 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
1042 mode,
1043 adjusted_mode);
1044 } else if (intel_sdvo->is_lvds) {
1045 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1046 intel_sdvo->sdvo_lvds_fixed_mode))
1047 return false;
1048
1049 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
1050 mode,
1051 adjusted_mode);
1052 }
1053
1054 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1055 * SDVO device will factor out the multiplier during mode_set.
1056 */
1057 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1058 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1059
1060 return true;
1061 }
1062
1063 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1064 struct drm_display_mode *mode,
1065 struct drm_display_mode *adjusted_mode)
1066 {
1067 struct drm_device *dev = encoder->dev;
1068 struct drm_i915_private *dev_priv = dev->dev_private;
1069 struct drm_crtc *crtc = encoder->crtc;
1070 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1071 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1072 u32 sdvox;
1073 struct intel_sdvo_in_out_map in_out;
1074 struct intel_sdvo_dtd input_dtd;
1075 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1076 int rate;
1077
1078 if (!mode)
1079 return;
1080
1081 /* First, set the input mapping for the first input to our controlled
1082 * output. This is only correct if we're a single-input device, in
1083 * which case the first input is the output from the appropriate SDVO
1084 * channel on the motherboard. In a two-input device, the first input
1085 * will be SDVOB and the second SDVOC.
1086 */
1087 in_out.in0 = intel_sdvo->attached_output;
1088 in_out.in1 = 0;
1089
1090 intel_sdvo_set_value(intel_sdvo,
1091 SDVO_CMD_SET_IN_OUT_MAP,
1092 &in_out, sizeof(in_out));
1093
1094 /* Set the output timings to the screen */
1095 if (!intel_sdvo_set_target_output(intel_sdvo,
1096 intel_sdvo->attached_output))
1097 return;
1098
1099 /* We have tried to get input timing in mode_fixup, and filled into
1100 * adjusted_mode.
1101 */
1102 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1103 input_dtd = intel_sdvo->input_dtd;
1104 } else {
1105 /* Set the output timing to the screen */
1106 if (!intel_sdvo_set_target_output(intel_sdvo,
1107 intel_sdvo->attached_output))
1108 return;
1109
1110 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1111 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
1112 }
1113
1114 /* Set the input timing to the screen. Assume always input 0. */
1115 if (!intel_sdvo_set_target_input(intel_sdvo))
1116 return;
1117
1118 if (intel_sdvo->is_hdmi &&
1119 !intel_sdvo_set_avi_infoframe(intel_sdvo, mode))
1120 return;
1121
1122 if (intel_sdvo->is_tv &&
1123 !intel_sdvo_set_tv_format(intel_sdvo))
1124 return;
1125
1126 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1127
1128 switch (pixel_multiplier) {
1129 default:
1130 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1131 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1132 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1133 }
1134 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1135 return;
1136
1137 /* Set the SDVO control regs. */
1138 if (INTEL_INFO(dev)->gen >= 4) {
1139 sdvox = SDVO_BORDER_ENABLE;
1140 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1141 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1142 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1143 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
1144 } else {
1145 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1146 switch (intel_sdvo->sdvo_reg) {
1147 case SDVOB:
1148 sdvox &= SDVOB_PRESERVE_MASK;
1149 break;
1150 case SDVOC:
1151 sdvox &= SDVOC_PRESERVE_MASK;
1152 break;
1153 }
1154 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1155 }
1156 if (intel_crtc->pipe == 1)
1157 sdvox |= SDVO_PIPE_B_SELECT;
1158 if (intel_sdvo->has_audio)
1159 sdvox |= SDVO_AUDIO_ENABLE;
1160
1161 if (INTEL_INFO(dev)->gen >= 4) {
1162 /* done in crtc_mode_set as the dpll_md reg must be written early */
1163 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1164 /* done in crtc_mode_set as it lives inside the dpll register */
1165 } else {
1166 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1167 }
1168
1169 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
1170 sdvox |= SDVO_STALL_SELECT;
1171 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1172 }
1173
1174 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1175 {
1176 struct drm_device *dev = encoder->dev;
1177 struct drm_i915_private *dev_priv = dev->dev_private;
1178 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1179 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1180 u32 temp;
1181
1182 if (mode != DRM_MODE_DPMS_ON) {
1183 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1184 if (0)
1185 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1186
1187 if (mode == DRM_MODE_DPMS_OFF) {
1188 temp = I915_READ(intel_sdvo->sdvo_reg);
1189 if ((temp & SDVO_ENABLE) != 0) {
1190 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1191 }
1192 }
1193 } else {
1194 bool input1, input2;
1195 int i;
1196 u8 status;
1197
1198 temp = I915_READ(intel_sdvo->sdvo_reg);
1199 if ((temp & SDVO_ENABLE) == 0)
1200 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1201 for (i = 0; i < 2; i++)
1202 intel_wait_for_vblank(dev, intel_crtc->pipe);
1203
1204 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1205 /* Warn if the device reported failure to sync.
1206 * A lot of SDVO devices fail to notify of sync, but it's
1207 * a given it the status is a success, we succeeded.
1208 */
1209 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1210 DRM_DEBUG_KMS("First %s output reported failure to "
1211 "sync\n", SDVO_NAME(intel_sdvo));
1212 }
1213
1214 if (0)
1215 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1216 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1217 }
1218 return;
1219 }
1220
1221 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1222 struct drm_display_mode *mode)
1223 {
1224 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1225
1226 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1227 return MODE_NO_DBLESCAN;
1228
1229 if (intel_sdvo->pixel_clock_min > mode->clock)
1230 return MODE_CLOCK_LOW;
1231
1232 if (intel_sdvo->pixel_clock_max < mode->clock)
1233 return MODE_CLOCK_HIGH;
1234
1235 if (intel_sdvo->is_lvds) {
1236 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1237 return MODE_PANEL;
1238
1239 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1240 return MODE_PANEL;
1241 }
1242
1243 return MODE_OK;
1244 }
1245
1246 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1247 {
1248 if (!intel_sdvo_get_value(intel_sdvo,
1249 SDVO_CMD_GET_DEVICE_CAPS,
1250 caps, sizeof(*caps)))
1251 return false;
1252
1253 DRM_DEBUG_KMS("SDVO capabilities:\n"
1254 " vendor_id: %d\n"
1255 " device_id: %d\n"
1256 " device_rev_id: %d\n"
1257 " sdvo_version_major: %d\n"
1258 " sdvo_version_minor: %d\n"
1259 " sdvo_inputs_mask: %d\n"
1260 " smooth_scaling: %d\n"
1261 " sharp_scaling: %d\n"
1262 " up_scaling: %d\n"
1263 " down_scaling: %d\n"
1264 " stall_support: %d\n"
1265 " output_flags: %d\n",
1266 caps->vendor_id,
1267 caps->device_id,
1268 caps->device_rev_id,
1269 caps->sdvo_version_major,
1270 caps->sdvo_version_minor,
1271 caps->sdvo_inputs_mask,
1272 caps->smooth_scaling,
1273 caps->sharp_scaling,
1274 caps->up_scaling,
1275 caps->down_scaling,
1276 caps->stall_support,
1277 caps->output_flags);
1278
1279 return true;
1280 }
1281
1282 /* No use! */
1283 #if 0
1284 struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1285 {
1286 struct drm_connector *connector = NULL;
1287 struct intel_sdvo *iout = NULL;
1288 struct intel_sdvo *sdvo;
1289
1290 /* find the sdvo connector */
1291 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1292 iout = to_intel_sdvo(connector);
1293
1294 if (iout->type != INTEL_OUTPUT_SDVO)
1295 continue;
1296
1297 sdvo = iout->dev_priv;
1298
1299 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1300 return connector;
1301
1302 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1303 return connector;
1304
1305 }
1306
1307 return NULL;
1308 }
1309
1310 int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1311 {
1312 u8 response[2];
1313 u8 status;
1314 struct intel_sdvo *intel_sdvo;
1315 DRM_DEBUG_KMS("\n");
1316
1317 if (!connector)
1318 return 0;
1319
1320 intel_sdvo = to_intel_sdvo(connector);
1321
1322 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1323 &response, 2) && response[0];
1324 }
1325
1326 void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1327 {
1328 u8 response[2];
1329 u8 status;
1330 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
1331
1332 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1333 intel_sdvo_read_response(intel_sdvo, &response, 2);
1334
1335 if (on) {
1336 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1337 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
1338
1339 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1340 } else {
1341 response[0] = 0;
1342 response[1] = 0;
1343 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1344 }
1345
1346 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1347 intel_sdvo_read_response(intel_sdvo, &response, 2);
1348 }
1349 #endif
1350
1351 static bool
1352 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1353 {
1354 int caps = 0;
1355
1356 if (intel_sdvo->caps.output_flags &
1357 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1358 caps++;
1359 if (intel_sdvo->caps.output_flags &
1360 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1361 caps++;
1362 if (intel_sdvo->caps.output_flags &
1363 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
1364 caps++;
1365 if (intel_sdvo->caps.output_flags &
1366 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1367 caps++;
1368 if (intel_sdvo->caps.output_flags &
1369 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1370 caps++;
1371
1372 if (intel_sdvo->caps.output_flags &
1373 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1374 caps++;
1375
1376 if (intel_sdvo->caps.output_flags &
1377 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1378 caps++;
1379
1380 return (caps > 1);
1381 }
1382
1383 static struct edid *
1384 intel_sdvo_get_edid(struct drm_connector *connector)
1385 {
1386 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1387 return drm_get_edid(connector, &sdvo->ddc);
1388 }
1389
1390 static struct drm_connector *
1391 intel_find_analog_connector(struct drm_device *dev)
1392 {
1393 struct drm_connector *connector;
1394 struct intel_sdvo *encoder;
1395
1396 list_for_each_entry(encoder,
1397 &dev->mode_config.encoder_list,
1398 base.base.head) {
1399 if (encoder->base.type == INTEL_OUTPUT_ANALOG) {
1400 list_for_each_entry(connector,
1401 &dev->mode_config.connector_list,
1402 head) {
1403 if (&encoder->base ==
1404 intel_attached_encoder(connector))
1405 return connector;
1406 }
1407 }
1408 }
1409
1410 return NULL;
1411 }
1412
1413 static int
1414 intel_analog_is_connected(struct drm_device *dev)
1415 {
1416 struct drm_connector *analog_connector;
1417
1418 analog_connector = intel_find_analog_connector(dev);
1419 if (!analog_connector)
1420 return false;
1421
1422 if (analog_connector->funcs->detect(analog_connector, false) ==
1423 connector_status_disconnected)
1424 return false;
1425
1426 return true;
1427 }
1428
1429 /* Mac mini hack -- use the same DDC as the analog connector */
1430 static struct edid *
1431 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1432 {
1433 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1434
1435 if (!intel_analog_is_connected(connector->dev))
1436 return NULL;
1437
1438 return drm_get_edid(connector, &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1439 }
1440
1441 enum drm_connector_status
1442 intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1443 {
1444 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1445 enum drm_connector_status status;
1446 struct edid *edid;
1447
1448 edid = intel_sdvo_get_edid(connector);
1449
1450 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1451 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1452
1453 /*
1454 * Don't use the 1 as the argument of DDC bus switch to get
1455 * the EDID. It is used for SDVO SPD ROM.
1456 */
1457 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1458 intel_sdvo->ddc_bus = ddc;
1459 edid = intel_sdvo_get_edid(connector);
1460 if (edid)
1461 break;
1462 }
1463 /*
1464 * If we found the EDID on the other bus,
1465 * assume that is the correct DDC bus.
1466 */
1467 if (edid == NULL)
1468 intel_sdvo->ddc_bus = saved_ddc;
1469 }
1470
1471 /*
1472 * When there is no edid and no monitor is connected with VGA
1473 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1474 */
1475 if (edid == NULL)
1476 edid = intel_sdvo_get_analog_edid(connector);
1477
1478 status = connector_status_unknown;
1479 if (edid != NULL) {
1480 /* DDC bus is shared, match EDID to connector type */
1481 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1482 status = connector_status_connected;
1483 intel_sdvo->is_hdmi = drm_detect_hdmi_monitor(edid);
1484 intel_sdvo->has_audio = drm_detect_monitor_audio(edid);
1485 }
1486 connector->display_info.raw_edid = NULL;
1487 kfree(edid);
1488 }
1489
1490 if (status == connector_status_connected) {
1491 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1492 if (intel_sdvo_connector->force_audio)
1493 intel_sdvo->has_audio = intel_sdvo_connector->force_audio > 0;
1494 }
1495
1496 return status;
1497 }
1498
1499 static enum drm_connector_status
1500 intel_sdvo_detect(struct drm_connector *connector, bool force)
1501 {
1502 uint16_t response;
1503 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1504 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1505 enum drm_connector_status ret;
1506
1507 if (!intel_sdvo_write_cmd(intel_sdvo,
1508 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1509 return connector_status_unknown;
1510 if (intel_sdvo->is_tv) {
1511 /* add 30ms delay when the output type is SDVO-TV */
1512 mdelay(30);
1513 }
1514 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1515 return connector_status_unknown;
1516
1517 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1518 response & 0xff, response >> 8,
1519 intel_sdvo_connector->output_flag);
1520
1521 if (response == 0)
1522 return connector_status_disconnected;
1523
1524 intel_sdvo->attached_output = response;
1525
1526 if ((intel_sdvo_connector->output_flag & response) == 0)
1527 ret = connector_status_disconnected;
1528 else if (response & SDVO_TMDS_MASK)
1529 ret = intel_sdvo_hdmi_sink_detect(connector);
1530 else
1531 ret = connector_status_connected;
1532
1533 /* May update encoder flag for like clock for SDVO TV, etc.*/
1534 if (ret == connector_status_connected) {
1535 intel_sdvo->is_tv = false;
1536 intel_sdvo->is_lvds = false;
1537 intel_sdvo->base.needs_tv_clock = false;
1538
1539 if (response & SDVO_TV_MASK) {
1540 intel_sdvo->is_tv = true;
1541 intel_sdvo->base.needs_tv_clock = true;
1542 }
1543 if (response & SDVO_LVDS_MASK)
1544 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1545 }
1546
1547 return ret;
1548 }
1549
1550 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1551 {
1552 struct edid *edid;
1553
1554 /* set the bus switch and get the modes */
1555 edid = intel_sdvo_get_edid(connector);
1556
1557 /*
1558 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1559 * link between analog and digital outputs. So, if the regular SDVO
1560 * DDC fails, check to see if the analog output is disconnected, in
1561 * which case we'll look there for the digital DDC data.
1562 */
1563 if (edid == NULL)
1564 edid = intel_sdvo_get_analog_edid(connector);
1565
1566 if (edid != NULL) {
1567 drm_mode_connector_update_edid_property(connector, edid);
1568 drm_add_edid_modes(connector, edid);
1569 connector->display_info.raw_edid = NULL;
1570 kfree(edid);
1571 }
1572 }
1573
1574 /*
1575 * Set of SDVO TV modes.
1576 * Note! This is in reply order (see loop in get_tv_modes).
1577 * XXX: all 60Hz refresh?
1578 */
1579 struct drm_display_mode sdvo_tv_modes[] = {
1580 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1581 416, 0, 200, 201, 232, 233, 0,
1582 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1583 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1584 416, 0, 240, 241, 272, 273, 0,
1585 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1586 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1587 496, 0, 300, 301, 332, 333, 0,
1588 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1589 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1590 736, 0, 350, 351, 382, 383, 0,
1591 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1592 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1593 736, 0, 400, 401, 432, 433, 0,
1594 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1595 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1596 736, 0, 480, 481, 512, 513, 0,
1597 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1598 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1599 800, 0, 480, 481, 512, 513, 0,
1600 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1601 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1602 800, 0, 576, 577, 608, 609, 0,
1603 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1604 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1605 816, 0, 350, 351, 382, 383, 0,
1606 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1607 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1608 816, 0, 400, 401, 432, 433, 0,
1609 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1610 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1611 816, 0, 480, 481, 512, 513, 0,
1612 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1613 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1614 816, 0, 540, 541, 572, 573, 0,
1615 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1616 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1617 816, 0, 576, 577, 608, 609, 0,
1618 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1619 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1620 864, 0, 576, 577, 608, 609, 0,
1621 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1622 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1623 896, 0, 600, 601, 632, 633, 0,
1624 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1625 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1626 928, 0, 624, 625, 656, 657, 0,
1627 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1628 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1629 1016, 0, 766, 767, 798, 799, 0,
1630 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1631 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1632 1120, 0, 768, 769, 800, 801, 0,
1633 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1634 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1635 1376, 0, 1024, 1025, 1056, 1057, 0,
1636 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1637 };
1638
1639 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1640 {
1641 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1642 struct intel_sdvo_sdtv_resolution_request tv_res;
1643 uint32_t reply = 0, format_map = 0;
1644 int i;
1645
1646 /* Read the list of supported input resolutions for the selected TV
1647 * format.
1648 */
1649 format_map = 1 << intel_sdvo->tv_format_index;
1650 memcpy(&tv_res, &format_map,
1651 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1652
1653 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1654 return;
1655
1656 BUILD_BUG_ON(sizeof(tv_res) != 3);
1657 if (!intel_sdvo_write_cmd(intel_sdvo,
1658 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1659 &tv_res, sizeof(tv_res)))
1660 return;
1661 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1662 return;
1663
1664 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1665 if (reply & (1 << i)) {
1666 struct drm_display_mode *nmode;
1667 nmode = drm_mode_duplicate(connector->dev,
1668 &sdvo_tv_modes[i]);
1669 if (nmode)
1670 drm_mode_probed_add(connector, nmode);
1671 }
1672 }
1673
1674 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1675 {
1676 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1677 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1678 struct drm_display_mode *newmode;
1679
1680 /*
1681 * Attempt to get the mode list from DDC.
1682 * Assume that the preferred modes are
1683 * arranged in priority order.
1684 */
1685 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1686 if (list_empty(&connector->probed_modes) == false)
1687 goto end;
1688
1689 /* Fetch modes from VBT */
1690 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1691 newmode = drm_mode_duplicate(connector->dev,
1692 dev_priv->sdvo_lvds_vbt_mode);
1693 if (newmode != NULL) {
1694 /* Guarantee the mode is preferred */
1695 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1696 DRM_MODE_TYPE_DRIVER);
1697 drm_mode_probed_add(connector, newmode);
1698 }
1699 }
1700
1701 end:
1702 list_for_each_entry(newmode, &connector->probed_modes, head) {
1703 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1704 intel_sdvo->sdvo_lvds_fixed_mode =
1705 drm_mode_duplicate(connector->dev, newmode);
1706
1707 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1708 0);
1709
1710 intel_sdvo->is_lvds = true;
1711 break;
1712 }
1713 }
1714
1715 }
1716
1717 static int intel_sdvo_get_modes(struct drm_connector *connector)
1718 {
1719 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1720
1721 if (IS_TV(intel_sdvo_connector))
1722 intel_sdvo_get_tv_modes(connector);
1723 else if (IS_LVDS(intel_sdvo_connector))
1724 intel_sdvo_get_lvds_modes(connector);
1725 else
1726 intel_sdvo_get_ddc_modes(connector);
1727
1728 return !list_empty(&connector->probed_modes);
1729 }
1730
1731 static void
1732 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1733 {
1734 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1735 struct drm_device *dev = connector->dev;
1736
1737 if (intel_sdvo_connector->left)
1738 drm_property_destroy(dev, intel_sdvo_connector->left);
1739 if (intel_sdvo_connector->right)
1740 drm_property_destroy(dev, intel_sdvo_connector->right);
1741 if (intel_sdvo_connector->top)
1742 drm_property_destroy(dev, intel_sdvo_connector->top);
1743 if (intel_sdvo_connector->bottom)
1744 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1745 if (intel_sdvo_connector->hpos)
1746 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1747 if (intel_sdvo_connector->vpos)
1748 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1749 if (intel_sdvo_connector->saturation)
1750 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1751 if (intel_sdvo_connector->contrast)
1752 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1753 if (intel_sdvo_connector->hue)
1754 drm_property_destroy(dev, intel_sdvo_connector->hue);
1755 if (intel_sdvo_connector->sharpness)
1756 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1757 if (intel_sdvo_connector->flicker_filter)
1758 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1759 if (intel_sdvo_connector->flicker_filter_2d)
1760 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1761 if (intel_sdvo_connector->flicker_filter_adaptive)
1762 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1763 if (intel_sdvo_connector->tv_luma_filter)
1764 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1765 if (intel_sdvo_connector->tv_chroma_filter)
1766 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1767 if (intel_sdvo_connector->dot_crawl)
1768 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1769 if (intel_sdvo_connector->brightness)
1770 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1771 }
1772
1773 static void intel_sdvo_destroy(struct drm_connector *connector)
1774 {
1775 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1776
1777 if (intel_sdvo_connector->tv_format)
1778 drm_property_destroy(connector->dev,
1779 intel_sdvo_connector->tv_format);
1780
1781 intel_sdvo_destroy_enhance_property(connector);
1782 drm_sysfs_connector_remove(connector);
1783 drm_connector_cleanup(connector);
1784 kfree(connector);
1785 }
1786
1787 static int
1788 intel_sdvo_set_property(struct drm_connector *connector,
1789 struct drm_property *property,
1790 uint64_t val)
1791 {
1792 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1793 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1794 uint16_t temp_value;
1795 uint8_t cmd;
1796 int ret;
1797
1798 ret = drm_connector_property_set_value(connector, property, val);
1799 if (ret)
1800 return ret;
1801
1802 if (property == intel_sdvo_connector->force_audio_property) {
1803 if (val == intel_sdvo_connector->force_audio)
1804 return 0;
1805
1806 intel_sdvo_connector->force_audio = val;
1807
1808 if (val > 0 && intel_sdvo->has_audio)
1809 return 0;
1810 if (val < 0 && !intel_sdvo->has_audio)
1811 return 0;
1812
1813 intel_sdvo->has_audio = val > 0;
1814 goto done;
1815 }
1816
1817 #define CHECK_PROPERTY(name, NAME) \
1818 if (intel_sdvo_connector->name == property) { \
1819 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1820 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1821 cmd = SDVO_CMD_SET_##NAME; \
1822 intel_sdvo_connector->cur_##name = temp_value; \
1823 goto set_value; \
1824 }
1825
1826 if (property == intel_sdvo_connector->tv_format) {
1827 if (val >= TV_FORMAT_NUM)
1828 return -EINVAL;
1829
1830 if (intel_sdvo->tv_format_index ==
1831 intel_sdvo_connector->tv_format_supported[val])
1832 return 0;
1833
1834 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1835 goto done;
1836 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1837 temp_value = val;
1838 if (intel_sdvo_connector->left == property) {
1839 drm_connector_property_set_value(connector,
1840 intel_sdvo_connector->right, val);
1841 if (intel_sdvo_connector->left_margin == temp_value)
1842 return 0;
1843
1844 intel_sdvo_connector->left_margin = temp_value;
1845 intel_sdvo_connector->right_margin = temp_value;
1846 temp_value = intel_sdvo_connector->max_hscan -
1847 intel_sdvo_connector->left_margin;
1848 cmd = SDVO_CMD_SET_OVERSCAN_H;
1849 goto set_value;
1850 } else if (intel_sdvo_connector->right == property) {
1851 drm_connector_property_set_value(connector,
1852 intel_sdvo_connector->left, val);
1853 if (intel_sdvo_connector->right_margin == temp_value)
1854 return 0;
1855
1856 intel_sdvo_connector->left_margin = temp_value;
1857 intel_sdvo_connector->right_margin = temp_value;
1858 temp_value = intel_sdvo_connector->max_hscan -
1859 intel_sdvo_connector->left_margin;
1860 cmd = SDVO_CMD_SET_OVERSCAN_H;
1861 goto set_value;
1862 } else if (intel_sdvo_connector->top == property) {
1863 drm_connector_property_set_value(connector,
1864 intel_sdvo_connector->bottom, val);
1865 if (intel_sdvo_connector->top_margin == temp_value)
1866 return 0;
1867
1868 intel_sdvo_connector->top_margin = temp_value;
1869 intel_sdvo_connector->bottom_margin = temp_value;
1870 temp_value = intel_sdvo_connector->max_vscan -
1871 intel_sdvo_connector->top_margin;
1872 cmd = SDVO_CMD_SET_OVERSCAN_V;
1873 goto set_value;
1874 } else if (intel_sdvo_connector->bottom == property) {
1875 drm_connector_property_set_value(connector,
1876 intel_sdvo_connector->top, val);
1877 if (intel_sdvo_connector->bottom_margin == temp_value)
1878 return 0;
1879
1880 intel_sdvo_connector->top_margin = temp_value;
1881 intel_sdvo_connector->bottom_margin = temp_value;
1882 temp_value = intel_sdvo_connector->max_vscan -
1883 intel_sdvo_connector->top_margin;
1884 cmd = SDVO_CMD_SET_OVERSCAN_V;
1885 goto set_value;
1886 }
1887 CHECK_PROPERTY(hpos, HPOS)
1888 CHECK_PROPERTY(vpos, VPOS)
1889 CHECK_PROPERTY(saturation, SATURATION)
1890 CHECK_PROPERTY(contrast, CONTRAST)
1891 CHECK_PROPERTY(hue, HUE)
1892 CHECK_PROPERTY(brightness, BRIGHTNESS)
1893 CHECK_PROPERTY(sharpness, SHARPNESS)
1894 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1895 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1896 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1897 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1898 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1899 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1900 }
1901
1902 return -EINVAL; /* unknown property */
1903
1904 set_value:
1905 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1906 return -EIO;
1907
1908
1909 done:
1910 if (intel_sdvo->base.base.crtc) {
1911 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1912 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1913 crtc->y, crtc->fb);
1914 }
1915
1916 return 0;
1917 #undef CHECK_PROPERTY
1918 }
1919
1920 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1921 .dpms = intel_sdvo_dpms,
1922 .mode_fixup = intel_sdvo_mode_fixup,
1923 .prepare = intel_encoder_prepare,
1924 .mode_set = intel_sdvo_mode_set,
1925 .commit = intel_encoder_commit,
1926 };
1927
1928 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1929 .dpms = drm_helper_connector_dpms,
1930 .detect = intel_sdvo_detect,
1931 .fill_modes = drm_helper_probe_single_connector_modes,
1932 .set_property = intel_sdvo_set_property,
1933 .destroy = intel_sdvo_destroy,
1934 };
1935
1936 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1937 .get_modes = intel_sdvo_get_modes,
1938 .mode_valid = intel_sdvo_mode_valid,
1939 .best_encoder = intel_best_encoder,
1940 };
1941
1942 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1943 {
1944 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1945
1946 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1947 drm_mode_destroy(encoder->dev,
1948 intel_sdvo->sdvo_lvds_fixed_mode);
1949
1950 i2c_del_adapter(&intel_sdvo->ddc);
1951 intel_encoder_destroy(encoder);
1952 }
1953
1954 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1955 .destroy = intel_sdvo_enc_destroy,
1956 };
1957
1958 static void
1959 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1960 {
1961 uint16_t mask = 0;
1962 unsigned int num_bits;
1963
1964 /* Make a mask of outputs less than or equal to our own priority in the
1965 * list.
1966 */
1967 switch (sdvo->controlled_output) {
1968 case SDVO_OUTPUT_LVDS1:
1969 mask |= SDVO_OUTPUT_LVDS1;
1970 case SDVO_OUTPUT_LVDS0:
1971 mask |= SDVO_OUTPUT_LVDS0;
1972 case SDVO_OUTPUT_TMDS1:
1973 mask |= SDVO_OUTPUT_TMDS1;
1974 case SDVO_OUTPUT_TMDS0:
1975 mask |= SDVO_OUTPUT_TMDS0;
1976 case SDVO_OUTPUT_RGB1:
1977 mask |= SDVO_OUTPUT_RGB1;
1978 case SDVO_OUTPUT_RGB0:
1979 mask |= SDVO_OUTPUT_RGB0;
1980 break;
1981 }
1982
1983 /* Count bits to find what number we are in the priority list. */
1984 mask &= sdvo->caps.output_flags;
1985 num_bits = hweight16(mask);
1986 /* If more than 3 outputs, default to DDC bus 3 for now. */
1987 if (num_bits > 3)
1988 num_bits = 3;
1989
1990 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1991 sdvo->ddc_bus = 1 << num_bits;
1992 }
1993
1994 /**
1995 * Choose the appropriate DDC bus for control bus switch command for this
1996 * SDVO output based on the controlled output.
1997 *
1998 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1999 * outputs, then LVDS outputs.
2000 */
2001 static void
2002 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2003 struct intel_sdvo *sdvo, u32 reg)
2004 {
2005 struct sdvo_device_mapping *mapping;
2006
2007 if (IS_SDVOB(reg))
2008 mapping = &(dev_priv->sdvo_mappings[0]);
2009 else
2010 mapping = &(dev_priv->sdvo_mappings[1]);
2011
2012 if (mapping->initialized)
2013 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2014 else
2015 intel_sdvo_guess_ddc_bus(sdvo);
2016 }
2017
2018 static void
2019 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2020 struct intel_sdvo *sdvo, u32 reg)
2021 {
2022 struct sdvo_device_mapping *mapping;
2023 u8 pin, speed;
2024
2025 if (IS_SDVOB(reg))
2026 mapping = &dev_priv->sdvo_mappings[0];
2027 else
2028 mapping = &dev_priv->sdvo_mappings[1];
2029
2030 pin = GMBUS_PORT_DPB;
2031 speed = GMBUS_RATE_1MHZ >> 8;
2032 if (mapping->initialized) {
2033 pin = mapping->i2c_pin;
2034 speed = mapping->i2c_speed;
2035 }
2036
2037 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
2038 intel_gmbus_set_speed(sdvo->i2c, speed);
2039 intel_gmbus_force_bit(sdvo->i2c, true);
2040 }
2041
2042 static bool
2043 intel_sdvo_get_digital_encoding_mode(struct intel_sdvo *intel_sdvo, int device)
2044 {
2045 return intel_sdvo_set_target_output(intel_sdvo,
2046 device == 0 ? SDVO_OUTPUT_TMDS0 : SDVO_OUTPUT_TMDS1) &&
2047 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
2048 &intel_sdvo->is_hdmi, 1);
2049 }
2050
2051 static u8
2052 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
2053 {
2054 struct drm_i915_private *dev_priv = dev->dev_private;
2055 struct sdvo_device_mapping *my_mapping, *other_mapping;
2056
2057 if (IS_SDVOB(sdvo_reg)) {
2058 my_mapping = &dev_priv->sdvo_mappings[0];
2059 other_mapping = &dev_priv->sdvo_mappings[1];
2060 } else {
2061 my_mapping = &dev_priv->sdvo_mappings[1];
2062 other_mapping = &dev_priv->sdvo_mappings[0];
2063 }
2064
2065 /* If the BIOS described our SDVO device, take advantage of it. */
2066 if (my_mapping->slave_addr)
2067 return my_mapping->slave_addr;
2068
2069 /* If the BIOS only described a different SDVO device, use the
2070 * address that it isn't using.
2071 */
2072 if (other_mapping->slave_addr) {
2073 if (other_mapping->slave_addr == 0x70)
2074 return 0x72;
2075 else
2076 return 0x70;
2077 }
2078
2079 /* No SDVO device info is found for another DVO port,
2080 * so use mapping assumption we had before BIOS parsing.
2081 */
2082 if (IS_SDVOB(sdvo_reg))
2083 return 0x70;
2084 else
2085 return 0x72;
2086 }
2087
2088 static void
2089 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2090 struct intel_sdvo *encoder)
2091 {
2092 drm_connector_init(encoder->base.base.dev,
2093 &connector->base.base,
2094 &intel_sdvo_connector_funcs,
2095 connector->base.base.connector_type);
2096
2097 drm_connector_helper_add(&connector->base.base,
2098 &intel_sdvo_connector_helper_funcs);
2099
2100 connector->base.base.interlace_allowed = 0;
2101 connector->base.base.doublescan_allowed = 0;
2102 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2103
2104 intel_connector_attach_encoder(&connector->base, &encoder->base);
2105 drm_sysfs_connector_add(&connector->base.base);
2106 }
2107
2108 static void
2109 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2110 {
2111 struct drm_device *dev = connector->base.base.dev;
2112
2113 connector->force_audio_property =
2114 drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
2115 if (connector->force_audio_property) {
2116 connector->force_audio_property->values[0] = -1;
2117 connector->force_audio_property->values[1] = 1;
2118 drm_connector_attach_property(&connector->base.base,
2119 connector->force_audio_property, 0);
2120 }
2121 }
2122
2123 static bool
2124 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2125 {
2126 struct drm_encoder *encoder = &intel_sdvo->base.base;
2127 struct drm_connector *connector;
2128 struct intel_connector *intel_connector;
2129 struct intel_sdvo_connector *intel_sdvo_connector;
2130
2131 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2132 if (!intel_sdvo_connector)
2133 return false;
2134
2135 if (device == 0) {
2136 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2137 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2138 } else if (device == 1) {
2139 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2140 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2141 }
2142
2143 intel_connector = &intel_sdvo_connector->base;
2144 connector = &intel_connector->base;
2145 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2146 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2147 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2148
2149 if (intel_sdvo_get_supp_encode(intel_sdvo, &intel_sdvo->encode)
2150 && intel_sdvo_get_digital_encoding_mode(intel_sdvo, device)
2151 && intel_sdvo->is_hdmi) {
2152 /* enable hdmi encoding mode if supported */
2153 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
2154 intel_sdvo_set_colorimetry(intel_sdvo,
2155 SDVO_COLORIMETRY_RGB256);
2156 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2157 }
2158 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2159 (1 << INTEL_ANALOG_CLONE_BIT));
2160
2161 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2162
2163 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2164
2165 return true;
2166 }
2167
2168 static bool
2169 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2170 {
2171 struct drm_encoder *encoder = &intel_sdvo->base.base;
2172 struct drm_connector *connector;
2173 struct intel_connector *intel_connector;
2174 struct intel_sdvo_connector *intel_sdvo_connector;
2175
2176 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2177 if (!intel_sdvo_connector)
2178 return false;
2179
2180 intel_connector = &intel_sdvo_connector->base;
2181 connector = &intel_connector->base;
2182 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2183 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2184
2185 intel_sdvo->controlled_output |= type;
2186 intel_sdvo_connector->output_flag = type;
2187
2188 intel_sdvo->is_tv = true;
2189 intel_sdvo->base.needs_tv_clock = true;
2190 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2191
2192 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2193
2194 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2195 goto err;
2196
2197 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2198 goto err;
2199
2200 return true;
2201
2202 err:
2203 intel_sdvo_destroy(connector);
2204 return false;
2205 }
2206
2207 static bool
2208 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2209 {
2210 struct drm_encoder *encoder = &intel_sdvo->base.base;
2211 struct drm_connector *connector;
2212 struct intel_connector *intel_connector;
2213 struct intel_sdvo_connector *intel_sdvo_connector;
2214
2215 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2216 if (!intel_sdvo_connector)
2217 return false;
2218
2219 intel_connector = &intel_sdvo_connector->base;
2220 connector = &intel_connector->base;
2221 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2222 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2223 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2224
2225 if (device == 0) {
2226 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2227 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2228 } else if (device == 1) {
2229 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2230 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2231 }
2232
2233 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2234 (1 << INTEL_ANALOG_CLONE_BIT));
2235
2236 intel_sdvo_connector_init(intel_sdvo_connector,
2237 intel_sdvo);
2238 return true;
2239 }
2240
2241 static bool
2242 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2243 {
2244 struct drm_encoder *encoder = &intel_sdvo->base.base;
2245 struct drm_connector *connector;
2246 struct intel_connector *intel_connector;
2247 struct intel_sdvo_connector *intel_sdvo_connector;
2248
2249 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2250 if (!intel_sdvo_connector)
2251 return false;
2252
2253 intel_connector = &intel_sdvo_connector->base;
2254 connector = &intel_connector->base;
2255 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2256 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2257
2258 if (device == 0) {
2259 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2260 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2261 } else if (device == 1) {
2262 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2263 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2264 }
2265
2266 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2267 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2268
2269 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2270 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2271 goto err;
2272
2273 return true;
2274
2275 err:
2276 intel_sdvo_destroy(connector);
2277 return false;
2278 }
2279
2280 static bool
2281 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2282 {
2283 intel_sdvo->is_tv = false;
2284 intel_sdvo->base.needs_tv_clock = false;
2285 intel_sdvo->is_lvds = false;
2286
2287 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2288
2289 if (flags & SDVO_OUTPUT_TMDS0)
2290 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2291 return false;
2292
2293 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2294 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2295 return false;
2296
2297 /* TV has no XXX1 function block */
2298 if (flags & SDVO_OUTPUT_SVID0)
2299 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2300 return false;
2301
2302 if (flags & SDVO_OUTPUT_CVBS0)
2303 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2304 return false;
2305
2306 if (flags & SDVO_OUTPUT_RGB0)
2307 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2308 return false;
2309
2310 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2311 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2312 return false;
2313
2314 if (flags & SDVO_OUTPUT_LVDS0)
2315 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2316 return false;
2317
2318 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2319 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2320 return false;
2321
2322 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2323 unsigned char bytes[2];
2324
2325 intel_sdvo->controlled_output = 0;
2326 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2327 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2328 SDVO_NAME(intel_sdvo),
2329 bytes[0], bytes[1]);
2330 return false;
2331 }
2332 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2333
2334 return true;
2335 }
2336
2337 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2338 struct intel_sdvo_connector *intel_sdvo_connector,
2339 int type)
2340 {
2341 struct drm_device *dev = intel_sdvo->base.base.dev;
2342 struct intel_sdvo_tv_format format;
2343 uint32_t format_map, i;
2344
2345 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2346 return false;
2347
2348 if (!intel_sdvo_get_value(intel_sdvo,
2349 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2350 &format, sizeof(format)))
2351 return false;
2352
2353 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2354
2355 if (format_map == 0)
2356 return false;
2357
2358 intel_sdvo_connector->format_supported_num = 0;
2359 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2360 if (format_map & (1 << i))
2361 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2362
2363
2364 intel_sdvo_connector->tv_format =
2365 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2366 "mode", intel_sdvo_connector->format_supported_num);
2367 if (!intel_sdvo_connector->tv_format)
2368 return false;
2369
2370 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2371 drm_property_add_enum(
2372 intel_sdvo_connector->tv_format, i,
2373 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2374
2375 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2376 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2377 intel_sdvo_connector->tv_format, 0);
2378 return true;
2379
2380 }
2381
2382 #define ENHANCEMENT(name, NAME) do { \
2383 if (enhancements.name) { \
2384 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2385 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2386 return false; \
2387 intel_sdvo_connector->max_##name = data_value[0]; \
2388 intel_sdvo_connector->cur_##name = response; \
2389 intel_sdvo_connector->name = \
2390 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2391 if (!intel_sdvo_connector->name) return false; \
2392 intel_sdvo_connector->name->values[0] = 0; \
2393 intel_sdvo_connector->name->values[1] = data_value[0]; \
2394 drm_connector_attach_property(connector, \
2395 intel_sdvo_connector->name, \
2396 intel_sdvo_connector->cur_##name); \
2397 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2398 data_value[0], data_value[1], response); \
2399 } \
2400 } while(0)
2401
2402 static bool
2403 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2404 struct intel_sdvo_connector *intel_sdvo_connector,
2405 struct intel_sdvo_enhancements_reply enhancements)
2406 {
2407 struct drm_device *dev = intel_sdvo->base.base.dev;
2408 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2409 uint16_t response, data_value[2];
2410
2411 /* when horizontal overscan is supported, Add the left/right property */
2412 if (enhancements.overscan_h) {
2413 if (!intel_sdvo_get_value(intel_sdvo,
2414 SDVO_CMD_GET_MAX_OVERSCAN_H,
2415 &data_value, 4))
2416 return false;
2417
2418 if (!intel_sdvo_get_value(intel_sdvo,
2419 SDVO_CMD_GET_OVERSCAN_H,
2420 &response, 2))
2421 return false;
2422
2423 intel_sdvo_connector->max_hscan = data_value[0];
2424 intel_sdvo_connector->left_margin = data_value[0] - response;
2425 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2426 intel_sdvo_connector->left =
2427 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2428 "left_margin", 2);
2429 if (!intel_sdvo_connector->left)
2430 return false;
2431
2432 intel_sdvo_connector->left->values[0] = 0;
2433 intel_sdvo_connector->left->values[1] = data_value[0];
2434 drm_connector_attach_property(connector,
2435 intel_sdvo_connector->left,
2436 intel_sdvo_connector->left_margin);
2437
2438 intel_sdvo_connector->right =
2439 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2440 "right_margin", 2);
2441 if (!intel_sdvo_connector->right)
2442 return false;
2443
2444 intel_sdvo_connector->right->values[0] = 0;
2445 intel_sdvo_connector->right->values[1] = data_value[0];
2446 drm_connector_attach_property(connector,
2447 intel_sdvo_connector->right,
2448 intel_sdvo_connector->right_margin);
2449 DRM_DEBUG_KMS("h_overscan: max %d, "
2450 "default %d, current %d\n",
2451 data_value[0], data_value[1], response);
2452 }
2453
2454 if (enhancements.overscan_v) {
2455 if (!intel_sdvo_get_value(intel_sdvo,
2456 SDVO_CMD_GET_MAX_OVERSCAN_V,
2457 &data_value, 4))
2458 return false;
2459
2460 if (!intel_sdvo_get_value(intel_sdvo,
2461 SDVO_CMD_GET_OVERSCAN_V,
2462 &response, 2))
2463 return false;
2464
2465 intel_sdvo_connector->max_vscan = data_value[0];
2466 intel_sdvo_connector->top_margin = data_value[0] - response;
2467 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2468 intel_sdvo_connector->top =
2469 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2470 "top_margin", 2);
2471 if (!intel_sdvo_connector->top)
2472 return false;
2473
2474 intel_sdvo_connector->top->values[0] = 0;
2475 intel_sdvo_connector->top->values[1] = data_value[0];
2476 drm_connector_attach_property(connector,
2477 intel_sdvo_connector->top,
2478 intel_sdvo_connector->top_margin);
2479
2480 intel_sdvo_connector->bottom =
2481 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2482 "bottom_margin", 2);
2483 if (!intel_sdvo_connector->bottom)
2484 return false;
2485
2486 intel_sdvo_connector->bottom->values[0] = 0;
2487 intel_sdvo_connector->bottom->values[1] = data_value[0];
2488 drm_connector_attach_property(connector,
2489 intel_sdvo_connector->bottom,
2490 intel_sdvo_connector->bottom_margin);
2491 DRM_DEBUG_KMS("v_overscan: max %d, "
2492 "default %d, current %d\n",
2493 data_value[0], data_value[1], response);
2494 }
2495
2496 ENHANCEMENT(hpos, HPOS);
2497 ENHANCEMENT(vpos, VPOS);
2498 ENHANCEMENT(saturation, SATURATION);
2499 ENHANCEMENT(contrast, CONTRAST);
2500 ENHANCEMENT(hue, HUE);
2501 ENHANCEMENT(sharpness, SHARPNESS);
2502 ENHANCEMENT(brightness, BRIGHTNESS);
2503 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2504 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2505 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2506 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2507 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2508
2509 if (enhancements.dot_crawl) {
2510 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2511 return false;
2512
2513 intel_sdvo_connector->max_dot_crawl = 1;
2514 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2515 intel_sdvo_connector->dot_crawl =
2516 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2517 if (!intel_sdvo_connector->dot_crawl)
2518 return false;
2519
2520 intel_sdvo_connector->dot_crawl->values[0] = 0;
2521 intel_sdvo_connector->dot_crawl->values[1] = 1;
2522 drm_connector_attach_property(connector,
2523 intel_sdvo_connector->dot_crawl,
2524 intel_sdvo_connector->cur_dot_crawl);
2525 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2526 }
2527
2528 return true;
2529 }
2530
2531 static bool
2532 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2533 struct intel_sdvo_connector *intel_sdvo_connector,
2534 struct intel_sdvo_enhancements_reply enhancements)
2535 {
2536 struct drm_device *dev = intel_sdvo->base.base.dev;
2537 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2538 uint16_t response, data_value[2];
2539
2540 ENHANCEMENT(brightness, BRIGHTNESS);
2541
2542 return true;
2543 }
2544 #undef ENHANCEMENT
2545
2546 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2547 struct intel_sdvo_connector *intel_sdvo_connector)
2548 {
2549 union {
2550 struct intel_sdvo_enhancements_reply reply;
2551 uint16_t response;
2552 } enhancements;
2553
2554 enhancements.response = 0;
2555 intel_sdvo_get_value(intel_sdvo,
2556 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2557 &enhancements, sizeof(enhancements));
2558 if (enhancements.response == 0) {
2559 DRM_DEBUG_KMS("No enhancement is supported\n");
2560 return true;
2561 }
2562
2563 if (IS_TV(intel_sdvo_connector))
2564 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2565 else if(IS_LVDS(intel_sdvo_connector))
2566 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2567 else
2568 return true;
2569 }
2570
2571 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2572 struct i2c_msg *msgs,
2573 int num)
2574 {
2575 struct intel_sdvo *sdvo = adapter->algo_data;
2576
2577 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2578 return -EIO;
2579
2580 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2581 }
2582
2583 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2584 {
2585 struct intel_sdvo *sdvo = adapter->algo_data;
2586 return sdvo->i2c->algo->functionality(sdvo->i2c);
2587 }
2588
2589 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2590 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2591 .functionality = intel_sdvo_ddc_proxy_func
2592 };
2593
2594 static bool
2595 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2596 struct drm_device *dev)
2597 {
2598 sdvo->ddc.owner = THIS_MODULE;
2599 sdvo->ddc.class = I2C_CLASS_DDC;
2600 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2601 sdvo->ddc.dev.parent = &dev->pdev->dev;
2602 sdvo->ddc.algo_data = sdvo;
2603 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2604
2605 return i2c_add_adapter(&sdvo->ddc) == 0;
2606 }
2607
2608 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2609 {
2610 struct drm_i915_private *dev_priv = dev->dev_private;
2611 struct intel_encoder *intel_encoder;
2612 struct intel_sdvo *intel_sdvo;
2613 int i;
2614
2615 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2616 if (!intel_sdvo)
2617 return false;
2618
2619 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2620 kfree(intel_sdvo);
2621 return false;
2622 }
2623
2624 intel_sdvo->sdvo_reg = sdvo_reg;
2625
2626 intel_encoder = &intel_sdvo->base;
2627 intel_encoder->type = INTEL_OUTPUT_SDVO;
2628 /* encoder type will be decided later */
2629 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2630
2631 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2632 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2633
2634 /* Read the regs to test if we can talk to the device */
2635 for (i = 0; i < 0x40; i++) {
2636 u8 byte;
2637
2638 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2639 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2640 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2641 goto err;
2642 }
2643 }
2644
2645 if (IS_SDVOB(sdvo_reg))
2646 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2647 else
2648 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2649
2650 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2651
2652 /* In default case sdvo lvds is false */
2653 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2654 goto err;
2655
2656 if (intel_sdvo_output_setup(intel_sdvo,
2657 intel_sdvo->caps.output_flags) != true) {
2658 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2659 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2660 goto err;
2661 }
2662
2663 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2664
2665 /* Set the input timing to the screen. Assume always input 0. */
2666 if (!intel_sdvo_set_target_input(intel_sdvo))
2667 goto err;
2668
2669 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2670 &intel_sdvo->pixel_clock_min,
2671 &intel_sdvo->pixel_clock_max))
2672 goto err;
2673
2674 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2675 "clock range %dMHz - %dMHz, "
2676 "input 1: %c, input 2: %c, "
2677 "output 1: %c, output 2: %c\n",
2678 SDVO_NAME(intel_sdvo),
2679 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2680 intel_sdvo->caps.device_rev_id,
2681 intel_sdvo->pixel_clock_min / 1000,
2682 intel_sdvo->pixel_clock_max / 1000,
2683 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2684 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2685 /* check currently supported outputs */
2686 intel_sdvo->caps.output_flags &
2687 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2688 intel_sdvo->caps.output_flags &
2689 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2690 return true;
2691
2692 err:
2693 drm_encoder_cleanup(&intel_encoder->base);
2694 i2c_del_adapter(&intel_sdvo->ddc);
2695 kfree(intel_sdvo);
2696
2697 return false;
2698 }
Linux kernel - Deliverables
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