2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
33 #include <drm/drm_atomic_helper.h>
34 #include <drm/drm_crtc.h>
35 #include <drm/drm_edid.h>
36 #include "intel_drv.h"
37 #include <drm/i915_drm.h>
39 #include "intel_sdvo_regs.h"
41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
49 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
50 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
51 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
56 static const char * const tv_format_names
[] = {
57 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
66 #define TV_FORMAT_NUM ARRAY_SIZE(tv_format_names)
69 struct intel_encoder base
;
71 struct i2c_adapter
*i2c
;
74 struct i2c_adapter ddc
;
76 /* Register for the SDVO device: SDVOB or SDVOC */
79 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output
;
83 * Capabilities of the SDVO device returned by
84 * intel_sdvo_get_capabilities()
86 struct intel_sdvo_caps caps
;
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
89 int pixel_clock_min
, pixel_clock_max
;
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
95 uint16_t attached_output
;
98 * Hotplug activation bits for this device
100 uint16_t hotplug_active
;
103 * This is used to select the color range of RBG outputs in HDMI mode.
104 * It is only valid when using TMDS encoding and 8 bit per color mode.
106 uint32_t color_range
;
107 bool color_range_auto
;
110 * HDMI user specified aspect ratio
112 enum hdmi_picture_aspect aspect_ratio
;
115 * This is set if we're going to treat the device as TV-out.
117 * While we have these nice friendly flags for output types that ought
118 * to decide this for us, the S-Video output on our HDMI+S-Video card
119 * shows up as RGB1 (VGA).
125 /* This is for current tv format name */
129 * This is set if we treat the device as HDMI, instead of DVI.
132 bool has_hdmi_monitor
;
134 bool rgb_quant_range_selectable
;
137 * This is set if we detect output of sdvo device as LVDS and
138 * have a valid fixed mode to use with the panel.
143 * This is sdvo fixed pannel mode pointer
145 struct drm_display_mode
*sdvo_lvds_fixed_mode
;
147 /* DDC bus used by this SDVO encoder */
151 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
153 uint8_t dtd_sdvo_flags
;
156 struct intel_sdvo_connector
{
157 struct intel_connector base
;
159 /* Mark the type of connector */
160 uint16_t output_flag
;
162 enum hdmi_force_audio force_audio
;
164 /* This contains all current supported TV format */
165 u8 tv_format_supported
[TV_FORMAT_NUM
];
166 int format_supported_num
;
167 struct drm_property
*tv_format
;
169 /* add the property for the SDVO-TV */
170 struct drm_property
*left
;
171 struct drm_property
*right
;
172 struct drm_property
*top
;
173 struct drm_property
*bottom
;
174 struct drm_property
*hpos
;
175 struct drm_property
*vpos
;
176 struct drm_property
*contrast
;
177 struct drm_property
*saturation
;
178 struct drm_property
*hue
;
179 struct drm_property
*sharpness
;
180 struct drm_property
*flicker_filter
;
181 struct drm_property
*flicker_filter_adaptive
;
182 struct drm_property
*flicker_filter_2d
;
183 struct drm_property
*tv_chroma_filter
;
184 struct drm_property
*tv_luma_filter
;
185 struct drm_property
*dot_crawl
;
187 /* add the property for the SDVO-TV/LVDS */
188 struct drm_property
*brightness
;
190 /* Add variable to record current setting for the above property */
191 u32 left_margin
, right_margin
, top_margin
, bottom_margin
;
193 /* this is to get the range of margin.*/
194 u32 max_hscan
, max_vscan
;
195 u32 max_hpos
, cur_hpos
;
196 u32 max_vpos
, cur_vpos
;
197 u32 cur_brightness
, max_brightness
;
198 u32 cur_contrast
, max_contrast
;
199 u32 cur_saturation
, max_saturation
;
200 u32 cur_hue
, max_hue
;
201 u32 cur_sharpness
, max_sharpness
;
202 u32 cur_flicker_filter
, max_flicker_filter
;
203 u32 cur_flicker_filter_adaptive
, max_flicker_filter_adaptive
;
204 u32 cur_flicker_filter_2d
, max_flicker_filter_2d
;
205 u32 cur_tv_chroma_filter
, max_tv_chroma_filter
;
206 u32 cur_tv_luma_filter
, max_tv_luma_filter
;
207 u32 cur_dot_crawl
, max_dot_crawl
;
210 static struct intel_sdvo
*to_sdvo(struct intel_encoder
*encoder
)
212 return container_of(encoder
, struct intel_sdvo
, base
);
215 static struct intel_sdvo
*intel_attached_sdvo(struct drm_connector
*connector
)
217 return to_sdvo(intel_attached_encoder(connector
));
220 static struct intel_sdvo_connector
*to_intel_sdvo_connector(struct drm_connector
*connector
)
222 return container_of(to_intel_connector(connector
), struct intel_sdvo_connector
, base
);
226 intel_sdvo_output_setup(struct intel_sdvo
*intel_sdvo
, uint16_t flags
);
228 intel_sdvo_tv_create_property(struct intel_sdvo
*intel_sdvo
,
229 struct intel_sdvo_connector
*intel_sdvo_connector
,
232 intel_sdvo_create_enhance_property(struct intel_sdvo
*intel_sdvo
,
233 struct intel_sdvo_connector
*intel_sdvo_connector
);
236 * Writes the SDVOB or SDVOC with the given value, but always writes both
237 * SDVOB and SDVOC to work around apparent hardware issues (according to
238 * comments in the BIOS).
240 static void intel_sdvo_write_sdvox(struct intel_sdvo
*intel_sdvo
, u32 val
)
242 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
243 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
244 u32 bval
= val
, cval
= val
;
247 if (HAS_PCH_SPLIT(dev_priv
)) {
248 I915_WRITE(intel_sdvo
->sdvo_reg
, val
);
249 POSTING_READ(intel_sdvo
->sdvo_reg
);
251 * HW workaround, need to write this twice for issue
252 * that may result in first write getting masked.
254 if (HAS_PCH_IBX(dev
)) {
255 I915_WRITE(intel_sdvo
->sdvo_reg
, val
);
256 POSTING_READ(intel_sdvo
->sdvo_reg
);
261 if (intel_sdvo
->port
== PORT_B
)
262 cval
= I915_READ(GEN3_SDVOC
);
264 bval
= I915_READ(GEN3_SDVOB
);
267 * Write the registers twice for luck. Sometimes,
268 * writing them only once doesn't appear to 'stick'.
269 * The BIOS does this too. Yay, magic
271 for (i
= 0; i
< 2; i
++)
273 I915_WRITE(GEN3_SDVOB
, bval
);
274 POSTING_READ(GEN3_SDVOB
);
275 I915_WRITE(GEN3_SDVOC
, cval
);
276 POSTING_READ(GEN3_SDVOC
);
280 static bool intel_sdvo_read_byte(struct intel_sdvo
*intel_sdvo
, u8 addr
, u8
*ch
)
282 struct i2c_msg msgs
[] = {
284 .addr
= intel_sdvo
->slave_addr
,
290 .addr
= intel_sdvo
->slave_addr
,
298 if ((ret
= i2c_transfer(intel_sdvo
->i2c
, msgs
, 2)) == 2)
301 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret
);
305 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
306 /** Mapping of command numbers to names, for debug output */
307 static const struct _sdvo_cmd_name
{
310 } sdvo_cmd_names
[] = {
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET
),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS
),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV
),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS
),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS
),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS
),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP
),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP
),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS
),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT
),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG
),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG
),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE
),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT
),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT
),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1
),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2
),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2
),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2
),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1
),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2
),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE
),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS
),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT
),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT
),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS
),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT
),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT
),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES
),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE
),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE
),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE
),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH
),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT
),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS
),
355 /* Add the op code for SDVO enhancements */
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS
),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS
),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS
),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS
),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS
),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS
),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION
),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION
),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION
),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE
),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE
),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE
),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST
),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST
),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST
),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS
),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS
),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS
),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H
),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H
),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H
),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V
),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V
),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V
),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER
),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER
),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER
),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE
),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE
),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE
),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D
),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D
),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D
),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS
),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS
),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS
),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL
),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL
),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER
),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER
),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER
),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER
),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER
),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER
),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE
),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE
),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE
),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI
),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI
),
407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP
),
408 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY
),
409 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY
),
410 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER
),
411 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT
),
412 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT
),
413 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX
),
414 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX
),
415 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO
),
416 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT
),
417 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT
),
418 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE
),
419 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE
),
420 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA
),
421 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA
),
424 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
426 static void intel_sdvo_debug_write(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
427 const void *args
, int args_len
)
431 char buffer
[BUF_LEN
];
433 #define BUF_PRINT(args...) \
434 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
437 for (i
= 0; i
< args_len
; i
++) {
438 BUF_PRINT("%02X ", ((u8
*)args
)[i
]);
443 for (i
= 0; i
< ARRAY_SIZE(sdvo_cmd_names
); i
++) {
444 if (cmd
== sdvo_cmd_names
[i
].cmd
) {
445 BUF_PRINT("(%s)", sdvo_cmd_names
[i
].name
);
449 if (i
== ARRAY_SIZE(sdvo_cmd_names
)) {
450 BUF_PRINT("(%02X)", cmd
);
452 BUG_ON(pos
>= BUF_LEN
- 1);
456 DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo
), cmd
, buffer
);
459 static const char * const cmd_status_names
[] = {
465 "Target not specified",
466 "Scaling not supported"
469 static bool intel_sdvo_write_cmd(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
470 const void *args
, int args_len
)
473 struct i2c_msg
*msgs
;
476 /* Would be simpler to allocate both in one go ? */
477 buf
= kzalloc(args_len
* 2 + 2, GFP_KERNEL
);
481 msgs
= kcalloc(args_len
+ 3, sizeof(*msgs
), GFP_KERNEL
);
487 intel_sdvo_debug_write(intel_sdvo
, cmd
, args
, args_len
);
489 for (i
= 0; i
< args_len
; i
++) {
490 msgs
[i
].addr
= intel_sdvo
->slave_addr
;
493 msgs
[i
].buf
= buf
+ 2 *i
;
494 buf
[2*i
+ 0] = SDVO_I2C_ARG_0
- i
;
495 buf
[2*i
+ 1] = ((u8
*)args
)[i
];
497 msgs
[i
].addr
= intel_sdvo
->slave_addr
;
500 msgs
[i
].buf
= buf
+ 2*i
;
501 buf
[2*i
+ 0] = SDVO_I2C_OPCODE
;
504 /* the following two are to read the response */
505 status
= SDVO_I2C_CMD_STATUS
;
506 msgs
[i
+1].addr
= intel_sdvo
->slave_addr
;
509 msgs
[i
+1].buf
= &status
;
511 msgs
[i
+2].addr
= intel_sdvo
->slave_addr
;
512 msgs
[i
+2].flags
= I2C_M_RD
;
514 msgs
[i
+2].buf
= &status
;
516 ret
= i2c_transfer(intel_sdvo
->i2c
, msgs
, i
+3);
518 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret
);
523 /* failure in I2C transfer */
524 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret
, i
+3);
534 static bool intel_sdvo_read_response(struct intel_sdvo
*intel_sdvo
,
535 void *response
, int response_len
)
537 u8 retry
= 15; /* 5 quick checks, followed by 10 long checks */
541 char buffer
[BUF_LEN
];
545 * The documentation states that all commands will be
546 * processed within 15µs, and that we need only poll
547 * the status byte a maximum of 3 times in order for the
548 * command to be complete.
550 * Check 5 times in case the hardware failed to read the docs.
552 * Also beware that the first response by many devices is to
553 * reply PENDING and stall for time. TVs are notorious for
554 * requiring longer than specified to complete their replies.
555 * Originally (in the DDX long ago), the delay was only ever 15ms
556 * with an additional delay of 30ms applied for TVs added later after
557 * many experiments. To accommodate both sets of delays, we do a
558 * sequence of slow checks if the device is falling behind and fails
559 * to reply within 5*15µs.
561 if (!intel_sdvo_read_byte(intel_sdvo
,
566 while ((status
== SDVO_CMD_STATUS_PENDING
||
567 status
== SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED
) && --retry
) {
573 if (!intel_sdvo_read_byte(intel_sdvo
,
579 #define BUF_PRINT(args...) \
580 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
582 if (status
<= SDVO_CMD_STATUS_SCALING_NOT_SUPP
)
583 BUF_PRINT("(%s)", cmd_status_names
[status
]);
585 BUF_PRINT("(??? %d)", status
);
587 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
590 /* Read the command response */
591 for (i
= 0; i
< response_len
; i
++) {
592 if (!intel_sdvo_read_byte(intel_sdvo
,
593 SDVO_I2C_RETURN_0
+ i
,
594 &((u8
*)response
)[i
]))
596 BUF_PRINT(" %02X", ((u8
*)response
)[i
]);
598 BUG_ON(pos
>= BUF_LEN
- 1);
602 DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo
), buffer
);
606 DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo
));
610 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode
*adjusted_mode
)
612 if (adjusted_mode
->crtc_clock
>= 100000)
614 else if (adjusted_mode
->crtc_clock
>= 50000)
620 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo
*intel_sdvo
,
623 /* This must be the immediately preceding write before the i2c xfer */
624 return intel_sdvo_write_cmd(intel_sdvo
,
625 SDVO_CMD_SET_CONTROL_BUS_SWITCH
,
629 static bool intel_sdvo_set_value(struct intel_sdvo
*intel_sdvo
, u8 cmd
, const void *data
, int len
)
631 if (!intel_sdvo_write_cmd(intel_sdvo
, cmd
, data
, len
))
634 return intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
638 intel_sdvo_get_value(struct intel_sdvo
*intel_sdvo
, u8 cmd
, void *value
, int len
)
640 if (!intel_sdvo_write_cmd(intel_sdvo
, cmd
, NULL
, 0))
643 return intel_sdvo_read_response(intel_sdvo
, value
, len
);
646 static bool intel_sdvo_set_target_input(struct intel_sdvo
*intel_sdvo
)
648 struct intel_sdvo_set_target_input_args targets
= {0};
649 return intel_sdvo_set_value(intel_sdvo
,
650 SDVO_CMD_SET_TARGET_INPUT
,
651 &targets
, sizeof(targets
));
655 * Return whether each input is trained.
657 * This function is making an assumption about the layout of the response,
658 * which should be checked against the docs.
660 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo
*intel_sdvo
, bool *input_1
, bool *input_2
)
662 struct intel_sdvo_get_trained_inputs_response response
;
664 BUILD_BUG_ON(sizeof(response
) != 1);
665 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_TRAINED_INPUTS
,
666 &response
, sizeof(response
)))
669 *input_1
= response
.input0_trained
;
670 *input_2
= response
.input1_trained
;
674 static bool intel_sdvo_set_active_outputs(struct intel_sdvo
*intel_sdvo
,
677 return intel_sdvo_set_value(intel_sdvo
,
678 SDVO_CMD_SET_ACTIVE_OUTPUTS
,
679 &outputs
, sizeof(outputs
));
682 static bool intel_sdvo_get_active_outputs(struct intel_sdvo
*intel_sdvo
,
685 return intel_sdvo_get_value(intel_sdvo
,
686 SDVO_CMD_GET_ACTIVE_OUTPUTS
,
687 outputs
, sizeof(*outputs
));
690 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo
*intel_sdvo
,
693 u8 state
= SDVO_ENCODER_STATE_ON
;
696 case DRM_MODE_DPMS_ON
:
697 state
= SDVO_ENCODER_STATE_ON
;
699 case DRM_MODE_DPMS_STANDBY
:
700 state
= SDVO_ENCODER_STATE_STANDBY
;
702 case DRM_MODE_DPMS_SUSPEND
:
703 state
= SDVO_ENCODER_STATE_SUSPEND
;
705 case DRM_MODE_DPMS_OFF
:
706 state
= SDVO_ENCODER_STATE_OFF
;
710 return intel_sdvo_set_value(intel_sdvo
,
711 SDVO_CMD_SET_ENCODER_POWER_STATE
, &state
, sizeof(state
));
714 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo
*intel_sdvo
,
718 struct intel_sdvo_pixel_clock_range clocks
;
720 BUILD_BUG_ON(sizeof(clocks
) != 4);
721 if (!intel_sdvo_get_value(intel_sdvo
,
722 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
,
723 &clocks
, sizeof(clocks
)))
726 /* Convert the values from units of 10 kHz to kHz. */
727 *clock_min
= clocks
.min
* 10;
728 *clock_max
= clocks
.max
* 10;
732 static bool intel_sdvo_set_target_output(struct intel_sdvo
*intel_sdvo
,
735 return intel_sdvo_set_value(intel_sdvo
,
736 SDVO_CMD_SET_TARGET_OUTPUT
,
737 &outputs
, sizeof(outputs
));
740 static bool intel_sdvo_set_timing(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
741 struct intel_sdvo_dtd
*dtd
)
743 return intel_sdvo_set_value(intel_sdvo
, cmd
, &dtd
->part1
, sizeof(dtd
->part1
)) &&
744 intel_sdvo_set_value(intel_sdvo
, cmd
+ 1, &dtd
->part2
, sizeof(dtd
->part2
));
747 static bool intel_sdvo_get_timing(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
748 struct intel_sdvo_dtd
*dtd
)
750 return intel_sdvo_get_value(intel_sdvo
, cmd
, &dtd
->part1
, sizeof(dtd
->part1
)) &&
751 intel_sdvo_get_value(intel_sdvo
, cmd
+ 1, &dtd
->part2
, sizeof(dtd
->part2
));
754 static bool intel_sdvo_set_input_timing(struct intel_sdvo
*intel_sdvo
,
755 struct intel_sdvo_dtd
*dtd
)
757 return intel_sdvo_set_timing(intel_sdvo
,
758 SDVO_CMD_SET_INPUT_TIMINGS_PART1
, dtd
);
761 static bool intel_sdvo_set_output_timing(struct intel_sdvo
*intel_sdvo
,
762 struct intel_sdvo_dtd
*dtd
)
764 return intel_sdvo_set_timing(intel_sdvo
,
765 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
, dtd
);
768 static bool intel_sdvo_get_input_timing(struct intel_sdvo
*intel_sdvo
,
769 struct intel_sdvo_dtd
*dtd
)
771 return intel_sdvo_get_timing(intel_sdvo
,
772 SDVO_CMD_GET_INPUT_TIMINGS_PART1
, dtd
);
776 intel_sdvo_create_preferred_input_timing(struct intel_sdvo
*intel_sdvo
,
781 struct intel_sdvo_preferred_input_timing_args args
;
783 memset(&args
, 0, sizeof(args
));
786 args
.height
= height
;
789 if (intel_sdvo
->is_lvds
&&
790 (intel_sdvo
->sdvo_lvds_fixed_mode
->hdisplay
!= width
||
791 intel_sdvo
->sdvo_lvds_fixed_mode
->vdisplay
!= height
))
794 return intel_sdvo_set_value(intel_sdvo
,
795 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
,
796 &args
, sizeof(args
));
799 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo
*intel_sdvo
,
800 struct intel_sdvo_dtd
*dtd
)
802 BUILD_BUG_ON(sizeof(dtd
->part1
) != 8);
803 BUILD_BUG_ON(sizeof(dtd
->part2
) != 8);
804 return intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
,
805 &dtd
->part1
, sizeof(dtd
->part1
)) &&
806 intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
,
807 &dtd
->part2
, sizeof(dtd
->part2
));
810 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo
*intel_sdvo
, u8 val
)
812 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_CLOCK_RATE_MULT
, &val
, 1);
815 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd
*dtd
,
816 const struct drm_display_mode
*mode
)
818 uint16_t width
, height
;
819 uint16_t h_blank_len
, h_sync_len
, v_blank_len
, v_sync_len
;
820 uint16_t h_sync_offset
, v_sync_offset
;
823 memset(dtd
, 0, sizeof(*dtd
));
825 width
= mode
->hdisplay
;
826 height
= mode
->vdisplay
;
828 /* do some mode translations */
829 h_blank_len
= mode
->htotal
- mode
->hdisplay
;
830 h_sync_len
= mode
->hsync_end
- mode
->hsync_start
;
832 v_blank_len
= mode
->vtotal
- mode
->vdisplay
;
833 v_sync_len
= mode
->vsync_end
- mode
->vsync_start
;
835 h_sync_offset
= mode
->hsync_start
- mode
->hdisplay
;
836 v_sync_offset
= mode
->vsync_start
- mode
->vdisplay
;
838 mode_clock
= mode
->clock
;
840 dtd
->part1
.clock
= mode_clock
;
842 dtd
->part1
.h_active
= width
& 0xff;
843 dtd
->part1
.h_blank
= h_blank_len
& 0xff;
844 dtd
->part1
.h_high
= (((width
>> 8) & 0xf) << 4) |
845 ((h_blank_len
>> 8) & 0xf);
846 dtd
->part1
.v_active
= height
& 0xff;
847 dtd
->part1
.v_blank
= v_blank_len
& 0xff;
848 dtd
->part1
.v_high
= (((height
>> 8) & 0xf) << 4) |
849 ((v_blank_len
>> 8) & 0xf);
851 dtd
->part2
.h_sync_off
= h_sync_offset
& 0xff;
852 dtd
->part2
.h_sync_width
= h_sync_len
& 0xff;
853 dtd
->part2
.v_sync_off_width
= (v_sync_offset
& 0xf) << 4 |
855 dtd
->part2
.sync_off_width_high
= ((h_sync_offset
& 0x300) >> 2) |
856 ((h_sync_len
& 0x300) >> 4) | ((v_sync_offset
& 0x30) >> 2) |
857 ((v_sync_len
& 0x30) >> 4);
859 dtd
->part2
.dtd_flags
= 0x18;
860 if (mode
->flags
& DRM_MODE_FLAG_INTERLACE
)
861 dtd
->part2
.dtd_flags
|= DTD_FLAG_INTERLACE
;
862 if (mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
863 dtd
->part2
.dtd_flags
|= DTD_FLAG_HSYNC_POSITIVE
;
864 if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
865 dtd
->part2
.dtd_flags
|= DTD_FLAG_VSYNC_POSITIVE
;
867 dtd
->part2
.v_sync_off_high
= v_sync_offset
& 0xc0;
870 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode
*pmode
,
871 const struct intel_sdvo_dtd
*dtd
)
873 struct drm_display_mode mode
= {};
875 mode
.hdisplay
= dtd
->part1
.h_active
;
876 mode
.hdisplay
+= ((dtd
->part1
.h_high
>> 4) & 0x0f) << 8;
877 mode
.hsync_start
= mode
.hdisplay
+ dtd
->part2
.h_sync_off
;
878 mode
.hsync_start
+= (dtd
->part2
.sync_off_width_high
& 0xc0) << 2;
879 mode
.hsync_end
= mode
.hsync_start
+ dtd
->part2
.h_sync_width
;
880 mode
.hsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x30) << 4;
881 mode
.htotal
= mode
.hdisplay
+ dtd
->part1
.h_blank
;
882 mode
.htotal
+= (dtd
->part1
.h_high
& 0xf) << 8;
884 mode
.vdisplay
= dtd
->part1
.v_active
;
885 mode
.vdisplay
+= ((dtd
->part1
.v_high
>> 4) & 0x0f) << 8;
886 mode
.vsync_start
= mode
.vdisplay
;
887 mode
.vsync_start
+= (dtd
->part2
.v_sync_off_width
>> 4) & 0xf;
888 mode
.vsync_start
+= (dtd
->part2
.sync_off_width_high
& 0x0c) << 2;
889 mode
.vsync_start
+= dtd
->part2
.v_sync_off_high
& 0xc0;
890 mode
.vsync_end
= mode
.vsync_start
+
891 (dtd
->part2
.v_sync_off_width
& 0xf);
892 mode
.vsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x3) << 4;
893 mode
.vtotal
= mode
.vdisplay
+ dtd
->part1
.v_blank
;
894 mode
.vtotal
+= (dtd
->part1
.v_high
& 0xf) << 8;
896 mode
.clock
= dtd
->part1
.clock
* 10;
898 if (dtd
->part2
.dtd_flags
& DTD_FLAG_INTERLACE
)
899 mode
.flags
|= DRM_MODE_FLAG_INTERLACE
;
900 if (dtd
->part2
.dtd_flags
& DTD_FLAG_HSYNC_POSITIVE
)
901 mode
.flags
|= DRM_MODE_FLAG_PHSYNC
;
903 mode
.flags
|= DRM_MODE_FLAG_NHSYNC
;
904 if (dtd
->part2
.dtd_flags
& DTD_FLAG_VSYNC_POSITIVE
)
905 mode
.flags
|= DRM_MODE_FLAG_PVSYNC
;
907 mode
.flags
|= DRM_MODE_FLAG_NVSYNC
;
909 drm_mode_set_crtcinfo(&mode
, 0);
911 drm_mode_copy(pmode
, &mode
);
914 static bool intel_sdvo_check_supp_encode(struct intel_sdvo
*intel_sdvo
)
916 struct intel_sdvo_encode encode
;
918 BUILD_BUG_ON(sizeof(encode
) != 2);
919 return intel_sdvo_get_value(intel_sdvo
,
920 SDVO_CMD_GET_SUPP_ENCODE
,
921 &encode
, sizeof(encode
));
924 static bool intel_sdvo_set_encode(struct intel_sdvo
*intel_sdvo
,
927 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_ENCODE
, &mode
, 1);
930 static bool intel_sdvo_set_colorimetry(struct intel_sdvo
*intel_sdvo
,
933 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_COLORIMETRY
, &mode
, 1);
937 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo
*intel_sdvo
)
940 uint8_t set_buf_index
[2];
946 intel_sdvo_get_value(encoder
, SDVO_CMD_GET_HBUF_AV_SPLIT
, &av_split
, 1);
948 for (i
= 0; i
<= av_split
; i
++) {
949 set_buf_index
[0] = i
; set_buf_index
[1] = 0;
950 intel_sdvo_write_cmd(encoder
, SDVO_CMD_SET_HBUF_INDEX
,
952 intel_sdvo_write_cmd(encoder
, SDVO_CMD_GET_HBUF_INFO
, NULL
, 0);
953 intel_sdvo_read_response(encoder
, &buf_size
, 1);
956 for (j
= 0; j
<= buf_size
; j
+= 8) {
957 intel_sdvo_write_cmd(encoder
, SDVO_CMD_GET_HBUF_DATA
,
959 intel_sdvo_read_response(encoder
, pos
, 8);
966 static bool intel_sdvo_write_infoframe(struct intel_sdvo
*intel_sdvo
,
967 unsigned if_index
, uint8_t tx_rate
,
968 const uint8_t *data
, unsigned length
)
970 uint8_t set_buf_index
[2] = { if_index
, 0 };
971 uint8_t hbuf_size
, tmp
[8];
974 if (!intel_sdvo_set_value(intel_sdvo
,
975 SDVO_CMD_SET_HBUF_INDEX
,
979 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_HBUF_INFO
,
983 /* Buffer size is 0 based, hooray! */
986 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
987 if_index
, length
, hbuf_size
);
989 for (i
= 0; i
< hbuf_size
; i
+= 8) {
992 memcpy(tmp
, data
+ i
, min_t(unsigned, 8, length
- i
));
994 if (!intel_sdvo_set_value(intel_sdvo
,
995 SDVO_CMD_SET_HBUF_DATA
,
1000 return intel_sdvo_set_value(intel_sdvo
,
1001 SDVO_CMD_SET_HBUF_TXRATE
,
1005 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo
*intel_sdvo
,
1006 const struct drm_display_mode
*adjusted_mode
)
1008 uint8_t sdvo_data
[HDMI_INFOFRAME_SIZE(AVI
)];
1009 struct drm_crtc
*crtc
= intel_sdvo
->base
.base
.crtc
;
1010 struct intel_crtc
*intel_crtc
= to_intel_crtc(crtc
);
1011 union hdmi_infoframe frame
;
1015 ret
= drm_hdmi_avi_infoframe_from_display_mode(&frame
.avi
,
1018 DRM_ERROR("couldn't fill AVI infoframe\n");
1022 if (intel_sdvo
->rgb_quant_range_selectable
) {
1023 if (intel_crtc
->config
->limited_color_range
)
1024 frame
.avi
.quantization_range
=
1025 HDMI_QUANTIZATION_RANGE_LIMITED
;
1027 frame
.avi
.quantization_range
=
1028 HDMI_QUANTIZATION_RANGE_FULL
;
1031 len
= hdmi_infoframe_pack(&frame
, sdvo_data
, sizeof(sdvo_data
));
1035 return intel_sdvo_write_infoframe(intel_sdvo
, SDVO_HBUF_INDEX_AVI_IF
,
1037 sdvo_data
, sizeof(sdvo_data
));
1040 static bool intel_sdvo_set_tv_format(struct intel_sdvo
*intel_sdvo
)
1042 struct intel_sdvo_tv_format format
;
1043 uint32_t format_map
;
1045 format_map
= 1 << intel_sdvo
->tv_format_index
;
1046 memset(&format
, 0, sizeof(format
));
1047 memcpy(&format
, &format_map
, min(sizeof(format
), sizeof(format_map
)));
1049 BUILD_BUG_ON(sizeof(format
) != 6);
1050 return intel_sdvo_set_value(intel_sdvo
,
1051 SDVO_CMD_SET_TV_FORMAT
,
1052 &format
, sizeof(format
));
1056 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo
*intel_sdvo
,
1057 const struct drm_display_mode
*mode
)
1059 struct intel_sdvo_dtd output_dtd
;
1061 if (!intel_sdvo_set_target_output(intel_sdvo
,
1062 intel_sdvo
->attached_output
))
1065 intel_sdvo_get_dtd_from_mode(&output_dtd
, mode
);
1066 if (!intel_sdvo_set_output_timing(intel_sdvo
, &output_dtd
))
1072 /* Asks the sdvo controller for the preferred input mode given the output mode.
1073 * Unfortunately we have to set up the full output mode to do that. */
1075 intel_sdvo_get_preferred_input_mode(struct intel_sdvo
*intel_sdvo
,
1076 const struct drm_display_mode
*mode
,
1077 struct drm_display_mode
*adjusted_mode
)
1079 struct intel_sdvo_dtd input_dtd
;
1081 /* Reset the input timing to the screen. Assume always input 0. */
1082 if (!intel_sdvo_set_target_input(intel_sdvo
))
1085 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo
,
1091 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo
,
1095 intel_sdvo_get_mode_from_dtd(adjusted_mode
, &input_dtd
);
1096 intel_sdvo
->dtd_sdvo_flags
= input_dtd
.part2
.sdvo_flags
;
1101 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state
*pipe_config
)
1103 unsigned dotclock
= pipe_config
->port_clock
;
1104 struct dpll
*clock
= &pipe_config
->dpll
;
1106 /* SDVO TV has fixed PLL values depend on its clock range,
1107 this mirrors vbios setting. */
1108 if (dotclock
>= 100000 && dotclock
< 140500) {
1114 } else if (dotclock
>= 140500 && dotclock
<= 200000) {
1121 WARN(1, "SDVO TV clock out of range: %i\n", dotclock
);
1124 pipe_config
->clock_set
= true;
1127 static bool intel_sdvo_compute_config(struct intel_encoder
*encoder
,
1128 struct intel_crtc_state
*pipe_config
)
1130 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1131 struct drm_display_mode
*adjusted_mode
= &pipe_config
->base
.adjusted_mode
;
1132 struct drm_display_mode
*mode
= &pipe_config
->base
.mode
;
1134 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1135 pipe_config
->pipe_bpp
= 8*3;
1137 if (HAS_PCH_SPLIT(encoder
->base
.dev
))
1138 pipe_config
->has_pch_encoder
= true;
1140 /* We need to construct preferred input timings based on our
1141 * output timings. To do that, we have to set the output
1142 * timings, even though this isn't really the right place in
1143 * the sequence to do it. Oh well.
1145 if (intel_sdvo
->is_tv
) {
1146 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo
, mode
))
1149 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo
,
1152 pipe_config
->sdvo_tv_clock
= true;
1153 } else if (intel_sdvo
->is_lvds
) {
1154 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo
,
1155 intel_sdvo
->sdvo_lvds_fixed_mode
))
1158 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo
,
1163 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1164 * SDVO device will factor out the multiplier during mode_set.
1166 pipe_config
->pixel_multiplier
=
1167 intel_sdvo_get_pixel_multiplier(adjusted_mode
);
1169 pipe_config
->has_hdmi_sink
= intel_sdvo
->has_hdmi_monitor
;
1171 if (intel_sdvo
->color_range_auto
) {
1172 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1173 /* FIXME: This bit is only valid when using TMDS encoding and 8
1174 * bit per color mode. */
1175 if (pipe_config
->has_hdmi_sink
&&
1176 drm_match_cea_mode(adjusted_mode
) > 1)
1177 pipe_config
->limited_color_range
= true;
1179 if (pipe_config
->has_hdmi_sink
&&
1180 intel_sdvo
->color_range
== HDMI_COLOR_RANGE_16_235
)
1181 pipe_config
->limited_color_range
= true;
1184 /* Clock computation needs to happen after pixel multiplier. */
1185 if (intel_sdvo
->is_tv
)
1186 i9xx_adjust_sdvo_tv_clock(pipe_config
);
1188 /* Set user selected PAR to incoming mode's member */
1189 if (intel_sdvo
->is_hdmi
)
1190 adjusted_mode
->picture_aspect_ratio
= intel_sdvo
->aspect_ratio
;
1195 static void intel_sdvo_pre_enable(struct intel_encoder
*intel_encoder
)
1197 struct drm_device
*dev
= intel_encoder
->base
.dev
;
1198 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1199 struct intel_crtc
*crtc
= to_intel_crtc(intel_encoder
->base
.crtc
);
1200 const struct drm_display_mode
*adjusted_mode
= &crtc
->config
->base
.adjusted_mode
;
1201 struct drm_display_mode
*mode
= &crtc
->config
->base
.mode
;
1202 struct intel_sdvo
*intel_sdvo
= to_sdvo(intel_encoder
);
1204 struct intel_sdvo_in_out_map in_out
;
1205 struct intel_sdvo_dtd input_dtd
, output_dtd
;
1211 /* First, set the input mapping for the first input to our controlled
1212 * output. This is only correct if we're a single-input device, in
1213 * which case the first input is the output from the appropriate SDVO
1214 * channel on the motherboard. In a two-input device, the first input
1215 * will be SDVOB and the second SDVOC.
1217 in_out
.in0
= intel_sdvo
->attached_output
;
1220 intel_sdvo_set_value(intel_sdvo
,
1221 SDVO_CMD_SET_IN_OUT_MAP
,
1222 &in_out
, sizeof(in_out
));
1224 /* Set the output timings to the screen */
1225 if (!intel_sdvo_set_target_output(intel_sdvo
,
1226 intel_sdvo
->attached_output
))
1229 /* lvds has a special fixed output timing. */
1230 if (intel_sdvo
->is_lvds
)
1231 intel_sdvo_get_dtd_from_mode(&output_dtd
,
1232 intel_sdvo
->sdvo_lvds_fixed_mode
);
1234 intel_sdvo_get_dtd_from_mode(&output_dtd
, mode
);
1235 if (!intel_sdvo_set_output_timing(intel_sdvo
, &output_dtd
))
1236 DRM_INFO("Setting output timings on %s failed\n",
1237 SDVO_NAME(intel_sdvo
));
1239 /* Set the input timing to the screen. Assume always input 0. */
1240 if (!intel_sdvo_set_target_input(intel_sdvo
))
1243 if (crtc
->config
->has_hdmi_sink
) {
1244 intel_sdvo_set_encode(intel_sdvo
, SDVO_ENCODE_HDMI
);
1245 intel_sdvo_set_colorimetry(intel_sdvo
,
1246 SDVO_COLORIMETRY_RGB256
);
1247 intel_sdvo_set_avi_infoframe(intel_sdvo
, adjusted_mode
);
1249 intel_sdvo_set_encode(intel_sdvo
, SDVO_ENCODE_DVI
);
1251 if (intel_sdvo
->is_tv
&&
1252 !intel_sdvo_set_tv_format(intel_sdvo
))
1255 intel_sdvo_get_dtd_from_mode(&input_dtd
, adjusted_mode
);
1257 if (intel_sdvo
->is_tv
|| intel_sdvo
->is_lvds
)
1258 input_dtd
.part2
.sdvo_flags
= intel_sdvo
->dtd_sdvo_flags
;
1259 if (!intel_sdvo_set_input_timing(intel_sdvo
, &input_dtd
))
1260 DRM_INFO("Setting input timings on %s failed\n",
1261 SDVO_NAME(intel_sdvo
));
1263 switch (crtc
->config
->pixel_multiplier
) {
1265 WARN(1, "unknown pixel multiplier specified\n");
1266 case 1: rate
= SDVO_CLOCK_RATE_MULT_1X
; break;
1267 case 2: rate
= SDVO_CLOCK_RATE_MULT_2X
; break;
1268 case 4: rate
= SDVO_CLOCK_RATE_MULT_4X
; break;
1270 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo
, rate
))
1273 /* Set the SDVO control regs. */
1274 if (INTEL_INFO(dev
)->gen
>= 4) {
1275 /* The real mode polarity is set by the SDVO commands, using
1276 * struct intel_sdvo_dtd. */
1277 sdvox
= SDVO_VSYNC_ACTIVE_HIGH
| SDVO_HSYNC_ACTIVE_HIGH
;
1278 if (!HAS_PCH_SPLIT(dev
) && crtc
->config
->limited_color_range
)
1279 sdvox
|= HDMI_COLOR_RANGE_16_235
;
1280 if (INTEL_INFO(dev
)->gen
< 5)
1281 sdvox
|= SDVO_BORDER_ENABLE
;
1283 sdvox
= I915_READ(intel_sdvo
->sdvo_reg
);
1284 if (intel_sdvo
->port
== PORT_B
)
1285 sdvox
&= SDVOB_PRESERVE_MASK
;
1287 sdvox
&= SDVOC_PRESERVE_MASK
;
1288 sdvox
|= (9 << 19) | SDVO_BORDER_ENABLE
;
1291 if (INTEL_PCH_TYPE(dev
) >= PCH_CPT
)
1292 sdvox
|= SDVO_PIPE_SEL_CPT(crtc
->pipe
);
1294 sdvox
|= SDVO_PIPE_SEL(crtc
->pipe
);
1296 if (intel_sdvo
->has_hdmi_audio
)
1297 sdvox
|= SDVO_AUDIO_ENABLE
;
1299 if (INTEL_INFO(dev
)->gen
>= 4) {
1300 /* done in crtc_mode_set as the dpll_md reg must be written early */
1301 } else if (IS_I945G(dev
) || IS_I945GM(dev
) || IS_G33(dev
)) {
1302 /* done in crtc_mode_set as it lives inside the dpll register */
1304 sdvox
|= (crtc
->config
->pixel_multiplier
- 1)
1305 << SDVO_PORT_MULTIPLY_SHIFT
;
1308 if (input_dtd
.part2
.sdvo_flags
& SDVO_NEED_TO_STALL
&&
1309 INTEL_INFO(dev
)->gen
< 5)
1310 sdvox
|= SDVO_STALL_SELECT
;
1311 intel_sdvo_write_sdvox(intel_sdvo
, sdvox
);
1314 static bool intel_sdvo_connector_get_hw_state(struct intel_connector
*connector
)
1316 struct intel_sdvo_connector
*intel_sdvo_connector
=
1317 to_intel_sdvo_connector(&connector
->base
);
1318 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(&connector
->base
);
1319 u16 active_outputs
= 0;
1321 intel_sdvo_get_active_outputs(intel_sdvo
, &active_outputs
);
1323 if (active_outputs
& intel_sdvo_connector
->output_flag
)
1329 static bool intel_sdvo_get_hw_state(struct intel_encoder
*encoder
,
1332 struct drm_device
*dev
= encoder
->base
.dev
;
1333 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1334 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1335 u16 active_outputs
= 0;
1338 tmp
= I915_READ(intel_sdvo
->sdvo_reg
);
1339 intel_sdvo_get_active_outputs(intel_sdvo
, &active_outputs
);
1341 if (!(tmp
& SDVO_ENABLE
) && (active_outputs
== 0))
1344 if (HAS_PCH_CPT(dev
))
1345 *pipe
= PORT_TO_PIPE_CPT(tmp
);
1347 *pipe
= PORT_TO_PIPE(tmp
);
1352 static void intel_sdvo_get_config(struct intel_encoder
*encoder
,
1353 struct intel_crtc_state
*pipe_config
)
1355 struct drm_device
*dev
= encoder
->base
.dev
;
1356 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1357 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1358 struct intel_sdvo_dtd dtd
;
1359 int encoder_pixel_multiplier
= 0;
1361 u32 flags
= 0, sdvox
;
1365 sdvox
= I915_READ(intel_sdvo
->sdvo_reg
);
1367 ret
= intel_sdvo_get_input_timing(intel_sdvo
, &dtd
);
1369 /* Some sdvo encoders are not spec compliant and don't
1370 * implement the mandatory get_timings function. */
1371 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1372 pipe_config
->quirks
|= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS
;
1374 if (dtd
.part2
.dtd_flags
& DTD_FLAG_HSYNC_POSITIVE
)
1375 flags
|= DRM_MODE_FLAG_PHSYNC
;
1377 flags
|= DRM_MODE_FLAG_NHSYNC
;
1379 if (dtd
.part2
.dtd_flags
& DTD_FLAG_VSYNC_POSITIVE
)
1380 flags
|= DRM_MODE_FLAG_PVSYNC
;
1382 flags
|= DRM_MODE_FLAG_NVSYNC
;
1385 pipe_config
->base
.adjusted_mode
.flags
|= flags
;
1388 * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1389 * the sdvo port register, on all other platforms it is part of the dpll
1390 * state. Since the general pipe state readout happens before the
1391 * encoder->get_config we so already have a valid pixel multplier on all
1394 if (IS_I915G(dev
) || IS_I915GM(dev
)) {
1395 pipe_config
->pixel_multiplier
=
1396 ((sdvox
& SDVO_PORT_MULTIPLY_MASK
)
1397 >> SDVO_PORT_MULTIPLY_SHIFT
) + 1;
1400 dotclock
= pipe_config
->port_clock
;
1401 if (pipe_config
->pixel_multiplier
)
1402 dotclock
/= pipe_config
->pixel_multiplier
;
1404 if (HAS_PCH_SPLIT(dev
))
1405 ironlake_check_encoder_dotclock(pipe_config
, dotclock
);
1407 pipe_config
->base
.adjusted_mode
.crtc_clock
= dotclock
;
1409 /* Cross check the port pixel multiplier with the sdvo encoder state. */
1410 if (intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_CLOCK_RATE_MULT
,
1413 case SDVO_CLOCK_RATE_MULT_1X
:
1414 encoder_pixel_multiplier
= 1;
1416 case SDVO_CLOCK_RATE_MULT_2X
:
1417 encoder_pixel_multiplier
= 2;
1419 case SDVO_CLOCK_RATE_MULT_4X
:
1420 encoder_pixel_multiplier
= 4;
1425 if (sdvox
& HDMI_COLOR_RANGE_16_235
)
1426 pipe_config
->limited_color_range
= true;
1428 if (intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_ENCODE
,
1430 if (val
== SDVO_ENCODE_HDMI
)
1431 pipe_config
->has_hdmi_sink
= true;
1434 WARN(encoder_pixel_multiplier
!= pipe_config
->pixel_multiplier
,
1435 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1436 pipe_config
->pixel_multiplier
, encoder_pixel_multiplier
);
1439 static void intel_disable_sdvo(struct intel_encoder
*encoder
)
1441 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
1442 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1443 struct intel_crtc
*crtc
= to_intel_crtc(encoder
->base
.crtc
);
1446 intel_sdvo_set_active_outputs(intel_sdvo
, 0);
1448 intel_sdvo_set_encoder_power_state(intel_sdvo
,
1451 temp
= I915_READ(intel_sdvo
->sdvo_reg
);
1453 temp
&= ~SDVO_ENABLE
;
1454 intel_sdvo_write_sdvox(intel_sdvo
, temp
);
1457 * HW workaround for IBX, we need to move the port
1458 * to transcoder A after disabling it to allow the
1459 * matching DP port to be enabled on transcoder A.
1461 if (HAS_PCH_IBX(dev_priv
) && crtc
->pipe
== PIPE_B
) {
1463 * We get CPU/PCH FIFO underruns on the other pipe when
1464 * doing the workaround. Sweep them under the rug.
1466 intel_set_cpu_fifo_underrun_reporting(dev_priv
, PIPE_A
, false);
1467 intel_set_pch_fifo_underrun_reporting(dev_priv
, PIPE_A
, false);
1469 temp
&= ~SDVO_PIPE_B_SELECT
;
1470 temp
|= SDVO_ENABLE
;
1471 intel_sdvo_write_sdvox(intel_sdvo
, temp
);
1473 temp
&= ~SDVO_ENABLE
;
1474 intel_sdvo_write_sdvox(intel_sdvo
, temp
);
1476 intel_wait_for_vblank_if_active(dev_priv
->dev
, PIPE_A
);
1477 intel_set_cpu_fifo_underrun_reporting(dev_priv
, PIPE_A
, true);
1478 intel_set_pch_fifo_underrun_reporting(dev_priv
, PIPE_A
, true);
1482 static void pch_disable_sdvo(struct intel_encoder
*encoder
)
1486 static void pch_post_disable_sdvo(struct intel_encoder
*encoder
)
1488 intel_disable_sdvo(encoder
);
1491 static void intel_enable_sdvo(struct intel_encoder
*encoder
)
1493 struct drm_device
*dev
= encoder
->base
.dev
;
1494 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1495 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1496 struct intel_crtc
*intel_crtc
= to_intel_crtc(encoder
->base
.crtc
);
1498 bool input1
, input2
;
1502 temp
= I915_READ(intel_sdvo
->sdvo_reg
);
1503 temp
|= SDVO_ENABLE
;
1504 intel_sdvo_write_sdvox(intel_sdvo
, temp
);
1506 for (i
= 0; i
< 2; i
++)
1507 intel_wait_for_vblank(dev
, intel_crtc
->pipe
);
1509 success
= intel_sdvo_get_trained_inputs(intel_sdvo
, &input1
, &input2
);
1510 /* Warn if the device reported failure to sync.
1511 * A lot of SDVO devices fail to notify of sync, but it's
1512 * a given it the status is a success, we succeeded.
1514 if (success
&& !input1
) {
1515 DRM_DEBUG_KMS("First %s output reported failure to "
1516 "sync\n", SDVO_NAME(intel_sdvo
));
1520 intel_sdvo_set_encoder_power_state(intel_sdvo
,
1522 intel_sdvo_set_active_outputs(intel_sdvo
, intel_sdvo
->attached_output
);
1525 static enum drm_mode_status
1526 intel_sdvo_mode_valid(struct drm_connector
*connector
,
1527 struct drm_display_mode
*mode
)
1529 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1531 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
1532 return MODE_NO_DBLESCAN
;
1534 if (intel_sdvo
->pixel_clock_min
> mode
->clock
)
1535 return MODE_CLOCK_LOW
;
1537 if (intel_sdvo
->pixel_clock_max
< mode
->clock
)
1538 return MODE_CLOCK_HIGH
;
1540 if (intel_sdvo
->is_lvds
) {
1541 if (mode
->hdisplay
> intel_sdvo
->sdvo_lvds_fixed_mode
->hdisplay
)
1544 if (mode
->vdisplay
> intel_sdvo
->sdvo_lvds_fixed_mode
->vdisplay
)
1551 static bool intel_sdvo_get_capabilities(struct intel_sdvo
*intel_sdvo
, struct intel_sdvo_caps
*caps
)
1553 BUILD_BUG_ON(sizeof(*caps
) != 8);
1554 if (!intel_sdvo_get_value(intel_sdvo
,
1555 SDVO_CMD_GET_DEVICE_CAPS
,
1556 caps
, sizeof(*caps
)))
1559 DRM_DEBUG_KMS("SDVO capabilities:\n"
1562 " device_rev_id: %d\n"
1563 " sdvo_version_major: %d\n"
1564 " sdvo_version_minor: %d\n"
1565 " sdvo_inputs_mask: %d\n"
1566 " smooth_scaling: %d\n"
1567 " sharp_scaling: %d\n"
1569 " down_scaling: %d\n"
1570 " stall_support: %d\n"
1571 " output_flags: %d\n",
1574 caps
->device_rev_id
,
1575 caps
->sdvo_version_major
,
1576 caps
->sdvo_version_minor
,
1577 caps
->sdvo_inputs_mask
,
1578 caps
->smooth_scaling
,
1579 caps
->sharp_scaling
,
1582 caps
->stall_support
,
1583 caps
->output_flags
);
1588 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo
*intel_sdvo
)
1590 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
1593 if (!I915_HAS_HOTPLUG(dev
))
1596 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1598 if (IS_I945G(dev
) || IS_I945GM(dev
))
1601 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_HOT_PLUG_SUPPORT
,
1602 &hotplug
, sizeof(hotplug
)))
1608 static void intel_sdvo_enable_hotplug(struct intel_encoder
*encoder
)
1610 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1612 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_ACTIVE_HOT_PLUG
,
1613 &intel_sdvo
->hotplug_active
, 2);
1617 intel_sdvo_multifunc_encoder(struct intel_sdvo
*intel_sdvo
)
1619 /* Is there more than one type of output? */
1620 return hweight16(intel_sdvo
->caps
.output_flags
) > 1;
1623 static struct edid
*
1624 intel_sdvo_get_edid(struct drm_connector
*connector
)
1626 struct intel_sdvo
*sdvo
= intel_attached_sdvo(connector
);
1627 return drm_get_edid(connector
, &sdvo
->ddc
);
1630 /* Mac mini hack -- use the same DDC as the analog connector */
1631 static struct edid
*
1632 intel_sdvo_get_analog_edid(struct drm_connector
*connector
)
1634 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
1636 return drm_get_edid(connector
,
1637 intel_gmbus_get_adapter(dev_priv
,
1638 dev_priv
->vbt
.crt_ddc_pin
));
1641 static enum drm_connector_status
1642 intel_sdvo_tmds_sink_detect(struct drm_connector
*connector
)
1644 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1645 enum drm_connector_status status
;
1648 edid
= intel_sdvo_get_edid(connector
);
1650 if (edid
== NULL
&& intel_sdvo_multifunc_encoder(intel_sdvo
)) {
1651 u8 ddc
, saved_ddc
= intel_sdvo
->ddc_bus
;
1654 * Don't use the 1 as the argument of DDC bus switch to get
1655 * the EDID. It is used for SDVO SPD ROM.
1657 for (ddc
= intel_sdvo
->ddc_bus
>> 1; ddc
> 1; ddc
>>= 1) {
1658 intel_sdvo
->ddc_bus
= ddc
;
1659 edid
= intel_sdvo_get_edid(connector
);
1664 * If we found the EDID on the other bus,
1665 * assume that is the correct DDC bus.
1668 intel_sdvo
->ddc_bus
= saved_ddc
;
1672 * When there is no edid and no monitor is connected with VGA
1673 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1676 edid
= intel_sdvo_get_analog_edid(connector
);
1678 status
= connector_status_unknown
;
1680 /* DDC bus is shared, match EDID to connector type */
1681 if (edid
->input
& DRM_EDID_INPUT_DIGITAL
) {
1682 status
= connector_status_connected
;
1683 if (intel_sdvo
->is_hdmi
) {
1684 intel_sdvo
->has_hdmi_monitor
= drm_detect_hdmi_monitor(edid
);
1685 intel_sdvo
->has_hdmi_audio
= drm_detect_monitor_audio(edid
);
1686 intel_sdvo
->rgb_quant_range_selectable
=
1687 drm_rgb_quant_range_selectable(edid
);
1690 status
= connector_status_disconnected
;
1694 if (status
== connector_status_connected
) {
1695 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1696 if (intel_sdvo_connector
->force_audio
!= HDMI_AUDIO_AUTO
)
1697 intel_sdvo
->has_hdmi_audio
= (intel_sdvo_connector
->force_audio
== HDMI_AUDIO_ON
);
1704 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector
*sdvo
,
1707 bool monitor_is_digital
= !!(edid
->input
& DRM_EDID_INPUT_DIGITAL
);
1708 bool connector_is_digital
= !!IS_DIGITAL(sdvo
);
1710 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1711 connector_is_digital
, monitor_is_digital
);
1712 return connector_is_digital
== monitor_is_digital
;
1715 static enum drm_connector_status
1716 intel_sdvo_detect(struct drm_connector
*connector
, bool force
)
1719 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1720 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1721 enum drm_connector_status ret
;
1723 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1724 connector
->base
.id
, connector
->name
);
1726 if (!intel_sdvo_get_value(intel_sdvo
,
1727 SDVO_CMD_GET_ATTACHED_DISPLAYS
,
1729 return connector_status_unknown
;
1731 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1732 response
& 0xff, response
>> 8,
1733 intel_sdvo_connector
->output_flag
);
1736 return connector_status_disconnected
;
1738 intel_sdvo
->attached_output
= response
;
1740 intel_sdvo
->has_hdmi_monitor
= false;
1741 intel_sdvo
->has_hdmi_audio
= false;
1742 intel_sdvo
->rgb_quant_range_selectable
= false;
1744 if ((intel_sdvo_connector
->output_flag
& response
) == 0)
1745 ret
= connector_status_disconnected
;
1746 else if (IS_TMDS(intel_sdvo_connector
))
1747 ret
= intel_sdvo_tmds_sink_detect(connector
);
1751 /* if we have an edid check it matches the connection */
1752 edid
= intel_sdvo_get_edid(connector
);
1754 edid
= intel_sdvo_get_analog_edid(connector
);
1756 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector
,
1758 ret
= connector_status_connected
;
1760 ret
= connector_status_disconnected
;
1764 ret
= connector_status_connected
;
1767 /* May update encoder flag for like clock for SDVO TV, etc.*/
1768 if (ret
== connector_status_connected
) {
1769 intel_sdvo
->is_tv
= false;
1770 intel_sdvo
->is_lvds
= false;
1772 if (response
& SDVO_TV_MASK
)
1773 intel_sdvo
->is_tv
= true;
1774 if (response
& SDVO_LVDS_MASK
)
1775 intel_sdvo
->is_lvds
= intel_sdvo
->sdvo_lvds_fixed_mode
!= NULL
;
1781 static void intel_sdvo_get_ddc_modes(struct drm_connector
*connector
)
1785 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1786 connector
->base
.id
, connector
->name
);
1788 /* set the bus switch and get the modes */
1789 edid
= intel_sdvo_get_edid(connector
);
1792 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1793 * link between analog and digital outputs. So, if the regular SDVO
1794 * DDC fails, check to see if the analog output is disconnected, in
1795 * which case we'll look there for the digital DDC data.
1798 edid
= intel_sdvo_get_analog_edid(connector
);
1801 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector
),
1803 drm_mode_connector_update_edid_property(connector
, edid
);
1804 drm_add_edid_modes(connector
, edid
);
1812 * Set of SDVO TV modes.
1813 * Note! This is in reply order (see loop in get_tv_modes).
1814 * XXX: all 60Hz refresh?
1816 static const struct drm_display_mode sdvo_tv_modes
[] = {
1817 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER
, 5815, 320, 321, 384,
1818 416, 0, 200, 201, 232, 233, 0,
1819 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1820 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER
, 6814, 320, 321, 384,
1821 416, 0, 240, 241, 272, 273, 0,
1822 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1823 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER
, 9910, 400, 401, 464,
1824 496, 0, 300, 301, 332, 333, 0,
1825 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1826 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER
, 16913, 640, 641, 704,
1827 736, 0, 350, 351, 382, 383, 0,
1828 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1829 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER
, 19121, 640, 641, 704,
1830 736, 0, 400, 401, 432, 433, 0,
1831 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1832 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 22654, 640, 641, 704,
1833 736, 0, 480, 481, 512, 513, 0,
1834 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1835 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER
, 24624, 704, 705, 768,
1836 800, 0, 480, 481, 512, 513, 0,
1837 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1838 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER
, 29232, 704, 705, 768,
1839 800, 0, 576, 577, 608, 609, 0,
1840 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1841 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER
, 18751, 720, 721, 784,
1842 816, 0, 350, 351, 382, 383, 0,
1843 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1844 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 21199, 720, 721, 784,
1845 816, 0, 400, 401, 432, 433, 0,
1846 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1847 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 25116, 720, 721, 784,
1848 816, 0, 480, 481, 512, 513, 0,
1849 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1850 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER
, 28054, 720, 721, 784,
1851 816, 0, 540, 541, 572, 573, 0,
1852 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1853 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 29816, 720, 721, 784,
1854 816, 0, 576, 577, 608, 609, 0,
1855 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1856 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER
, 31570, 768, 769, 832,
1857 864, 0, 576, 577, 608, 609, 0,
1858 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1859 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 34030, 800, 801, 864,
1860 896, 0, 600, 601, 632, 633, 0,
1861 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1862 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER
, 36581, 832, 833, 896,
1863 928, 0, 624, 625, 656, 657, 0,
1864 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1865 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER
, 48707, 920, 921, 984,
1866 1016, 0, 766, 767, 798, 799, 0,
1867 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1868 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 53827, 1024, 1025, 1088,
1869 1120, 0, 768, 769, 800, 801, 0,
1870 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1871 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 87265, 1280, 1281, 1344,
1872 1376, 0, 1024, 1025, 1056, 1057, 0,
1873 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1876 static void intel_sdvo_get_tv_modes(struct drm_connector
*connector
)
1878 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1879 struct intel_sdvo_sdtv_resolution_request tv_res
;
1880 uint32_t reply
= 0, format_map
= 0;
1883 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1884 connector
->base
.id
, connector
->name
);
1886 /* Read the list of supported input resolutions for the selected TV
1889 format_map
= 1 << intel_sdvo
->tv_format_index
;
1890 memcpy(&tv_res
, &format_map
,
1891 min(sizeof(format_map
), sizeof(struct intel_sdvo_sdtv_resolution_request
)));
1893 if (!intel_sdvo_set_target_output(intel_sdvo
, intel_sdvo
->attached_output
))
1896 BUILD_BUG_ON(sizeof(tv_res
) != 3);
1897 if (!intel_sdvo_write_cmd(intel_sdvo
,
1898 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
,
1899 &tv_res
, sizeof(tv_res
)))
1901 if (!intel_sdvo_read_response(intel_sdvo
, &reply
, 3))
1904 for (i
= 0; i
< ARRAY_SIZE(sdvo_tv_modes
); i
++)
1905 if (reply
& (1 << i
)) {
1906 struct drm_display_mode
*nmode
;
1907 nmode
= drm_mode_duplicate(connector
->dev
,
1910 drm_mode_probed_add(connector
, nmode
);
1914 static void intel_sdvo_get_lvds_modes(struct drm_connector
*connector
)
1916 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1917 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
1918 struct drm_display_mode
*newmode
;
1920 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1921 connector
->base
.id
, connector
->name
);
1924 * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1925 * SDVO->LVDS transcoders can't cope with the EDID mode.
1927 if (dev_priv
->vbt
.sdvo_lvds_vbt_mode
!= NULL
) {
1928 newmode
= drm_mode_duplicate(connector
->dev
,
1929 dev_priv
->vbt
.sdvo_lvds_vbt_mode
);
1930 if (newmode
!= NULL
) {
1931 /* Guarantee the mode is preferred */
1932 newmode
->type
= (DRM_MODE_TYPE_PREFERRED
|
1933 DRM_MODE_TYPE_DRIVER
);
1934 drm_mode_probed_add(connector
, newmode
);
1939 * Attempt to get the mode list from DDC.
1940 * Assume that the preferred modes are
1941 * arranged in priority order.
1943 intel_ddc_get_modes(connector
, &intel_sdvo
->ddc
);
1945 list_for_each_entry(newmode
, &connector
->probed_modes
, head
) {
1946 if (newmode
->type
& DRM_MODE_TYPE_PREFERRED
) {
1947 intel_sdvo
->sdvo_lvds_fixed_mode
=
1948 drm_mode_duplicate(connector
->dev
, newmode
);
1950 intel_sdvo
->is_lvds
= true;
1956 static int intel_sdvo_get_modes(struct drm_connector
*connector
)
1958 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1960 if (IS_TV(intel_sdvo_connector
))
1961 intel_sdvo_get_tv_modes(connector
);
1962 else if (IS_LVDS(intel_sdvo_connector
))
1963 intel_sdvo_get_lvds_modes(connector
);
1965 intel_sdvo_get_ddc_modes(connector
);
1967 return !list_empty(&connector
->probed_modes
);
1970 static void intel_sdvo_destroy(struct drm_connector
*connector
)
1972 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1974 drm_connector_cleanup(connector
);
1975 kfree(intel_sdvo_connector
);
1978 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector
*connector
)
1980 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1982 bool has_audio
= false;
1984 if (!intel_sdvo
->is_hdmi
)
1987 edid
= intel_sdvo_get_edid(connector
);
1988 if (edid
!= NULL
&& edid
->input
& DRM_EDID_INPUT_DIGITAL
)
1989 has_audio
= drm_detect_monitor_audio(edid
);
1996 intel_sdvo_set_property(struct drm_connector
*connector
,
1997 struct drm_property
*property
,
2000 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
2001 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
2002 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
2003 uint16_t temp_value
;
2007 ret
= drm_object_property_set_value(&connector
->base
, property
, val
);
2011 if (property
== dev_priv
->force_audio_property
) {
2015 if (i
== intel_sdvo_connector
->force_audio
)
2018 intel_sdvo_connector
->force_audio
= i
;
2020 if (i
== HDMI_AUDIO_AUTO
)
2021 has_audio
= intel_sdvo_detect_hdmi_audio(connector
);
2023 has_audio
= (i
== HDMI_AUDIO_ON
);
2025 if (has_audio
== intel_sdvo
->has_hdmi_audio
)
2028 intel_sdvo
->has_hdmi_audio
= has_audio
;
2032 if (property
== dev_priv
->broadcast_rgb_property
) {
2033 bool old_auto
= intel_sdvo
->color_range_auto
;
2034 uint32_t old_range
= intel_sdvo
->color_range
;
2037 case INTEL_BROADCAST_RGB_AUTO
:
2038 intel_sdvo
->color_range_auto
= true;
2040 case INTEL_BROADCAST_RGB_FULL
:
2041 intel_sdvo
->color_range_auto
= false;
2042 intel_sdvo
->color_range
= 0;
2044 case INTEL_BROADCAST_RGB_LIMITED
:
2045 intel_sdvo
->color_range_auto
= false;
2046 /* FIXME: this bit is only valid when using TMDS
2047 * encoding and 8 bit per color mode. */
2048 intel_sdvo
->color_range
= HDMI_COLOR_RANGE_16_235
;
2054 if (old_auto
== intel_sdvo
->color_range_auto
&&
2055 old_range
== intel_sdvo
->color_range
)
2061 if (property
== connector
->dev
->mode_config
.aspect_ratio_property
) {
2063 case DRM_MODE_PICTURE_ASPECT_NONE
:
2064 intel_sdvo
->aspect_ratio
= HDMI_PICTURE_ASPECT_NONE
;
2066 case DRM_MODE_PICTURE_ASPECT_4_3
:
2067 intel_sdvo
->aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
;
2069 case DRM_MODE_PICTURE_ASPECT_16_9
:
2070 intel_sdvo
->aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
;
2078 #define CHECK_PROPERTY(name, NAME) \
2079 if (intel_sdvo_connector->name == property) { \
2080 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
2081 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
2082 cmd = SDVO_CMD_SET_##NAME; \
2083 intel_sdvo_connector->cur_##name = temp_value; \
2087 if (property
== intel_sdvo_connector
->tv_format
) {
2088 if (val
>= TV_FORMAT_NUM
)
2091 if (intel_sdvo
->tv_format_index
==
2092 intel_sdvo_connector
->tv_format_supported
[val
])
2095 intel_sdvo
->tv_format_index
= intel_sdvo_connector
->tv_format_supported
[val
];
2097 } else if (IS_TV_OR_LVDS(intel_sdvo_connector
)) {
2099 if (intel_sdvo_connector
->left
== property
) {
2100 drm_object_property_set_value(&connector
->base
,
2101 intel_sdvo_connector
->right
, val
);
2102 if (intel_sdvo_connector
->left_margin
== temp_value
)
2105 intel_sdvo_connector
->left_margin
= temp_value
;
2106 intel_sdvo_connector
->right_margin
= temp_value
;
2107 temp_value
= intel_sdvo_connector
->max_hscan
-
2108 intel_sdvo_connector
->left_margin
;
2109 cmd
= SDVO_CMD_SET_OVERSCAN_H
;
2111 } else if (intel_sdvo_connector
->right
== property
) {
2112 drm_object_property_set_value(&connector
->base
,
2113 intel_sdvo_connector
->left
, val
);
2114 if (intel_sdvo_connector
->right_margin
== temp_value
)
2117 intel_sdvo_connector
->left_margin
= temp_value
;
2118 intel_sdvo_connector
->right_margin
= temp_value
;
2119 temp_value
= intel_sdvo_connector
->max_hscan
-
2120 intel_sdvo_connector
->left_margin
;
2121 cmd
= SDVO_CMD_SET_OVERSCAN_H
;
2123 } else if (intel_sdvo_connector
->top
== property
) {
2124 drm_object_property_set_value(&connector
->base
,
2125 intel_sdvo_connector
->bottom
, val
);
2126 if (intel_sdvo_connector
->top_margin
== temp_value
)
2129 intel_sdvo_connector
->top_margin
= temp_value
;
2130 intel_sdvo_connector
->bottom_margin
= temp_value
;
2131 temp_value
= intel_sdvo_connector
->max_vscan
-
2132 intel_sdvo_connector
->top_margin
;
2133 cmd
= SDVO_CMD_SET_OVERSCAN_V
;
2135 } else if (intel_sdvo_connector
->bottom
== property
) {
2136 drm_object_property_set_value(&connector
->base
,
2137 intel_sdvo_connector
->top
, val
);
2138 if (intel_sdvo_connector
->bottom_margin
== temp_value
)
2141 intel_sdvo_connector
->top_margin
= temp_value
;
2142 intel_sdvo_connector
->bottom_margin
= temp_value
;
2143 temp_value
= intel_sdvo_connector
->max_vscan
-
2144 intel_sdvo_connector
->top_margin
;
2145 cmd
= SDVO_CMD_SET_OVERSCAN_V
;
2148 CHECK_PROPERTY(hpos
, HPOS
)
2149 CHECK_PROPERTY(vpos
, VPOS
)
2150 CHECK_PROPERTY(saturation
, SATURATION
)
2151 CHECK_PROPERTY(contrast
, CONTRAST
)
2152 CHECK_PROPERTY(hue
, HUE
)
2153 CHECK_PROPERTY(brightness
, BRIGHTNESS
)
2154 CHECK_PROPERTY(sharpness
, SHARPNESS
)
2155 CHECK_PROPERTY(flicker_filter
, FLICKER_FILTER
)
2156 CHECK_PROPERTY(flicker_filter_2d
, FLICKER_FILTER_2D
)
2157 CHECK_PROPERTY(flicker_filter_adaptive
, FLICKER_FILTER_ADAPTIVE
)
2158 CHECK_PROPERTY(tv_chroma_filter
, TV_CHROMA_FILTER
)
2159 CHECK_PROPERTY(tv_luma_filter
, TV_LUMA_FILTER
)
2160 CHECK_PROPERTY(dot_crawl
, DOT_CRAWL
)
2163 return -EINVAL
; /* unknown property */
2166 if (!intel_sdvo_set_value(intel_sdvo
, cmd
, &temp_value
, 2))
2171 if (intel_sdvo
->base
.base
.crtc
)
2172 intel_crtc_restore_mode(intel_sdvo
->base
.base
.crtc
);
2175 #undef CHECK_PROPERTY
2178 static const struct drm_connector_funcs intel_sdvo_connector_funcs
= {
2179 .dpms
= drm_atomic_helper_connector_dpms
,
2180 .detect
= intel_sdvo_detect
,
2181 .fill_modes
= drm_helper_probe_single_connector_modes
,
2182 .set_property
= intel_sdvo_set_property
,
2183 .atomic_get_property
= intel_connector_atomic_get_property
,
2184 .destroy
= intel_sdvo_destroy
,
2185 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
2186 .atomic_duplicate_state
= drm_atomic_helper_connector_duplicate_state
,
2189 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs
= {
2190 .get_modes
= intel_sdvo_get_modes
,
2191 .mode_valid
= intel_sdvo_mode_valid
,
2192 .best_encoder
= intel_best_encoder
,
2195 static void intel_sdvo_enc_destroy(struct drm_encoder
*encoder
)
2197 struct intel_sdvo
*intel_sdvo
= to_sdvo(to_intel_encoder(encoder
));
2199 if (intel_sdvo
->sdvo_lvds_fixed_mode
!= NULL
)
2200 drm_mode_destroy(encoder
->dev
,
2201 intel_sdvo
->sdvo_lvds_fixed_mode
);
2203 i2c_del_adapter(&intel_sdvo
->ddc
);
2204 intel_encoder_destroy(encoder
);
2207 static const struct drm_encoder_funcs intel_sdvo_enc_funcs
= {
2208 .destroy
= intel_sdvo_enc_destroy
,
2212 intel_sdvo_guess_ddc_bus(struct intel_sdvo
*sdvo
)
2215 unsigned int num_bits
;
2217 /* Make a mask of outputs less than or equal to our own priority in the
2220 switch (sdvo
->controlled_output
) {
2221 case SDVO_OUTPUT_LVDS1
:
2222 mask
|= SDVO_OUTPUT_LVDS1
;
2223 case SDVO_OUTPUT_LVDS0
:
2224 mask
|= SDVO_OUTPUT_LVDS0
;
2225 case SDVO_OUTPUT_TMDS1
:
2226 mask
|= SDVO_OUTPUT_TMDS1
;
2227 case SDVO_OUTPUT_TMDS0
:
2228 mask
|= SDVO_OUTPUT_TMDS0
;
2229 case SDVO_OUTPUT_RGB1
:
2230 mask
|= SDVO_OUTPUT_RGB1
;
2231 case SDVO_OUTPUT_RGB0
:
2232 mask
|= SDVO_OUTPUT_RGB0
;
2236 /* Count bits to find what number we are in the priority list. */
2237 mask
&= sdvo
->caps
.output_flags
;
2238 num_bits
= hweight16(mask
);
2239 /* If more than 3 outputs, default to DDC bus 3 for now. */
2243 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2244 sdvo
->ddc_bus
= 1 << num_bits
;
2248 * Choose the appropriate DDC bus for control bus switch command for this
2249 * SDVO output based on the controlled output.
2251 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2252 * outputs, then LVDS outputs.
2255 intel_sdvo_select_ddc_bus(struct drm_i915_private
*dev_priv
,
2256 struct intel_sdvo
*sdvo
)
2258 struct sdvo_device_mapping
*mapping
;
2260 if (sdvo
->port
== PORT_B
)
2261 mapping
= &(dev_priv
->sdvo_mappings
[0]);
2263 mapping
= &(dev_priv
->sdvo_mappings
[1]);
2265 if (mapping
->initialized
)
2266 sdvo
->ddc_bus
= 1 << ((mapping
->ddc_pin
& 0xf0) >> 4);
2268 intel_sdvo_guess_ddc_bus(sdvo
);
2272 intel_sdvo_select_i2c_bus(struct drm_i915_private
*dev_priv
,
2273 struct intel_sdvo
*sdvo
)
2275 struct sdvo_device_mapping
*mapping
;
2278 if (sdvo
->port
== PORT_B
)
2279 mapping
= &dev_priv
->sdvo_mappings
[0];
2281 mapping
= &dev_priv
->sdvo_mappings
[1];
2283 if (mapping
->initialized
&&
2284 intel_gmbus_is_valid_pin(dev_priv
, mapping
->i2c_pin
))
2285 pin
= mapping
->i2c_pin
;
2287 pin
= GMBUS_PIN_DPB
;
2289 sdvo
->i2c
= intel_gmbus_get_adapter(dev_priv
, pin
);
2291 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2292 * our code totally fails once we start using gmbus. Hence fall back to
2293 * bit banging for now. */
2294 intel_gmbus_force_bit(sdvo
->i2c
, true);
2297 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2299 intel_sdvo_unselect_i2c_bus(struct intel_sdvo
*sdvo
)
2301 intel_gmbus_force_bit(sdvo
->i2c
, false);
2305 intel_sdvo_is_hdmi_connector(struct intel_sdvo
*intel_sdvo
, int device
)
2307 return intel_sdvo_check_supp_encode(intel_sdvo
);
2311 intel_sdvo_get_slave_addr(struct drm_device
*dev
, struct intel_sdvo
*sdvo
)
2313 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2314 struct sdvo_device_mapping
*my_mapping
, *other_mapping
;
2316 if (sdvo
->port
== PORT_B
) {
2317 my_mapping
= &dev_priv
->sdvo_mappings
[0];
2318 other_mapping
= &dev_priv
->sdvo_mappings
[1];
2320 my_mapping
= &dev_priv
->sdvo_mappings
[1];
2321 other_mapping
= &dev_priv
->sdvo_mappings
[0];
2324 /* If the BIOS described our SDVO device, take advantage of it. */
2325 if (my_mapping
->slave_addr
)
2326 return my_mapping
->slave_addr
;
2328 /* If the BIOS only described a different SDVO device, use the
2329 * address that it isn't using.
2331 if (other_mapping
->slave_addr
) {
2332 if (other_mapping
->slave_addr
== 0x70)
2338 /* No SDVO device info is found for another DVO port,
2339 * so use mapping assumption we had before BIOS parsing.
2341 if (sdvo
->port
== PORT_B
)
2348 intel_sdvo_connector_unregister(struct intel_connector
*intel_connector
)
2350 struct drm_connector
*drm_connector
;
2351 struct intel_sdvo
*sdvo_encoder
;
2353 drm_connector
= &intel_connector
->base
;
2354 sdvo_encoder
= intel_attached_sdvo(&intel_connector
->base
);
2356 sysfs_remove_link(&drm_connector
->kdev
->kobj
,
2357 sdvo_encoder
->ddc
.dev
.kobj
.name
);
2358 intel_connector_unregister(intel_connector
);
2362 intel_sdvo_connector_init(struct intel_sdvo_connector
*connector
,
2363 struct intel_sdvo
*encoder
)
2365 struct drm_connector
*drm_connector
;
2368 drm_connector
= &connector
->base
.base
;
2369 ret
= drm_connector_init(encoder
->base
.base
.dev
,
2371 &intel_sdvo_connector_funcs
,
2372 connector
->base
.base
.connector_type
);
2376 drm_connector_helper_add(drm_connector
,
2377 &intel_sdvo_connector_helper_funcs
);
2379 connector
->base
.base
.interlace_allowed
= 1;
2380 connector
->base
.base
.doublescan_allowed
= 0;
2381 connector
->base
.base
.display_info
.subpixel_order
= SubPixelHorizontalRGB
;
2382 connector
->base
.get_hw_state
= intel_sdvo_connector_get_hw_state
;
2383 connector
->base
.unregister
= intel_sdvo_connector_unregister
;
2385 intel_connector_attach_encoder(&connector
->base
, &encoder
->base
);
2386 ret
= drm_connector_register(drm_connector
);
2390 ret
= sysfs_create_link(&drm_connector
->kdev
->kobj
,
2391 &encoder
->ddc
.dev
.kobj
,
2392 encoder
->ddc
.dev
.kobj
.name
);
2399 drm_connector_unregister(drm_connector
);
2401 drm_connector_cleanup(drm_connector
);
2407 intel_sdvo_add_hdmi_properties(struct intel_sdvo
*intel_sdvo
,
2408 struct intel_sdvo_connector
*connector
)
2410 struct drm_device
*dev
= connector
->base
.base
.dev
;
2412 intel_attach_force_audio_property(&connector
->base
.base
);
2413 if (INTEL_INFO(dev
)->gen
>= 4 && IS_MOBILE(dev
)) {
2414 intel_attach_broadcast_rgb_property(&connector
->base
.base
);
2415 intel_sdvo
->color_range_auto
= true;
2417 intel_attach_aspect_ratio_property(&connector
->base
.base
);
2418 intel_sdvo
->aspect_ratio
= HDMI_PICTURE_ASPECT_NONE
;
2421 static struct intel_sdvo_connector
*intel_sdvo_connector_alloc(void)
2423 struct intel_sdvo_connector
*sdvo_connector
;
2425 sdvo_connector
= kzalloc(sizeof(*sdvo_connector
), GFP_KERNEL
);
2426 if (!sdvo_connector
)
2429 if (intel_connector_init(&sdvo_connector
->base
) < 0) {
2430 kfree(sdvo_connector
);
2434 return sdvo_connector
;
2438 intel_sdvo_dvi_init(struct intel_sdvo
*intel_sdvo
, int device
)
2440 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2441 struct drm_connector
*connector
;
2442 struct intel_encoder
*intel_encoder
= to_intel_encoder(encoder
);
2443 struct intel_connector
*intel_connector
;
2444 struct intel_sdvo_connector
*intel_sdvo_connector
;
2446 DRM_DEBUG_KMS("initialising DVI device %d\n", device
);
2448 intel_sdvo_connector
= intel_sdvo_connector_alloc();
2449 if (!intel_sdvo_connector
)
2453 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_TMDS0
;
2454 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_TMDS0
;
2455 } else if (device
== 1) {
2456 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_TMDS1
;
2457 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_TMDS1
;
2460 intel_connector
= &intel_sdvo_connector
->base
;
2461 connector
= &intel_connector
->base
;
2462 if (intel_sdvo_get_hotplug_support(intel_sdvo
) &
2463 intel_sdvo_connector
->output_flag
) {
2464 intel_sdvo
->hotplug_active
|= intel_sdvo_connector
->output_flag
;
2465 /* Some SDVO devices have one-shot hotplug interrupts.
2466 * Ensure that they get re-enabled when an interrupt happens.
2468 intel_encoder
->hot_plug
= intel_sdvo_enable_hotplug
;
2469 intel_sdvo_enable_hotplug(intel_encoder
);
2471 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
| DRM_CONNECTOR_POLL_DISCONNECT
;
2473 encoder
->encoder_type
= DRM_MODE_ENCODER_TMDS
;
2474 connector
->connector_type
= DRM_MODE_CONNECTOR_DVID
;
2476 if (intel_sdvo_is_hdmi_connector(intel_sdvo
, device
)) {
2477 connector
->connector_type
= DRM_MODE_CONNECTOR_HDMIA
;
2478 intel_sdvo
->is_hdmi
= true;
2481 if (intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
) < 0) {
2482 kfree(intel_sdvo_connector
);
2486 if (intel_sdvo
->is_hdmi
)
2487 intel_sdvo_add_hdmi_properties(intel_sdvo
, intel_sdvo_connector
);
2493 intel_sdvo_tv_init(struct intel_sdvo
*intel_sdvo
, int type
)
2495 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2496 struct drm_connector
*connector
;
2497 struct intel_connector
*intel_connector
;
2498 struct intel_sdvo_connector
*intel_sdvo_connector
;
2500 DRM_DEBUG_KMS("initialising TV type %d\n", type
);
2502 intel_sdvo_connector
= intel_sdvo_connector_alloc();
2503 if (!intel_sdvo_connector
)
2506 intel_connector
= &intel_sdvo_connector
->base
;
2507 connector
= &intel_connector
->base
;
2508 encoder
->encoder_type
= DRM_MODE_ENCODER_TVDAC
;
2509 connector
->connector_type
= DRM_MODE_CONNECTOR_SVIDEO
;
2511 intel_sdvo
->controlled_output
|= type
;
2512 intel_sdvo_connector
->output_flag
= type
;
2514 intel_sdvo
->is_tv
= true;
2516 if (intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
) < 0) {
2517 kfree(intel_sdvo_connector
);
2521 if (!intel_sdvo_tv_create_property(intel_sdvo
, intel_sdvo_connector
, type
))
2524 if (!intel_sdvo_create_enhance_property(intel_sdvo
, intel_sdvo_connector
))
2530 drm_connector_unregister(connector
);
2531 intel_sdvo_destroy(connector
);
2536 intel_sdvo_analog_init(struct intel_sdvo
*intel_sdvo
, int device
)
2538 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2539 struct drm_connector
*connector
;
2540 struct intel_connector
*intel_connector
;
2541 struct intel_sdvo_connector
*intel_sdvo_connector
;
2543 DRM_DEBUG_KMS("initialising analog device %d\n", device
);
2545 intel_sdvo_connector
= intel_sdvo_connector_alloc();
2546 if (!intel_sdvo_connector
)
2549 intel_connector
= &intel_sdvo_connector
->base
;
2550 connector
= &intel_connector
->base
;
2551 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
2552 encoder
->encoder_type
= DRM_MODE_ENCODER_DAC
;
2553 connector
->connector_type
= DRM_MODE_CONNECTOR_VGA
;
2556 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_RGB0
;
2557 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_RGB0
;
2558 } else if (device
== 1) {
2559 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_RGB1
;
2560 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_RGB1
;
2563 if (intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
) < 0) {
2564 kfree(intel_sdvo_connector
);
2572 intel_sdvo_lvds_init(struct intel_sdvo
*intel_sdvo
, int device
)
2574 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2575 struct drm_connector
*connector
;
2576 struct intel_connector
*intel_connector
;
2577 struct intel_sdvo_connector
*intel_sdvo_connector
;
2579 DRM_DEBUG_KMS("initialising LVDS device %d\n", device
);
2581 intel_sdvo_connector
= intel_sdvo_connector_alloc();
2582 if (!intel_sdvo_connector
)
2585 intel_connector
= &intel_sdvo_connector
->base
;
2586 connector
= &intel_connector
->base
;
2587 encoder
->encoder_type
= DRM_MODE_ENCODER_LVDS
;
2588 connector
->connector_type
= DRM_MODE_CONNECTOR_LVDS
;
2591 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_LVDS0
;
2592 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_LVDS0
;
2593 } else if (device
== 1) {
2594 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_LVDS1
;
2595 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_LVDS1
;
2598 if (intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
) < 0) {
2599 kfree(intel_sdvo_connector
);
2603 if (!intel_sdvo_create_enhance_property(intel_sdvo
, intel_sdvo_connector
))
2609 drm_connector_unregister(connector
);
2610 intel_sdvo_destroy(connector
);
2615 intel_sdvo_output_setup(struct intel_sdvo
*intel_sdvo
, uint16_t flags
)
2617 intel_sdvo
->is_tv
= false;
2618 intel_sdvo
->is_lvds
= false;
2620 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2622 if (flags
& SDVO_OUTPUT_TMDS0
)
2623 if (!intel_sdvo_dvi_init(intel_sdvo
, 0))
2626 if ((flags
& SDVO_TMDS_MASK
) == SDVO_TMDS_MASK
)
2627 if (!intel_sdvo_dvi_init(intel_sdvo
, 1))
2630 /* TV has no XXX1 function block */
2631 if (flags
& SDVO_OUTPUT_SVID0
)
2632 if (!intel_sdvo_tv_init(intel_sdvo
, SDVO_OUTPUT_SVID0
))
2635 if (flags
& SDVO_OUTPUT_CVBS0
)
2636 if (!intel_sdvo_tv_init(intel_sdvo
, SDVO_OUTPUT_CVBS0
))
2639 if (flags
& SDVO_OUTPUT_YPRPB0
)
2640 if (!intel_sdvo_tv_init(intel_sdvo
, SDVO_OUTPUT_YPRPB0
))
2643 if (flags
& SDVO_OUTPUT_RGB0
)
2644 if (!intel_sdvo_analog_init(intel_sdvo
, 0))
2647 if ((flags
& SDVO_RGB_MASK
) == SDVO_RGB_MASK
)
2648 if (!intel_sdvo_analog_init(intel_sdvo
, 1))
2651 if (flags
& SDVO_OUTPUT_LVDS0
)
2652 if (!intel_sdvo_lvds_init(intel_sdvo
, 0))
2655 if ((flags
& SDVO_LVDS_MASK
) == SDVO_LVDS_MASK
)
2656 if (!intel_sdvo_lvds_init(intel_sdvo
, 1))
2659 if ((flags
& SDVO_OUTPUT_MASK
) == 0) {
2660 unsigned char bytes
[2];
2662 intel_sdvo
->controlled_output
= 0;
2663 memcpy(bytes
, &intel_sdvo
->caps
.output_flags
, 2);
2664 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2665 SDVO_NAME(intel_sdvo
),
2666 bytes
[0], bytes
[1]);
2669 intel_sdvo
->base
.crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
2674 static void intel_sdvo_output_cleanup(struct intel_sdvo
*intel_sdvo
)
2676 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2677 struct drm_connector
*connector
, *tmp
;
2679 list_for_each_entry_safe(connector
, tmp
,
2680 &dev
->mode_config
.connector_list
, head
) {
2681 if (intel_attached_encoder(connector
) == &intel_sdvo
->base
) {
2682 drm_connector_unregister(connector
);
2683 intel_sdvo_destroy(connector
);
2688 static bool intel_sdvo_tv_create_property(struct intel_sdvo
*intel_sdvo
,
2689 struct intel_sdvo_connector
*intel_sdvo_connector
,
2692 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2693 struct intel_sdvo_tv_format format
;
2694 uint32_t format_map
, i
;
2696 if (!intel_sdvo_set_target_output(intel_sdvo
, type
))
2699 BUILD_BUG_ON(sizeof(format
) != 6);
2700 if (!intel_sdvo_get_value(intel_sdvo
,
2701 SDVO_CMD_GET_SUPPORTED_TV_FORMATS
,
2702 &format
, sizeof(format
)))
2705 memcpy(&format_map
, &format
, min(sizeof(format_map
), sizeof(format
)));
2707 if (format_map
== 0)
2710 intel_sdvo_connector
->format_supported_num
= 0;
2711 for (i
= 0 ; i
< TV_FORMAT_NUM
; i
++)
2712 if (format_map
& (1 << i
))
2713 intel_sdvo_connector
->tv_format_supported
[intel_sdvo_connector
->format_supported_num
++] = i
;
2716 intel_sdvo_connector
->tv_format
=
2717 drm_property_create(dev
, DRM_MODE_PROP_ENUM
,
2718 "mode", intel_sdvo_connector
->format_supported_num
);
2719 if (!intel_sdvo_connector
->tv_format
)
2722 for (i
= 0; i
< intel_sdvo_connector
->format_supported_num
; i
++)
2723 drm_property_add_enum(
2724 intel_sdvo_connector
->tv_format
, i
,
2725 i
, tv_format_names
[intel_sdvo_connector
->tv_format_supported
[i
]]);
2727 intel_sdvo
->tv_format_index
= intel_sdvo_connector
->tv_format_supported
[0];
2728 drm_object_attach_property(&intel_sdvo_connector
->base
.base
.base
,
2729 intel_sdvo_connector
->tv_format
, 0);
2734 #define ENHANCEMENT(name, NAME) do { \
2735 if (enhancements.name) { \
2736 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2737 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2739 intel_sdvo_connector->max_##name = data_value[0]; \
2740 intel_sdvo_connector->cur_##name = response; \
2741 intel_sdvo_connector->name = \
2742 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2743 if (!intel_sdvo_connector->name) return false; \
2744 drm_object_attach_property(&connector->base, \
2745 intel_sdvo_connector->name, \
2746 intel_sdvo_connector->cur_##name); \
2747 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2748 data_value[0], data_value[1], response); \
2753 intel_sdvo_create_enhance_property_tv(struct intel_sdvo
*intel_sdvo
,
2754 struct intel_sdvo_connector
*intel_sdvo_connector
,
2755 struct intel_sdvo_enhancements_reply enhancements
)
2757 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2758 struct drm_connector
*connector
= &intel_sdvo_connector
->base
.base
;
2759 uint16_t response
, data_value
[2];
2761 /* when horizontal overscan is supported, Add the left/right property */
2762 if (enhancements
.overscan_h
) {
2763 if (!intel_sdvo_get_value(intel_sdvo
,
2764 SDVO_CMD_GET_MAX_OVERSCAN_H
,
2768 if (!intel_sdvo_get_value(intel_sdvo
,
2769 SDVO_CMD_GET_OVERSCAN_H
,
2773 intel_sdvo_connector
->max_hscan
= data_value
[0];
2774 intel_sdvo_connector
->left_margin
= data_value
[0] - response
;
2775 intel_sdvo_connector
->right_margin
= intel_sdvo_connector
->left_margin
;
2776 intel_sdvo_connector
->left
=
2777 drm_property_create_range(dev
, 0, "left_margin", 0, data_value
[0]);
2778 if (!intel_sdvo_connector
->left
)
2781 drm_object_attach_property(&connector
->base
,
2782 intel_sdvo_connector
->left
,
2783 intel_sdvo_connector
->left_margin
);
2785 intel_sdvo_connector
->right
=
2786 drm_property_create_range(dev
, 0, "right_margin", 0, data_value
[0]);
2787 if (!intel_sdvo_connector
->right
)
2790 drm_object_attach_property(&connector
->base
,
2791 intel_sdvo_connector
->right
,
2792 intel_sdvo_connector
->right_margin
);
2793 DRM_DEBUG_KMS("h_overscan: max %d, "
2794 "default %d, current %d\n",
2795 data_value
[0], data_value
[1], response
);
2798 if (enhancements
.overscan_v
) {
2799 if (!intel_sdvo_get_value(intel_sdvo
,
2800 SDVO_CMD_GET_MAX_OVERSCAN_V
,
2804 if (!intel_sdvo_get_value(intel_sdvo
,
2805 SDVO_CMD_GET_OVERSCAN_V
,
2809 intel_sdvo_connector
->max_vscan
= data_value
[0];
2810 intel_sdvo_connector
->top_margin
= data_value
[0] - response
;
2811 intel_sdvo_connector
->bottom_margin
= intel_sdvo_connector
->top_margin
;
2812 intel_sdvo_connector
->top
=
2813 drm_property_create_range(dev
, 0,
2814 "top_margin", 0, data_value
[0]);
2815 if (!intel_sdvo_connector
->top
)
2818 drm_object_attach_property(&connector
->base
,
2819 intel_sdvo_connector
->top
,
2820 intel_sdvo_connector
->top_margin
);
2822 intel_sdvo_connector
->bottom
=
2823 drm_property_create_range(dev
, 0,
2824 "bottom_margin", 0, data_value
[0]);
2825 if (!intel_sdvo_connector
->bottom
)
2828 drm_object_attach_property(&connector
->base
,
2829 intel_sdvo_connector
->bottom
,
2830 intel_sdvo_connector
->bottom_margin
);
2831 DRM_DEBUG_KMS("v_overscan: max %d, "
2832 "default %d, current %d\n",
2833 data_value
[0], data_value
[1], response
);
2836 ENHANCEMENT(hpos
, HPOS
);
2837 ENHANCEMENT(vpos
, VPOS
);
2838 ENHANCEMENT(saturation
, SATURATION
);
2839 ENHANCEMENT(contrast
, CONTRAST
);
2840 ENHANCEMENT(hue
, HUE
);
2841 ENHANCEMENT(sharpness
, SHARPNESS
);
2842 ENHANCEMENT(brightness
, BRIGHTNESS
);
2843 ENHANCEMENT(flicker_filter
, FLICKER_FILTER
);
2844 ENHANCEMENT(flicker_filter_adaptive
, FLICKER_FILTER_ADAPTIVE
);
2845 ENHANCEMENT(flicker_filter_2d
, FLICKER_FILTER_2D
);
2846 ENHANCEMENT(tv_chroma_filter
, TV_CHROMA_FILTER
);
2847 ENHANCEMENT(tv_luma_filter
, TV_LUMA_FILTER
);
2849 if (enhancements
.dot_crawl
) {
2850 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_DOT_CRAWL
, &response
, 2))
2853 intel_sdvo_connector
->max_dot_crawl
= 1;
2854 intel_sdvo_connector
->cur_dot_crawl
= response
& 0x1;
2855 intel_sdvo_connector
->dot_crawl
=
2856 drm_property_create_range(dev
, 0, "dot_crawl", 0, 1);
2857 if (!intel_sdvo_connector
->dot_crawl
)
2860 drm_object_attach_property(&connector
->base
,
2861 intel_sdvo_connector
->dot_crawl
,
2862 intel_sdvo_connector
->cur_dot_crawl
);
2863 DRM_DEBUG_KMS("dot crawl: current %d\n", response
);
2870 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo
*intel_sdvo
,
2871 struct intel_sdvo_connector
*intel_sdvo_connector
,
2872 struct intel_sdvo_enhancements_reply enhancements
)
2874 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2875 struct drm_connector
*connector
= &intel_sdvo_connector
->base
.base
;
2876 uint16_t response
, data_value
[2];
2878 ENHANCEMENT(brightness
, BRIGHTNESS
);
2884 static bool intel_sdvo_create_enhance_property(struct intel_sdvo
*intel_sdvo
,
2885 struct intel_sdvo_connector
*intel_sdvo_connector
)
2888 struct intel_sdvo_enhancements_reply reply
;
2892 BUILD_BUG_ON(sizeof(enhancements
) != 2);
2894 enhancements
.response
= 0;
2895 intel_sdvo_get_value(intel_sdvo
,
2896 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS
,
2897 &enhancements
, sizeof(enhancements
));
2898 if (enhancements
.response
== 0) {
2899 DRM_DEBUG_KMS("No enhancement is supported\n");
2903 if (IS_TV(intel_sdvo_connector
))
2904 return intel_sdvo_create_enhance_property_tv(intel_sdvo
, intel_sdvo_connector
, enhancements
.reply
);
2905 else if (IS_LVDS(intel_sdvo_connector
))
2906 return intel_sdvo_create_enhance_property_lvds(intel_sdvo
, intel_sdvo_connector
, enhancements
.reply
);
2911 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter
*adapter
,
2912 struct i2c_msg
*msgs
,
2915 struct intel_sdvo
*sdvo
= adapter
->algo_data
;
2917 if (!intel_sdvo_set_control_bus_switch(sdvo
, sdvo
->ddc_bus
))
2920 return sdvo
->i2c
->algo
->master_xfer(sdvo
->i2c
, msgs
, num
);
2923 static u32
intel_sdvo_ddc_proxy_func(struct i2c_adapter
*adapter
)
2925 struct intel_sdvo
*sdvo
= adapter
->algo_data
;
2926 return sdvo
->i2c
->algo
->functionality(sdvo
->i2c
);
2929 static const struct i2c_algorithm intel_sdvo_ddc_proxy
= {
2930 .master_xfer
= intel_sdvo_ddc_proxy_xfer
,
2931 .functionality
= intel_sdvo_ddc_proxy_func
2935 intel_sdvo_init_ddc_proxy(struct intel_sdvo
*sdvo
,
2936 struct drm_device
*dev
)
2938 sdvo
->ddc
.owner
= THIS_MODULE
;
2939 sdvo
->ddc
.class = I2C_CLASS_DDC
;
2940 snprintf(sdvo
->ddc
.name
, I2C_NAME_SIZE
, "SDVO DDC proxy");
2941 sdvo
->ddc
.dev
.parent
= &dev
->pdev
->dev
;
2942 sdvo
->ddc
.algo_data
= sdvo
;
2943 sdvo
->ddc
.algo
= &intel_sdvo_ddc_proxy
;
2945 return i2c_add_adapter(&sdvo
->ddc
) == 0;
2948 static void assert_sdvo_port_valid(const struct drm_i915_private
*dev_priv
,
2951 if (HAS_PCH_SPLIT(dev_priv
))
2952 WARN_ON(port
!= PORT_B
);
2954 WARN_ON(port
!= PORT_B
&& port
!= PORT_C
);
2957 bool intel_sdvo_init(struct drm_device
*dev
, uint32_t sdvo_reg
, enum port port
)
2959 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2960 struct intel_encoder
*intel_encoder
;
2961 struct intel_sdvo
*intel_sdvo
;
2964 assert_sdvo_port_valid(dev_priv
, port
);
2966 intel_sdvo
= kzalloc(sizeof(*intel_sdvo
), GFP_KERNEL
);
2970 intel_sdvo
->sdvo_reg
= sdvo_reg
;
2971 intel_sdvo
->port
= port
;
2972 intel_sdvo
->slave_addr
= intel_sdvo_get_slave_addr(dev
, intel_sdvo
) >> 1;
2973 intel_sdvo_select_i2c_bus(dev_priv
, intel_sdvo
);
2974 if (!intel_sdvo_init_ddc_proxy(intel_sdvo
, dev
))
2977 /* encoder type will be decided later */
2978 intel_encoder
= &intel_sdvo
->base
;
2979 intel_encoder
->type
= INTEL_OUTPUT_SDVO
;
2980 drm_encoder_init(dev
, &intel_encoder
->base
, &intel_sdvo_enc_funcs
, 0);
2982 /* Read the regs to test if we can talk to the device */
2983 for (i
= 0; i
< 0x40; i
++) {
2986 if (!intel_sdvo_read_byte(intel_sdvo
, i
, &byte
)) {
2987 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2988 SDVO_NAME(intel_sdvo
));
2993 intel_encoder
->compute_config
= intel_sdvo_compute_config
;
2994 if (HAS_PCH_SPLIT(dev
)) {
2995 intel_encoder
->disable
= pch_disable_sdvo
;
2996 intel_encoder
->post_disable
= pch_post_disable_sdvo
;
2998 intel_encoder
->disable
= intel_disable_sdvo
;
3000 intel_encoder
->pre_enable
= intel_sdvo_pre_enable
;
3001 intel_encoder
->enable
= intel_enable_sdvo
;
3002 intel_encoder
->get_hw_state
= intel_sdvo_get_hw_state
;
3003 intel_encoder
->get_config
= intel_sdvo_get_config
;
3005 /* In default case sdvo lvds is false */
3006 if (!intel_sdvo_get_capabilities(intel_sdvo
, &intel_sdvo
->caps
))
3009 if (intel_sdvo_output_setup(intel_sdvo
,
3010 intel_sdvo
->caps
.output_flags
) != true) {
3011 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3012 SDVO_NAME(intel_sdvo
));
3013 /* Output_setup can leave behind connectors! */
3017 /* Only enable the hotplug irq if we need it, to work around noisy
3020 if (intel_sdvo
->hotplug_active
) {
3021 if (intel_sdvo
->port
== PORT_B
)
3022 intel_encoder
->hpd_pin
= HPD_SDVO_B
;
3024 intel_encoder
->hpd_pin
= HPD_SDVO_C
;
3028 * Cloning SDVO with anything is often impossible, since the SDVO
3029 * encoder can request a special input timing mode. And even if that's
3030 * not the case we have evidence that cloning a plain unscaled mode with
3031 * VGA doesn't really work. Furthermore the cloning flags are way too
3032 * simplistic anyway to express such constraints, so just give up on
3033 * cloning for SDVO encoders.
3035 intel_sdvo
->base
.cloneable
= 0;
3037 intel_sdvo_select_ddc_bus(dev_priv
, intel_sdvo
);
3039 /* Set the input timing to the screen. Assume always input 0. */
3040 if (!intel_sdvo_set_target_input(intel_sdvo
))
3043 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo
,
3044 &intel_sdvo
->pixel_clock_min
,
3045 &intel_sdvo
->pixel_clock_max
))
3048 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3049 "clock range %dMHz - %dMHz, "
3050 "input 1: %c, input 2: %c, "
3051 "output 1: %c, output 2: %c\n",
3052 SDVO_NAME(intel_sdvo
),
3053 intel_sdvo
->caps
.vendor_id
, intel_sdvo
->caps
.device_id
,
3054 intel_sdvo
->caps
.device_rev_id
,
3055 intel_sdvo
->pixel_clock_min
/ 1000,
3056 intel_sdvo
->pixel_clock_max
/ 1000,
3057 (intel_sdvo
->caps
.sdvo_inputs_mask
& 0x1) ? 'Y' : 'N',
3058 (intel_sdvo
->caps
.sdvo_inputs_mask
& 0x2) ? 'Y' : 'N',
3059 /* check currently supported outputs */
3060 intel_sdvo
->caps
.output_flags
&
3061 (SDVO_OUTPUT_TMDS0
| SDVO_OUTPUT_RGB0
) ? 'Y' : 'N',
3062 intel_sdvo
->caps
.output_flags
&
3063 (SDVO_OUTPUT_TMDS1
| SDVO_OUTPUT_RGB1
) ? 'Y' : 'N');
3067 intel_sdvo_output_cleanup(intel_sdvo
);
3070 drm_encoder_cleanup(&intel_encoder
->base
);
3071 i2c_del_adapter(&intel_sdvo
->ddc
);
3073 intel_sdvo_unselect_i2c_bus(intel_sdvo
);