2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include "intel_drv.h"
36 #include <drm/i915_drm.h>
38 #include "intel_sdvo_regs.h"
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
50 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
52 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
55 static const char *tv_format_names
[] = {
56 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
65 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
68 struct intel_encoder base
;
70 struct i2c_adapter
*i2c
;
73 struct i2c_adapter ddc
;
75 /* Register for the SDVO device: SDVOB or SDVOC */
78 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output
;
82 * Capabilities of the SDVO device returned by
83 * intel_sdvo_get_capabilities()
85 struct intel_sdvo_caps caps
;
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
88 int pixel_clock_min
, pixel_clock_max
;
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
94 uint16_t attached_output
;
97 * Hotplug activation bits for this device
99 uint16_t hotplug_active
;
102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
105 uint32_t color_range
;
106 bool color_range_auto
;
109 * This is set if we're going to treat the device as TV-out.
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
117 /* On different gens SDVOB is at different places. */
120 /* This is for current tv format name */
124 * This is set if we treat the device as HDMI, instead of DVI.
127 bool has_hdmi_monitor
;
129 bool rgb_quant_range_selectable
;
132 * This is set if we detect output of sdvo device as LVDS and
133 * have a valid fixed mode to use with the panel.
138 * This is sdvo fixed pannel mode pointer
140 struct drm_display_mode
*sdvo_lvds_fixed_mode
;
142 /* DDC bus used by this SDVO encoder */
146 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
148 uint8_t dtd_sdvo_flags
;
151 struct intel_sdvo_connector
{
152 struct intel_connector base
;
154 /* Mark the type of connector */
155 uint16_t output_flag
;
157 enum hdmi_force_audio force_audio
;
159 /* This contains all current supported TV format */
160 u8 tv_format_supported
[TV_FORMAT_NUM
];
161 int format_supported_num
;
162 struct drm_property
*tv_format
;
164 /* add the property for the SDVO-TV */
165 struct drm_property
*left
;
166 struct drm_property
*right
;
167 struct drm_property
*top
;
168 struct drm_property
*bottom
;
169 struct drm_property
*hpos
;
170 struct drm_property
*vpos
;
171 struct drm_property
*contrast
;
172 struct drm_property
*saturation
;
173 struct drm_property
*hue
;
174 struct drm_property
*sharpness
;
175 struct drm_property
*flicker_filter
;
176 struct drm_property
*flicker_filter_adaptive
;
177 struct drm_property
*flicker_filter_2d
;
178 struct drm_property
*tv_chroma_filter
;
179 struct drm_property
*tv_luma_filter
;
180 struct drm_property
*dot_crawl
;
182 /* add the property for the SDVO-TV/LVDS */
183 struct drm_property
*brightness
;
185 /* Add variable to record current setting for the above property */
186 u32 left_margin
, right_margin
, top_margin
, bottom_margin
;
188 /* this is to get the range of margin.*/
189 u32 max_hscan
, max_vscan
;
190 u32 max_hpos
, cur_hpos
;
191 u32 max_vpos
, cur_vpos
;
192 u32 cur_brightness
, max_brightness
;
193 u32 cur_contrast
, max_contrast
;
194 u32 cur_saturation
, max_saturation
;
195 u32 cur_hue
, max_hue
;
196 u32 cur_sharpness
, max_sharpness
;
197 u32 cur_flicker_filter
, max_flicker_filter
;
198 u32 cur_flicker_filter_adaptive
, max_flicker_filter_adaptive
;
199 u32 cur_flicker_filter_2d
, max_flicker_filter_2d
;
200 u32 cur_tv_chroma_filter
, max_tv_chroma_filter
;
201 u32 cur_tv_luma_filter
, max_tv_luma_filter
;
202 u32 cur_dot_crawl
, max_dot_crawl
;
205 static struct intel_sdvo
*to_sdvo(struct intel_encoder
*encoder
)
207 return container_of(encoder
, struct intel_sdvo
, base
);
210 static struct intel_sdvo
*intel_attached_sdvo(struct drm_connector
*connector
)
212 return to_sdvo(intel_attached_encoder(connector
));
215 static struct intel_sdvo_connector
*to_intel_sdvo_connector(struct drm_connector
*connector
)
217 return container_of(to_intel_connector(connector
), struct intel_sdvo_connector
, base
);
221 intel_sdvo_output_setup(struct intel_sdvo
*intel_sdvo
, uint16_t flags
);
223 intel_sdvo_tv_create_property(struct intel_sdvo
*intel_sdvo
,
224 struct intel_sdvo_connector
*intel_sdvo_connector
,
227 intel_sdvo_create_enhance_property(struct intel_sdvo
*intel_sdvo
,
228 struct intel_sdvo_connector
*intel_sdvo_connector
);
231 * Writes the SDVOB or SDVOC with the given value, but always writes both
232 * SDVOB and SDVOC to work around apparent hardware issues (according to
233 * comments in the BIOS).
235 static void intel_sdvo_write_sdvox(struct intel_sdvo
*intel_sdvo
, u32 val
)
237 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
238 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
239 u32 bval
= val
, cval
= val
;
242 if (intel_sdvo
->sdvo_reg
== PCH_SDVOB
) {
243 I915_WRITE(intel_sdvo
->sdvo_reg
, val
);
244 I915_READ(intel_sdvo
->sdvo_reg
);
248 if (intel_sdvo
->sdvo_reg
== GEN3_SDVOB
)
249 cval
= I915_READ(GEN3_SDVOC
);
251 bval
= I915_READ(GEN3_SDVOB
);
254 * Write the registers twice for luck. Sometimes,
255 * writing them only once doesn't appear to 'stick'.
256 * The BIOS does this too. Yay, magic
258 for (i
= 0; i
< 2; i
++)
260 I915_WRITE(GEN3_SDVOB
, bval
);
261 I915_READ(GEN3_SDVOB
);
262 I915_WRITE(GEN3_SDVOC
, cval
);
263 I915_READ(GEN3_SDVOC
);
267 static bool intel_sdvo_read_byte(struct intel_sdvo
*intel_sdvo
, u8 addr
, u8
*ch
)
269 struct i2c_msg msgs
[] = {
271 .addr
= intel_sdvo
->slave_addr
,
277 .addr
= intel_sdvo
->slave_addr
,
285 if ((ret
= i2c_transfer(intel_sdvo
->i2c
, msgs
, 2)) == 2)
288 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret
);
292 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
293 /** Mapping of command numbers to names, for debug output */
294 static const struct _sdvo_cmd_name
{
297 } sdvo_cmd_names
[] = {
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET
),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS
),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV
),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS
),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS
),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS
),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP
),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP
),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS
),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT
),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG
),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG
),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE
),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT
),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT
),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1
),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2
),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2
),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2
),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1
),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2
),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE
),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS
),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT
),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT
),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS
),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT
),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT
),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES
),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE
),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE
),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE
),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH
),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT
),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS
),
342 /* Add the op code for SDVO enhancements */
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS
),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS
),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS
),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS
),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS
),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS
),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION
),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION
),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION
),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE
),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE
),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE
),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST
),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST
),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST
),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS
),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS
),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS
),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H
),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H
),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H
),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V
),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V
),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V
),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER
),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER
),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER
),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE
),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE
),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE
),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D
),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D
),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D
),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS
),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS
),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS
),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL
),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL
),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER
),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER
),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER
),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER
),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER
),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER
),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE
),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE
),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE
),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI
),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI
),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP
),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY
),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY
),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER
),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT
),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT
),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX
),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX
),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO
),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT
),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT
),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE
),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE
),
407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA
),
408 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA
),
411 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
413 static void intel_sdvo_debug_write(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
414 const void *args
, int args_len
)
418 DRM_DEBUG_KMS("%s: W: %02X ",
419 SDVO_NAME(intel_sdvo
), cmd
);
420 for (i
= 0; i
< args_len
; i
++)
421 DRM_LOG_KMS("%02X ", ((u8
*)args
)[i
]);
424 for (i
= 0; i
< ARRAY_SIZE(sdvo_cmd_names
); i
++) {
425 if (cmd
== sdvo_cmd_names
[i
].cmd
) {
426 DRM_LOG_KMS("(%s)", sdvo_cmd_names
[i
].name
);
430 if (i
== ARRAY_SIZE(sdvo_cmd_names
))
431 DRM_LOG_KMS("(%02X)", cmd
);
435 static const char *cmd_status_names
[] = {
441 "Target not specified",
442 "Scaling not supported"
445 static bool intel_sdvo_write_cmd(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
446 const void *args
, int args_len
)
449 struct i2c_msg
*msgs
;
452 /* Would be simpler to allocate both in one go ? */
453 buf
= kzalloc(args_len
* 2 + 2, GFP_KERNEL
);
457 msgs
= kcalloc(args_len
+ 3, sizeof(*msgs
), GFP_KERNEL
);
463 intel_sdvo_debug_write(intel_sdvo
, cmd
, args
, args_len
);
465 for (i
= 0; i
< args_len
; i
++) {
466 msgs
[i
].addr
= intel_sdvo
->slave_addr
;
469 msgs
[i
].buf
= buf
+ 2 *i
;
470 buf
[2*i
+ 0] = SDVO_I2C_ARG_0
- i
;
471 buf
[2*i
+ 1] = ((u8
*)args
)[i
];
473 msgs
[i
].addr
= intel_sdvo
->slave_addr
;
476 msgs
[i
].buf
= buf
+ 2*i
;
477 buf
[2*i
+ 0] = SDVO_I2C_OPCODE
;
480 /* the following two are to read the response */
481 status
= SDVO_I2C_CMD_STATUS
;
482 msgs
[i
+1].addr
= intel_sdvo
->slave_addr
;
485 msgs
[i
+1].buf
= &status
;
487 msgs
[i
+2].addr
= intel_sdvo
->slave_addr
;
488 msgs
[i
+2].flags
= I2C_M_RD
;
490 msgs
[i
+2].buf
= &status
;
492 ret
= i2c_transfer(intel_sdvo
->i2c
, msgs
, i
+3);
494 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret
);
499 /* failure in I2C transfer */
500 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret
, i
+3);
510 static bool intel_sdvo_read_response(struct intel_sdvo
*intel_sdvo
,
511 void *response
, int response_len
)
513 u8 retry
= 15; /* 5 quick checks, followed by 10 long checks */
517 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo
));
520 * The documentation states that all commands will be
521 * processed within 15µs, and that we need only poll
522 * the status byte a maximum of 3 times in order for the
523 * command to be complete.
525 * Check 5 times in case the hardware failed to read the docs.
527 * Also beware that the first response by many devices is to
528 * reply PENDING and stall for time. TVs are notorious for
529 * requiring longer than specified to complete their replies.
530 * Originally (in the DDX long ago), the delay was only ever 15ms
531 * with an additional delay of 30ms applied for TVs added later after
532 * many experiments. To accommodate both sets of delays, we do a
533 * sequence of slow checks if the device is falling behind and fails
534 * to reply within 5*15µs.
536 if (!intel_sdvo_read_byte(intel_sdvo
,
541 while ((status
== SDVO_CMD_STATUS_PENDING
||
542 status
== SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED
) && --retry
) {
548 if (!intel_sdvo_read_byte(intel_sdvo
,
554 if (status
<= SDVO_CMD_STATUS_SCALING_NOT_SUPP
)
555 DRM_LOG_KMS("(%s)", cmd_status_names
[status
]);
557 DRM_LOG_KMS("(??? %d)", status
);
559 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
562 /* Read the command response */
563 for (i
= 0; i
< response_len
; i
++) {
564 if (!intel_sdvo_read_byte(intel_sdvo
,
565 SDVO_I2C_RETURN_0
+ i
,
566 &((u8
*)response
)[i
]))
568 DRM_LOG_KMS(" %02X", ((u8
*)response
)[i
]);
574 DRM_LOG_KMS("... failed\n");
578 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode
*mode
)
580 if (mode
->clock
>= 100000)
582 else if (mode
->clock
>= 50000)
588 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo
*intel_sdvo
,
591 /* This must be the immediately preceding write before the i2c xfer */
592 return intel_sdvo_write_cmd(intel_sdvo
,
593 SDVO_CMD_SET_CONTROL_BUS_SWITCH
,
597 static bool intel_sdvo_set_value(struct intel_sdvo
*intel_sdvo
, u8 cmd
, const void *data
, int len
)
599 if (!intel_sdvo_write_cmd(intel_sdvo
, cmd
, data
, len
))
602 return intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
606 intel_sdvo_get_value(struct intel_sdvo
*intel_sdvo
, u8 cmd
, void *value
, int len
)
608 if (!intel_sdvo_write_cmd(intel_sdvo
, cmd
, NULL
, 0))
611 return intel_sdvo_read_response(intel_sdvo
, value
, len
);
614 static bool intel_sdvo_set_target_input(struct intel_sdvo
*intel_sdvo
)
616 struct intel_sdvo_set_target_input_args targets
= {0};
617 return intel_sdvo_set_value(intel_sdvo
,
618 SDVO_CMD_SET_TARGET_INPUT
,
619 &targets
, sizeof(targets
));
623 * Return whether each input is trained.
625 * This function is making an assumption about the layout of the response,
626 * which should be checked against the docs.
628 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo
*intel_sdvo
, bool *input_1
, bool *input_2
)
630 struct intel_sdvo_get_trained_inputs_response response
;
632 BUILD_BUG_ON(sizeof(response
) != 1);
633 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_TRAINED_INPUTS
,
634 &response
, sizeof(response
)))
637 *input_1
= response
.input0_trained
;
638 *input_2
= response
.input1_trained
;
642 static bool intel_sdvo_set_active_outputs(struct intel_sdvo
*intel_sdvo
,
645 return intel_sdvo_set_value(intel_sdvo
,
646 SDVO_CMD_SET_ACTIVE_OUTPUTS
,
647 &outputs
, sizeof(outputs
));
650 static bool intel_sdvo_get_active_outputs(struct intel_sdvo
*intel_sdvo
,
653 return intel_sdvo_get_value(intel_sdvo
,
654 SDVO_CMD_GET_ACTIVE_OUTPUTS
,
655 outputs
, sizeof(*outputs
));
658 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo
*intel_sdvo
,
661 u8 state
= SDVO_ENCODER_STATE_ON
;
664 case DRM_MODE_DPMS_ON
:
665 state
= SDVO_ENCODER_STATE_ON
;
667 case DRM_MODE_DPMS_STANDBY
:
668 state
= SDVO_ENCODER_STATE_STANDBY
;
670 case DRM_MODE_DPMS_SUSPEND
:
671 state
= SDVO_ENCODER_STATE_SUSPEND
;
673 case DRM_MODE_DPMS_OFF
:
674 state
= SDVO_ENCODER_STATE_OFF
;
678 return intel_sdvo_set_value(intel_sdvo
,
679 SDVO_CMD_SET_ENCODER_POWER_STATE
, &state
, sizeof(state
));
682 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo
*intel_sdvo
,
686 struct intel_sdvo_pixel_clock_range clocks
;
688 BUILD_BUG_ON(sizeof(clocks
) != 4);
689 if (!intel_sdvo_get_value(intel_sdvo
,
690 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
,
691 &clocks
, sizeof(clocks
)))
694 /* Convert the values from units of 10 kHz to kHz. */
695 *clock_min
= clocks
.min
* 10;
696 *clock_max
= clocks
.max
* 10;
700 static bool intel_sdvo_set_target_output(struct intel_sdvo
*intel_sdvo
,
703 return intel_sdvo_set_value(intel_sdvo
,
704 SDVO_CMD_SET_TARGET_OUTPUT
,
705 &outputs
, sizeof(outputs
));
708 static bool intel_sdvo_set_timing(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
709 struct intel_sdvo_dtd
*dtd
)
711 return intel_sdvo_set_value(intel_sdvo
, cmd
, &dtd
->part1
, sizeof(dtd
->part1
)) &&
712 intel_sdvo_set_value(intel_sdvo
, cmd
+ 1, &dtd
->part2
, sizeof(dtd
->part2
));
715 static bool intel_sdvo_get_timing(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
716 struct intel_sdvo_dtd
*dtd
)
718 return intel_sdvo_get_value(intel_sdvo
, cmd
, &dtd
->part1
, sizeof(dtd
->part1
)) &&
719 intel_sdvo_get_value(intel_sdvo
, cmd
+ 1, &dtd
->part2
, sizeof(dtd
->part2
));
722 static bool intel_sdvo_set_input_timing(struct intel_sdvo
*intel_sdvo
,
723 struct intel_sdvo_dtd
*dtd
)
725 return intel_sdvo_set_timing(intel_sdvo
,
726 SDVO_CMD_SET_INPUT_TIMINGS_PART1
, dtd
);
729 static bool intel_sdvo_set_output_timing(struct intel_sdvo
*intel_sdvo
,
730 struct intel_sdvo_dtd
*dtd
)
732 return intel_sdvo_set_timing(intel_sdvo
,
733 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
, dtd
);
736 static bool intel_sdvo_get_input_timing(struct intel_sdvo
*intel_sdvo
,
737 struct intel_sdvo_dtd
*dtd
)
739 return intel_sdvo_get_timing(intel_sdvo
,
740 SDVO_CMD_GET_INPUT_TIMINGS_PART1
, dtd
);
744 intel_sdvo_create_preferred_input_timing(struct intel_sdvo
*intel_sdvo
,
749 struct intel_sdvo_preferred_input_timing_args args
;
751 memset(&args
, 0, sizeof(args
));
754 args
.height
= height
;
757 if (intel_sdvo
->is_lvds
&&
758 (intel_sdvo
->sdvo_lvds_fixed_mode
->hdisplay
!= width
||
759 intel_sdvo
->sdvo_lvds_fixed_mode
->vdisplay
!= height
))
762 return intel_sdvo_set_value(intel_sdvo
,
763 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
,
764 &args
, sizeof(args
));
767 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo
*intel_sdvo
,
768 struct intel_sdvo_dtd
*dtd
)
770 BUILD_BUG_ON(sizeof(dtd
->part1
) != 8);
771 BUILD_BUG_ON(sizeof(dtd
->part2
) != 8);
772 return intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
,
773 &dtd
->part1
, sizeof(dtd
->part1
)) &&
774 intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
,
775 &dtd
->part2
, sizeof(dtd
->part2
));
778 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo
*intel_sdvo
, u8 val
)
780 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_CLOCK_RATE_MULT
, &val
, 1);
783 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd
*dtd
,
784 const struct drm_display_mode
*mode
)
786 uint16_t width
, height
;
787 uint16_t h_blank_len
, h_sync_len
, v_blank_len
, v_sync_len
;
788 uint16_t h_sync_offset
, v_sync_offset
;
791 width
= mode
->hdisplay
;
792 height
= mode
->vdisplay
;
794 /* do some mode translations */
795 h_blank_len
= mode
->htotal
- mode
->hdisplay
;
796 h_sync_len
= mode
->hsync_end
- mode
->hsync_start
;
798 v_blank_len
= mode
->vtotal
- mode
->vdisplay
;
799 v_sync_len
= mode
->vsync_end
- mode
->vsync_start
;
801 h_sync_offset
= mode
->hsync_start
- mode
->hdisplay
;
802 v_sync_offset
= mode
->vsync_start
- mode
->vdisplay
;
804 mode_clock
= mode
->clock
;
806 dtd
->part1
.clock
= mode_clock
;
808 dtd
->part1
.h_active
= width
& 0xff;
809 dtd
->part1
.h_blank
= h_blank_len
& 0xff;
810 dtd
->part1
.h_high
= (((width
>> 8) & 0xf) << 4) |
811 ((h_blank_len
>> 8) & 0xf);
812 dtd
->part1
.v_active
= height
& 0xff;
813 dtd
->part1
.v_blank
= v_blank_len
& 0xff;
814 dtd
->part1
.v_high
= (((height
>> 8) & 0xf) << 4) |
815 ((v_blank_len
>> 8) & 0xf);
817 dtd
->part2
.h_sync_off
= h_sync_offset
& 0xff;
818 dtd
->part2
.h_sync_width
= h_sync_len
& 0xff;
819 dtd
->part2
.v_sync_off_width
= (v_sync_offset
& 0xf) << 4 |
821 dtd
->part2
.sync_off_width_high
= ((h_sync_offset
& 0x300) >> 2) |
822 ((h_sync_len
& 0x300) >> 4) | ((v_sync_offset
& 0x30) >> 2) |
823 ((v_sync_len
& 0x30) >> 4);
825 dtd
->part2
.dtd_flags
= 0x18;
826 if (mode
->flags
& DRM_MODE_FLAG_INTERLACE
)
827 dtd
->part2
.dtd_flags
|= DTD_FLAG_INTERLACE
;
828 if (mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
829 dtd
->part2
.dtd_flags
|= DTD_FLAG_HSYNC_POSITIVE
;
830 if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
831 dtd
->part2
.dtd_flags
|= DTD_FLAG_VSYNC_POSITIVE
;
833 dtd
->part2
.sdvo_flags
= 0;
834 dtd
->part2
.v_sync_off_high
= v_sync_offset
& 0xc0;
835 dtd
->part2
.reserved
= 0;
838 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode
* mode
,
839 const struct intel_sdvo_dtd
*dtd
)
841 mode
->hdisplay
= dtd
->part1
.h_active
;
842 mode
->hdisplay
+= ((dtd
->part1
.h_high
>> 4) & 0x0f) << 8;
843 mode
->hsync_start
= mode
->hdisplay
+ dtd
->part2
.h_sync_off
;
844 mode
->hsync_start
+= (dtd
->part2
.sync_off_width_high
& 0xc0) << 2;
845 mode
->hsync_end
= mode
->hsync_start
+ dtd
->part2
.h_sync_width
;
846 mode
->hsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x30) << 4;
847 mode
->htotal
= mode
->hdisplay
+ dtd
->part1
.h_blank
;
848 mode
->htotal
+= (dtd
->part1
.h_high
& 0xf) << 8;
850 mode
->vdisplay
= dtd
->part1
.v_active
;
851 mode
->vdisplay
+= ((dtd
->part1
.v_high
>> 4) & 0x0f) << 8;
852 mode
->vsync_start
= mode
->vdisplay
;
853 mode
->vsync_start
+= (dtd
->part2
.v_sync_off_width
>> 4) & 0xf;
854 mode
->vsync_start
+= (dtd
->part2
.sync_off_width_high
& 0x0c) << 2;
855 mode
->vsync_start
+= dtd
->part2
.v_sync_off_high
& 0xc0;
856 mode
->vsync_end
= mode
->vsync_start
+
857 (dtd
->part2
.v_sync_off_width
& 0xf);
858 mode
->vsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x3) << 4;
859 mode
->vtotal
= mode
->vdisplay
+ dtd
->part1
.v_blank
;
860 mode
->vtotal
+= (dtd
->part1
.v_high
& 0xf) << 8;
862 mode
->clock
= dtd
->part1
.clock
* 10;
864 mode
->flags
&= ~(DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
);
865 if (dtd
->part2
.dtd_flags
& DTD_FLAG_INTERLACE
)
866 mode
->flags
|= DRM_MODE_FLAG_INTERLACE
;
867 if (dtd
->part2
.dtd_flags
& DTD_FLAG_HSYNC_POSITIVE
)
868 mode
->flags
|= DRM_MODE_FLAG_PHSYNC
;
869 if (dtd
->part2
.dtd_flags
& DTD_FLAG_VSYNC_POSITIVE
)
870 mode
->flags
|= DRM_MODE_FLAG_PVSYNC
;
873 static bool intel_sdvo_check_supp_encode(struct intel_sdvo
*intel_sdvo
)
875 struct intel_sdvo_encode encode
;
877 BUILD_BUG_ON(sizeof(encode
) != 2);
878 return intel_sdvo_get_value(intel_sdvo
,
879 SDVO_CMD_GET_SUPP_ENCODE
,
880 &encode
, sizeof(encode
));
883 static bool intel_sdvo_set_encode(struct intel_sdvo
*intel_sdvo
,
886 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_ENCODE
, &mode
, 1);
889 static bool intel_sdvo_set_colorimetry(struct intel_sdvo
*intel_sdvo
,
892 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_COLORIMETRY
, &mode
, 1);
896 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo
*intel_sdvo
)
899 uint8_t set_buf_index
[2];
905 intel_sdvo_get_value(encoder
, SDVO_CMD_GET_HBUF_AV_SPLIT
, &av_split
, 1);
907 for (i
= 0; i
<= av_split
; i
++) {
908 set_buf_index
[0] = i
; set_buf_index
[1] = 0;
909 intel_sdvo_write_cmd(encoder
, SDVO_CMD_SET_HBUF_INDEX
,
911 intel_sdvo_write_cmd(encoder
, SDVO_CMD_GET_HBUF_INFO
, NULL
, 0);
912 intel_sdvo_read_response(encoder
, &buf_size
, 1);
915 for (j
= 0; j
<= buf_size
; j
+= 8) {
916 intel_sdvo_write_cmd(encoder
, SDVO_CMD_GET_HBUF_DATA
,
918 intel_sdvo_read_response(encoder
, pos
, 8);
925 static bool intel_sdvo_write_infoframe(struct intel_sdvo
*intel_sdvo
,
926 unsigned if_index
, uint8_t tx_rate
,
927 uint8_t *data
, unsigned length
)
929 uint8_t set_buf_index
[2] = { if_index
, 0 };
930 uint8_t hbuf_size
, tmp
[8];
933 if (!intel_sdvo_set_value(intel_sdvo
,
934 SDVO_CMD_SET_HBUF_INDEX
,
938 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_HBUF_INFO
,
942 /* Buffer size is 0 based, hooray! */
945 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
946 if_index
, length
, hbuf_size
);
948 for (i
= 0; i
< hbuf_size
; i
+= 8) {
951 memcpy(tmp
, data
+ i
, min_t(unsigned, 8, length
- i
));
953 if (!intel_sdvo_set_value(intel_sdvo
,
954 SDVO_CMD_SET_HBUF_DATA
,
959 return intel_sdvo_set_value(intel_sdvo
,
960 SDVO_CMD_SET_HBUF_TXRATE
,
964 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo
*intel_sdvo
,
965 const struct drm_display_mode
*adjusted_mode
)
967 uint8_t sdvo_data
[HDMI_INFOFRAME_SIZE(AVI
)];
968 struct drm_crtc
*crtc
= intel_sdvo
->base
.base
.crtc
;
969 struct intel_crtc
*intel_crtc
= to_intel_crtc(crtc
);
970 union hdmi_infoframe frame
;
974 ret
= drm_hdmi_avi_infoframe_from_display_mode(&frame
.avi
,
977 DRM_ERROR("couldn't fill AVI infoframe\n");
981 if (intel_sdvo
->rgb_quant_range_selectable
) {
982 if (intel_crtc
->config
.limited_color_range
)
983 frame
.avi
.quantization_range
=
984 HDMI_QUANTIZATION_RANGE_LIMITED
;
986 frame
.avi
.quantization_range
=
987 HDMI_QUANTIZATION_RANGE_FULL
;
990 len
= hdmi_infoframe_pack(&frame
, sdvo_data
, sizeof(sdvo_data
));
994 return intel_sdvo_write_infoframe(intel_sdvo
, SDVO_HBUF_INDEX_AVI_IF
,
996 sdvo_data
, sizeof(sdvo_data
));
999 static bool intel_sdvo_set_tv_format(struct intel_sdvo
*intel_sdvo
)
1001 struct intel_sdvo_tv_format format
;
1002 uint32_t format_map
;
1004 format_map
= 1 << intel_sdvo
->tv_format_index
;
1005 memset(&format
, 0, sizeof(format
));
1006 memcpy(&format
, &format_map
, min(sizeof(format
), sizeof(format_map
)));
1008 BUILD_BUG_ON(sizeof(format
) != 6);
1009 return intel_sdvo_set_value(intel_sdvo
,
1010 SDVO_CMD_SET_TV_FORMAT
,
1011 &format
, sizeof(format
));
1015 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo
*intel_sdvo
,
1016 const struct drm_display_mode
*mode
)
1018 struct intel_sdvo_dtd output_dtd
;
1020 if (!intel_sdvo_set_target_output(intel_sdvo
,
1021 intel_sdvo
->attached_output
))
1024 intel_sdvo_get_dtd_from_mode(&output_dtd
, mode
);
1025 if (!intel_sdvo_set_output_timing(intel_sdvo
, &output_dtd
))
1031 /* Asks the sdvo controller for the preferred input mode given the output mode.
1032 * Unfortunately we have to set up the full output mode to do that. */
1034 intel_sdvo_get_preferred_input_mode(struct intel_sdvo
*intel_sdvo
,
1035 const struct drm_display_mode
*mode
,
1036 struct drm_display_mode
*adjusted_mode
)
1038 struct intel_sdvo_dtd input_dtd
;
1040 /* Reset the input timing to the screen. Assume always input 0. */
1041 if (!intel_sdvo_set_target_input(intel_sdvo
))
1044 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo
,
1050 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo
,
1054 intel_sdvo_get_mode_from_dtd(adjusted_mode
, &input_dtd
);
1055 intel_sdvo
->dtd_sdvo_flags
= input_dtd
.part2
.sdvo_flags
;
1060 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config
*pipe_config
)
1062 unsigned dotclock
= pipe_config
->adjusted_mode
.clock
;
1063 struct dpll
*clock
= &pipe_config
->dpll
;
1065 /* SDVO TV has fixed PLL values depend on its clock range,
1066 this mirrors vbios setting. */
1067 if (dotclock
>= 100000 && dotclock
< 140500) {
1073 } else if (dotclock
>= 140500 && dotclock
<= 200000) {
1080 WARN(1, "SDVO TV clock out of range: %i\n", dotclock
);
1083 pipe_config
->clock_set
= true;
1086 static bool intel_sdvo_compute_config(struct intel_encoder
*encoder
,
1087 struct intel_crtc_config
*pipe_config
)
1089 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1090 struct drm_display_mode
*adjusted_mode
= &pipe_config
->adjusted_mode
;
1091 struct drm_display_mode
*mode
= &pipe_config
->requested_mode
;
1093 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1094 pipe_config
->pipe_bpp
= 8*3;
1096 if (HAS_PCH_SPLIT(encoder
->base
.dev
))
1097 pipe_config
->has_pch_encoder
= true;
1099 /* We need to construct preferred input timings based on our
1100 * output timings. To do that, we have to set the output
1101 * timings, even though this isn't really the right place in
1102 * the sequence to do it. Oh well.
1104 if (intel_sdvo
->is_tv
) {
1105 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo
, mode
))
1108 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo
,
1111 pipe_config
->sdvo_tv_clock
= true;
1112 } else if (intel_sdvo
->is_lvds
) {
1113 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo
,
1114 intel_sdvo
->sdvo_lvds_fixed_mode
))
1117 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo
,
1122 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1123 * SDVO device will factor out the multiplier during mode_set.
1125 pipe_config
->pixel_multiplier
=
1126 intel_sdvo_get_pixel_multiplier(adjusted_mode
);
1127 adjusted_mode
->clock
*= pipe_config
->pixel_multiplier
;
1129 if (intel_sdvo
->color_range_auto
) {
1130 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1131 /* FIXME: This bit is only valid when using TMDS encoding and 8
1132 * bit per color mode. */
1133 if (intel_sdvo
->has_hdmi_monitor
&&
1134 drm_match_cea_mode(adjusted_mode
) > 1)
1135 intel_sdvo
->color_range
= HDMI_COLOR_RANGE_16_235
;
1137 intel_sdvo
->color_range
= 0;
1140 if (intel_sdvo
->color_range
)
1141 pipe_config
->limited_color_range
= true;
1143 /* Clock computation needs to happen after pixel multiplier. */
1144 if (intel_sdvo
->is_tv
)
1145 i9xx_adjust_sdvo_tv_clock(pipe_config
);
1150 static void intel_sdvo_mode_set(struct intel_encoder
*intel_encoder
)
1152 struct drm_device
*dev
= intel_encoder
->base
.dev
;
1153 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1154 struct intel_crtc
*crtc
= to_intel_crtc(intel_encoder
->base
.crtc
);
1155 struct drm_display_mode
*adjusted_mode
=
1156 &crtc
->config
.adjusted_mode
;
1157 struct drm_display_mode
*mode
= &crtc
->config
.requested_mode
;
1158 struct intel_sdvo
*intel_sdvo
= to_sdvo(intel_encoder
);
1160 struct intel_sdvo_in_out_map in_out
;
1161 struct intel_sdvo_dtd input_dtd
, output_dtd
;
1167 /* First, set the input mapping for the first input to our controlled
1168 * output. This is only correct if we're a single-input device, in
1169 * which case the first input is the output from the appropriate SDVO
1170 * channel on the motherboard. In a two-input device, the first input
1171 * will be SDVOB and the second SDVOC.
1173 in_out
.in0
= intel_sdvo
->attached_output
;
1176 intel_sdvo_set_value(intel_sdvo
,
1177 SDVO_CMD_SET_IN_OUT_MAP
,
1178 &in_out
, sizeof(in_out
));
1180 /* Set the output timings to the screen */
1181 if (!intel_sdvo_set_target_output(intel_sdvo
,
1182 intel_sdvo
->attached_output
))
1185 /* lvds has a special fixed output timing. */
1186 if (intel_sdvo
->is_lvds
)
1187 intel_sdvo_get_dtd_from_mode(&output_dtd
,
1188 intel_sdvo
->sdvo_lvds_fixed_mode
);
1190 intel_sdvo_get_dtd_from_mode(&output_dtd
, mode
);
1191 if (!intel_sdvo_set_output_timing(intel_sdvo
, &output_dtd
))
1192 DRM_INFO("Setting output timings on %s failed\n",
1193 SDVO_NAME(intel_sdvo
));
1195 /* Set the input timing to the screen. Assume always input 0. */
1196 if (!intel_sdvo_set_target_input(intel_sdvo
))
1199 if (intel_sdvo
->has_hdmi_monitor
) {
1200 intel_sdvo_set_encode(intel_sdvo
, SDVO_ENCODE_HDMI
);
1201 intel_sdvo_set_colorimetry(intel_sdvo
,
1202 SDVO_COLORIMETRY_RGB256
);
1203 intel_sdvo_set_avi_infoframe(intel_sdvo
, adjusted_mode
);
1205 intel_sdvo_set_encode(intel_sdvo
, SDVO_ENCODE_DVI
);
1207 if (intel_sdvo
->is_tv
&&
1208 !intel_sdvo_set_tv_format(intel_sdvo
))
1211 /* We have tried to get input timing in mode_fixup, and filled into
1214 intel_sdvo_get_dtd_from_mode(&input_dtd
, adjusted_mode
);
1215 input_dtd
.part1
.clock
/= crtc
->config
.pixel_multiplier
;
1217 if (intel_sdvo
->is_tv
|| intel_sdvo
->is_lvds
)
1218 input_dtd
.part2
.sdvo_flags
= intel_sdvo
->dtd_sdvo_flags
;
1219 if (!intel_sdvo_set_input_timing(intel_sdvo
, &input_dtd
))
1220 DRM_INFO("Setting input timings on %s failed\n",
1221 SDVO_NAME(intel_sdvo
));
1223 switch (crtc
->config
.pixel_multiplier
) {
1225 WARN(1, "unknown pixel mutlipler specified\n");
1226 case 1: rate
= SDVO_CLOCK_RATE_MULT_1X
; break;
1227 case 2: rate
= SDVO_CLOCK_RATE_MULT_2X
; break;
1228 case 4: rate
= SDVO_CLOCK_RATE_MULT_4X
; break;
1230 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo
, rate
))
1233 /* Set the SDVO control regs. */
1234 if (INTEL_INFO(dev
)->gen
>= 4) {
1235 /* The real mode polarity is set by the SDVO commands, using
1236 * struct intel_sdvo_dtd. */
1237 sdvox
= SDVO_VSYNC_ACTIVE_HIGH
| SDVO_HSYNC_ACTIVE_HIGH
;
1238 if (!HAS_PCH_SPLIT(dev
) && intel_sdvo
->is_hdmi
)
1239 sdvox
|= intel_sdvo
->color_range
;
1240 if (INTEL_INFO(dev
)->gen
< 5)
1241 sdvox
|= SDVO_BORDER_ENABLE
;
1243 sdvox
= I915_READ(intel_sdvo
->sdvo_reg
);
1244 switch (intel_sdvo
->sdvo_reg
) {
1246 sdvox
&= SDVOB_PRESERVE_MASK
;
1249 sdvox
&= SDVOC_PRESERVE_MASK
;
1252 sdvox
|= (9 << 19) | SDVO_BORDER_ENABLE
;
1255 if (INTEL_PCH_TYPE(dev
) >= PCH_CPT
)
1256 sdvox
|= SDVO_PIPE_SEL_CPT(crtc
->pipe
);
1258 sdvox
|= SDVO_PIPE_SEL(crtc
->pipe
);
1260 if (intel_sdvo
->has_hdmi_audio
)
1261 sdvox
|= SDVO_AUDIO_ENABLE
;
1263 if (INTEL_INFO(dev
)->gen
>= 4) {
1264 /* done in crtc_mode_set as the dpll_md reg must be written early */
1265 } else if (IS_I945G(dev
) || IS_I945GM(dev
) || IS_G33(dev
)) {
1266 /* done in crtc_mode_set as it lives inside the dpll register */
1268 sdvox
|= (crtc
->config
.pixel_multiplier
- 1)
1269 << SDVO_PORT_MULTIPLY_SHIFT
;
1272 if (input_dtd
.part2
.sdvo_flags
& SDVO_NEED_TO_STALL
&&
1273 INTEL_INFO(dev
)->gen
< 5)
1274 sdvox
|= SDVO_STALL_SELECT
;
1275 intel_sdvo_write_sdvox(intel_sdvo
, sdvox
);
1278 static bool intel_sdvo_connector_get_hw_state(struct intel_connector
*connector
)
1280 struct intel_sdvo_connector
*intel_sdvo_connector
=
1281 to_intel_sdvo_connector(&connector
->base
);
1282 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(&connector
->base
);
1283 u16 active_outputs
= 0;
1285 intel_sdvo_get_active_outputs(intel_sdvo
, &active_outputs
);
1287 if (active_outputs
& intel_sdvo_connector
->output_flag
)
1293 static bool intel_sdvo_get_hw_state(struct intel_encoder
*encoder
,
1296 struct drm_device
*dev
= encoder
->base
.dev
;
1297 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1298 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1299 u16 active_outputs
= 0;
1302 tmp
= I915_READ(intel_sdvo
->sdvo_reg
);
1303 intel_sdvo_get_active_outputs(intel_sdvo
, &active_outputs
);
1305 if (!(tmp
& SDVO_ENABLE
) && (active_outputs
== 0))
1308 if (HAS_PCH_CPT(dev
))
1309 *pipe
= PORT_TO_PIPE_CPT(tmp
);
1311 *pipe
= PORT_TO_PIPE(tmp
);
1316 static void intel_sdvo_get_config(struct intel_encoder
*encoder
,
1317 struct intel_crtc_config
*pipe_config
)
1319 struct drm_device
*dev
= encoder
->base
.dev
;
1320 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1321 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1322 struct intel_sdvo_dtd dtd
;
1323 int encoder_pixel_multiplier
= 0;
1324 u32 flags
= 0, sdvox
;
1328 ret
= intel_sdvo_get_input_timing(intel_sdvo
, &dtd
);
1330 /* Some sdvo encoders are not spec compliant and don't
1331 * implement the mandatory get_timings function. */
1332 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1333 pipe_config
->quirks
|= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS
;
1335 if (dtd
.part2
.dtd_flags
& DTD_FLAG_HSYNC_POSITIVE
)
1336 flags
|= DRM_MODE_FLAG_PHSYNC
;
1338 flags
|= DRM_MODE_FLAG_NHSYNC
;
1340 if (dtd
.part2
.dtd_flags
& DTD_FLAG_VSYNC_POSITIVE
)
1341 flags
|= DRM_MODE_FLAG_PVSYNC
;
1343 flags
|= DRM_MODE_FLAG_NVSYNC
;
1346 pipe_config
->adjusted_mode
.flags
|= flags
;
1349 * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1350 * the sdvo port register, on all other platforms it is part of the dpll
1351 * state. Since the general pipe state readout happens before the
1352 * encoder->get_config we so already have a valid pixel multplier on all
1355 if (IS_I915G(dev
) || IS_I915GM(dev
)) {
1356 sdvox
= I915_READ(intel_sdvo
->sdvo_reg
);
1357 pipe_config
->pixel_multiplier
=
1358 ((sdvox
& SDVO_PORT_MULTIPLY_MASK
)
1359 >> SDVO_PORT_MULTIPLY_SHIFT
) + 1;
1362 /* Cross check the port pixel multiplier with the sdvo encoder state. */
1363 if (intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_CLOCK_RATE_MULT
,
1366 case SDVO_CLOCK_RATE_MULT_1X
:
1367 encoder_pixel_multiplier
= 1;
1369 case SDVO_CLOCK_RATE_MULT_2X
:
1370 encoder_pixel_multiplier
= 2;
1372 case SDVO_CLOCK_RATE_MULT_4X
:
1373 encoder_pixel_multiplier
= 4;
1378 WARN(encoder_pixel_multiplier
!= pipe_config
->pixel_multiplier
,
1379 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1380 pipe_config
->pixel_multiplier
, encoder_pixel_multiplier
);
1383 static void intel_disable_sdvo(struct intel_encoder
*encoder
)
1385 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
1386 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1389 intel_sdvo_set_active_outputs(intel_sdvo
, 0);
1391 intel_sdvo_set_encoder_power_state(intel_sdvo
,
1394 temp
= I915_READ(intel_sdvo
->sdvo_reg
);
1395 if ((temp
& SDVO_ENABLE
) != 0) {
1396 /* HW workaround for IBX, we need to move the port to
1397 * transcoder A before disabling it. */
1398 if (HAS_PCH_IBX(encoder
->base
.dev
)) {
1399 struct drm_crtc
*crtc
= encoder
->base
.crtc
;
1400 int pipe
= crtc
? to_intel_crtc(crtc
)->pipe
: -1;
1402 if (temp
& SDVO_PIPE_B_SELECT
) {
1403 temp
&= ~SDVO_PIPE_B_SELECT
;
1404 I915_WRITE(intel_sdvo
->sdvo_reg
, temp
);
1405 POSTING_READ(intel_sdvo
->sdvo_reg
);
1407 /* Again we need to write this twice. */
1408 I915_WRITE(intel_sdvo
->sdvo_reg
, temp
);
1409 POSTING_READ(intel_sdvo
->sdvo_reg
);
1411 /* Transcoder selection bits only update
1412 * effectively on vblank. */
1414 intel_wait_for_vblank(encoder
->base
.dev
, pipe
);
1420 intel_sdvo_write_sdvox(intel_sdvo
, temp
& ~SDVO_ENABLE
);
1424 static void intel_enable_sdvo(struct intel_encoder
*encoder
)
1426 struct drm_device
*dev
= encoder
->base
.dev
;
1427 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1428 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1429 struct intel_crtc
*intel_crtc
= to_intel_crtc(encoder
->base
.crtc
);
1431 bool input1
, input2
;
1435 temp
= I915_READ(intel_sdvo
->sdvo_reg
);
1436 if ((temp
& SDVO_ENABLE
) == 0) {
1437 /* HW workaround for IBX, we need to move the port
1438 * to transcoder A before disabling it, so restore it here. */
1439 if (HAS_PCH_IBX(dev
))
1440 temp
|= SDVO_PIPE_SEL(intel_crtc
->pipe
);
1442 intel_sdvo_write_sdvox(intel_sdvo
, temp
| SDVO_ENABLE
);
1444 for (i
= 0; i
< 2; i
++)
1445 intel_wait_for_vblank(dev
, intel_crtc
->pipe
);
1447 status
= intel_sdvo_get_trained_inputs(intel_sdvo
, &input1
, &input2
);
1448 /* Warn if the device reported failure to sync.
1449 * A lot of SDVO devices fail to notify of sync, but it's
1450 * a given it the status is a success, we succeeded.
1452 if (status
== SDVO_CMD_STATUS_SUCCESS
&& !input1
) {
1453 DRM_DEBUG_KMS("First %s output reported failure to "
1454 "sync\n", SDVO_NAME(intel_sdvo
));
1458 intel_sdvo_set_encoder_power_state(intel_sdvo
,
1460 intel_sdvo_set_active_outputs(intel_sdvo
, intel_sdvo
->attached_output
);
1463 /* Special dpms function to support cloning between dvo/sdvo/crt. */
1464 static void intel_sdvo_dpms(struct drm_connector
*connector
, int mode
)
1466 struct drm_crtc
*crtc
;
1467 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1469 /* dvo supports only 2 dpms states. */
1470 if (mode
!= DRM_MODE_DPMS_ON
)
1471 mode
= DRM_MODE_DPMS_OFF
;
1473 if (mode
== connector
->dpms
)
1476 connector
->dpms
= mode
;
1478 /* Only need to change hw state when actually enabled */
1479 crtc
= intel_sdvo
->base
.base
.crtc
;
1481 intel_sdvo
->base
.connectors_active
= false;
1485 /* We set active outputs manually below in case pipe dpms doesn't change
1486 * due to cloning. */
1487 if (mode
!= DRM_MODE_DPMS_ON
) {
1488 intel_sdvo_set_active_outputs(intel_sdvo
, 0);
1490 intel_sdvo_set_encoder_power_state(intel_sdvo
, mode
);
1492 intel_sdvo
->base
.connectors_active
= false;
1494 intel_crtc_update_dpms(crtc
);
1496 intel_sdvo
->base
.connectors_active
= true;
1498 intel_crtc_update_dpms(crtc
);
1501 intel_sdvo_set_encoder_power_state(intel_sdvo
, mode
);
1502 intel_sdvo_set_active_outputs(intel_sdvo
, intel_sdvo
->attached_output
);
1505 intel_modeset_check_state(connector
->dev
);
1508 static int intel_sdvo_mode_valid(struct drm_connector
*connector
,
1509 struct drm_display_mode
*mode
)
1511 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1513 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
1514 return MODE_NO_DBLESCAN
;
1516 if (intel_sdvo
->pixel_clock_min
> mode
->clock
)
1517 return MODE_CLOCK_LOW
;
1519 if (intel_sdvo
->pixel_clock_max
< mode
->clock
)
1520 return MODE_CLOCK_HIGH
;
1522 if (intel_sdvo
->is_lvds
) {
1523 if (mode
->hdisplay
> intel_sdvo
->sdvo_lvds_fixed_mode
->hdisplay
)
1526 if (mode
->vdisplay
> intel_sdvo
->sdvo_lvds_fixed_mode
->vdisplay
)
1533 static bool intel_sdvo_get_capabilities(struct intel_sdvo
*intel_sdvo
, struct intel_sdvo_caps
*caps
)
1535 BUILD_BUG_ON(sizeof(*caps
) != 8);
1536 if (!intel_sdvo_get_value(intel_sdvo
,
1537 SDVO_CMD_GET_DEVICE_CAPS
,
1538 caps
, sizeof(*caps
)))
1541 DRM_DEBUG_KMS("SDVO capabilities:\n"
1544 " device_rev_id: %d\n"
1545 " sdvo_version_major: %d\n"
1546 " sdvo_version_minor: %d\n"
1547 " sdvo_inputs_mask: %d\n"
1548 " smooth_scaling: %d\n"
1549 " sharp_scaling: %d\n"
1551 " down_scaling: %d\n"
1552 " stall_support: %d\n"
1553 " output_flags: %d\n",
1556 caps
->device_rev_id
,
1557 caps
->sdvo_version_major
,
1558 caps
->sdvo_version_minor
,
1559 caps
->sdvo_inputs_mask
,
1560 caps
->smooth_scaling
,
1561 caps
->sharp_scaling
,
1564 caps
->stall_support
,
1565 caps
->output_flags
);
1570 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo
*intel_sdvo
)
1572 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
1575 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1577 if (IS_I945G(dev
) || IS_I945GM(dev
))
1580 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_HOT_PLUG_SUPPORT
,
1581 &hotplug
, sizeof(hotplug
)))
1587 static void intel_sdvo_enable_hotplug(struct intel_encoder
*encoder
)
1589 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1591 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_ACTIVE_HOT_PLUG
,
1592 &intel_sdvo
->hotplug_active
, 2);
1596 intel_sdvo_multifunc_encoder(struct intel_sdvo
*intel_sdvo
)
1598 /* Is there more than one type of output? */
1599 return hweight16(intel_sdvo
->caps
.output_flags
) > 1;
1602 static struct edid
*
1603 intel_sdvo_get_edid(struct drm_connector
*connector
)
1605 struct intel_sdvo
*sdvo
= intel_attached_sdvo(connector
);
1606 return drm_get_edid(connector
, &sdvo
->ddc
);
1609 /* Mac mini hack -- use the same DDC as the analog connector */
1610 static struct edid
*
1611 intel_sdvo_get_analog_edid(struct drm_connector
*connector
)
1613 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
1615 return drm_get_edid(connector
,
1616 intel_gmbus_get_adapter(dev_priv
,
1617 dev_priv
->vbt
.crt_ddc_pin
));
1620 static enum drm_connector_status
1621 intel_sdvo_tmds_sink_detect(struct drm_connector
*connector
)
1623 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1624 enum drm_connector_status status
;
1627 edid
= intel_sdvo_get_edid(connector
);
1629 if (edid
== NULL
&& intel_sdvo_multifunc_encoder(intel_sdvo
)) {
1630 u8 ddc
, saved_ddc
= intel_sdvo
->ddc_bus
;
1633 * Don't use the 1 as the argument of DDC bus switch to get
1634 * the EDID. It is used for SDVO SPD ROM.
1636 for (ddc
= intel_sdvo
->ddc_bus
>> 1; ddc
> 1; ddc
>>= 1) {
1637 intel_sdvo
->ddc_bus
= ddc
;
1638 edid
= intel_sdvo_get_edid(connector
);
1643 * If we found the EDID on the other bus,
1644 * assume that is the correct DDC bus.
1647 intel_sdvo
->ddc_bus
= saved_ddc
;
1651 * When there is no edid and no monitor is connected with VGA
1652 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1655 edid
= intel_sdvo_get_analog_edid(connector
);
1657 status
= connector_status_unknown
;
1659 /* DDC bus is shared, match EDID to connector type */
1660 if (edid
->input
& DRM_EDID_INPUT_DIGITAL
) {
1661 status
= connector_status_connected
;
1662 if (intel_sdvo
->is_hdmi
) {
1663 intel_sdvo
->has_hdmi_monitor
= drm_detect_hdmi_monitor(edid
);
1664 intel_sdvo
->has_hdmi_audio
= drm_detect_monitor_audio(edid
);
1665 intel_sdvo
->rgb_quant_range_selectable
=
1666 drm_rgb_quant_range_selectable(edid
);
1669 status
= connector_status_disconnected
;
1673 if (status
== connector_status_connected
) {
1674 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1675 if (intel_sdvo_connector
->force_audio
!= HDMI_AUDIO_AUTO
)
1676 intel_sdvo
->has_hdmi_audio
= (intel_sdvo_connector
->force_audio
== HDMI_AUDIO_ON
);
1683 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector
*sdvo
,
1686 bool monitor_is_digital
= !!(edid
->input
& DRM_EDID_INPUT_DIGITAL
);
1687 bool connector_is_digital
= !!IS_DIGITAL(sdvo
);
1689 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1690 connector_is_digital
, monitor_is_digital
);
1691 return connector_is_digital
== monitor_is_digital
;
1694 static enum drm_connector_status
1695 intel_sdvo_detect(struct drm_connector
*connector
, bool force
)
1698 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1699 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1700 enum drm_connector_status ret
;
1702 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1703 connector
->base
.id
, drm_get_connector_name(connector
));
1705 if (!intel_sdvo_get_value(intel_sdvo
,
1706 SDVO_CMD_GET_ATTACHED_DISPLAYS
,
1708 return connector_status_unknown
;
1710 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1711 response
& 0xff, response
>> 8,
1712 intel_sdvo_connector
->output_flag
);
1715 return connector_status_disconnected
;
1717 intel_sdvo
->attached_output
= response
;
1719 intel_sdvo
->has_hdmi_monitor
= false;
1720 intel_sdvo
->has_hdmi_audio
= false;
1721 intel_sdvo
->rgb_quant_range_selectable
= false;
1723 if ((intel_sdvo_connector
->output_flag
& response
) == 0)
1724 ret
= connector_status_disconnected
;
1725 else if (IS_TMDS(intel_sdvo_connector
))
1726 ret
= intel_sdvo_tmds_sink_detect(connector
);
1730 /* if we have an edid check it matches the connection */
1731 edid
= intel_sdvo_get_edid(connector
);
1733 edid
= intel_sdvo_get_analog_edid(connector
);
1735 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector
,
1737 ret
= connector_status_connected
;
1739 ret
= connector_status_disconnected
;
1743 ret
= connector_status_connected
;
1746 /* May update encoder flag for like clock for SDVO TV, etc.*/
1747 if (ret
== connector_status_connected
) {
1748 intel_sdvo
->is_tv
= false;
1749 intel_sdvo
->is_lvds
= false;
1751 if (response
& SDVO_TV_MASK
)
1752 intel_sdvo
->is_tv
= true;
1753 if (response
& SDVO_LVDS_MASK
)
1754 intel_sdvo
->is_lvds
= intel_sdvo
->sdvo_lvds_fixed_mode
!= NULL
;
1760 static void intel_sdvo_get_ddc_modes(struct drm_connector
*connector
)
1764 /* set the bus switch and get the modes */
1765 edid
= intel_sdvo_get_edid(connector
);
1768 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1769 * link between analog and digital outputs. So, if the regular SDVO
1770 * DDC fails, check to see if the analog output is disconnected, in
1771 * which case we'll look there for the digital DDC data.
1774 edid
= intel_sdvo_get_analog_edid(connector
);
1777 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector
),
1779 drm_mode_connector_update_edid_property(connector
, edid
);
1780 drm_add_edid_modes(connector
, edid
);
1788 * Set of SDVO TV modes.
1789 * Note! This is in reply order (see loop in get_tv_modes).
1790 * XXX: all 60Hz refresh?
1792 static const struct drm_display_mode sdvo_tv_modes
[] = {
1793 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER
, 5815, 320, 321, 384,
1794 416, 0, 200, 201, 232, 233, 0,
1795 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1796 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER
, 6814, 320, 321, 384,
1797 416, 0, 240, 241, 272, 273, 0,
1798 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1799 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER
, 9910, 400, 401, 464,
1800 496, 0, 300, 301, 332, 333, 0,
1801 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1802 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER
, 16913, 640, 641, 704,
1803 736, 0, 350, 351, 382, 383, 0,
1804 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1805 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER
, 19121, 640, 641, 704,
1806 736, 0, 400, 401, 432, 433, 0,
1807 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1808 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 22654, 640, 641, 704,
1809 736, 0, 480, 481, 512, 513, 0,
1810 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1811 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER
, 24624, 704, 705, 768,
1812 800, 0, 480, 481, 512, 513, 0,
1813 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1814 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER
, 29232, 704, 705, 768,
1815 800, 0, 576, 577, 608, 609, 0,
1816 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1817 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER
, 18751, 720, 721, 784,
1818 816, 0, 350, 351, 382, 383, 0,
1819 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1820 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 21199, 720, 721, 784,
1821 816, 0, 400, 401, 432, 433, 0,
1822 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1823 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 25116, 720, 721, 784,
1824 816, 0, 480, 481, 512, 513, 0,
1825 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1826 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER
, 28054, 720, 721, 784,
1827 816, 0, 540, 541, 572, 573, 0,
1828 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1829 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 29816, 720, 721, 784,
1830 816, 0, 576, 577, 608, 609, 0,
1831 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1832 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER
, 31570, 768, 769, 832,
1833 864, 0, 576, 577, 608, 609, 0,
1834 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1835 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 34030, 800, 801, 864,
1836 896, 0, 600, 601, 632, 633, 0,
1837 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1838 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER
, 36581, 832, 833, 896,
1839 928, 0, 624, 625, 656, 657, 0,
1840 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1841 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER
, 48707, 920, 921, 984,
1842 1016, 0, 766, 767, 798, 799, 0,
1843 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1844 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 53827, 1024, 1025, 1088,
1845 1120, 0, 768, 769, 800, 801, 0,
1846 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1847 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 87265, 1280, 1281, 1344,
1848 1376, 0, 1024, 1025, 1056, 1057, 0,
1849 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1852 static void intel_sdvo_get_tv_modes(struct drm_connector
*connector
)
1854 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1855 struct intel_sdvo_sdtv_resolution_request tv_res
;
1856 uint32_t reply
= 0, format_map
= 0;
1859 /* Read the list of supported input resolutions for the selected TV
1862 format_map
= 1 << intel_sdvo
->tv_format_index
;
1863 memcpy(&tv_res
, &format_map
,
1864 min(sizeof(format_map
), sizeof(struct intel_sdvo_sdtv_resolution_request
)));
1866 if (!intel_sdvo_set_target_output(intel_sdvo
, intel_sdvo
->attached_output
))
1869 BUILD_BUG_ON(sizeof(tv_res
) != 3);
1870 if (!intel_sdvo_write_cmd(intel_sdvo
,
1871 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
,
1872 &tv_res
, sizeof(tv_res
)))
1874 if (!intel_sdvo_read_response(intel_sdvo
, &reply
, 3))
1877 for (i
= 0; i
< ARRAY_SIZE(sdvo_tv_modes
); i
++)
1878 if (reply
& (1 << i
)) {
1879 struct drm_display_mode
*nmode
;
1880 nmode
= drm_mode_duplicate(connector
->dev
,
1883 drm_mode_probed_add(connector
, nmode
);
1887 static void intel_sdvo_get_lvds_modes(struct drm_connector
*connector
)
1889 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1890 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
1891 struct drm_display_mode
*newmode
;
1894 * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1895 * SDVO->LVDS transcoders can't cope with the EDID mode.
1897 if (dev_priv
->vbt
.sdvo_lvds_vbt_mode
!= NULL
) {
1898 newmode
= drm_mode_duplicate(connector
->dev
,
1899 dev_priv
->vbt
.sdvo_lvds_vbt_mode
);
1900 if (newmode
!= NULL
) {
1901 /* Guarantee the mode is preferred */
1902 newmode
->type
= (DRM_MODE_TYPE_PREFERRED
|
1903 DRM_MODE_TYPE_DRIVER
);
1904 drm_mode_probed_add(connector
, newmode
);
1909 * Attempt to get the mode list from DDC.
1910 * Assume that the preferred modes are
1911 * arranged in priority order.
1913 intel_ddc_get_modes(connector
, &intel_sdvo
->ddc
);
1915 list_for_each_entry(newmode
, &connector
->probed_modes
, head
) {
1916 if (newmode
->type
& DRM_MODE_TYPE_PREFERRED
) {
1917 intel_sdvo
->sdvo_lvds_fixed_mode
=
1918 drm_mode_duplicate(connector
->dev
, newmode
);
1920 intel_sdvo
->is_lvds
= true;
1927 static int intel_sdvo_get_modes(struct drm_connector
*connector
)
1929 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1931 if (IS_TV(intel_sdvo_connector
))
1932 intel_sdvo_get_tv_modes(connector
);
1933 else if (IS_LVDS(intel_sdvo_connector
))
1934 intel_sdvo_get_lvds_modes(connector
);
1936 intel_sdvo_get_ddc_modes(connector
);
1938 return !list_empty(&connector
->probed_modes
);
1942 intel_sdvo_destroy_enhance_property(struct drm_connector
*connector
)
1944 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1945 struct drm_device
*dev
= connector
->dev
;
1947 if (intel_sdvo_connector
->left
)
1948 drm_property_destroy(dev
, intel_sdvo_connector
->left
);
1949 if (intel_sdvo_connector
->right
)
1950 drm_property_destroy(dev
, intel_sdvo_connector
->right
);
1951 if (intel_sdvo_connector
->top
)
1952 drm_property_destroy(dev
, intel_sdvo_connector
->top
);
1953 if (intel_sdvo_connector
->bottom
)
1954 drm_property_destroy(dev
, intel_sdvo_connector
->bottom
);
1955 if (intel_sdvo_connector
->hpos
)
1956 drm_property_destroy(dev
, intel_sdvo_connector
->hpos
);
1957 if (intel_sdvo_connector
->vpos
)
1958 drm_property_destroy(dev
, intel_sdvo_connector
->vpos
);
1959 if (intel_sdvo_connector
->saturation
)
1960 drm_property_destroy(dev
, intel_sdvo_connector
->saturation
);
1961 if (intel_sdvo_connector
->contrast
)
1962 drm_property_destroy(dev
, intel_sdvo_connector
->contrast
);
1963 if (intel_sdvo_connector
->hue
)
1964 drm_property_destroy(dev
, intel_sdvo_connector
->hue
);
1965 if (intel_sdvo_connector
->sharpness
)
1966 drm_property_destroy(dev
, intel_sdvo_connector
->sharpness
);
1967 if (intel_sdvo_connector
->flicker_filter
)
1968 drm_property_destroy(dev
, intel_sdvo_connector
->flicker_filter
);
1969 if (intel_sdvo_connector
->flicker_filter_2d
)
1970 drm_property_destroy(dev
, intel_sdvo_connector
->flicker_filter_2d
);
1971 if (intel_sdvo_connector
->flicker_filter_adaptive
)
1972 drm_property_destroy(dev
, intel_sdvo_connector
->flicker_filter_adaptive
);
1973 if (intel_sdvo_connector
->tv_luma_filter
)
1974 drm_property_destroy(dev
, intel_sdvo_connector
->tv_luma_filter
);
1975 if (intel_sdvo_connector
->tv_chroma_filter
)
1976 drm_property_destroy(dev
, intel_sdvo_connector
->tv_chroma_filter
);
1977 if (intel_sdvo_connector
->dot_crawl
)
1978 drm_property_destroy(dev
, intel_sdvo_connector
->dot_crawl
);
1979 if (intel_sdvo_connector
->brightness
)
1980 drm_property_destroy(dev
, intel_sdvo_connector
->brightness
);
1983 static void intel_sdvo_destroy(struct drm_connector
*connector
)
1985 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1987 if (intel_sdvo_connector
->tv_format
)
1988 drm_property_destroy(connector
->dev
,
1989 intel_sdvo_connector
->tv_format
);
1991 intel_sdvo_destroy_enhance_property(connector
);
1992 drm_sysfs_connector_remove(connector
);
1993 drm_connector_cleanup(connector
);
1994 kfree(intel_sdvo_connector
);
1997 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector
*connector
)
1999 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
2001 bool has_audio
= false;
2003 if (!intel_sdvo
->is_hdmi
)
2006 edid
= intel_sdvo_get_edid(connector
);
2007 if (edid
!= NULL
&& edid
->input
& DRM_EDID_INPUT_DIGITAL
)
2008 has_audio
= drm_detect_monitor_audio(edid
);
2015 intel_sdvo_set_property(struct drm_connector
*connector
,
2016 struct drm_property
*property
,
2019 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
2020 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
2021 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
2022 uint16_t temp_value
;
2026 ret
= drm_object_property_set_value(&connector
->base
, property
, val
);
2030 if (property
== dev_priv
->force_audio_property
) {
2034 if (i
== intel_sdvo_connector
->force_audio
)
2037 intel_sdvo_connector
->force_audio
= i
;
2039 if (i
== HDMI_AUDIO_AUTO
)
2040 has_audio
= intel_sdvo_detect_hdmi_audio(connector
);
2042 has_audio
= (i
== HDMI_AUDIO_ON
);
2044 if (has_audio
== intel_sdvo
->has_hdmi_audio
)
2047 intel_sdvo
->has_hdmi_audio
= has_audio
;
2051 if (property
== dev_priv
->broadcast_rgb_property
) {
2052 bool old_auto
= intel_sdvo
->color_range_auto
;
2053 uint32_t old_range
= intel_sdvo
->color_range
;
2056 case INTEL_BROADCAST_RGB_AUTO
:
2057 intel_sdvo
->color_range_auto
= true;
2059 case INTEL_BROADCAST_RGB_FULL
:
2060 intel_sdvo
->color_range_auto
= false;
2061 intel_sdvo
->color_range
= 0;
2063 case INTEL_BROADCAST_RGB_LIMITED
:
2064 intel_sdvo
->color_range_auto
= false;
2065 /* FIXME: this bit is only valid when using TMDS
2066 * encoding and 8 bit per color mode. */
2067 intel_sdvo
->color_range
= HDMI_COLOR_RANGE_16_235
;
2073 if (old_auto
== intel_sdvo
->color_range_auto
&&
2074 old_range
== intel_sdvo
->color_range
)
2080 #define CHECK_PROPERTY(name, NAME) \
2081 if (intel_sdvo_connector->name == property) { \
2082 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
2083 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
2084 cmd = SDVO_CMD_SET_##NAME; \
2085 intel_sdvo_connector->cur_##name = temp_value; \
2089 if (property
== intel_sdvo_connector
->tv_format
) {
2090 if (val
>= TV_FORMAT_NUM
)
2093 if (intel_sdvo
->tv_format_index
==
2094 intel_sdvo_connector
->tv_format_supported
[val
])
2097 intel_sdvo
->tv_format_index
= intel_sdvo_connector
->tv_format_supported
[val
];
2099 } else if (IS_TV_OR_LVDS(intel_sdvo_connector
)) {
2101 if (intel_sdvo_connector
->left
== property
) {
2102 drm_object_property_set_value(&connector
->base
,
2103 intel_sdvo_connector
->right
, val
);
2104 if (intel_sdvo_connector
->left_margin
== temp_value
)
2107 intel_sdvo_connector
->left_margin
= temp_value
;
2108 intel_sdvo_connector
->right_margin
= temp_value
;
2109 temp_value
= intel_sdvo_connector
->max_hscan
-
2110 intel_sdvo_connector
->left_margin
;
2111 cmd
= SDVO_CMD_SET_OVERSCAN_H
;
2113 } else if (intel_sdvo_connector
->right
== property
) {
2114 drm_object_property_set_value(&connector
->base
,
2115 intel_sdvo_connector
->left
, val
);
2116 if (intel_sdvo_connector
->right_margin
== temp_value
)
2119 intel_sdvo_connector
->left_margin
= temp_value
;
2120 intel_sdvo_connector
->right_margin
= temp_value
;
2121 temp_value
= intel_sdvo_connector
->max_hscan
-
2122 intel_sdvo_connector
->left_margin
;
2123 cmd
= SDVO_CMD_SET_OVERSCAN_H
;
2125 } else if (intel_sdvo_connector
->top
== property
) {
2126 drm_object_property_set_value(&connector
->base
,
2127 intel_sdvo_connector
->bottom
, val
);
2128 if (intel_sdvo_connector
->top_margin
== temp_value
)
2131 intel_sdvo_connector
->top_margin
= temp_value
;
2132 intel_sdvo_connector
->bottom_margin
= temp_value
;
2133 temp_value
= intel_sdvo_connector
->max_vscan
-
2134 intel_sdvo_connector
->top_margin
;
2135 cmd
= SDVO_CMD_SET_OVERSCAN_V
;
2137 } else if (intel_sdvo_connector
->bottom
== property
) {
2138 drm_object_property_set_value(&connector
->base
,
2139 intel_sdvo_connector
->top
, val
);
2140 if (intel_sdvo_connector
->bottom_margin
== temp_value
)
2143 intel_sdvo_connector
->top_margin
= temp_value
;
2144 intel_sdvo_connector
->bottom_margin
= temp_value
;
2145 temp_value
= intel_sdvo_connector
->max_vscan
-
2146 intel_sdvo_connector
->top_margin
;
2147 cmd
= SDVO_CMD_SET_OVERSCAN_V
;
2150 CHECK_PROPERTY(hpos
, HPOS
)
2151 CHECK_PROPERTY(vpos
, VPOS
)
2152 CHECK_PROPERTY(saturation
, SATURATION
)
2153 CHECK_PROPERTY(contrast
, CONTRAST
)
2154 CHECK_PROPERTY(hue
, HUE
)
2155 CHECK_PROPERTY(brightness
, BRIGHTNESS
)
2156 CHECK_PROPERTY(sharpness
, SHARPNESS
)
2157 CHECK_PROPERTY(flicker_filter
, FLICKER_FILTER
)
2158 CHECK_PROPERTY(flicker_filter_2d
, FLICKER_FILTER_2D
)
2159 CHECK_PROPERTY(flicker_filter_adaptive
, FLICKER_FILTER_ADAPTIVE
)
2160 CHECK_PROPERTY(tv_chroma_filter
, TV_CHROMA_FILTER
)
2161 CHECK_PROPERTY(tv_luma_filter
, TV_LUMA_FILTER
)
2162 CHECK_PROPERTY(dot_crawl
, DOT_CRAWL
)
2165 return -EINVAL
; /* unknown property */
2168 if (!intel_sdvo_set_value(intel_sdvo
, cmd
, &temp_value
, 2))
2173 if (intel_sdvo
->base
.base
.crtc
)
2174 intel_crtc_restore_mode(intel_sdvo
->base
.base
.crtc
);
2177 #undef CHECK_PROPERTY
2180 static const struct drm_connector_funcs intel_sdvo_connector_funcs
= {
2181 .dpms
= intel_sdvo_dpms
,
2182 .detect
= intel_sdvo_detect
,
2183 .fill_modes
= drm_helper_probe_single_connector_modes
,
2184 .set_property
= intel_sdvo_set_property
,
2185 .destroy
= intel_sdvo_destroy
,
2188 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs
= {
2189 .get_modes
= intel_sdvo_get_modes
,
2190 .mode_valid
= intel_sdvo_mode_valid
,
2191 .best_encoder
= intel_best_encoder
,
2194 static void intel_sdvo_enc_destroy(struct drm_encoder
*encoder
)
2196 struct intel_sdvo
*intel_sdvo
= to_sdvo(to_intel_encoder(encoder
));
2198 if (intel_sdvo
->sdvo_lvds_fixed_mode
!= NULL
)
2199 drm_mode_destroy(encoder
->dev
,
2200 intel_sdvo
->sdvo_lvds_fixed_mode
);
2202 i2c_del_adapter(&intel_sdvo
->ddc
);
2203 intel_encoder_destroy(encoder
);
2206 static const struct drm_encoder_funcs intel_sdvo_enc_funcs
= {
2207 .destroy
= intel_sdvo_enc_destroy
,
2211 intel_sdvo_guess_ddc_bus(struct intel_sdvo
*sdvo
)
2214 unsigned int num_bits
;
2216 /* Make a mask of outputs less than or equal to our own priority in the
2219 switch (sdvo
->controlled_output
) {
2220 case SDVO_OUTPUT_LVDS1
:
2221 mask
|= SDVO_OUTPUT_LVDS1
;
2222 case SDVO_OUTPUT_LVDS0
:
2223 mask
|= SDVO_OUTPUT_LVDS0
;
2224 case SDVO_OUTPUT_TMDS1
:
2225 mask
|= SDVO_OUTPUT_TMDS1
;
2226 case SDVO_OUTPUT_TMDS0
:
2227 mask
|= SDVO_OUTPUT_TMDS0
;
2228 case SDVO_OUTPUT_RGB1
:
2229 mask
|= SDVO_OUTPUT_RGB1
;
2230 case SDVO_OUTPUT_RGB0
:
2231 mask
|= SDVO_OUTPUT_RGB0
;
2235 /* Count bits to find what number we are in the priority list. */
2236 mask
&= sdvo
->caps
.output_flags
;
2237 num_bits
= hweight16(mask
);
2238 /* If more than 3 outputs, default to DDC bus 3 for now. */
2242 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2243 sdvo
->ddc_bus
= 1 << num_bits
;
2247 * Choose the appropriate DDC bus for control bus switch command for this
2248 * SDVO output based on the controlled output.
2250 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2251 * outputs, then LVDS outputs.
2254 intel_sdvo_select_ddc_bus(struct drm_i915_private
*dev_priv
,
2255 struct intel_sdvo
*sdvo
, u32 reg
)
2257 struct sdvo_device_mapping
*mapping
;
2260 mapping
= &(dev_priv
->sdvo_mappings
[0]);
2262 mapping
= &(dev_priv
->sdvo_mappings
[1]);
2264 if (mapping
->initialized
)
2265 sdvo
->ddc_bus
= 1 << ((mapping
->ddc_pin
& 0xf0) >> 4);
2267 intel_sdvo_guess_ddc_bus(sdvo
);
2271 intel_sdvo_select_i2c_bus(struct drm_i915_private
*dev_priv
,
2272 struct intel_sdvo
*sdvo
, u32 reg
)
2274 struct sdvo_device_mapping
*mapping
;
2278 mapping
= &dev_priv
->sdvo_mappings
[0];
2280 mapping
= &dev_priv
->sdvo_mappings
[1];
2282 if (mapping
->initialized
&& intel_gmbus_is_port_valid(mapping
->i2c_pin
))
2283 pin
= mapping
->i2c_pin
;
2285 pin
= GMBUS_PORT_DPB
;
2287 sdvo
->i2c
= intel_gmbus_get_adapter(dev_priv
, pin
);
2289 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2290 * our code totally fails once we start using gmbus. Hence fall back to
2291 * bit banging for now. */
2292 intel_gmbus_force_bit(sdvo
->i2c
, true);
2295 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2297 intel_sdvo_unselect_i2c_bus(struct intel_sdvo
*sdvo
)
2299 intel_gmbus_force_bit(sdvo
->i2c
, false);
2303 intel_sdvo_is_hdmi_connector(struct intel_sdvo
*intel_sdvo
, int device
)
2305 return intel_sdvo_check_supp_encode(intel_sdvo
);
2309 intel_sdvo_get_slave_addr(struct drm_device
*dev
, struct intel_sdvo
*sdvo
)
2311 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2312 struct sdvo_device_mapping
*my_mapping
, *other_mapping
;
2314 if (sdvo
->is_sdvob
) {
2315 my_mapping
= &dev_priv
->sdvo_mappings
[0];
2316 other_mapping
= &dev_priv
->sdvo_mappings
[1];
2318 my_mapping
= &dev_priv
->sdvo_mappings
[1];
2319 other_mapping
= &dev_priv
->sdvo_mappings
[0];
2322 /* If the BIOS described our SDVO device, take advantage of it. */
2323 if (my_mapping
->slave_addr
)
2324 return my_mapping
->slave_addr
;
2326 /* If the BIOS only described a different SDVO device, use the
2327 * address that it isn't using.
2329 if (other_mapping
->slave_addr
) {
2330 if (other_mapping
->slave_addr
== 0x70)
2336 /* No SDVO device info is found for another DVO port,
2337 * so use mapping assumption we had before BIOS parsing.
2346 intel_sdvo_connector_init(struct intel_sdvo_connector
*connector
,
2347 struct intel_sdvo
*encoder
)
2349 drm_connector_init(encoder
->base
.base
.dev
,
2350 &connector
->base
.base
,
2351 &intel_sdvo_connector_funcs
,
2352 connector
->base
.base
.connector_type
);
2354 drm_connector_helper_add(&connector
->base
.base
,
2355 &intel_sdvo_connector_helper_funcs
);
2357 connector
->base
.base
.interlace_allowed
= 1;
2358 connector
->base
.base
.doublescan_allowed
= 0;
2359 connector
->base
.base
.display_info
.subpixel_order
= SubPixelHorizontalRGB
;
2360 connector
->base
.get_hw_state
= intel_sdvo_connector_get_hw_state
;
2362 intel_connector_attach_encoder(&connector
->base
, &encoder
->base
);
2363 drm_sysfs_connector_add(&connector
->base
.base
);
2367 intel_sdvo_add_hdmi_properties(struct intel_sdvo
*intel_sdvo
,
2368 struct intel_sdvo_connector
*connector
)
2370 struct drm_device
*dev
= connector
->base
.base
.dev
;
2372 intel_attach_force_audio_property(&connector
->base
.base
);
2373 if (INTEL_INFO(dev
)->gen
>= 4 && IS_MOBILE(dev
)) {
2374 intel_attach_broadcast_rgb_property(&connector
->base
.base
);
2375 intel_sdvo
->color_range_auto
= true;
2380 intel_sdvo_dvi_init(struct intel_sdvo
*intel_sdvo
, int device
)
2382 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2383 struct drm_connector
*connector
;
2384 struct intel_encoder
*intel_encoder
= to_intel_encoder(encoder
);
2385 struct intel_connector
*intel_connector
;
2386 struct intel_sdvo_connector
*intel_sdvo_connector
;
2388 intel_sdvo_connector
= kzalloc(sizeof(struct intel_sdvo_connector
), GFP_KERNEL
);
2389 if (!intel_sdvo_connector
)
2393 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_TMDS0
;
2394 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_TMDS0
;
2395 } else if (device
== 1) {
2396 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_TMDS1
;
2397 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_TMDS1
;
2400 intel_connector
= &intel_sdvo_connector
->base
;
2401 connector
= &intel_connector
->base
;
2402 if (intel_sdvo_get_hotplug_support(intel_sdvo
) &
2403 intel_sdvo_connector
->output_flag
) {
2404 intel_sdvo
->hotplug_active
|= intel_sdvo_connector
->output_flag
;
2405 /* Some SDVO devices have one-shot hotplug interrupts.
2406 * Ensure that they get re-enabled when an interrupt happens.
2408 intel_encoder
->hot_plug
= intel_sdvo_enable_hotplug
;
2409 intel_sdvo_enable_hotplug(intel_encoder
);
2411 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
| DRM_CONNECTOR_POLL_DISCONNECT
;
2413 encoder
->encoder_type
= DRM_MODE_ENCODER_TMDS
;
2414 connector
->connector_type
= DRM_MODE_CONNECTOR_DVID
;
2416 if (intel_sdvo_is_hdmi_connector(intel_sdvo
, device
)) {
2417 connector
->connector_type
= DRM_MODE_CONNECTOR_HDMIA
;
2418 intel_sdvo
->is_hdmi
= true;
2421 intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
);
2422 if (intel_sdvo
->is_hdmi
)
2423 intel_sdvo_add_hdmi_properties(intel_sdvo
, intel_sdvo_connector
);
2429 intel_sdvo_tv_init(struct intel_sdvo
*intel_sdvo
, int type
)
2431 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2432 struct drm_connector
*connector
;
2433 struct intel_connector
*intel_connector
;
2434 struct intel_sdvo_connector
*intel_sdvo_connector
;
2436 intel_sdvo_connector
= kzalloc(sizeof(struct intel_sdvo_connector
), GFP_KERNEL
);
2437 if (!intel_sdvo_connector
)
2440 intel_connector
= &intel_sdvo_connector
->base
;
2441 connector
= &intel_connector
->base
;
2442 encoder
->encoder_type
= DRM_MODE_ENCODER_TVDAC
;
2443 connector
->connector_type
= DRM_MODE_CONNECTOR_SVIDEO
;
2445 intel_sdvo
->controlled_output
|= type
;
2446 intel_sdvo_connector
->output_flag
= type
;
2448 intel_sdvo
->is_tv
= true;
2450 intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
);
2452 if (!intel_sdvo_tv_create_property(intel_sdvo
, intel_sdvo_connector
, type
))
2455 if (!intel_sdvo_create_enhance_property(intel_sdvo
, intel_sdvo_connector
))
2461 intel_sdvo_destroy(connector
);
2466 intel_sdvo_analog_init(struct intel_sdvo
*intel_sdvo
, int device
)
2468 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2469 struct drm_connector
*connector
;
2470 struct intel_connector
*intel_connector
;
2471 struct intel_sdvo_connector
*intel_sdvo_connector
;
2473 intel_sdvo_connector
= kzalloc(sizeof(struct intel_sdvo_connector
), GFP_KERNEL
);
2474 if (!intel_sdvo_connector
)
2477 intel_connector
= &intel_sdvo_connector
->base
;
2478 connector
= &intel_connector
->base
;
2479 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
2480 encoder
->encoder_type
= DRM_MODE_ENCODER_DAC
;
2481 connector
->connector_type
= DRM_MODE_CONNECTOR_VGA
;
2484 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_RGB0
;
2485 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_RGB0
;
2486 } else if (device
== 1) {
2487 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_RGB1
;
2488 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_RGB1
;
2491 intel_sdvo_connector_init(intel_sdvo_connector
,
2497 intel_sdvo_lvds_init(struct intel_sdvo
*intel_sdvo
, int device
)
2499 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2500 struct drm_connector
*connector
;
2501 struct intel_connector
*intel_connector
;
2502 struct intel_sdvo_connector
*intel_sdvo_connector
;
2504 intel_sdvo_connector
= kzalloc(sizeof(struct intel_sdvo_connector
), GFP_KERNEL
);
2505 if (!intel_sdvo_connector
)
2508 intel_connector
= &intel_sdvo_connector
->base
;
2509 connector
= &intel_connector
->base
;
2510 encoder
->encoder_type
= DRM_MODE_ENCODER_LVDS
;
2511 connector
->connector_type
= DRM_MODE_CONNECTOR_LVDS
;
2514 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_LVDS0
;
2515 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_LVDS0
;
2516 } else if (device
== 1) {
2517 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_LVDS1
;
2518 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_LVDS1
;
2521 intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
);
2522 if (!intel_sdvo_create_enhance_property(intel_sdvo
, intel_sdvo_connector
))
2528 intel_sdvo_destroy(connector
);
2533 intel_sdvo_output_setup(struct intel_sdvo
*intel_sdvo
, uint16_t flags
)
2535 intel_sdvo
->is_tv
= false;
2536 intel_sdvo
->is_lvds
= false;
2538 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2540 if (flags
& SDVO_OUTPUT_TMDS0
)
2541 if (!intel_sdvo_dvi_init(intel_sdvo
, 0))
2544 if ((flags
& SDVO_TMDS_MASK
) == SDVO_TMDS_MASK
)
2545 if (!intel_sdvo_dvi_init(intel_sdvo
, 1))
2548 /* TV has no XXX1 function block */
2549 if (flags
& SDVO_OUTPUT_SVID0
)
2550 if (!intel_sdvo_tv_init(intel_sdvo
, SDVO_OUTPUT_SVID0
))
2553 if (flags
& SDVO_OUTPUT_CVBS0
)
2554 if (!intel_sdvo_tv_init(intel_sdvo
, SDVO_OUTPUT_CVBS0
))
2557 if (flags
& SDVO_OUTPUT_YPRPB0
)
2558 if (!intel_sdvo_tv_init(intel_sdvo
, SDVO_OUTPUT_YPRPB0
))
2561 if (flags
& SDVO_OUTPUT_RGB0
)
2562 if (!intel_sdvo_analog_init(intel_sdvo
, 0))
2565 if ((flags
& SDVO_RGB_MASK
) == SDVO_RGB_MASK
)
2566 if (!intel_sdvo_analog_init(intel_sdvo
, 1))
2569 if (flags
& SDVO_OUTPUT_LVDS0
)
2570 if (!intel_sdvo_lvds_init(intel_sdvo
, 0))
2573 if ((flags
& SDVO_LVDS_MASK
) == SDVO_LVDS_MASK
)
2574 if (!intel_sdvo_lvds_init(intel_sdvo
, 1))
2577 if ((flags
& SDVO_OUTPUT_MASK
) == 0) {
2578 unsigned char bytes
[2];
2580 intel_sdvo
->controlled_output
= 0;
2581 memcpy(bytes
, &intel_sdvo
->caps
.output_flags
, 2);
2582 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2583 SDVO_NAME(intel_sdvo
),
2584 bytes
[0], bytes
[1]);
2587 intel_sdvo
->base
.crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
2592 static void intel_sdvo_output_cleanup(struct intel_sdvo
*intel_sdvo
)
2594 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2595 struct drm_connector
*connector
, *tmp
;
2597 list_for_each_entry_safe(connector
, tmp
,
2598 &dev
->mode_config
.connector_list
, head
) {
2599 if (intel_attached_encoder(connector
) == &intel_sdvo
->base
)
2600 intel_sdvo_destroy(connector
);
2604 static bool intel_sdvo_tv_create_property(struct intel_sdvo
*intel_sdvo
,
2605 struct intel_sdvo_connector
*intel_sdvo_connector
,
2608 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2609 struct intel_sdvo_tv_format format
;
2610 uint32_t format_map
, i
;
2612 if (!intel_sdvo_set_target_output(intel_sdvo
, type
))
2615 BUILD_BUG_ON(sizeof(format
) != 6);
2616 if (!intel_sdvo_get_value(intel_sdvo
,
2617 SDVO_CMD_GET_SUPPORTED_TV_FORMATS
,
2618 &format
, sizeof(format
)))
2621 memcpy(&format_map
, &format
, min(sizeof(format_map
), sizeof(format
)));
2623 if (format_map
== 0)
2626 intel_sdvo_connector
->format_supported_num
= 0;
2627 for (i
= 0 ; i
< TV_FORMAT_NUM
; i
++)
2628 if (format_map
& (1 << i
))
2629 intel_sdvo_connector
->tv_format_supported
[intel_sdvo_connector
->format_supported_num
++] = i
;
2632 intel_sdvo_connector
->tv_format
=
2633 drm_property_create(dev
, DRM_MODE_PROP_ENUM
,
2634 "mode", intel_sdvo_connector
->format_supported_num
);
2635 if (!intel_sdvo_connector
->tv_format
)
2638 for (i
= 0; i
< intel_sdvo_connector
->format_supported_num
; i
++)
2639 drm_property_add_enum(
2640 intel_sdvo_connector
->tv_format
, i
,
2641 i
, tv_format_names
[intel_sdvo_connector
->tv_format_supported
[i
]]);
2643 intel_sdvo
->tv_format_index
= intel_sdvo_connector
->tv_format_supported
[0];
2644 drm_object_attach_property(&intel_sdvo_connector
->base
.base
.base
,
2645 intel_sdvo_connector
->tv_format
, 0);
2650 #define ENHANCEMENT(name, NAME) do { \
2651 if (enhancements.name) { \
2652 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2653 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2655 intel_sdvo_connector->max_##name = data_value[0]; \
2656 intel_sdvo_connector->cur_##name = response; \
2657 intel_sdvo_connector->name = \
2658 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2659 if (!intel_sdvo_connector->name) return false; \
2660 drm_object_attach_property(&connector->base, \
2661 intel_sdvo_connector->name, \
2662 intel_sdvo_connector->cur_##name); \
2663 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2664 data_value[0], data_value[1], response); \
2669 intel_sdvo_create_enhance_property_tv(struct intel_sdvo
*intel_sdvo
,
2670 struct intel_sdvo_connector
*intel_sdvo_connector
,
2671 struct intel_sdvo_enhancements_reply enhancements
)
2673 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2674 struct drm_connector
*connector
= &intel_sdvo_connector
->base
.base
;
2675 uint16_t response
, data_value
[2];
2677 /* when horizontal overscan is supported, Add the left/right property */
2678 if (enhancements
.overscan_h
) {
2679 if (!intel_sdvo_get_value(intel_sdvo
,
2680 SDVO_CMD_GET_MAX_OVERSCAN_H
,
2684 if (!intel_sdvo_get_value(intel_sdvo
,
2685 SDVO_CMD_GET_OVERSCAN_H
,
2689 intel_sdvo_connector
->max_hscan
= data_value
[0];
2690 intel_sdvo_connector
->left_margin
= data_value
[0] - response
;
2691 intel_sdvo_connector
->right_margin
= intel_sdvo_connector
->left_margin
;
2692 intel_sdvo_connector
->left
=
2693 drm_property_create_range(dev
, 0, "left_margin", 0, data_value
[0]);
2694 if (!intel_sdvo_connector
->left
)
2697 drm_object_attach_property(&connector
->base
,
2698 intel_sdvo_connector
->left
,
2699 intel_sdvo_connector
->left_margin
);
2701 intel_sdvo_connector
->right
=
2702 drm_property_create_range(dev
, 0, "right_margin", 0, data_value
[0]);
2703 if (!intel_sdvo_connector
->right
)
2706 drm_object_attach_property(&connector
->base
,
2707 intel_sdvo_connector
->right
,
2708 intel_sdvo_connector
->right_margin
);
2709 DRM_DEBUG_KMS("h_overscan: max %d, "
2710 "default %d, current %d\n",
2711 data_value
[0], data_value
[1], response
);
2714 if (enhancements
.overscan_v
) {
2715 if (!intel_sdvo_get_value(intel_sdvo
,
2716 SDVO_CMD_GET_MAX_OVERSCAN_V
,
2720 if (!intel_sdvo_get_value(intel_sdvo
,
2721 SDVO_CMD_GET_OVERSCAN_V
,
2725 intel_sdvo_connector
->max_vscan
= data_value
[0];
2726 intel_sdvo_connector
->top_margin
= data_value
[0] - response
;
2727 intel_sdvo_connector
->bottom_margin
= intel_sdvo_connector
->top_margin
;
2728 intel_sdvo_connector
->top
=
2729 drm_property_create_range(dev
, 0,
2730 "top_margin", 0, data_value
[0]);
2731 if (!intel_sdvo_connector
->top
)
2734 drm_object_attach_property(&connector
->base
,
2735 intel_sdvo_connector
->top
,
2736 intel_sdvo_connector
->top_margin
);
2738 intel_sdvo_connector
->bottom
=
2739 drm_property_create_range(dev
, 0,
2740 "bottom_margin", 0, data_value
[0]);
2741 if (!intel_sdvo_connector
->bottom
)
2744 drm_object_attach_property(&connector
->base
,
2745 intel_sdvo_connector
->bottom
,
2746 intel_sdvo_connector
->bottom_margin
);
2747 DRM_DEBUG_KMS("v_overscan: max %d, "
2748 "default %d, current %d\n",
2749 data_value
[0], data_value
[1], response
);
2752 ENHANCEMENT(hpos
, HPOS
);
2753 ENHANCEMENT(vpos
, VPOS
);
2754 ENHANCEMENT(saturation
, SATURATION
);
2755 ENHANCEMENT(contrast
, CONTRAST
);
2756 ENHANCEMENT(hue
, HUE
);
2757 ENHANCEMENT(sharpness
, SHARPNESS
);
2758 ENHANCEMENT(brightness
, BRIGHTNESS
);
2759 ENHANCEMENT(flicker_filter
, FLICKER_FILTER
);
2760 ENHANCEMENT(flicker_filter_adaptive
, FLICKER_FILTER_ADAPTIVE
);
2761 ENHANCEMENT(flicker_filter_2d
, FLICKER_FILTER_2D
);
2762 ENHANCEMENT(tv_chroma_filter
, TV_CHROMA_FILTER
);
2763 ENHANCEMENT(tv_luma_filter
, TV_LUMA_FILTER
);
2765 if (enhancements
.dot_crawl
) {
2766 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_DOT_CRAWL
, &response
, 2))
2769 intel_sdvo_connector
->max_dot_crawl
= 1;
2770 intel_sdvo_connector
->cur_dot_crawl
= response
& 0x1;
2771 intel_sdvo_connector
->dot_crawl
=
2772 drm_property_create_range(dev
, 0, "dot_crawl", 0, 1);
2773 if (!intel_sdvo_connector
->dot_crawl
)
2776 drm_object_attach_property(&connector
->base
,
2777 intel_sdvo_connector
->dot_crawl
,
2778 intel_sdvo_connector
->cur_dot_crawl
);
2779 DRM_DEBUG_KMS("dot crawl: current %d\n", response
);
2786 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo
*intel_sdvo
,
2787 struct intel_sdvo_connector
*intel_sdvo_connector
,
2788 struct intel_sdvo_enhancements_reply enhancements
)
2790 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2791 struct drm_connector
*connector
= &intel_sdvo_connector
->base
.base
;
2792 uint16_t response
, data_value
[2];
2794 ENHANCEMENT(brightness
, BRIGHTNESS
);
2800 static bool intel_sdvo_create_enhance_property(struct intel_sdvo
*intel_sdvo
,
2801 struct intel_sdvo_connector
*intel_sdvo_connector
)
2804 struct intel_sdvo_enhancements_reply reply
;
2808 BUILD_BUG_ON(sizeof(enhancements
) != 2);
2810 enhancements
.response
= 0;
2811 intel_sdvo_get_value(intel_sdvo
,
2812 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS
,
2813 &enhancements
, sizeof(enhancements
));
2814 if (enhancements
.response
== 0) {
2815 DRM_DEBUG_KMS("No enhancement is supported\n");
2819 if (IS_TV(intel_sdvo_connector
))
2820 return intel_sdvo_create_enhance_property_tv(intel_sdvo
, intel_sdvo_connector
, enhancements
.reply
);
2821 else if (IS_LVDS(intel_sdvo_connector
))
2822 return intel_sdvo_create_enhance_property_lvds(intel_sdvo
, intel_sdvo_connector
, enhancements
.reply
);
2827 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter
*adapter
,
2828 struct i2c_msg
*msgs
,
2831 struct intel_sdvo
*sdvo
= adapter
->algo_data
;
2833 if (!intel_sdvo_set_control_bus_switch(sdvo
, sdvo
->ddc_bus
))
2836 return sdvo
->i2c
->algo
->master_xfer(sdvo
->i2c
, msgs
, num
);
2839 static u32
intel_sdvo_ddc_proxy_func(struct i2c_adapter
*adapter
)
2841 struct intel_sdvo
*sdvo
= adapter
->algo_data
;
2842 return sdvo
->i2c
->algo
->functionality(sdvo
->i2c
);
2845 static const struct i2c_algorithm intel_sdvo_ddc_proxy
= {
2846 .master_xfer
= intel_sdvo_ddc_proxy_xfer
,
2847 .functionality
= intel_sdvo_ddc_proxy_func
2851 intel_sdvo_init_ddc_proxy(struct intel_sdvo
*sdvo
,
2852 struct drm_device
*dev
)
2854 sdvo
->ddc
.owner
= THIS_MODULE
;
2855 sdvo
->ddc
.class = I2C_CLASS_DDC
;
2856 snprintf(sdvo
->ddc
.name
, I2C_NAME_SIZE
, "SDVO DDC proxy");
2857 sdvo
->ddc
.dev
.parent
= &dev
->pdev
->dev
;
2858 sdvo
->ddc
.algo_data
= sdvo
;
2859 sdvo
->ddc
.algo
= &intel_sdvo_ddc_proxy
;
2861 return i2c_add_adapter(&sdvo
->ddc
) == 0;
2864 bool intel_sdvo_init(struct drm_device
*dev
, uint32_t sdvo_reg
, bool is_sdvob
)
2866 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2867 struct intel_encoder
*intel_encoder
;
2868 struct intel_sdvo
*intel_sdvo
;
2870 intel_sdvo
= kzalloc(sizeof(struct intel_sdvo
), GFP_KERNEL
);
2874 intel_sdvo
->sdvo_reg
= sdvo_reg
;
2875 intel_sdvo
->is_sdvob
= is_sdvob
;
2876 intel_sdvo
->slave_addr
= intel_sdvo_get_slave_addr(dev
, intel_sdvo
) >> 1;
2877 intel_sdvo_select_i2c_bus(dev_priv
, intel_sdvo
, sdvo_reg
);
2878 if (!intel_sdvo_init_ddc_proxy(intel_sdvo
, dev
))
2881 /* encoder type will be decided later */
2882 intel_encoder
= &intel_sdvo
->base
;
2883 intel_encoder
->type
= INTEL_OUTPUT_SDVO
;
2884 drm_encoder_init(dev
, &intel_encoder
->base
, &intel_sdvo_enc_funcs
, 0);
2886 /* Read the regs to test if we can talk to the device */
2887 for (i
= 0; i
< 0x40; i
++) {
2890 if (!intel_sdvo_read_byte(intel_sdvo
, i
, &byte
)) {
2891 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2892 SDVO_NAME(intel_sdvo
));
2897 intel_encoder
->compute_config
= intel_sdvo_compute_config
;
2898 intel_encoder
->disable
= intel_disable_sdvo
;
2899 intel_encoder
->mode_set
= intel_sdvo_mode_set
;
2900 intel_encoder
->enable
= intel_enable_sdvo
;
2901 intel_encoder
->get_hw_state
= intel_sdvo_get_hw_state
;
2902 intel_encoder
->get_config
= intel_sdvo_get_config
;
2904 /* In default case sdvo lvds is false */
2905 if (!intel_sdvo_get_capabilities(intel_sdvo
, &intel_sdvo
->caps
))
2908 if (intel_sdvo_output_setup(intel_sdvo
,
2909 intel_sdvo
->caps
.output_flags
) != true) {
2910 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2911 SDVO_NAME(intel_sdvo
));
2912 /* Output_setup can leave behind connectors! */
2916 /* Only enable the hotplug irq if we need it, to work around noisy
2919 if (intel_sdvo
->hotplug_active
) {
2920 intel_encoder
->hpd_pin
=
2921 intel_sdvo
->is_sdvob
? HPD_SDVO_B
: HPD_SDVO_C
;
2925 * Cloning SDVO with anything is often impossible, since the SDVO
2926 * encoder can request a special input timing mode. And even if that's
2927 * not the case we have evidence that cloning a plain unscaled mode with
2928 * VGA doesn't really work. Furthermore the cloning flags are way too
2929 * simplistic anyway to express such constraints, so just give up on
2930 * cloning for SDVO encoders.
2932 intel_sdvo
->base
.cloneable
= false;
2934 intel_sdvo_select_ddc_bus(dev_priv
, intel_sdvo
, sdvo_reg
);
2936 /* Set the input timing to the screen. Assume always input 0. */
2937 if (!intel_sdvo_set_target_input(intel_sdvo
))
2940 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo
,
2941 &intel_sdvo
->pixel_clock_min
,
2942 &intel_sdvo
->pixel_clock_max
))
2945 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2946 "clock range %dMHz - %dMHz, "
2947 "input 1: %c, input 2: %c, "
2948 "output 1: %c, output 2: %c\n",
2949 SDVO_NAME(intel_sdvo
),
2950 intel_sdvo
->caps
.vendor_id
, intel_sdvo
->caps
.device_id
,
2951 intel_sdvo
->caps
.device_rev_id
,
2952 intel_sdvo
->pixel_clock_min
/ 1000,
2953 intel_sdvo
->pixel_clock_max
/ 1000,
2954 (intel_sdvo
->caps
.sdvo_inputs_mask
& 0x1) ? 'Y' : 'N',
2955 (intel_sdvo
->caps
.sdvo_inputs_mask
& 0x2) ? 'Y' : 'N',
2956 /* check currently supported outputs */
2957 intel_sdvo
->caps
.output_flags
&
2958 (SDVO_OUTPUT_TMDS0
| SDVO_OUTPUT_RGB0
) ? 'Y' : 'N',
2959 intel_sdvo
->caps
.output_flags
&
2960 (SDVO_OUTPUT_TMDS1
| SDVO_OUTPUT_RGB1
) ? 'Y' : 'N');
2964 intel_sdvo_output_cleanup(intel_sdvo
);
2967 drm_encoder_cleanup(&intel_encoder
->base
);
2968 i2c_del_adapter(&intel_sdvo
->ddc
);
2970 intel_sdvo_unselect_i2c_bus(intel_sdvo
);