2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include "intel_drv.h"
36 #include <drm/i915_drm.h>
38 #include "intel_sdvo_regs.h"
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
50 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
52 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
55 static const char *tv_format_names
[] = {
56 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
65 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
68 struct intel_encoder base
;
70 struct i2c_adapter
*i2c
;
73 struct i2c_adapter ddc
;
75 /* Register for the SDVO device: SDVOB or SDVOC */
78 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output
;
82 * Capabilities of the SDVO device returned by
83 * intel_sdvo_get_capabilities()
85 struct intel_sdvo_caps caps
;
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
88 int pixel_clock_min
, pixel_clock_max
;
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
94 uint16_t attached_output
;
97 * Hotplug activation bits for this device
99 uint16_t hotplug_active
;
102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
105 uint32_t color_range
;
106 bool color_range_auto
;
109 * This is set if we're going to treat the device as TV-out.
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
117 /* On different gens SDVOB is at different places. */
120 /* This is for current tv format name */
124 * This is set if we treat the device as HDMI, instead of DVI.
127 bool has_hdmi_monitor
;
129 bool rgb_quant_range_selectable
;
132 * This is set if we detect output of sdvo device as LVDS and
133 * have a valid fixed mode to use with the panel.
138 * This is sdvo fixed pannel mode pointer
140 struct drm_display_mode
*sdvo_lvds_fixed_mode
;
142 /* DDC bus used by this SDVO encoder */
146 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
148 uint8_t dtd_sdvo_flags
;
151 struct intel_sdvo_connector
{
152 struct intel_connector base
;
154 /* Mark the type of connector */
155 uint16_t output_flag
;
157 enum hdmi_force_audio force_audio
;
159 /* This contains all current supported TV format */
160 u8 tv_format_supported
[TV_FORMAT_NUM
];
161 int format_supported_num
;
162 struct drm_property
*tv_format
;
164 /* add the property for the SDVO-TV */
165 struct drm_property
*left
;
166 struct drm_property
*right
;
167 struct drm_property
*top
;
168 struct drm_property
*bottom
;
169 struct drm_property
*hpos
;
170 struct drm_property
*vpos
;
171 struct drm_property
*contrast
;
172 struct drm_property
*saturation
;
173 struct drm_property
*hue
;
174 struct drm_property
*sharpness
;
175 struct drm_property
*flicker_filter
;
176 struct drm_property
*flicker_filter_adaptive
;
177 struct drm_property
*flicker_filter_2d
;
178 struct drm_property
*tv_chroma_filter
;
179 struct drm_property
*tv_luma_filter
;
180 struct drm_property
*dot_crawl
;
182 /* add the property for the SDVO-TV/LVDS */
183 struct drm_property
*brightness
;
185 /* Add variable to record current setting for the above property */
186 u32 left_margin
, right_margin
, top_margin
, bottom_margin
;
188 /* this is to get the range of margin.*/
189 u32 max_hscan
, max_vscan
;
190 u32 max_hpos
, cur_hpos
;
191 u32 max_vpos
, cur_vpos
;
192 u32 cur_brightness
, max_brightness
;
193 u32 cur_contrast
, max_contrast
;
194 u32 cur_saturation
, max_saturation
;
195 u32 cur_hue
, max_hue
;
196 u32 cur_sharpness
, max_sharpness
;
197 u32 cur_flicker_filter
, max_flicker_filter
;
198 u32 cur_flicker_filter_adaptive
, max_flicker_filter_adaptive
;
199 u32 cur_flicker_filter_2d
, max_flicker_filter_2d
;
200 u32 cur_tv_chroma_filter
, max_tv_chroma_filter
;
201 u32 cur_tv_luma_filter
, max_tv_luma_filter
;
202 u32 cur_dot_crawl
, max_dot_crawl
;
205 static struct intel_sdvo
*to_sdvo(struct intel_encoder
*encoder
)
207 return container_of(encoder
, struct intel_sdvo
, base
);
210 static struct intel_sdvo
*intel_attached_sdvo(struct drm_connector
*connector
)
212 return to_sdvo(intel_attached_encoder(connector
));
215 static struct intel_sdvo_connector
*to_intel_sdvo_connector(struct drm_connector
*connector
)
217 return container_of(to_intel_connector(connector
), struct intel_sdvo_connector
, base
);
221 intel_sdvo_output_setup(struct intel_sdvo
*intel_sdvo
, uint16_t flags
);
223 intel_sdvo_tv_create_property(struct intel_sdvo
*intel_sdvo
,
224 struct intel_sdvo_connector
*intel_sdvo_connector
,
227 intel_sdvo_create_enhance_property(struct intel_sdvo
*intel_sdvo
,
228 struct intel_sdvo_connector
*intel_sdvo_connector
);
231 * Writes the SDVOB or SDVOC with the given value, but always writes both
232 * SDVOB and SDVOC to work around apparent hardware issues (according to
233 * comments in the BIOS).
235 static void intel_sdvo_write_sdvox(struct intel_sdvo
*intel_sdvo
, u32 val
)
237 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
238 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
239 u32 bval
= val
, cval
= val
;
242 if (intel_sdvo
->sdvo_reg
== PCH_SDVOB
) {
243 I915_WRITE(intel_sdvo
->sdvo_reg
, val
);
244 I915_READ(intel_sdvo
->sdvo_reg
);
248 if (intel_sdvo
->sdvo_reg
== GEN3_SDVOB
)
249 cval
= I915_READ(GEN3_SDVOC
);
251 bval
= I915_READ(GEN3_SDVOB
);
254 * Write the registers twice for luck. Sometimes,
255 * writing them only once doesn't appear to 'stick'.
256 * The BIOS does this too. Yay, magic
258 for (i
= 0; i
< 2; i
++)
260 I915_WRITE(GEN3_SDVOB
, bval
);
261 I915_READ(GEN3_SDVOB
);
262 I915_WRITE(GEN3_SDVOC
, cval
);
263 I915_READ(GEN3_SDVOC
);
267 static bool intel_sdvo_read_byte(struct intel_sdvo
*intel_sdvo
, u8 addr
, u8
*ch
)
269 struct i2c_msg msgs
[] = {
271 .addr
= intel_sdvo
->slave_addr
,
277 .addr
= intel_sdvo
->slave_addr
,
285 if ((ret
= i2c_transfer(intel_sdvo
->i2c
, msgs
, 2)) == 2)
288 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret
);
292 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
293 /** Mapping of command numbers to names, for debug output */
294 static const struct _sdvo_cmd_name
{
297 } sdvo_cmd_names
[] = {
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET
),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS
),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV
),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS
),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS
),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS
),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP
),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP
),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS
),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT
),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG
),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG
),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE
),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT
),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT
),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1
),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2
),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2
),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2
),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1
),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2
),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE
),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS
),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT
),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT
),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS
),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT
),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT
),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES
),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE
),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE
),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE
),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH
),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT
),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS
),
342 /* Add the op code for SDVO enhancements */
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS
),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS
),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS
),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS
),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS
),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS
),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION
),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION
),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION
),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE
),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE
),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE
),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST
),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST
),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST
),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS
),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS
),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS
),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H
),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H
),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H
),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V
),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V
),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V
),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER
),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER
),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER
),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE
),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE
),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE
),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D
),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D
),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D
),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS
),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS
),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS
),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL
),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL
),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER
),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER
),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER
),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER
),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER
),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER
),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE
),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE
),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE
),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI
),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI
),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP
),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY
),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY
),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER
),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT
),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT
),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX
),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX
),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO
),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT
),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT
),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE
),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE
),
407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA
),
408 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA
),
411 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
413 static void intel_sdvo_debug_write(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
414 const void *args
, int args_len
)
418 DRM_DEBUG_KMS("%s: W: %02X ",
419 SDVO_NAME(intel_sdvo
), cmd
);
420 for (i
= 0; i
< args_len
; i
++)
421 DRM_LOG_KMS("%02X ", ((u8
*)args
)[i
]);
424 for (i
= 0; i
< ARRAY_SIZE(sdvo_cmd_names
); i
++) {
425 if (cmd
== sdvo_cmd_names
[i
].cmd
) {
426 DRM_LOG_KMS("(%s)", sdvo_cmd_names
[i
].name
);
430 if (i
== ARRAY_SIZE(sdvo_cmd_names
))
431 DRM_LOG_KMS("(%02X)", cmd
);
435 static const char *cmd_status_names
[] = {
441 "Target not specified",
442 "Scaling not supported"
445 static bool intel_sdvo_write_cmd(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
446 const void *args
, int args_len
)
449 struct i2c_msg
*msgs
;
452 /* Would be simpler to allocate both in one go ? */
453 buf
= kzalloc(args_len
* 2 + 2, GFP_KERNEL
);
457 msgs
= kcalloc(args_len
+ 3, sizeof(*msgs
), GFP_KERNEL
);
463 intel_sdvo_debug_write(intel_sdvo
, cmd
, args
, args_len
);
465 for (i
= 0; i
< args_len
; i
++) {
466 msgs
[i
].addr
= intel_sdvo
->slave_addr
;
469 msgs
[i
].buf
= buf
+ 2 *i
;
470 buf
[2*i
+ 0] = SDVO_I2C_ARG_0
- i
;
471 buf
[2*i
+ 1] = ((u8
*)args
)[i
];
473 msgs
[i
].addr
= intel_sdvo
->slave_addr
;
476 msgs
[i
].buf
= buf
+ 2*i
;
477 buf
[2*i
+ 0] = SDVO_I2C_OPCODE
;
480 /* the following two are to read the response */
481 status
= SDVO_I2C_CMD_STATUS
;
482 msgs
[i
+1].addr
= intel_sdvo
->slave_addr
;
485 msgs
[i
+1].buf
= &status
;
487 msgs
[i
+2].addr
= intel_sdvo
->slave_addr
;
488 msgs
[i
+2].flags
= I2C_M_RD
;
490 msgs
[i
+2].buf
= &status
;
492 ret
= i2c_transfer(intel_sdvo
->i2c
, msgs
, i
+3);
494 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret
);
499 /* failure in I2C transfer */
500 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret
, i
+3);
510 static bool intel_sdvo_read_response(struct intel_sdvo
*intel_sdvo
,
511 void *response
, int response_len
)
513 u8 retry
= 15; /* 5 quick checks, followed by 10 long checks */
517 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo
));
520 * The documentation states that all commands will be
521 * processed within 15µs, and that we need only poll
522 * the status byte a maximum of 3 times in order for the
523 * command to be complete.
525 * Check 5 times in case the hardware failed to read the docs.
527 * Also beware that the first response by many devices is to
528 * reply PENDING and stall for time. TVs are notorious for
529 * requiring longer than specified to complete their replies.
530 * Originally (in the DDX long ago), the delay was only ever 15ms
531 * with an additional delay of 30ms applied for TVs added later after
532 * many experiments. To accommodate both sets of delays, we do a
533 * sequence of slow checks if the device is falling behind and fails
534 * to reply within 5*15µs.
536 if (!intel_sdvo_read_byte(intel_sdvo
,
541 while ((status
== SDVO_CMD_STATUS_PENDING
||
542 status
== SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED
) && --retry
) {
548 if (!intel_sdvo_read_byte(intel_sdvo
,
554 if (status
<= SDVO_CMD_STATUS_SCALING_NOT_SUPP
)
555 DRM_LOG_KMS("(%s)", cmd_status_names
[status
]);
557 DRM_LOG_KMS("(??? %d)", status
);
559 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
562 /* Read the command response */
563 for (i
= 0; i
< response_len
; i
++) {
564 if (!intel_sdvo_read_byte(intel_sdvo
,
565 SDVO_I2C_RETURN_0
+ i
,
566 &((u8
*)response
)[i
]))
568 DRM_LOG_KMS(" %02X", ((u8
*)response
)[i
]);
574 DRM_LOG_KMS("... failed\n");
578 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode
*mode
)
580 if (mode
->clock
>= 100000)
582 else if (mode
->clock
>= 50000)
588 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo
*intel_sdvo
,
591 /* This must be the immediately preceding write before the i2c xfer */
592 return intel_sdvo_write_cmd(intel_sdvo
,
593 SDVO_CMD_SET_CONTROL_BUS_SWITCH
,
597 static bool intel_sdvo_set_value(struct intel_sdvo
*intel_sdvo
, u8 cmd
, const void *data
, int len
)
599 if (!intel_sdvo_write_cmd(intel_sdvo
, cmd
, data
, len
))
602 return intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
606 intel_sdvo_get_value(struct intel_sdvo
*intel_sdvo
, u8 cmd
, void *value
, int len
)
608 if (!intel_sdvo_write_cmd(intel_sdvo
, cmd
, NULL
, 0))
611 return intel_sdvo_read_response(intel_sdvo
, value
, len
);
614 static bool intel_sdvo_set_target_input(struct intel_sdvo
*intel_sdvo
)
616 struct intel_sdvo_set_target_input_args targets
= {0};
617 return intel_sdvo_set_value(intel_sdvo
,
618 SDVO_CMD_SET_TARGET_INPUT
,
619 &targets
, sizeof(targets
));
623 * Return whether each input is trained.
625 * This function is making an assumption about the layout of the response,
626 * which should be checked against the docs.
628 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo
*intel_sdvo
, bool *input_1
, bool *input_2
)
630 struct intel_sdvo_get_trained_inputs_response response
;
632 BUILD_BUG_ON(sizeof(response
) != 1);
633 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_TRAINED_INPUTS
,
634 &response
, sizeof(response
)))
637 *input_1
= response
.input0_trained
;
638 *input_2
= response
.input1_trained
;
642 static bool intel_sdvo_set_active_outputs(struct intel_sdvo
*intel_sdvo
,
645 return intel_sdvo_set_value(intel_sdvo
,
646 SDVO_CMD_SET_ACTIVE_OUTPUTS
,
647 &outputs
, sizeof(outputs
));
650 static bool intel_sdvo_get_active_outputs(struct intel_sdvo
*intel_sdvo
,
653 return intel_sdvo_get_value(intel_sdvo
,
654 SDVO_CMD_GET_ACTIVE_OUTPUTS
,
655 outputs
, sizeof(*outputs
));
658 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo
*intel_sdvo
,
661 u8 state
= SDVO_ENCODER_STATE_ON
;
664 case DRM_MODE_DPMS_ON
:
665 state
= SDVO_ENCODER_STATE_ON
;
667 case DRM_MODE_DPMS_STANDBY
:
668 state
= SDVO_ENCODER_STATE_STANDBY
;
670 case DRM_MODE_DPMS_SUSPEND
:
671 state
= SDVO_ENCODER_STATE_SUSPEND
;
673 case DRM_MODE_DPMS_OFF
:
674 state
= SDVO_ENCODER_STATE_OFF
;
678 return intel_sdvo_set_value(intel_sdvo
,
679 SDVO_CMD_SET_ENCODER_POWER_STATE
, &state
, sizeof(state
));
682 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo
*intel_sdvo
,
686 struct intel_sdvo_pixel_clock_range clocks
;
688 BUILD_BUG_ON(sizeof(clocks
) != 4);
689 if (!intel_sdvo_get_value(intel_sdvo
,
690 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
,
691 &clocks
, sizeof(clocks
)))
694 /* Convert the values from units of 10 kHz to kHz. */
695 *clock_min
= clocks
.min
* 10;
696 *clock_max
= clocks
.max
* 10;
700 static bool intel_sdvo_set_target_output(struct intel_sdvo
*intel_sdvo
,
703 return intel_sdvo_set_value(intel_sdvo
,
704 SDVO_CMD_SET_TARGET_OUTPUT
,
705 &outputs
, sizeof(outputs
));
708 static bool intel_sdvo_set_timing(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
709 struct intel_sdvo_dtd
*dtd
)
711 return intel_sdvo_set_value(intel_sdvo
, cmd
, &dtd
->part1
, sizeof(dtd
->part1
)) &&
712 intel_sdvo_set_value(intel_sdvo
, cmd
+ 1, &dtd
->part2
, sizeof(dtd
->part2
));
715 static bool intel_sdvo_get_timing(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
716 struct intel_sdvo_dtd
*dtd
)
718 return intel_sdvo_get_value(intel_sdvo
, cmd
, &dtd
->part1
, sizeof(dtd
->part1
)) &&
719 intel_sdvo_get_value(intel_sdvo
, cmd
+ 1, &dtd
->part2
, sizeof(dtd
->part2
));
722 static bool intel_sdvo_set_input_timing(struct intel_sdvo
*intel_sdvo
,
723 struct intel_sdvo_dtd
*dtd
)
725 return intel_sdvo_set_timing(intel_sdvo
,
726 SDVO_CMD_SET_INPUT_TIMINGS_PART1
, dtd
);
729 static bool intel_sdvo_set_output_timing(struct intel_sdvo
*intel_sdvo
,
730 struct intel_sdvo_dtd
*dtd
)
732 return intel_sdvo_set_timing(intel_sdvo
,
733 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
, dtd
);
736 static bool intel_sdvo_get_input_timing(struct intel_sdvo
*intel_sdvo
,
737 struct intel_sdvo_dtd
*dtd
)
739 return intel_sdvo_get_timing(intel_sdvo
,
740 SDVO_CMD_GET_INPUT_TIMINGS_PART1
, dtd
);
744 intel_sdvo_create_preferred_input_timing(struct intel_sdvo
*intel_sdvo
,
749 struct intel_sdvo_preferred_input_timing_args args
;
751 memset(&args
, 0, sizeof(args
));
754 args
.height
= height
;
757 if (intel_sdvo
->is_lvds
&&
758 (intel_sdvo
->sdvo_lvds_fixed_mode
->hdisplay
!= width
||
759 intel_sdvo
->sdvo_lvds_fixed_mode
->vdisplay
!= height
))
762 return intel_sdvo_set_value(intel_sdvo
,
763 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
,
764 &args
, sizeof(args
));
767 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo
*intel_sdvo
,
768 struct intel_sdvo_dtd
*dtd
)
770 BUILD_BUG_ON(sizeof(dtd
->part1
) != 8);
771 BUILD_BUG_ON(sizeof(dtd
->part2
) != 8);
772 return intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
,
773 &dtd
->part1
, sizeof(dtd
->part1
)) &&
774 intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
,
775 &dtd
->part2
, sizeof(dtd
->part2
));
778 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo
*intel_sdvo
, u8 val
)
780 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_CLOCK_RATE_MULT
, &val
, 1);
783 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd
*dtd
,
784 const struct drm_display_mode
*mode
)
786 uint16_t width
, height
;
787 uint16_t h_blank_len
, h_sync_len
, v_blank_len
, v_sync_len
;
788 uint16_t h_sync_offset
, v_sync_offset
;
791 memset(dtd
, 0, sizeof(*dtd
));
793 width
= mode
->hdisplay
;
794 height
= mode
->vdisplay
;
796 /* do some mode translations */
797 h_blank_len
= mode
->htotal
- mode
->hdisplay
;
798 h_sync_len
= mode
->hsync_end
- mode
->hsync_start
;
800 v_blank_len
= mode
->vtotal
- mode
->vdisplay
;
801 v_sync_len
= mode
->vsync_end
- mode
->vsync_start
;
803 h_sync_offset
= mode
->hsync_start
- mode
->hdisplay
;
804 v_sync_offset
= mode
->vsync_start
- mode
->vdisplay
;
806 mode_clock
= mode
->clock
;
808 dtd
->part1
.clock
= mode_clock
;
810 dtd
->part1
.h_active
= width
& 0xff;
811 dtd
->part1
.h_blank
= h_blank_len
& 0xff;
812 dtd
->part1
.h_high
= (((width
>> 8) & 0xf) << 4) |
813 ((h_blank_len
>> 8) & 0xf);
814 dtd
->part1
.v_active
= height
& 0xff;
815 dtd
->part1
.v_blank
= v_blank_len
& 0xff;
816 dtd
->part1
.v_high
= (((height
>> 8) & 0xf) << 4) |
817 ((v_blank_len
>> 8) & 0xf);
819 dtd
->part2
.h_sync_off
= h_sync_offset
& 0xff;
820 dtd
->part2
.h_sync_width
= h_sync_len
& 0xff;
821 dtd
->part2
.v_sync_off_width
= (v_sync_offset
& 0xf) << 4 |
823 dtd
->part2
.sync_off_width_high
= ((h_sync_offset
& 0x300) >> 2) |
824 ((h_sync_len
& 0x300) >> 4) | ((v_sync_offset
& 0x30) >> 2) |
825 ((v_sync_len
& 0x30) >> 4);
827 dtd
->part2
.dtd_flags
= 0x18;
828 if (mode
->flags
& DRM_MODE_FLAG_INTERLACE
)
829 dtd
->part2
.dtd_flags
|= DTD_FLAG_INTERLACE
;
830 if (mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
831 dtd
->part2
.dtd_flags
|= DTD_FLAG_HSYNC_POSITIVE
;
832 if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
833 dtd
->part2
.dtd_flags
|= DTD_FLAG_VSYNC_POSITIVE
;
835 dtd
->part2
.v_sync_off_high
= v_sync_offset
& 0xc0;
838 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode
*pmode
,
839 const struct intel_sdvo_dtd
*dtd
)
841 struct drm_display_mode mode
= {};
843 mode
.hdisplay
= dtd
->part1
.h_active
;
844 mode
.hdisplay
+= ((dtd
->part1
.h_high
>> 4) & 0x0f) << 8;
845 mode
.hsync_start
= mode
.hdisplay
+ dtd
->part2
.h_sync_off
;
846 mode
.hsync_start
+= (dtd
->part2
.sync_off_width_high
& 0xc0) << 2;
847 mode
.hsync_end
= mode
.hsync_start
+ dtd
->part2
.h_sync_width
;
848 mode
.hsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x30) << 4;
849 mode
.htotal
= mode
.hdisplay
+ dtd
->part1
.h_blank
;
850 mode
.htotal
+= (dtd
->part1
.h_high
& 0xf) << 8;
852 mode
.vdisplay
= dtd
->part1
.v_active
;
853 mode
.vdisplay
+= ((dtd
->part1
.v_high
>> 4) & 0x0f) << 8;
854 mode
.vsync_start
= mode
.vdisplay
;
855 mode
.vsync_start
+= (dtd
->part2
.v_sync_off_width
>> 4) & 0xf;
856 mode
.vsync_start
+= (dtd
->part2
.sync_off_width_high
& 0x0c) << 2;
857 mode
.vsync_start
+= dtd
->part2
.v_sync_off_high
& 0xc0;
858 mode
.vsync_end
= mode
.vsync_start
+
859 (dtd
->part2
.v_sync_off_width
& 0xf);
860 mode
.vsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x3) << 4;
861 mode
.vtotal
= mode
.vdisplay
+ dtd
->part1
.v_blank
;
862 mode
.vtotal
+= (dtd
->part1
.v_high
& 0xf) << 8;
864 mode
.clock
= dtd
->part1
.clock
* 10;
866 if (dtd
->part2
.dtd_flags
& DTD_FLAG_INTERLACE
)
867 mode
.flags
|= DRM_MODE_FLAG_INTERLACE
;
868 if (dtd
->part2
.dtd_flags
& DTD_FLAG_HSYNC_POSITIVE
)
869 mode
.flags
|= DRM_MODE_FLAG_PHSYNC
;
871 mode
.flags
|= DRM_MODE_FLAG_NHSYNC
;
872 if (dtd
->part2
.dtd_flags
& DTD_FLAG_VSYNC_POSITIVE
)
873 mode
.flags
|= DRM_MODE_FLAG_PVSYNC
;
875 mode
.flags
|= DRM_MODE_FLAG_NVSYNC
;
877 drm_mode_set_crtcinfo(&mode
, 0);
879 drm_mode_copy(pmode
, &mode
);
882 static bool intel_sdvo_check_supp_encode(struct intel_sdvo
*intel_sdvo
)
884 struct intel_sdvo_encode encode
;
886 BUILD_BUG_ON(sizeof(encode
) != 2);
887 return intel_sdvo_get_value(intel_sdvo
,
888 SDVO_CMD_GET_SUPP_ENCODE
,
889 &encode
, sizeof(encode
));
892 static bool intel_sdvo_set_encode(struct intel_sdvo
*intel_sdvo
,
895 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_ENCODE
, &mode
, 1);
898 static bool intel_sdvo_set_colorimetry(struct intel_sdvo
*intel_sdvo
,
901 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_COLORIMETRY
, &mode
, 1);
905 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo
*intel_sdvo
)
908 uint8_t set_buf_index
[2];
914 intel_sdvo_get_value(encoder
, SDVO_CMD_GET_HBUF_AV_SPLIT
, &av_split
, 1);
916 for (i
= 0; i
<= av_split
; i
++) {
917 set_buf_index
[0] = i
; set_buf_index
[1] = 0;
918 intel_sdvo_write_cmd(encoder
, SDVO_CMD_SET_HBUF_INDEX
,
920 intel_sdvo_write_cmd(encoder
, SDVO_CMD_GET_HBUF_INFO
, NULL
, 0);
921 intel_sdvo_read_response(encoder
, &buf_size
, 1);
924 for (j
= 0; j
<= buf_size
; j
+= 8) {
925 intel_sdvo_write_cmd(encoder
, SDVO_CMD_GET_HBUF_DATA
,
927 intel_sdvo_read_response(encoder
, pos
, 8);
934 static bool intel_sdvo_write_infoframe(struct intel_sdvo
*intel_sdvo
,
935 unsigned if_index
, uint8_t tx_rate
,
936 uint8_t *data
, unsigned length
)
938 uint8_t set_buf_index
[2] = { if_index
, 0 };
939 uint8_t hbuf_size
, tmp
[8];
942 if (!intel_sdvo_set_value(intel_sdvo
,
943 SDVO_CMD_SET_HBUF_INDEX
,
947 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_HBUF_INFO
,
951 /* Buffer size is 0 based, hooray! */
954 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
955 if_index
, length
, hbuf_size
);
957 for (i
= 0; i
< hbuf_size
; i
+= 8) {
960 memcpy(tmp
, data
+ i
, min_t(unsigned, 8, length
- i
));
962 if (!intel_sdvo_set_value(intel_sdvo
,
963 SDVO_CMD_SET_HBUF_DATA
,
968 return intel_sdvo_set_value(intel_sdvo
,
969 SDVO_CMD_SET_HBUF_TXRATE
,
973 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo
*intel_sdvo
,
974 const struct drm_display_mode
*adjusted_mode
)
976 uint8_t sdvo_data
[HDMI_INFOFRAME_SIZE(AVI
)];
977 struct drm_crtc
*crtc
= intel_sdvo
->base
.base
.crtc
;
978 struct intel_crtc
*intel_crtc
= to_intel_crtc(crtc
);
979 union hdmi_infoframe frame
;
983 ret
= drm_hdmi_avi_infoframe_from_display_mode(&frame
.avi
,
986 DRM_ERROR("couldn't fill AVI infoframe\n");
990 if (intel_sdvo
->rgb_quant_range_selectable
) {
991 if (intel_crtc
->config
.limited_color_range
)
992 frame
.avi
.quantization_range
=
993 HDMI_QUANTIZATION_RANGE_LIMITED
;
995 frame
.avi
.quantization_range
=
996 HDMI_QUANTIZATION_RANGE_FULL
;
999 len
= hdmi_infoframe_pack(&frame
, sdvo_data
, sizeof(sdvo_data
));
1003 return intel_sdvo_write_infoframe(intel_sdvo
, SDVO_HBUF_INDEX_AVI_IF
,
1005 sdvo_data
, sizeof(sdvo_data
));
1008 static bool intel_sdvo_set_tv_format(struct intel_sdvo
*intel_sdvo
)
1010 struct intel_sdvo_tv_format format
;
1011 uint32_t format_map
;
1013 format_map
= 1 << intel_sdvo
->tv_format_index
;
1014 memset(&format
, 0, sizeof(format
));
1015 memcpy(&format
, &format_map
, min(sizeof(format
), sizeof(format_map
)));
1017 BUILD_BUG_ON(sizeof(format
) != 6);
1018 return intel_sdvo_set_value(intel_sdvo
,
1019 SDVO_CMD_SET_TV_FORMAT
,
1020 &format
, sizeof(format
));
1024 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo
*intel_sdvo
,
1025 const struct drm_display_mode
*mode
)
1027 struct intel_sdvo_dtd output_dtd
;
1029 if (!intel_sdvo_set_target_output(intel_sdvo
,
1030 intel_sdvo
->attached_output
))
1033 intel_sdvo_get_dtd_from_mode(&output_dtd
, mode
);
1034 if (!intel_sdvo_set_output_timing(intel_sdvo
, &output_dtd
))
1040 /* Asks the sdvo controller for the preferred input mode given the output mode.
1041 * Unfortunately we have to set up the full output mode to do that. */
1043 intel_sdvo_get_preferred_input_mode(struct intel_sdvo
*intel_sdvo
,
1044 const struct drm_display_mode
*mode
,
1045 struct drm_display_mode
*adjusted_mode
)
1047 struct intel_sdvo_dtd input_dtd
;
1049 /* Reset the input timing to the screen. Assume always input 0. */
1050 if (!intel_sdvo_set_target_input(intel_sdvo
))
1053 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo
,
1059 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo
,
1063 intel_sdvo_get_mode_from_dtd(adjusted_mode
, &input_dtd
);
1064 intel_sdvo
->dtd_sdvo_flags
= input_dtd
.part2
.sdvo_flags
;
1069 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config
*pipe_config
)
1071 unsigned dotclock
= pipe_config
->port_clock
;
1072 struct dpll
*clock
= &pipe_config
->dpll
;
1074 /* SDVO TV has fixed PLL values depend on its clock range,
1075 this mirrors vbios setting. */
1076 if (dotclock
>= 100000 && dotclock
< 140500) {
1082 } else if (dotclock
>= 140500 && dotclock
<= 200000) {
1089 WARN(1, "SDVO TV clock out of range: %i\n", dotclock
);
1092 pipe_config
->clock_set
= true;
1095 static bool intel_sdvo_compute_config(struct intel_encoder
*encoder
,
1096 struct intel_crtc_config
*pipe_config
)
1098 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1099 struct drm_display_mode
*adjusted_mode
= &pipe_config
->adjusted_mode
;
1100 struct drm_display_mode
*mode
= &pipe_config
->requested_mode
;
1102 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1103 pipe_config
->pipe_bpp
= 8*3;
1105 if (HAS_PCH_SPLIT(encoder
->base
.dev
))
1106 pipe_config
->has_pch_encoder
= true;
1108 /* We need to construct preferred input timings based on our
1109 * output timings. To do that, we have to set the output
1110 * timings, even though this isn't really the right place in
1111 * the sequence to do it. Oh well.
1113 if (intel_sdvo
->is_tv
) {
1114 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo
, mode
))
1117 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo
,
1120 pipe_config
->sdvo_tv_clock
= true;
1121 } else if (intel_sdvo
->is_lvds
) {
1122 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo
,
1123 intel_sdvo
->sdvo_lvds_fixed_mode
))
1126 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo
,
1131 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1132 * SDVO device will factor out the multiplier during mode_set.
1134 pipe_config
->pixel_multiplier
=
1135 intel_sdvo_get_pixel_multiplier(adjusted_mode
);
1137 if (intel_sdvo
->color_range_auto
) {
1138 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1139 /* FIXME: This bit is only valid when using TMDS encoding and 8
1140 * bit per color mode. */
1141 if (intel_sdvo
->has_hdmi_monitor
&&
1142 drm_match_cea_mode(adjusted_mode
) > 1)
1143 intel_sdvo
->color_range
= HDMI_COLOR_RANGE_16_235
;
1145 intel_sdvo
->color_range
= 0;
1148 if (intel_sdvo
->color_range
)
1149 pipe_config
->limited_color_range
= true;
1151 /* Clock computation needs to happen after pixel multiplier. */
1152 if (intel_sdvo
->is_tv
)
1153 i9xx_adjust_sdvo_tv_clock(pipe_config
);
1158 static void intel_sdvo_mode_set(struct intel_encoder
*intel_encoder
)
1160 struct drm_device
*dev
= intel_encoder
->base
.dev
;
1161 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1162 struct intel_crtc
*crtc
= to_intel_crtc(intel_encoder
->base
.crtc
);
1163 struct drm_display_mode
*adjusted_mode
=
1164 &crtc
->config
.adjusted_mode
;
1165 struct drm_display_mode
*mode
= &crtc
->config
.requested_mode
;
1166 struct intel_sdvo
*intel_sdvo
= to_sdvo(intel_encoder
);
1168 struct intel_sdvo_in_out_map in_out
;
1169 struct intel_sdvo_dtd input_dtd
, output_dtd
;
1175 /* First, set the input mapping for the first input to our controlled
1176 * output. This is only correct if we're a single-input device, in
1177 * which case the first input is the output from the appropriate SDVO
1178 * channel on the motherboard. In a two-input device, the first input
1179 * will be SDVOB and the second SDVOC.
1181 in_out
.in0
= intel_sdvo
->attached_output
;
1184 intel_sdvo_set_value(intel_sdvo
,
1185 SDVO_CMD_SET_IN_OUT_MAP
,
1186 &in_out
, sizeof(in_out
));
1188 /* Set the output timings to the screen */
1189 if (!intel_sdvo_set_target_output(intel_sdvo
,
1190 intel_sdvo
->attached_output
))
1193 /* lvds has a special fixed output timing. */
1194 if (intel_sdvo
->is_lvds
)
1195 intel_sdvo_get_dtd_from_mode(&output_dtd
,
1196 intel_sdvo
->sdvo_lvds_fixed_mode
);
1198 intel_sdvo_get_dtd_from_mode(&output_dtd
, mode
);
1199 if (!intel_sdvo_set_output_timing(intel_sdvo
, &output_dtd
))
1200 DRM_INFO("Setting output timings on %s failed\n",
1201 SDVO_NAME(intel_sdvo
));
1203 /* Set the input timing to the screen. Assume always input 0. */
1204 if (!intel_sdvo_set_target_input(intel_sdvo
))
1207 if (intel_sdvo
->has_hdmi_monitor
) {
1208 intel_sdvo_set_encode(intel_sdvo
, SDVO_ENCODE_HDMI
);
1209 intel_sdvo_set_colorimetry(intel_sdvo
,
1210 SDVO_COLORIMETRY_RGB256
);
1211 intel_sdvo_set_avi_infoframe(intel_sdvo
, adjusted_mode
);
1213 intel_sdvo_set_encode(intel_sdvo
, SDVO_ENCODE_DVI
);
1215 if (intel_sdvo
->is_tv
&&
1216 !intel_sdvo_set_tv_format(intel_sdvo
))
1219 intel_sdvo_get_dtd_from_mode(&input_dtd
, adjusted_mode
);
1221 if (intel_sdvo
->is_tv
|| intel_sdvo
->is_lvds
)
1222 input_dtd
.part2
.sdvo_flags
= intel_sdvo
->dtd_sdvo_flags
;
1223 if (!intel_sdvo_set_input_timing(intel_sdvo
, &input_dtd
))
1224 DRM_INFO("Setting input timings on %s failed\n",
1225 SDVO_NAME(intel_sdvo
));
1227 switch (crtc
->config
.pixel_multiplier
) {
1229 WARN(1, "unknown pixel mutlipler specified\n");
1230 case 1: rate
= SDVO_CLOCK_RATE_MULT_1X
; break;
1231 case 2: rate
= SDVO_CLOCK_RATE_MULT_2X
; break;
1232 case 4: rate
= SDVO_CLOCK_RATE_MULT_4X
; break;
1234 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo
, rate
))
1237 /* Set the SDVO control regs. */
1238 if (INTEL_INFO(dev
)->gen
>= 4) {
1239 /* The real mode polarity is set by the SDVO commands, using
1240 * struct intel_sdvo_dtd. */
1241 sdvox
= SDVO_VSYNC_ACTIVE_HIGH
| SDVO_HSYNC_ACTIVE_HIGH
;
1242 if (!HAS_PCH_SPLIT(dev
) && intel_sdvo
->is_hdmi
)
1243 sdvox
|= intel_sdvo
->color_range
;
1244 if (INTEL_INFO(dev
)->gen
< 5)
1245 sdvox
|= SDVO_BORDER_ENABLE
;
1247 sdvox
= I915_READ(intel_sdvo
->sdvo_reg
);
1248 switch (intel_sdvo
->sdvo_reg
) {
1250 sdvox
&= SDVOB_PRESERVE_MASK
;
1253 sdvox
&= SDVOC_PRESERVE_MASK
;
1256 sdvox
|= (9 << 19) | SDVO_BORDER_ENABLE
;
1259 if (INTEL_PCH_TYPE(dev
) >= PCH_CPT
)
1260 sdvox
|= SDVO_PIPE_SEL_CPT(crtc
->pipe
);
1262 sdvox
|= SDVO_PIPE_SEL(crtc
->pipe
);
1264 if (intel_sdvo
->has_hdmi_audio
)
1265 sdvox
|= SDVO_AUDIO_ENABLE
;
1267 if (INTEL_INFO(dev
)->gen
>= 4) {
1268 /* done in crtc_mode_set as the dpll_md reg must be written early */
1269 } else if (IS_I945G(dev
) || IS_I945GM(dev
) || IS_G33(dev
)) {
1270 /* done in crtc_mode_set as it lives inside the dpll register */
1272 sdvox
|= (crtc
->config
.pixel_multiplier
- 1)
1273 << SDVO_PORT_MULTIPLY_SHIFT
;
1276 if (input_dtd
.part2
.sdvo_flags
& SDVO_NEED_TO_STALL
&&
1277 INTEL_INFO(dev
)->gen
< 5)
1278 sdvox
|= SDVO_STALL_SELECT
;
1279 intel_sdvo_write_sdvox(intel_sdvo
, sdvox
);
1282 static bool intel_sdvo_connector_get_hw_state(struct intel_connector
*connector
)
1284 struct intel_sdvo_connector
*intel_sdvo_connector
=
1285 to_intel_sdvo_connector(&connector
->base
);
1286 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(&connector
->base
);
1287 u16 active_outputs
= 0;
1289 intel_sdvo_get_active_outputs(intel_sdvo
, &active_outputs
);
1291 if (active_outputs
& intel_sdvo_connector
->output_flag
)
1297 static bool intel_sdvo_get_hw_state(struct intel_encoder
*encoder
,
1300 struct drm_device
*dev
= encoder
->base
.dev
;
1301 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1302 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1303 u16 active_outputs
= 0;
1306 tmp
= I915_READ(intel_sdvo
->sdvo_reg
);
1307 intel_sdvo_get_active_outputs(intel_sdvo
, &active_outputs
);
1309 if (!(tmp
& SDVO_ENABLE
) && (active_outputs
== 0))
1312 if (HAS_PCH_CPT(dev
))
1313 *pipe
= PORT_TO_PIPE_CPT(tmp
);
1315 *pipe
= PORT_TO_PIPE(tmp
);
1320 static void intel_sdvo_get_config(struct intel_encoder
*encoder
,
1321 struct intel_crtc_config
*pipe_config
)
1323 struct drm_device
*dev
= encoder
->base
.dev
;
1324 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1325 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1326 struct intel_sdvo_dtd dtd
;
1327 int encoder_pixel_multiplier
= 0;
1329 u32 flags
= 0, sdvox
;
1333 ret
= intel_sdvo_get_input_timing(intel_sdvo
, &dtd
);
1335 /* Some sdvo encoders are not spec compliant and don't
1336 * implement the mandatory get_timings function. */
1337 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1338 pipe_config
->quirks
|= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS
;
1340 if (dtd
.part2
.dtd_flags
& DTD_FLAG_HSYNC_POSITIVE
)
1341 flags
|= DRM_MODE_FLAG_PHSYNC
;
1343 flags
|= DRM_MODE_FLAG_NHSYNC
;
1345 if (dtd
.part2
.dtd_flags
& DTD_FLAG_VSYNC_POSITIVE
)
1346 flags
|= DRM_MODE_FLAG_PVSYNC
;
1348 flags
|= DRM_MODE_FLAG_NVSYNC
;
1351 pipe_config
->adjusted_mode
.flags
|= flags
;
1354 * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1355 * the sdvo port register, on all other platforms it is part of the dpll
1356 * state. Since the general pipe state readout happens before the
1357 * encoder->get_config we so already have a valid pixel multplier on all
1360 if (IS_I915G(dev
) || IS_I915GM(dev
)) {
1361 sdvox
= I915_READ(intel_sdvo
->sdvo_reg
);
1362 pipe_config
->pixel_multiplier
=
1363 ((sdvox
& SDVO_PORT_MULTIPLY_MASK
)
1364 >> SDVO_PORT_MULTIPLY_SHIFT
) + 1;
1367 dotclock
= pipe_config
->port_clock
/ pipe_config
->pixel_multiplier
;
1369 if (HAS_PCH_SPLIT(dev
))
1370 ironlake_check_encoder_dotclock(pipe_config
, dotclock
);
1372 pipe_config
->adjusted_mode
.clock
= dotclock
;
1374 /* Cross check the port pixel multiplier with the sdvo encoder state. */
1375 if (intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_CLOCK_RATE_MULT
,
1378 case SDVO_CLOCK_RATE_MULT_1X
:
1379 encoder_pixel_multiplier
= 1;
1381 case SDVO_CLOCK_RATE_MULT_2X
:
1382 encoder_pixel_multiplier
= 2;
1384 case SDVO_CLOCK_RATE_MULT_4X
:
1385 encoder_pixel_multiplier
= 4;
1390 WARN(encoder_pixel_multiplier
!= pipe_config
->pixel_multiplier
,
1391 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1392 pipe_config
->pixel_multiplier
, encoder_pixel_multiplier
);
1395 static void intel_disable_sdvo(struct intel_encoder
*encoder
)
1397 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
1398 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1401 intel_sdvo_set_active_outputs(intel_sdvo
, 0);
1403 intel_sdvo_set_encoder_power_state(intel_sdvo
,
1406 temp
= I915_READ(intel_sdvo
->sdvo_reg
);
1407 if ((temp
& SDVO_ENABLE
) != 0) {
1408 /* HW workaround for IBX, we need to move the port to
1409 * transcoder A before disabling it. */
1410 if (HAS_PCH_IBX(encoder
->base
.dev
)) {
1411 struct drm_crtc
*crtc
= encoder
->base
.crtc
;
1412 int pipe
= crtc
? to_intel_crtc(crtc
)->pipe
: -1;
1414 if (temp
& SDVO_PIPE_B_SELECT
) {
1415 temp
&= ~SDVO_PIPE_B_SELECT
;
1416 I915_WRITE(intel_sdvo
->sdvo_reg
, temp
);
1417 POSTING_READ(intel_sdvo
->sdvo_reg
);
1419 /* Again we need to write this twice. */
1420 I915_WRITE(intel_sdvo
->sdvo_reg
, temp
);
1421 POSTING_READ(intel_sdvo
->sdvo_reg
);
1423 /* Transcoder selection bits only update
1424 * effectively on vblank. */
1426 intel_wait_for_vblank(encoder
->base
.dev
, pipe
);
1432 intel_sdvo_write_sdvox(intel_sdvo
, temp
& ~SDVO_ENABLE
);
1436 static void intel_enable_sdvo(struct intel_encoder
*encoder
)
1438 struct drm_device
*dev
= encoder
->base
.dev
;
1439 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1440 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1441 struct intel_crtc
*intel_crtc
= to_intel_crtc(encoder
->base
.crtc
);
1443 bool input1
, input2
;
1447 temp
= I915_READ(intel_sdvo
->sdvo_reg
);
1448 if ((temp
& SDVO_ENABLE
) == 0) {
1449 /* HW workaround for IBX, we need to move the port
1450 * to transcoder A before disabling it, so restore it here. */
1451 if (HAS_PCH_IBX(dev
))
1452 temp
|= SDVO_PIPE_SEL(intel_crtc
->pipe
);
1454 intel_sdvo_write_sdvox(intel_sdvo
, temp
| SDVO_ENABLE
);
1456 for (i
= 0; i
< 2; i
++)
1457 intel_wait_for_vblank(dev
, intel_crtc
->pipe
);
1459 status
= intel_sdvo_get_trained_inputs(intel_sdvo
, &input1
, &input2
);
1460 /* Warn if the device reported failure to sync.
1461 * A lot of SDVO devices fail to notify of sync, but it's
1462 * a given it the status is a success, we succeeded.
1464 if (status
== SDVO_CMD_STATUS_SUCCESS
&& !input1
) {
1465 DRM_DEBUG_KMS("First %s output reported failure to "
1466 "sync\n", SDVO_NAME(intel_sdvo
));
1470 intel_sdvo_set_encoder_power_state(intel_sdvo
,
1472 intel_sdvo_set_active_outputs(intel_sdvo
, intel_sdvo
->attached_output
);
1475 /* Special dpms function to support cloning between dvo/sdvo/crt. */
1476 static void intel_sdvo_dpms(struct drm_connector
*connector
, int mode
)
1478 struct drm_crtc
*crtc
;
1479 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1481 /* dvo supports only 2 dpms states. */
1482 if (mode
!= DRM_MODE_DPMS_ON
)
1483 mode
= DRM_MODE_DPMS_OFF
;
1485 if (mode
== connector
->dpms
)
1488 connector
->dpms
= mode
;
1490 /* Only need to change hw state when actually enabled */
1491 crtc
= intel_sdvo
->base
.base
.crtc
;
1493 intel_sdvo
->base
.connectors_active
= false;
1497 /* We set active outputs manually below in case pipe dpms doesn't change
1498 * due to cloning. */
1499 if (mode
!= DRM_MODE_DPMS_ON
) {
1500 intel_sdvo_set_active_outputs(intel_sdvo
, 0);
1502 intel_sdvo_set_encoder_power_state(intel_sdvo
, mode
);
1504 intel_sdvo
->base
.connectors_active
= false;
1506 intel_crtc_update_dpms(crtc
);
1508 intel_sdvo
->base
.connectors_active
= true;
1510 intel_crtc_update_dpms(crtc
);
1513 intel_sdvo_set_encoder_power_state(intel_sdvo
, mode
);
1514 intel_sdvo_set_active_outputs(intel_sdvo
, intel_sdvo
->attached_output
);
1517 intel_modeset_check_state(connector
->dev
);
1520 static int intel_sdvo_mode_valid(struct drm_connector
*connector
,
1521 struct drm_display_mode
*mode
)
1523 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1525 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
1526 return MODE_NO_DBLESCAN
;
1528 if (intel_sdvo
->pixel_clock_min
> mode
->clock
)
1529 return MODE_CLOCK_LOW
;
1531 if (intel_sdvo
->pixel_clock_max
< mode
->clock
)
1532 return MODE_CLOCK_HIGH
;
1534 if (intel_sdvo
->is_lvds
) {
1535 if (mode
->hdisplay
> intel_sdvo
->sdvo_lvds_fixed_mode
->hdisplay
)
1538 if (mode
->vdisplay
> intel_sdvo
->sdvo_lvds_fixed_mode
->vdisplay
)
1545 static bool intel_sdvo_get_capabilities(struct intel_sdvo
*intel_sdvo
, struct intel_sdvo_caps
*caps
)
1547 BUILD_BUG_ON(sizeof(*caps
) != 8);
1548 if (!intel_sdvo_get_value(intel_sdvo
,
1549 SDVO_CMD_GET_DEVICE_CAPS
,
1550 caps
, sizeof(*caps
)))
1553 DRM_DEBUG_KMS("SDVO capabilities:\n"
1556 " device_rev_id: %d\n"
1557 " sdvo_version_major: %d\n"
1558 " sdvo_version_minor: %d\n"
1559 " sdvo_inputs_mask: %d\n"
1560 " smooth_scaling: %d\n"
1561 " sharp_scaling: %d\n"
1563 " down_scaling: %d\n"
1564 " stall_support: %d\n"
1565 " output_flags: %d\n",
1568 caps
->device_rev_id
,
1569 caps
->sdvo_version_major
,
1570 caps
->sdvo_version_minor
,
1571 caps
->sdvo_inputs_mask
,
1572 caps
->smooth_scaling
,
1573 caps
->sharp_scaling
,
1576 caps
->stall_support
,
1577 caps
->output_flags
);
1582 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo
*intel_sdvo
)
1584 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
1587 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1589 if (IS_I945G(dev
) || IS_I945GM(dev
))
1592 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_HOT_PLUG_SUPPORT
,
1593 &hotplug
, sizeof(hotplug
)))
1599 static void intel_sdvo_enable_hotplug(struct intel_encoder
*encoder
)
1601 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1603 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_ACTIVE_HOT_PLUG
,
1604 &intel_sdvo
->hotplug_active
, 2);
1608 intel_sdvo_multifunc_encoder(struct intel_sdvo
*intel_sdvo
)
1610 /* Is there more than one type of output? */
1611 return hweight16(intel_sdvo
->caps
.output_flags
) > 1;
1614 static struct edid
*
1615 intel_sdvo_get_edid(struct drm_connector
*connector
)
1617 struct intel_sdvo
*sdvo
= intel_attached_sdvo(connector
);
1618 return drm_get_edid(connector
, &sdvo
->ddc
);
1621 /* Mac mini hack -- use the same DDC as the analog connector */
1622 static struct edid
*
1623 intel_sdvo_get_analog_edid(struct drm_connector
*connector
)
1625 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
1627 return drm_get_edid(connector
,
1628 intel_gmbus_get_adapter(dev_priv
,
1629 dev_priv
->vbt
.crt_ddc_pin
));
1632 static enum drm_connector_status
1633 intel_sdvo_tmds_sink_detect(struct drm_connector
*connector
)
1635 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1636 enum drm_connector_status status
;
1639 edid
= intel_sdvo_get_edid(connector
);
1641 if (edid
== NULL
&& intel_sdvo_multifunc_encoder(intel_sdvo
)) {
1642 u8 ddc
, saved_ddc
= intel_sdvo
->ddc_bus
;
1645 * Don't use the 1 as the argument of DDC bus switch to get
1646 * the EDID. It is used for SDVO SPD ROM.
1648 for (ddc
= intel_sdvo
->ddc_bus
>> 1; ddc
> 1; ddc
>>= 1) {
1649 intel_sdvo
->ddc_bus
= ddc
;
1650 edid
= intel_sdvo_get_edid(connector
);
1655 * If we found the EDID on the other bus,
1656 * assume that is the correct DDC bus.
1659 intel_sdvo
->ddc_bus
= saved_ddc
;
1663 * When there is no edid and no monitor is connected with VGA
1664 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1667 edid
= intel_sdvo_get_analog_edid(connector
);
1669 status
= connector_status_unknown
;
1671 /* DDC bus is shared, match EDID to connector type */
1672 if (edid
->input
& DRM_EDID_INPUT_DIGITAL
) {
1673 status
= connector_status_connected
;
1674 if (intel_sdvo
->is_hdmi
) {
1675 intel_sdvo
->has_hdmi_monitor
= drm_detect_hdmi_monitor(edid
);
1676 intel_sdvo
->has_hdmi_audio
= drm_detect_monitor_audio(edid
);
1677 intel_sdvo
->rgb_quant_range_selectable
=
1678 drm_rgb_quant_range_selectable(edid
);
1681 status
= connector_status_disconnected
;
1685 if (status
== connector_status_connected
) {
1686 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1687 if (intel_sdvo_connector
->force_audio
!= HDMI_AUDIO_AUTO
)
1688 intel_sdvo
->has_hdmi_audio
= (intel_sdvo_connector
->force_audio
== HDMI_AUDIO_ON
);
1695 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector
*sdvo
,
1698 bool monitor_is_digital
= !!(edid
->input
& DRM_EDID_INPUT_DIGITAL
);
1699 bool connector_is_digital
= !!IS_DIGITAL(sdvo
);
1701 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1702 connector_is_digital
, monitor_is_digital
);
1703 return connector_is_digital
== monitor_is_digital
;
1706 static enum drm_connector_status
1707 intel_sdvo_detect(struct drm_connector
*connector
, bool force
)
1710 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1711 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1712 enum drm_connector_status ret
;
1714 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1715 connector
->base
.id
, drm_get_connector_name(connector
));
1717 if (!intel_sdvo_get_value(intel_sdvo
,
1718 SDVO_CMD_GET_ATTACHED_DISPLAYS
,
1720 return connector_status_unknown
;
1722 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1723 response
& 0xff, response
>> 8,
1724 intel_sdvo_connector
->output_flag
);
1727 return connector_status_disconnected
;
1729 intel_sdvo
->attached_output
= response
;
1731 intel_sdvo
->has_hdmi_monitor
= false;
1732 intel_sdvo
->has_hdmi_audio
= false;
1733 intel_sdvo
->rgb_quant_range_selectable
= false;
1735 if ((intel_sdvo_connector
->output_flag
& response
) == 0)
1736 ret
= connector_status_disconnected
;
1737 else if (IS_TMDS(intel_sdvo_connector
))
1738 ret
= intel_sdvo_tmds_sink_detect(connector
);
1742 /* if we have an edid check it matches the connection */
1743 edid
= intel_sdvo_get_edid(connector
);
1745 edid
= intel_sdvo_get_analog_edid(connector
);
1747 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector
,
1749 ret
= connector_status_connected
;
1751 ret
= connector_status_disconnected
;
1755 ret
= connector_status_connected
;
1758 /* May update encoder flag for like clock for SDVO TV, etc.*/
1759 if (ret
== connector_status_connected
) {
1760 intel_sdvo
->is_tv
= false;
1761 intel_sdvo
->is_lvds
= false;
1763 if (response
& SDVO_TV_MASK
)
1764 intel_sdvo
->is_tv
= true;
1765 if (response
& SDVO_LVDS_MASK
)
1766 intel_sdvo
->is_lvds
= intel_sdvo
->sdvo_lvds_fixed_mode
!= NULL
;
1772 static void intel_sdvo_get_ddc_modes(struct drm_connector
*connector
)
1776 /* set the bus switch and get the modes */
1777 edid
= intel_sdvo_get_edid(connector
);
1780 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1781 * link between analog and digital outputs. So, if the regular SDVO
1782 * DDC fails, check to see if the analog output is disconnected, in
1783 * which case we'll look there for the digital DDC data.
1786 edid
= intel_sdvo_get_analog_edid(connector
);
1789 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector
),
1791 drm_mode_connector_update_edid_property(connector
, edid
);
1792 drm_add_edid_modes(connector
, edid
);
1800 * Set of SDVO TV modes.
1801 * Note! This is in reply order (see loop in get_tv_modes).
1802 * XXX: all 60Hz refresh?
1804 static const struct drm_display_mode sdvo_tv_modes
[] = {
1805 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER
, 5815, 320, 321, 384,
1806 416, 0, 200, 201, 232, 233, 0,
1807 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1808 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER
, 6814, 320, 321, 384,
1809 416, 0, 240, 241, 272, 273, 0,
1810 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1811 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER
, 9910, 400, 401, 464,
1812 496, 0, 300, 301, 332, 333, 0,
1813 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1814 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER
, 16913, 640, 641, 704,
1815 736, 0, 350, 351, 382, 383, 0,
1816 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1817 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER
, 19121, 640, 641, 704,
1818 736, 0, 400, 401, 432, 433, 0,
1819 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1820 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 22654, 640, 641, 704,
1821 736, 0, 480, 481, 512, 513, 0,
1822 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1823 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER
, 24624, 704, 705, 768,
1824 800, 0, 480, 481, 512, 513, 0,
1825 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1826 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER
, 29232, 704, 705, 768,
1827 800, 0, 576, 577, 608, 609, 0,
1828 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1829 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER
, 18751, 720, 721, 784,
1830 816, 0, 350, 351, 382, 383, 0,
1831 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1832 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 21199, 720, 721, 784,
1833 816, 0, 400, 401, 432, 433, 0,
1834 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1835 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 25116, 720, 721, 784,
1836 816, 0, 480, 481, 512, 513, 0,
1837 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1838 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER
, 28054, 720, 721, 784,
1839 816, 0, 540, 541, 572, 573, 0,
1840 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1841 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 29816, 720, 721, 784,
1842 816, 0, 576, 577, 608, 609, 0,
1843 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1844 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER
, 31570, 768, 769, 832,
1845 864, 0, 576, 577, 608, 609, 0,
1846 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1847 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 34030, 800, 801, 864,
1848 896, 0, 600, 601, 632, 633, 0,
1849 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1850 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER
, 36581, 832, 833, 896,
1851 928, 0, 624, 625, 656, 657, 0,
1852 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1853 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER
, 48707, 920, 921, 984,
1854 1016, 0, 766, 767, 798, 799, 0,
1855 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1856 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 53827, 1024, 1025, 1088,
1857 1120, 0, 768, 769, 800, 801, 0,
1858 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1859 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 87265, 1280, 1281, 1344,
1860 1376, 0, 1024, 1025, 1056, 1057, 0,
1861 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1864 static void intel_sdvo_get_tv_modes(struct drm_connector
*connector
)
1866 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1867 struct intel_sdvo_sdtv_resolution_request tv_res
;
1868 uint32_t reply
= 0, format_map
= 0;
1871 /* Read the list of supported input resolutions for the selected TV
1874 format_map
= 1 << intel_sdvo
->tv_format_index
;
1875 memcpy(&tv_res
, &format_map
,
1876 min(sizeof(format_map
), sizeof(struct intel_sdvo_sdtv_resolution_request
)));
1878 if (!intel_sdvo_set_target_output(intel_sdvo
, intel_sdvo
->attached_output
))
1881 BUILD_BUG_ON(sizeof(tv_res
) != 3);
1882 if (!intel_sdvo_write_cmd(intel_sdvo
,
1883 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
,
1884 &tv_res
, sizeof(tv_res
)))
1886 if (!intel_sdvo_read_response(intel_sdvo
, &reply
, 3))
1889 for (i
= 0; i
< ARRAY_SIZE(sdvo_tv_modes
); i
++)
1890 if (reply
& (1 << i
)) {
1891 struct drm_display_mode
*nmode
;
1892 nmode
= drm_mode_duplicate(connector
->dev
,
1895 drm_mode_probed_add(connector
, nmode
);
1899 static void intel_sdvo_get_lvds_modes(struct drm_connector
*connector
)
1901 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1902 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
1903 struct drm_display_mode
*newmode
;
1906 * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1907 * SDVO->LVDS transcoders can't cope with the EDID mode.
1909 if (dev_priv
->vbt
.sdvo_lvds_vbt_mode
!= NULL
) {
1910 newmode
= drm_mode_duplicate(connector
->dev
,
1911 dev_priv
->vbt
.sdvo_lvds_vbt_mode
);
1912 if (newmode
!= NULL
) {
1913 /* Guarantee the mode is preferred */
1914 newmode
->type
= (DRM_MODE_TYPE_PREFERRED
|
1915 DRM_MODE_TYPE_DRIVER
);
1916 drm_mode_probed_add(connector
, newmode
);
1921 * Attempt to get the mode list from DDC.
1922 * Assume that the preferred modes are
1923 * arranged in priority order.
1925 intel_ddc_get_modes(connector
, &intel_sdvo
->ddc
);
1927 list_for_each_entry(newmode
, &connector
->probed_modes
, head
) {
1928 if (newmode
->type
& DRM_MODE_TYPE_PREFERRED
) {
1929 intel_sdvo
->sdvo_lvds_fixed_mode
=
1930 drm_mode_duplicate(connector
->dev
, newmode
);
1932 intel_sdvo
->is_lvds
= true;
1939 static int intel_sdvo_get_modes(struct drm_connector
*connector
)
1941 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1943 if (IS_TV(intel_sdvo_connector
))
1944 intel_sdvo_get_tv_modes(connector
);
1945 else if (IS_LVDS(intel_sdvo_connector
))
1946 intel_sdvo_get_lvds_modes(connector
);
1948 intel_sdvo_get_ddc_modes(connector
);
1950 return !list_empty(&connector
->probed_modes
);
1954 intel_sdvo_destroy_enhance_property(struct drm_connector
*connector
)
1956 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1957 struct drm_device
*dev
= connector
->dev
;
1959 if (intel_sdvo_connector
->left
)
1960 drm_property_destroy(dev
, intel_sdvo_connector
->left
);
1961 if (intel_sdvo_connector
->right
)
1962 drm_property_destroy(dev
, intel_sdvo_connector
->right
);
1963 if (intel_sdvo_connector
->top
)
1964 drm_property_destroy(dev
, intel_sdvo_connector
->top
);
1965 if (intel_sdvo_connector
->bottom
)
1966 drm_property_destroy(dev
, intel_sdvo_connector
->bottom
);
1967 if (intel_sdvo_connector
->hpos
)
1968 drm_property_destroy(dev
, intel_sdvo_connector
->hpos
);
1969 if (intel_sdvo_connector
->vpos
)
1970 drm_property_destroy(dev
, intel_sdvo_connector
->vpos
);
1971 if (intel_sdvo_connector
->saturation
)
1972 drm_property_destroy(dev
, intel_sdvo_connector
->saturation
);
1973 if (intel_sdvo_connector
->contrast
)
1974 drm_property_destroy(dev
, intel_sdvo_connector
->contrast
);
1975 if (intel_sdvo_connector
->hue
)
1976 drm_property_destroy(dev
, intel_sdvo_connector
->hue
);
1977 if (intel_sdvo_connector
->sharpness
)
1978 drm_property_destroy(dev
, intel_sdvo_connector
->sharpness
);
1979 if (intel_sdvo_connector
->flicker_filter
)
1980 drm_property_destroy(dev
, intel_sdvo_connector
->flicker_filter
);
1981 if (intel_sdvo_connector
->flicker_filter_2d
)
1982 drm_property_destroy(dev
, intel_sdvo_connector
->flicker_filter_2d
);
1983 if (intel_sdvo_connector
->flicker_filter_adaptive
)
1984 drm_property_destroy(dev
, intel_sdvo_connector
->flicker_filter_adaptive
);
1985 if (intel_sdvo_connector
->tv_luma_filter
)
1986 drm_property_destroy(dev
, intel_sdvo_connector
->tv_luma_filter
);
1987 if (intel_sdvo_connector
->tv_chroma_filter
)
1988 drm_property_destroy(dev
, intel_sdvo_connector
->tv_chroma_filter
);
1989 if (intel_sdvo_connector
->dot_crawl
)
1990 drm_property_destroy(dev
, intel_sdvo_connector
->dot_crawl
);
1991 if (intel_sdvo_connector
->brightness
)
1992 drm_property_destroy(dev
, intel_sdvo_connector
->brightness
);
1995 static void intel_sdvo_destroy(struct drm_connector
*connector
)
1997 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1999 if (intel_sdvo_connector
->tv_format
)
2000 drm_property_destroy(connector
->dev
,
2001 intel_sdvo_connector
->tv_format
);
2003 intel_sdvo_destroy_enhance_property(connector
);
2004 drm_sysfs_connector_remove(connector
);
2005 drm_connector_cleanup(connector
);
2006 kfree(intel_sdvo_connector
);
2009 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector
*connector
)
2011 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
2013 bool has_audio
= false;
2015 if (!intel_sdvo
->is_hdmi
)
2018 edid
= intel_sdvo_get_edid(connector
);
2019 if (edid
!= NULL
&& edid
->input
& DRM_EDID_INPUT_DIGITAL
)
2020 has_audio
= drm_detect_monitor_audio(edid
);
2027 intel_sdvo_set_property(struct drm_connector
*connector
,
2028 struct drm_property
*property
,
2031 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
2032 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
2033 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
2034 uint16_t temp_value
;
2038 ret
= drm_object_property_set_value(&connector
->base
, property
, val
);
2042 if (property
== dev_priv
->force_audio_property
) {
2046 if (i
== intel_sdvo_connector
->force_audio
)
2049 intel_sdvo_connector
->force_audio
= i
;
2051 if (i
== HDMI_AUDIO_AUTO
)
2052 has_audio
= intel_sdvo_detect_hdmi_audio(connector
);
2054 has_audio
= (i
== HDMI_AUDIO_ON
);
2056 if (has_audio
== intel_sdvo
->has_hdmi_audio
)
2059 intel_sdvo
->has_hdmi_audio
= has_audio
;
2063 if (property
== dev_priv
->broadcast_rgb_property
) {
2064 bool old_auto
= intel_sdvo
->color_range_auto
;
2065 uint32_t old_range
= intel_sdvo
->color_range
;
2068 case INTEL_BROADCAST_RGB_AUTO
:
2069 intel_sdvo
->color_range_auto
= true;
2071 case INTEL_BROADCAST_RGB_FULL
:
2072 intel_sdvo
->color_range_auto
= false;
2073 intel_sdvo
->color_range
= 0;
2075 case INTEL_BROADCAST_RGB_LIMITED
:
2076 intel_sdvo
->color_range_auto
= false;
2077 /* FIXME: this bit is only valid when using TMDS
2078 * encoding and 8 bit per color mode. */
2079 intel_sdvo
->color_range
= HDMI_COLOR_RANGE_16_235
;
2085 if (old_auto
== intel_sdvo
->color_range_auto
&&
2086 old_range
== intel_sdvo
->color_range
)
2092 #define CHECK_PROPERTY(name, NAME) \
2093 if (intel_sdvo_connector->name == property) { \
2094 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
2095 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
2096 cmd = SDVO_CMD_SET_##NAME; \
2097 intel_sdvo_connector->cur_##name = temp_value; \
2101 if (property
== intel_sdvo_connector
->tv_format
) {
2102 if (val
>= TV_FORMAT_NUM
)
2105 if (intel_sdvo
->tv_format_index
==
2106 intel_sdvo_connector
->tv_format_supported
[val
])
2109 intel_sdvo
->tv_format_index
= intel_sdvo_connector
->tv_format_supported
[val
];
2111 } else if (IS_TV_OR_LVDS(intel_sdvo_connector
)) {
2113 if (intel_sdvo_connector
->left
== property
) {
2114 drm_object_property_set_value(&connector
->base
,
2115 intel_sdvo_connector
->right
, val
);
2116 if (intel_sdvo_connector
->left_margin
== temp_value
)
2119 intel_sdvo_connector
->left_margin
= temp_value
;
2120 intel_sdvo_connector
->right_margin
= temp_value
;
2121 temp_value
= intel_sdvo_connector
->max_hscan
-
2122 intel_sdvo_connector
->left_margin
;
2123 cmd
= SDVO_CMD_SET_OVERSCAN_H
;
2125 } else if (intel_sdvo_connector
->right
== property
) {
2126 drm_object_property_set_value(&connector
->base
,
2127 intel_sdvo_connector
->left
, val
);
2128 if (intel_sdvo_connector
->right_margin
== temp_value
)
2131 intel_sdvo_connector
->left_margin
= temp_value
;
2132 intel_sdvo_connector
->right_margin
= temp_value
;
2133 temp_value
= intel_sdvo_connector
->max_hscan
-
2134 intel_sdvo_connector
->left_margin
;
2135 cmd
= SDVO_CMD_SET_OVERSCAN_H
;
2137 } else if (intel_sdvo_connector
->top
== property
) {
2138 drm_object_property_set_value(&connector
->base
,
2139 intel_sdvo_connector
->bottom
, val
);
2140 if (intel_sdvo_connector
->top_margin
== temp_value
)
2143 intel_sdvo_connector
->top_margin
= temp_value
;
2144 intel_sdvo_connector
->bottom_margin
= temp_value
;
2145 temp_value
= intel_sdvo_connector
->max_vscan
-
2146 intel_sdvo_connector
->top_margin
;
2147 cmd
= SDVO_CMD_SET_OVERSCAN_V
;
2149 } else if (intel_sdvo_connector
->bottom
== property
) {
2150 drm_object_property_set_value(&connector
->base
,
2151 intel_sdvo_connector
->top
, val
);
2152 if (intel_sdvo_connector
->bottom_margin
== temp_value
)
2155 intel_sdvo_connector
->top_margin
= temp_value
;
2156 intel_sdvo_connector
->bottom_margin
= temp_value
;
2157 temp_value
= intel_sdvo_connector
->max_vscan
-
2158 intel_sdvo_connector
->top_margin
;
2159 cmd
= SDVO_CMD_SET_OVERSCAN_V
;
2162 CHECK_PROPERTY(hpos
, HPOS
)
2163 CHECK_PROPERTY(vpos
, VPOS
)
2164 CHECK_PROPERTY(saturation
, SATURATION
)
2165 CHECK_PROPERTY(contrast
, CONTRAST
)
2166 CHECK_PROPERTY(hue
, HUE
)
2167 CHECK_PROPERTY(brightness
, BRIGHTNESS
)
2168 CHECK_PROPERTY(sharpness
, SHARPNESS
)
2169 CHECK_PROPERTY(flicker_filter
, FLICKER_FILTER
)
2170 CHECK_PROPERTY(flicker_filter_2d
, FLICKER_FILTER_2D
)
2171 CHECK_PROPERTY(flicker_filter_adaptive
, FLICKER_FILTER_ADAPTIVE
)
2172 CHECK_PROPERTY(tv_chroma_filter
, TV_CHROMA_FILTER
)
2173 CHECK_PROPERTY(tv_luma_filter
, TV_LUMA_FILTER
)
2174 CHECK_PROPERTY(dot_crawl
, DOT_CRAWL
)
2177 return -EINVAL
; /* unknown property */
2180 if (!intel_sdvo_set_value(intel_sdvo
, cmd
, &temp_value
, 2))
2185 if (intel_sdvo
->base
.base
.crtc
)
2186 intel_crtc_restore_mode(intel_sdvo
->base
.base
.crtc
);
2189 #undef CHECK_PROPERTY
2192 static const struct drm_connector_funcs intel_sdvo_connector_funcs
= {
2193 .dpms
= intel_sdvo_dpms
,
2194 .detect
= intel_sdvo_detect
,
2195 .fill_modes
= drm_helper_probe_single_connector_modes
,
2196 .set_property
= intel_sdvo_set_property
,
2197 .destroy
= intel_sdvo_destroy
,
2200 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs
= {
2201 .get_modes
= intel_sdvo_get_modes
,
2202 .mode_valid
= intel_sdvo_mode_valid
,
2203 .best_encoder
= intel_best_encoder
,
2206 static void intel_sdvo_enc_destroy(struct drm_encoder
*encoder
)
2208 struct intel_sdvo
*intel_sdvo
= to_sdvo(to_intel_encoder(encoder
));
2210 if (intel_sdvo
->sdvo_lvds_fixed_mode
!= NULL
)
2211 drm_mode_destroy(encoder
->dev
,
2212 intel_sdvo
->sdvo_lvds_fixed_mode
);
2214 i2c_del_adapter(&intel_sdvo
->ddc
);
2215 intel_encoder_destroy(encoder
);
2218 static const struct drm_encoder_funcs intel_sdvo_enc_funcs
= {
2219 .destroy
= intel_sdvo_enc_destroy
,
2223 intel_sdvo_guess_ddc_bus(struct intel_sdvo
*sdvo
)
2226 unsigned int num_bits
;
2228 /* Make a mask of outputs less than or equal to our own priority in the
2231 switch (sdvo
->controlled_output
) {
2232 case SDVO_OUTPUT_LVDS1
:
2233 mask
|= SDVO_OUTPUT_LVDS1
;
2234 case SDVO_OUTPUT_LVDS0
:
2235 mask
|= SDVO_OUTPUT_LVDS0
;
2236 case SDVO_OUTPUT_TMDS1
:
2237 mask
|= SDVO_OUTPUT_TMDS1
;
2238 case SDVO_OUTPUT_TMDS0
:
2239 mask
|= SDVO_OUTPUT_TMDS0
;
2240 case SDVO_OUTPUT_RGB1
:
2241 mask
|= SDVO_OUTPUT_RGB1
;
2242 case SDVO_OUTPUT_RGB0
:
2243 mask
|= SDVO_OUTPUT_RGB0
;
2247 /* Count bits to find what number we are in the priority list. */
2248 mask
&= sdvo
->caps
.output_flags
;
2249 num_bits
= hweight16(mask
);
2250 /* If more than 3 outputs, default to DDC bus 3 for now. */
2254 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2255 sdvo
->ddc_bus
= 1 << num_bits
;
2259 * Choose the appropriate DDC bus for control bus switch command for this
2260 * SDVO output based on the controlled output.
2262 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2263 * outputs, then LVDS outputs.
2266 intel_sdvo_select_ddc_bus(struct drm_i915_private
*dev_priv
,
2267 struct intel_sdvo
*sdvo
, u32 reg
)
2269 struct sdvo_device_mapping
*mapping
;
2272 mapping
= &(dev_priv
->sdvo_mappings
[0]);
2274 mapping
= &(dev_priv
->sdvo_mappings
[1]);
2276 if (mapping
->initialized
)
2277 sdvo
->ddc_bus
= 1 << ((mapping
->ddc_pin
& 0xf0) >> 4);
2279 intel_sdvo_guess_ddc_bus(sdvo
);
2283 intel_sdvo_select_i2c_bus(struct drm_i915_private
*dev_priv
,
2284 struct intel_sdvo
*sdvo
, u32 reg
)
2286 struct sdvo_device_mapping
*mapping
;
2290 mapping
= &dev_priv
->sdvo_mappings
[0];
2292 mapping
= &dev_priv
->sdvo_mappings
[1];
2294 if (mapping
->initialized
&& intel_gmbus_is_port_valid(mapping
->i2c_pin
))
2295 pin
= mapping
->i2c_pin
;
2297 pin
= GMBUS_PORT_DPB
;
2299 sdvo
->i2c
= intel_gmbus_get_adapter(dev_priv
, pin
);
2301 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2302 * our code totally fails once we start using gmbus. Hence fall back to
2303 * bit banging for now. */
2304 intel_gmbus_force_bit(sdvo
->i2c
, true);
2307 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2309 intel_sdvo_unselect_i2c_bus(struct intel_sdvo
*sdvo
)
2311 intel_gmbus_force_bit(sdvo
->i2c
, false);
2315 intel_sdvo_is_hdmi_connector(struct intel_sdvo
*intel_sdvo
, int device
)
2317 return intel_sdvo_check_supp_encode(intel_sdvo
);
2321 intel_sdvo_get_slave_addr(struct drm_device
*dev
, struct intel_sdvo
*sdvo
)
2323 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2324 struct sdvo_device_mapping
*my_mapping
, *other_mapping
;
2326 if (sdvo
->is_sdvob
) {
2327 my_mapping
= &dev_priv
->sdvo_mappings
[0];
2328 other_mapping
= &dev_priv
->sdvo_mappings
[1];
2330 my_mapping
= &dev_priv
->sdvo_mappings
[1];
2331 other_mapping
= &dev_priv
->sdvo_mappings
[0];
2334 /* If the BIOS described our SDVO device, take advantage of it. */
2335 if (my_mapping
->slave_addr
)
2336 return my_mapping
->slave_addr
;
2338 /* If the BIOS only described a different SDVO device, use the
2339 * address that it isn't using.
2341 if (other_mapping
->slave_addr
) {
2342 if (other_mapping
->slave_addr
== 0x70)
2348 /* No SDVO device info is found for another DVO port,
2349 * so use mapping assumption we had before BIOS parsing.
2358 intel_sdvo_connector_init(struct intel_sdvo_connector
*connector
,
2359 struct intel_sdvo
*encoder
)
2361 drm_connector_init(encoder
->base
.base
.dev
,
2362 &connector
->base
.base
,
2363 &intel_sdvo_connector_funcs
,
2364 connector
->base
.base
.connector_type
);
2366 drm_connector_helper_add(&connector
->base
.base
,
2367 &intel_sdvo_connector_helper_funcs
);
2369 connector
->base
.base
.interlace_allowed
= 1;
2370 connector
->base
.base
.doublescan_allowed
= 0;
2371 connector
->base
.base
.display_info
.subpixel_order
= SubPixelHorizontalRGB
;
2372 connector
->base
.get_hw_state
= intel_sdvo_connector_get_hw_state
;
2374 intel_connector_attach_encoder(&connector
->base
, &encoder
->base
);
2375 drm_sysfs_connector_add(&connector
->base
.base
);
2379 intel_sdvo_add_hdmi_properties(struct intel_sdvo
*intel_sdvo
,
2380 struct intel_sdvo_connector
*connector
)
2382 struct drm_device
*dev
= connector
->base
.base
.dev
;
2384 intel_attach_force_audio_property(&connector
->base
.base
);
2385 if (INTEL_INFO(dev
)->gen
>= 4 && IS_MOBILE(dev
)) {
2386 intel_attach_broadcast_rgb_property(&connector
->base
.base
);
2387 intel_sdvo
->color_range_auto
= true;
2392 intel_sdvo_dvi_init(struct intel_sdvo
*intel_sdvo
, int device
)
2394 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2395 struct drm_connector
*connector
;
2396 struct intel_encoder
*intel_encoder
= to_intel_encoder(encoder
);
2397 struct intel_connector
*intel_connector
;
2398 struct intel_sdvo_connector
*intel_sdvo_connector
;
2400 intel_sdvo_connector
= kzalloc(sizeof(*intel_sdvo_connector
), GFP_KERNEL
);
2401 if (!intel_sdvo_connector
)
2405 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_TMDS0
;
2406 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_TMDS0
;
2407 } else if (device
== 1) {
2408 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_TMDS1
;
2409 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_TMDS1
;
2412 intel_connector
= &intel_sdvo_connector
->base
;
2413 connector
= &intel_connector
->base
;
2414 if (intel_sdvo_get_hotplug_support(intel_sdvo
) &
2415 intel_sdvo_connector
->output_flag
) {
2416 intel_sdvo
->hotplug_active
|= intel_sdvo_connector
->output_flag
;
2417 /* Some SDVO devices have one-shot hotplug interrupts.
2418 * Ensure that they get re-enabled when an interrupt happens.
2420 intel_encoder
->hot_plug
= intel_sdvo_enable_hotplug
;
2421 intel_sdvo_enable_hotplug(intel_encoder
);
2423 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
| DRM_CONNECTOR_POLL_DISCONNECT
;
2425 encoder
->encoder_type
= DRM_MODE_ENCODER_TMDS
;
2426 connector
->connector_type
= DRM_MODE_CONNECTOR_DVID
;
2428 if (intel_sdvo_is_hdmi_connector(intel_sdvo
, device
)) {
2429 connector
->connector_type
= DRM_MODE_CONNECTOR_HDMIA
;
2430 intel_sdvo
->is_hdmi
= true;
2433 intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
);
2434 if (intel_sdvo
->is_hdmi
)
2435 intel_sdvo_add_hdmi_properties(intel_sdvo
, intel_sdvo_connector
);
2441 intel_sdvo_tv_init(struct intel_sdvo
*intel_sdvo
, int type
)
2443 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2444 struct drm_connector
*connector
;
2445 struct intel_connector
*intel_connector
;
2446 struct intel_sdvo_connector
*intel_sdvo_connector
;
2448 intel_sdvo_connector
= kzalloc(sizeof(*intel_sdvo_connector
), GFP_KERNEL
);
2449 if (!intel_sdvo_connector
)
2452 intel_connector
= &intel_sdvo_connector
->base
;
2453 connector
= &intel_connector
->base
;
2454 encoder
->encoder_type
= DRM_MODE_ENCODER_TVDAC
;
2455 connector
->connector_type
= DRM_MODE_CONNECTOR_SVIDEO
;
2457 intel_sdvo
->controlled_output
|= type
;
2458 intel_sdvo_connector
->output_flag
= type
;
2460 intel_sdvo
->is_tv
= true;
2462 intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
);
2464 if (!intel_sdvo_tv_create_property(intel_sdvo
, intel_sdvo_connector
, type
))
2467 if (!intel_sdvo_create_enhance_property(intel_sdvo
, intel_sdvo_connector
))
2473 intel_sdvo_destroy(connector
);
2478 intel_sdvo_analog_init(struct intel_sdvo
*intel_sdvo
, int device
)
2480 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2481 struct drm_connector
*connector
;
2482 struct intel_connector
*intel_connector
;
2483 struct intel_sdvo_connector
*intel_sdvo_connector
;
2485 intel_sdvo_connector
= kzalloc(sizeof(*intel_sdvo_connector
), GFP_KERNEL
);
2486 if (!intel_sdvo_connector
)
2489 intel_connector
= &intel_sdvo_connector
->base
;
2490 connector
= &intel_connector
->base
;
2491 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
2492 encoder
->encoder_type
= DRM_MODE_ENCODER_DAC
;
2493 connector
->connector_type
= DRM_MODE_CONNECTOR_VGA
;
2496 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_RGB0
;
2497 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_RGB0
;
2498 } else if (device
== 1) {
2499 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_RGB1
;
2500 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_RGB1
;
2503 intel_sdvo_connector_init(intel_sdvo_connector
,
2509 intel_sdvo_lvds_init(struct intel_sdvo
*intel_sdvo
, int device
)
2511 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2512 struct drm_connector
*connector
;
2513 struct intel_connector
*intel_connector
;
2514 struct intel_sdvo_connector
*intel_sdvo_connector
;
2516 intel_sdvo_connector
= kzalloc(sizeof(*intel_sdvo_connector
), GFP_KERNEL
);
2517 if (!intel_sdvo_connector
)
2520 intel_connector
= &intel_sdvo_connector
->base
;
2521 connector
= &intel_connector
->base
;
2522 encoder
->encoder_type
= DRM_MODE_ENCODER_LVDS
;
2523 connector
->connector_type
= DRM_MODE_CONNECTOR_LVDS
;
2526 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_LVDS0
;
2527 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_LVDS0
;
2528 } else if (device
== 1) {
2529 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_LVDS1
;
2530 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_LVDS1
;
2533 intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
);
2534 if (!intel_sdvo_create_enhance_property(intel_sdvo
, intel_sdvo_connector
))
2540 intel_sdvo_destroy(connector
);
2545 intel_sdvo_output_setup(struct intel_sdvo
*intel_sdvo
, uint16_t flags
)
2547 intel_sdvo
->is_tv
= false;
2548 intel_sdvo
->is_lvds
= false;
2550 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2552 if (flags
& SDVO_OUTPUT_TMDS0
)
2553 if (!intel_sdvo_dvi_init(intel_sdvo
, 0))
2556 if ((flags
& SDVO_TMDS_MASK
) == SDVO_TMDS_MASK
)
2557 if (!intel_sdvo_dvi_init(intel_sdvo
, 1))
2560 /* TV has no XXX1 function block */
2561 if (flags
& SDVO_OUTPUT_SVID0
)
2562 if (!intel_sdvo_tv_init(intel_sdvo
, SDVO_OUTPUT_SVID0
))
2565 if (flags
& SDVO_OUTPUT_CVBS0
)
2566 if (!intel_sdvo_tv_init(intel_sdvo
, SDVO_OUTPUT_CVBS0
))
2569 if (flags
& SDVO_OUTPUT_YPRPB0
)
2570 if (!intel_sdvo_tv_init(intel_sdvo
, SDVO_OUTPUT_YPRPB0
))
2573 if (flags
& SDVO_OUTPUT_RGB0
)
2574 if (!intel_sdvo_analog_init(intel_sdvo
, 0))
2577 if ((flags
& SDVO_RGB_MASK
) == SDVO_RGB_MASK
)
2578 if (!intel_sdvo_analog_init(intel_sdvo
, 1))
2581 if (flags
& SDVO_OUTPUT_LVDS0
)
2582 if (!intel_sdvo_lvds_init(intel_sdvo
, 0))
2585 if ((flags
& SDVO_LVDS_MASK
) == SDVO_LVDS_MASK
)
2586 if (!intel_sdvo_lvds_init(intel_sdvo
, 1))
2589 if ((flags
& SDVO_OUTPUT_MASK
) == 0) {
2590 unsigned char bytes
[2];
2592 intel_sdvo
->controlled_output
= 0;
2593 memcpy(bytes
, &intel_sdvo
->caps
.output_flags
, 2);
2594 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2595 SDVO_NAME(intel_sdvo
),
2596 bytes
[0], bytes
[1]);
2599 intel_sdvo
->base
.crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
2604 static void intel_sdvo_output_cleanup(struct intel_sdvo
*intel_sdvo
)
2606 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2607 struct drm_connector
*connector
, *tmp
;
2609 list_for_each_entry_safe(connector
, tmp
,
2610 &dev
->mode_config
.connector_list
, head
) {
2611 if (intel_attached_encoder(connector
) == &intel_sdvo
->base
)
2612 intel_sdvo_destroy(connector
);
2616 static bool intel_sdvo_tv_create_property(struct intel_sdvo
*intel_sdvo
,
2617 struct intel_sdvo_connector
*intel_sdvo_connector
,
2620 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2621 struct intel_sdvo_tv_format format
;
2622 uint32_t format_map
, i
;
2624 if (!intel_sdvo_set_target_output(intel_sdvo
, type
))
2627 BUILD_BUG_ON(sizeof(format
) != 6);
2628 if (!intel_sdvo_get_value(intel_sdvo
,
2629 SDVO_CMD_GET_SUPPORTED_TV_FORMATS
,
2630 &format
, sizeof(format
)))
2633 memcpy(&format_map
, &format
, min(sizeof(format_map
), sizeof(format
)));
2635 if (format_map
== 0)
2638 intel_sdvo_connector
->format_supported_num
= 0;
2639 for (i
= 0 ; i
< TV_FORMAT_NUM
; i
++)
2640 if (format_map
& (1 << i
))
2641 intel_sdvo_connector
->tv_format_supported
[intel_sdvo_connector
->format_supported_num
++] = i
;
2644 intel_sdvo_connector
->tv_format
=
2645 drm_property_create(dev
, DRM_MODE_PROP_ENUM
,
2646 "mode", intel_sdvo_connector
->format_supported_num
);
2647 if (!intel_sdvo_connector
->tv_format
)
2650 for (i
= 0; i
< intel_sdvo_connector
->format_supported_num
; i
++)
2651 drm_property_add_enum(
2652 intel_sdvo_connector
->tv_format
, i
,
2653 i
, tv_format_names
[intel_sdvo_connector
->tv_format_supported
[i
]]);
2655 intel_sdvo
->tv_format_index
= intel_sdvo_connector
->tv_format_supported
[0];
2656 drm_object_attach_property(&intel_sdvo_connector
->base
.base
.base
,
2657 intel_sdvo_connector
->tv_format
, 0);
2662 #define ENHANCEMENT(name, NAME) do { \
2663 if (enhancements.name) { \
2664 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2665 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2667 intel_sdvo_connector->max_##name = data_value[0]; \
2668 intel_sdvo_connector->cur_##name = response; \
2669 intel_sdvo_connector->name = \
2670 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2671 if (!intel_sdvo_connector->name) return false; \
2672 drm_object_attach_property(&connector->base, \
2673 intel_sdvo_connector->name, \
2674 intel_sdvo_connector->cur_##name); \
2675 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2676 data_value[0], data_value[1], response); \
2681 intel_sdvo_create_enhance_property_tv(struct intel_sdvo
*intel_sdvo
,
2682 struct intel_sdvo_connector
*intel_sdvo_connector
,
2683 struct intel_sdvo_enhancements_reply enhancements
)
2685 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2686 struct drm_connector
*connector
= &intel_sdvo_connector
->base
.base
;
2687 uint16_t response
, data_value
[2];
2689 /* when horizontal overscan is supported, Add the left/right property */
2690 if (enhancements
.overscan_h
) {
2691 if (!intel_sdvo_get_value(intel_sdvo
,
2692 SDVO_CMD_GET_MAX_OVERSCAN_H
,
2696 if (!intel_sdvo_get_value(intel_sdvo
,
2697 SDVO_CMD_GET_OVERSCAN_H
,
2701 intel_sdvo_connector
->max_hscan
= data_value
[0];
2702 intel_sdvo_connector
->left_margin
= data_value
[0] - response
;
2703 intel_sdvo_connector
->right_margin
= intel_sdvo_connector
->left_margin
;
2704 intel_sdvo_connector
->left
=
2705 drm_property_create_range(dev
, 0, "left_margin", 0, data_value
[0]);
2706 if (!intel_sdvo_connector
->left
)
2709 drm_object_attach_property(&connector
->base
,
2710 intel_sdvo_connector
->left
,
2711 intel_sdvo_connector
->left_margin
);
2713 intel_sdvo_connector
->right
=
2714 drm_property_create_range(dev
, 0, "right_margin", 0, data_value
[0]);
2715 if (!intel_sdvo_connector
->right
)
2718 drm_object_attach_property(&connector
->base
,
2719 intel_sdvo_connector
->right
,
2720 intel_sdvo_connector
->right_margin
);
2721 DRM_DEBUG_KMS("h_overscan: max %d, "
2722 "default %d, current %d\n",
2723 data_value
[0], data_value
[1], response
);
2726 if (enhancements
.overscan_v
) {
2727 if (!intel_sdvo_get_value(intel_sdvo
,
2728 SDVO_CMD_GET_MAX_OVERSCAN_V
,
2732 if (!intel_sdvo_get_value(intel_sdvo
,
2733 SDVO_CMD_GET_OVERSCAN_V
,
2737 intel_sdvo_connector
->max_vscan
= data_value
[0];
2738 intel_sdvo_connector
->top_margin
= data_value
[0] - response
;
2739 intel_sdvo_connector
->bottom_margin
= intel_sdvo_connector
->top_margin
;
2740 intel_sdvo_connector
->top
=
2741 drm_property_create_range(dev
, 0,
2742 "top_margin", 0, data_value
[0]);
2743 if (!intel_sdvo_connector
->top
)
2746 drm_object_attach_property(&connector
->base
,
2747 intel_sdvo_connector
->top
,
2748 intel_sdvo_connector
->top_margin
);
2750 intel_sdvo_connector
->bottom
=
2751 drm_property_create_range(dev
, 0,
2752 "bottom_margin", 0, data_value
[0]);
2753 if (!intel_sdvo_connector
->bottom
)
2756 drm_object_attach_property(&connector
->base
,
2757 intel_sdvo_connector
->bottom
,
2758 intel_sdvo_connector
->bottom_margin
);
2759 DRM_DEBUG_KMS("v_overscan: max %d, "
2760 "default %d, current %d\n",
2761 data_value
[0], data_value
[1], response
);
2764 ENHANCEMENT(hpos
, HPOS
);
2765 ENHANCEMENT(vpos
, VPOS
);
2766 ENHANCEMENT(saturation
, SATURATION
);
2767 ENHANCEMENT(contrast
, CONTRAST
);
2768 ENHANCEMENT(hue
, HUE
);
2769 ENHANCEMENT(sharpness
, SHARPNESS
);
2770 ENHANCEMENT(brightness
, BRIGHTNESS
);
2771 ENHANCEMENT(flicker_filter
, FLICKER_FILTER
);
2772 ENHANCEMENT(flicker_filter_adaptive
, FLICKER_FILTER_ADAPTIVE
);
2773 ENHANCEMENT(flicker_filter_2d
, FLICKER_FILTER_2D
);
2774 ENHANCEMENT(tv_chroma_filter
, TV_CHROMA_FILTER
);
2775 ENHANCEMENT(tv_luma_filter
, TV_LUMA_FILTER
);
2777 if (enhancements
.dot_crawl
) {
2778 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_DOT_CRAWL
, &response
, 2))
2781 intel_sdvo_connector
->max_dot_crawl
= 1;
2782 intel_sdvo_connector
->cur_dot_crawl
= response
& 0x1;
2783 intel_sdvo_connector
->dot_crawl
=
2784 drm_property_create_range(dev
, 0, "dot_crawl", 0, 1);
2785 if (!intel_sdvo_connector
->dot_crawl
)
2788 drm_object_attach_property(&connector
->base
,
2789 intel_sdvo_connector
->dot_crawl
,
2790 intel_sdvo_connector
->cur_dot_crawl
);
2791 DRM_DEBUG_KMS("dot crawl: current %d\n", response
);
2798 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo
*intel_sdvo
,
2799 struct intel_sdvo_connector
*intel_sdvo_connector
,
2800 struct intel_sdvo_enhancements_reply enhancements
)
2802 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2803 struct drm_connector
*connector
= &intel_sdvo_connector
->base
.base
;
2804 uint16_t response
, data_value
[2];
2806 ENHANCEMENT(brightness
, BRIGHTNESS
);
2812 static bool intel_sdvo_create_enhance_property(struct intel_sdvo
*intel_sdvo
,
2813 struct intel_sdvo_connector
*intel_sdvo_connector
)
2816 struct intel_sdvo_enhancements_reply reply
;
2820 BUILD_BUG_ON(sizeof(enhancements
) != 2);
2822 enhancements
.response
= 0;
2823 intel_sdvo_get_value(intel_sdvo
,
2824 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS
,
2825 &enhancements
, sizeof(enhancements
));
2826 if (enhancements
.response
== 0) {
2827 DRM_DEBUG_KMS("No enhancement is supported\n");
2831 if (IS_TV(intel_sdvo_connector
))
2832 return intel_sdvo_create_enhance_property_tv(intel_sdvo
, intel_sdvo_connector
, enhancements
.reply
);
2833 else if (IS_LVDS(intel_sdvo_connector
))
2834 return intel_sdvo_create_enhance_property_lvds(intel_sdvo
, intel_sdvo_connector
, enhancements
.reply
);
2839 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter
*adapter
,
2840 struct i2c_msg
*msgs
,
2843 struct intel_sdvo
*sdvo
= adapter
->algo_data
;
2845 if (!intel_sdvo_set_control_bus_switch(sdvo
, sdvo
->ddc_bus
))
2848 return sdvo
->i2c
->algo
->master_xfer(sdvo
->i2c
, msgs
, num
);
2851 static u32
intel_sdvo_ddc_proxy_func(struct i2c_adapter
*adapter
)
2853 struct intel_sdvo
*sdvo
= adapter
->algo_data
;
2854 return sdvo
->i2c
->algo
->functionality(sdvo
->i2c
);
2857 static const struct i2c_algorithm intel_sdvo_ddc_proxy
= {
2858 .master_xfer
= intel_sdvo_ddc_proxy_xfer
,
2859 .functionality
= intel_sdvo_ddc_proxy_func
2863 intel_sdvo_init_ddc_proxy(struct intel_sdvo
*sdvo
,
2864 struct drm_device
*dev
)
2866 sdvo
->ddc
.owner
= THIS_MODULE
;
2867 sdvo
->ddc
.class = I2C_CLASS_DDC
;
2868 snprintf(sdvo
->ddc
.name
, I2C_NAME_SIZE
, "SDVO DDC proxy");
2869 sdvo
->ddc
.dev
.parent
= &dev
->pdev
->dev
;
2870 sdvo
->ddc
.algo_data
= sdvo
;
2871 sdvo
->ddc
.algo
= &intel_sdvo_ddc_proxy
;
2873 return i2c_add_adapter(&sdvo
->ddc
) == 0;
2876 bool intel_sdvo_init(struct drm_device
*dev
, uint32_t sdvo_reg
, bool is_sdvob
)
2878 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2879 struct intel_encoder
*intel_encoder
;
2880 struct intel_sdvo
*intel_sdvo
;
2882 intel_sdvo
= kzalloc(sizeof(*intel_sdvo
), GFP_KERNEL
);
2886 intel_sdvo
->sdvo_reg
= sdvo_reg
;
2887 intel_sdvo
->is_sdvob
= is_sdvob
;
2888 intel_sdvo
->slave_addr
= intel_sdvo_get_slave_addr(dev
, intel_sdvo
) >> 1;
2889 intel_sdvo_select_i2c_bus(dev_priv
, intel_sdvo
, sdvo_reg
);
2890 if (!intel_sdvo_init_ddc_proxy(intel_sdvo
, dev
))
2893 /* encoder type will be decided later */
2894 intel_encoder
= &intel_sdvo
->base
;
2895 intel_encoder
->type
= INTEL_OUTPUT_SDVO
;
2896 drm_encoder_init(dev
, &intel_encoder
->base
, &intel_sdvo_enc_funcs
, 0);
2898 /* Read the regs to test if we can talk to the device */
2899 for (i
= 0; i
< 0x40; i
++) {
2902 if (!intel_sdvo_read_byte(intel_sdvo
, i
, &byte
)) {
2903 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2904 SDVO_NAME(intel_sdvo
));
2909 intel_encoder
->compute_config
= intel_sdvo_compute_config
;
2910 intel_encoder
->disable
= intel_disable_sdvo
;
2911 intel_encoder
->mode_set
= intel_sdvo_mode_set
;
2912 intel_encoder
->enable
= intel_enable_sdvo
;
2913 intel_encoder
->get_hw_state
= intel_sdvo_get_hw_state
;
2914 intel_encoder
->get_config
= intel_sdvo_get_config
;
2916 /* In default case sdvo lvds is false */
2917 if (!intel_sdvo_get_capabilities(intel_sdvo
, &intel_sdvo
->caps
))
2920 if (intel_sdvo_output_setup(intel_sdvo
,
2921 intel_sdvo
->caps
.output_flags
) != true) {
2922 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2923 SDVO_NAME(intel_sdvo
));
2924 /* Output_setup can leave behind connectors! */
2928 /* Only enable the hotplug irq if we need it, to work around noisy
2931 if (intel_sdvo
->hotplug_active
) {
2932 intel_encoder
->hpd_pin
=
2933 intel_sdvo
->is_sdvob
? HPD_SDVO_B
: HPD_SDVO_C
;
2937 * Cloning SDVO with anything is often impossible, since the SDVO
2938 * encoder can request a special input timing mode. And even if that's
2939 * not the case we have evidence that cloning a plain unscaled mode with
2940 * VGA doesn't really work. Furthermore the cloning flags are way too
2941 * simplistic anyway to express such constraints, so just give up on
2942 * cloning for SDVO encoders.
2944 intel_sdvo
->base
.cloneable
= false;
2946 intel_sdvo_select_ddc_bus(dev_priv
, intel_sdvo
, sdvo_reg
);
2948 /* Set the input timing to the screen. Assume always input 0. */
2949 if (!intel_sdvo_set_target_input(intel_sdvo
))
2952 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo
,
2953 &intel_sdvo
->pixel_clock_min
,
2954 &intel_sdvo
->pixel_clock_max
))
2957 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2958 "clock range %dMHz - %dMHz, "
2959 "input 1: %c, input 2: %c, "
2960 "output 1: %c, output 2: %c\n",
2961 SDVO_NAME(intel_sdvo
),
2962 intel_sdvo
->caps
.vendor_id
, intel_sdvo
->caps
.device_id
,
2963 intel_sdvo
->caps
.device_rev_id
,
2964 intel_sdvo
->pixel_clock_min
/ 1000,
2965 intel_sdvo
->pixel_clock_max
/ 1000,
2966 (intel_sdvo
->caps
.sdvo_inputs_mask
& 0x1) ? 'Y' : 'N',
2967 (intel_sdvo
->caps
.sdvo_inputs_mask
& 0x2) ? 'Y' : 'N',
2968 /* check currently supported outputs */
2969 intel_sdvo
->caps
.output_flags
&
2970 (SDVO_OUTPUT_TMDS0
| SDVO_OUTPUT_RGB0
) ? 'Y' : 'N',
2971 intel_sdvo
->caps
.output_flags
&
2972 (SDVO_OUTPUT_TMDS1
| SDVO_OUTPUT_RGB1
) ? 'Y' : 'N');
2976 intel_sdvo_output_cleanup(intel_sdvo
);
2979 drm_encoder_cleanup(&intel_encoder
->base
);
2980 i2c_del_adapter(&intel_sdvo
->ddc
);
2982 intel_sdvo_unselect_i2c_bus(intel_sdvo
);