2 * i.MX drm driver - LVDS display bridge
4 * Copyright (C) 2012 Sascha Hauer, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/module.h>
17 #include <linux/clk.h>
18 #include <linux/component.h>
20 #include <drm/drm_fb_helper.h>
21 #include <drm/drm_crtc_helper.h>
22 #include <drm/drm_panel.h>
23 #include <linux/mfd/syscon.h>
24 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
25 #include <linux/of_device.h>
26 #include <linux/of_graph.h>
27 #include <video/of_videomode.h>
28 #include <linux/regmap.h>
29 #include <linux/videodev2.h>
33 #define DRIVER_NAME "imx-ldb"
35 #define LDB_CH0_MODE_EN_TO_DI0 (1 << 0)
36 #define LDB_CH0_MODE_EN_TO_DI1 (3 << 0)
37 #define LDB_CH0_MODE_EN_MASK (3 << 0)
38 #define LDB_CH1_MODE_EN_TO_DI0 (1 << 2)
39 #define LDB_CH1_MODE_EN_TO_DI1 (3 << 2)
40 #define LDB_CH1_MODE_EN_MASK (3 << 2)
41 #define LDB_SPLIT_MODE_EN (1 << 4)
42 #define LDB_DATA_WIDTH_CH0_24 (1 << 5)
43 #define LDB_BIT_MAP_CH0_JEIDA (1 << 6)
44 #define LDB_DATA_WIDTH_CH1_24 (1 << 7)
45 #define LDB_BIT_MAP_CH1_JEIDA (1 << 8)
46 #define LDB_DI0_VS_POL_ACT_LOW (1 << 9)
47 #define LDB_DI1_VS_POL_ACT_LOW (1 << 10)
48 #define LDB_BGREF_RMODE_INT (1 << 15)
50 #define con_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, connector)
51 #define enc_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, encoder)
55 struct imx_ldb_channel
{
57 struct drm_connector connector
;
58 struct drm_encoder encoder
;
59 struct drm_panel
*panel
;
60 struct device_node
*child
;
64 struct drm_display_mode mode
;
75 struct regmap
*regmap
;
77 struct imx_ldb_channel channel
[2];
78 struct clk
*clk
[2]; /* our own clock */
79 struct clk
*clk_sel
[4]; /* parent of display clock */
80 struct clk
*clk_pll
[2]; /* upstream clock we can adjust */
82 const struct bus_mux
*lvds_mux
;
85 static enum drm_connector_status
imx_ldb_connector_detect(
86 struct drm_connector
*connector
, bool force
)
88 return connector_status_connected
;
91 static int imx_ldb_connector_get_modes(struct drm_connector
*connector
)
93 struct imx_ldb_channel
*imx_ldb_ch
= con_to_imx_ldb_ch(connector
);
96 if (imx_ldb_ch
->panel
&& imx_ldb_ch
->panel
->funcs
&&
97 imx_ldb_ch
->panel
->funcs
->get_modes
) {
98 num_modes
= imx_ldb_ch
->panel
->funcs
->get_modes(imx_ldb_ch
->panel
);
103 if (imx_ldb_ch
->edid
) {
104 drm_mode_connector_update_edid_property(connector
,
106 num_modes
= drm_add_edid_modes(connector
, imx_ldb_ch
->edid
);
109 if (imx_ldb_ch
->mode_valid
) {
110 struct drm_display_mode
*mode
;
112 mode
= drm_mode_create(connector
->dev
);
115 drm_mode_copy(mode
, &imx_ldb_ch
->mode
);
116 mode
->type
|= DRM_MODE_TYPE_DRIVER
| DRM_MODE_TYPE_PREFERRED
;
117 drm_mode_probed_add(connector
, mode
);
124 static struct drm_encoder
*imx_ldb_connector_best_encoder(
125 struct drm_connector
*connector
)
127 struct imx_ldb_channel
*imx_ldb_ch
= con_to_imx_ldb_ch(connector
);
129 return &imx_ldb_ch
->encoder
;
132 static void imx_ldb_encoder_dpms(struct drm_encoder
*encoder
, int mode
)
136 static bool imx_ldb_encoder_mode_fixup(struct drm_encoder
*encoder
,
137 const struct drm_display_mode
*mode
,
138 struct drm_display_mode
*adjusted_mode
)
143 static void imx_ldb_set_clock(struct imx_ldb
*ldb
, int mux
, int chno
,
144 unsigned long serial_clk
, unsigned long di_clk
)
148 dev_dbg(ldb
->dev
, "%s: now: %ld want: %ld\n", __func__
,
149 clk_get_rate(ldb
->clk_pll
[chno
]), serial_clk
);
150 clk_set_rate(ldb
->clk_pll
[chno
], serial_clk
);
152 dev_dbg(ldb
->dev
, "%s after: %ld\n", __func__
,
153 clk_get_rate(ldb
->clk_pll
[chno
]));
155 dev_dbg(ldb
->dev
, "%s: now: %ld want: %ld\n", __func__
,
156 clk_get_rate(ldb
->clk
[chno
]),
158 clk_set_rate(ldb
->clk
[chno
], di_clk
);
160 dev_dbg(ldb
->dev
, "%s after: %ld\n", __func__
,
161 clk_get_rate(ldb
->clk
[chno
]));
163 /* set display clock mux to LDB input clock */
164 ret
= clk_set_parent(ldb
->clk_sel
[mux
], ldb
->clk
[chno
]);
167 "unable to set di%d parent clock to ldb_di%d\n", mux
,
171 static void imx_ldb_encoder_prepare(struct drm_encoder
*encoder
)
173 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
174 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
177 switch (imx_ldb_ch
->chno
) {
179 bus_format
= (ldb
->ldb_ctrl
& LDB_DATA_WIDTH_CH0_24
) ?
180 MEDIA_BUS_FMT_RGB888_1X24
: MEDIA_BUS_FMT_RGB666_1X18
;
183 bus_format
= (ldb
->ldb_ctrl
& LDB_DATA_WIDTH_CH1_24
) ?
184 MEDIA_BUS_FMT_RGB888_1X24
: MEDIA_BUS_FMT_RGB666_1X18
;
187 dev_err(ldb
->dev
, "unable to config di%d panel format\n",
189 bus_format
= MEDIA_BUS_FMT_RGB888_1X24
;
192 imx_drm_set_bus_format(encoder
, bus_format
);
195 static void imx_ldb_encoder_commit(struct drm_encoder
*encoder
)
197 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
198 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
199 int dual
= ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
;
200 int mux
= imx_drm_encoder_get_mux_id(imx_ldb_ch
->child
, encoder
);
202 drm_panel_prepare(imx_ldb_ch
->panel
);
205 clk_prepare_enable(ldb
->clk
[0]);
206 clk_prepare_enable(ldb
->clk
[1]);
209 if (imx_ldb_ch
== &ldb
->channel
[0] || dual
) {
210 ldb
->ldb_ctrl
&= ~LDB_CH0_MODE_EN_MASK
;
211 if (mux
== 0 || ldb
->lvds_mux
)
212 ldb
->ldb_ctrl
|= LDB_CH0_MODE_EN_TO_DI0
;
214 ldb
->ldb_ctrl
|= LDB_CH0_MODE_EN_TO_DI1
;
216 if (imx_ldb_ch
== &ldb
->channel
[1] || dual
) {
217 ldb
->ldb_ctrl
&= ~LDB_CH1_MODE_EN_MASK
;
218 if (mux
== 1 || ldb
->lvds_mux
)
219 ldb
->ldb_ctrl
|= LDB_CH1_MODE_EN_TO_DI1
;
221 ldb
->ldb_ctrl
|= LDB_CH1_MODE_EN_TO_DI0
;
225 const struct bus_mux
*lvds_mux
= NULL
;
227 if (imx_ldb_ch
== &ldb
->channel
[0])
228 lvds_mux
= &ldb
->lvds_mux
[0];
229 else if (imx_ldb_ch
== &ldb
->channel
[1])
230 lvds_mux
= &ldb
->lvds_mux
[1];
232 regmap_update_bits(ldb
->regmap
, lvds_mux
->reg
, lvds_mux
->mask
,
233 mux
<< lvds_mux
->shift
);
236 regmap_write(ldb
->regmap
, IOMUXC_GPR2
, ldb
->ldb_ctrl
);
238 drm_panel_enable(imx_ldb_ch
->panel
);
241 static void imx_ldb_encoder_mode_set(struct drm_encoder
*encoder
,
242 struct drm_display_mode
*orig_mode
,
243 struct drm_display_mode
*mode
)
245 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
246 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
247 int dual
= ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
;
248 unsigned long serial_clk
;
249 unsigned long di_clk
= mode
->clock
* 1000;
250 int mux
= imx_drm_encoder_get_mux_id(imx_ldb_ch
->child
, encoder
);
252 if (mode
->clock
> 170000) {
254 "%s: mode exceeds 170 MHz pixel clock\n", __func__
);
256 if (mode
->clock
> 85000 && !dual
) {
258 "%s: mode exceeds 85 MHz pixel clock\n", __func__
);
262 serial_clk
= 3500UL * mode
->clock
;
263 imx_ldb_set_clock(ldb
, mux
, 0, serial_clk
, di_clk
);
264 imx_ldb_set_clock(ldb
, mux
, 1, serial_clk
, di_clk
);
266 serial_clk
= 7000UL * mode
->clock
;
267 imx_ldb_set_clock(ldb
, mux
, imx_ldb_ch
->chno
, serial_clk
,
271 /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
272 if (imx_ldb_ch
== &ldb
->channel
[0]) {
273 if (mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
274 ldb
->ldb_ctrl
|= LDB_DI0_VS_POL_ACT_LOW
;
275 else if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
276 ldb
->ldb_ctrl
&= ~LDB_DI0_VS_POL_ACT_LOW
;
278 if (imx_ldb_ch
== &ldb
->channel
[1]) {
279 if (mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
280 ldb
->ldb_ctrl
|= LDB_DI1_VS_POL_ACT_LOW
;
281 else if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
282 ldb
->ldb_ctrl
&= ~LDB_DI1_VS_POL_ACT_LOW
;
286 static void imx_ldb_encoder_disable(struct drm_encoder
*encoder
)
288 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
289 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
292 * imx_ldb_encoder_disable is called by
293 * drm_helper_disable_unused_functions without
294 * the encoder being enabled before.
296 if (imx_ldb_ch
== &ldb
->channel
[0] &&
297 (ldb
->ldb_ctrl
& LDB_CH0_MODE_EN_MASK
) == 0)
299 else if (imx_ldb_ch
== &ldb
->channel
[1] &&
300 (ldb
->ldb_ctrl
& LDB_CH1_MODE_EN_MASK
) == 0)
303 drm_panel_disable(imx_ldb_ch
->panel
);
305 if (imx_ldb_ch
== &ldb
->channel
[0])
306 ldb
->ldb_ctrl
&= ~LDB_CH0_MODE_EN_MASK
;
307 else if (imx_ldb_ch
== &ldb
->channel
[1])
308 ldb
->ldb_ctrl
&= ~LDB_CH1_MODE_EN_MASK
;
310 regmap_write(ldb
->regmap
, IOMUXC_GPR2
, ldb
->ldb_ctrl
);
312 if (ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
) {
313 clk_disable_unprepare(ldb
->clk
[0]);
314 clk_disable_unprepare(ldb
->clk
[1]);
317 drm_panel_unprepare(imx_ldb_ch
->panel
);
320 static struct drm_connector_funcs imx_ldb_connector_funcs
= {
321 .dpms
= drm_helper_connector_dpms
,
322 .fill_modes
= drm_helper_probe_single_connector_modes
,
323 .detect
= imx_ldb_connector_detect
,
324 .destroy
= imx_drm_connector_destroy
,
327 static struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs
= {
328 .get_modes
= imx_ldb_connector_get_modes
,
329 .best_encoder
= imx_ldb_connector_best_encoder
,
332 static struct drm_encoder_funcs imx_ldb_encoder_funcs
= {
333 .destroy
= imx_drm_encoder_destroy
,
336 static struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs
= {
337 .dpms
= imx_ldb_encoder_dpms
,
338 .mode_fixup
= imx_ldb_encoder_mode_fixup
,
339 .prepare
= imx_ldb_encoder_prepare
,
340 .commit
= imx_ldb_encoder_commit
,
341 .mode_set
= imx_ldb_encoder_mode_set
,
342 .disable
= imx_ldb_encoder_disable
,
345 static int imx_ldb_get_clk(struct imx_ldb
*ldb
, int chno
)
349 snprintf(clkname
, sizeof(clkname
), "di%d", chno
);
350 ldb
->clk
[chno
] = devm_clk_get(ldb
->dev
, clkname
);
351 if (IS_ERR(ldb
->clk
[chno
]))
352 return PTR_ERR(ldb
->clk
[chno
]);
354 snprintf(clkname
, sizeof(clkname
), "di%d_pll", chno
);
355 ldb
->clk_pll
[chno
] = devm_clk_get(ldb
->dev
, clkname
);
357 return PTR_ERR_OR_ZERO(ldb
->clk_pll
[chno
]);
360 static int imx_ldb_register(struct drm_device
*drm
,
361 struct imx_ldb_channel
*imx_ldb_ch
)
363 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
366 ret
= imx_drm_encoder_parse_of(drm
, &imx_ldb_ch
->encoder
,
371 ret
= imx_ldb_get_clk(ldb
, imx_ldb_ch
->chno
);
375 if (ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
) {
376 ret
= imx_ldb_get_clk(ldb
, 1);
381 drm_encoder_helper_add(&imx_ldb_ch
->encoder
,
382 &imx_ldb_encoder_helper_funcs
);
383 drm_encoder_init(drm
, &imx_ldb_ch
->encoder
, &imx_ldb_encoder_funcs
,
384 DRM_MODE_ENCODER_LVDS
);
386 drm_connector_helper_add(&imx_ldb_ch
->connector
,
387 &imx_ldb_connector_helper_funcs
);
388 drm_connector_init(drm
, &imx_ldb_ch
->connector
,
389 &imx_ldb_connector_funcs
, DRM_MODE_CONNECTOR_LVDS
);
391 if (imx_ldb_ch
->panel
)
392 drm_panel_attach(imx_ldb_ch
->panel
, &imx_ldb_ch
->connector
);
394 drm_mode_connector_attach_encoder(&imx_ldb_ch
->connector
,
395 &imx_ldb_ch
->encoder
);
405 static const char * const imx_ldb_bit_mappings
[] = {
406 [LVDS_BIT_MAP_SPWG
] = "spwg",
407 [LVDS_BIT_MAP_JEIDA
] = "jeida",
410 static const int of_get_data_mapping(struct device_node
*np
)
415 ret
= of_property_read_string(np
, "fsl,data-mapping", &bm
);
419 for (i
= 0; i
< ARRAY_SIZE(imx_ldb_bit_mappings
); i
++)
420 if (!strcasecmp(bm
, imx_ldb_bit_mappings
[i
]))
426 static struct bus_mux imx6q_lvds_mux
[2] = {
430 .mask
= IMX6Q_GPR3_LVDS0_MUX_CTL_MASK
,
434 .mask
= IMX6Q_GPR3_LVDS1_MUX_CTL_MASK
,
439 * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
440 * of_match_device will walk through this list and take the first entry
441 * matching any of its compatible values. Therefore, the more generic
442 * entries (in this case fsl,imx53-ldb) need to be ordered last.
444 static const struct of_device_id imx_ldb_dt_ids
[] = {
445 { .compatible
= "fsl,imx6q-ldb", .data
= imx6q_lvds_mux
, },
446 { .compatible
= "fsl,imx53-ldb", .data
= NULL
, },
449 MODULE_DEVICE_TABLE(of
, imx_ldb_dt_ids
);
451 static int imx_ldb_bind(struct device
*dev
, struct device
*master
, void *data
)
453 struct drm_device
*drm
= data
;
454 struct device_node
*np
= dev
->of_node
;
455 const struct of_device_id
*of_id
=
456 of_match_device(imx_ldb_dt_ids
, dev
);
457 struct device_node
*child
;
459 struct imx_ldb
*imx_ldb
;
466 imx_ldb
= devm_kzalloc(dev
, sizeof(*imx_ldb
), GFP_KERNEL
);
470 imx_ldb
->regmap
= syscon_regmap_lookup_by_phandle(np
, "gpr");
471 if (IS_ERR(imx_ldb
->regmap
)) {
472 dev_err(dev
, "failed to get parent regmap\n");
473 return PTR_ERR(imx_ldb
->regmap
);
479 imx_ldb
->lvds_mux
= of_id
->data
;
481 dual
= of_property_read_bool(np
, "fsl,dual-channel");
483 imx_ldb
->ldb_ctrl
|= LDB_SPLIT_MODE_EN
;
486 * There are three different possible clock mux configurations:
487 * i.MX53: ipu1_di0_sel, ipu1_di1_sel
488 * i.MX6q: ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
489 * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
490 * Map them all to di0_sel...di3_sel.
492 for (i
= 0; i
< 4; i
++) {
495 sprintf(clkname
, "di%d_sel", i
);
496 imx_ldb
->clk_sel
[i
] = devm_clk_get(imx_ldb
->dev
, clkname
);
497 if (IS_ERR(imx_ldb
->clk_sel
[i
])) {
498 ret
= PTR_ERR(imx_ldb
->clk_sel
[i
]);
499 imx_ldb
->clk_sel
[i
] = NULL
;
506 for_each_child_of_node(np
, child
) {
507 struct imx_ldb_channel
*channel
;
508 struct device_node
*port
;
510 ret
= of_property_read_u32(child
, "reg", &i
);
511 if (ret
|| i
< 0 || i
> 1)
515 dev_warn(dev
, "dual-channel mode, ignoring second output\n");
519 if (!of_device_is_available(child
))
522 channel
= &imx_ldb
->channel
[i
];
523 channel
->ldb
= imx_ldb
;
525 channel
->child
= child
;
528 * The output port is port@4 with an external 4-port mux or
529 * port@2 with the internal 2-port mux.
531 port
= of_graph_get_port_by_id(child
, imx_ldb
->lvds_mux
? 4 : 2);
533 struct device_node
*endpoint
, *remote
;
535 endpoint
= of_get_child_by_name(port
, "endpoint");
537 remote
= of_graph_get_remote_port_parent(endpoint
);
539 channel
->panel
= of_drm_find_panel(remote
);
541 return -EPROBE_DEFER
;
542 if (!channel
->panel
) {
543 dev_err(dev
, "panel not found: %s\n",
545 return -EPROBE_DEFER
;
550 edidp
= of_get_property(child
, "edid", &channel
->edid_len
);
552 channel
->edid
= kmemdup(edidp
, channel
->edid_len
,
554 } else if (!channel
->panel
) {
555 ret
= of_get_drm_display_mode(child
, &channel
->mode
, 0);
557 channel
->mode_valid
= 1;
560 ret
= of_property_read_u32(child
, "fsl,data-width", &datawidth
);
563 else if (datawidth
!= 18 && datawidth
!= 24)
566 mapping
= of_get_data_mapping(child
);
568 case LVDS_BIT_MAP_SPWG
:
569 if (datawidth
== 24) {
572 LDB_DATA_WIDTH_CH0_24
;
575 LDB_DATA_WIDTH_CH1_24
;
578 case LVDS_BIT_MAP_JEIDA
:
579 if (datawidth
== 18) {
580 dev_err(dev
, "JEIDA standard only supported in 24 bit\n");
584 imx_ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH0_24
|
585 LDB_BIT_MAP_CH0_JEIDA
;
587 imx_ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH1_24
|
588 LDB_BIT_MAP_CH1_JEIDA
;
591 dev_err(dev
, "data mapping not specified or invalid\n");
595 ret
= imx_ldb_register(drm
, channel
);
600 dev_set_drvdata(dev
, imx_ldb
);
605 static void imx_ldb_unbind(struct device
*dev
, struct device
*master
,
608 struct imx_ldb
*imx_ldb
= dev_get_drvdata(dev
);
611 for (i
= 0; i
< 2; i
++) {
612 struct imx_ldb_channel
*channel
= &imx_ldb
->channel
[i
];
614 if (!channel
->connector
.funcs
)
617 channel
->connector
.funcs
->destroy(&channel
->connector
);
618 channel
->encoder
.funcs
->destroy(&channel
->encoder
);
620 kfree(channel
->edid
);
624 static const struct component_ops imx_ldb_ops
= {
625 .bind
= imx_ldb_bind
,
626 .unbind
= imx_ldb_unbind
,
629 static int imx_ldb_probe(struct platform_device
*pdev
)
631 return component_add(&pdev
->dev
, &imx_ldb_ops
);
634 static int imx_ldb_remove(struct platform_device
*pdev
)
636 component_del(&pdev
->dev
, &imx_ldb_ops
);
640 static struct platform_driver imx_ldb_driver
= {
641 .probe
= imx_ldb_probe
,
642 .remove
= imx_ldb_remove
,
644 .of_match_table
= imx_ldb_dt_ids
,
649 module_platform_driver(imx_ldb_driver
);
651 MODULE_DESCRIPTION("i.MX LVDS driver");
652 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
653 MODULE_LICENSE("GPL");
654 MODULE_ALIAS("platform:" DRIVER_NAME
);