2 * i.MX drm driver - LVDS display bridge
4 * Copyright (C) 2012 Sascha Hauer, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/module.h>
17 #include <linux/clk.h>
18 #include <linux/component.h>
20 #include <drm/drm_fb_helper.h>
21 #include <drm/drm_crtc_helper.h>
22 #include <linux/mfd/syscon.h>
23 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
24 #include <linux/of_address.h>
25 #include <linux/of_device.h>
26 #include <video/of_videomode.h>
27 #include <linux/regmap.h>
28 #include <linux/videodev2.h>
32 #define DRIVER_NAME "imx-ldb"
34 #define LDB_CH0_MODE_EN_TO_DI0 (1 << 0)
35 #define LDB_CH0_MODE_EN_TO_DI1 (3 << 0)
36 #define LDB_CH0_MODE_EN_MASK (3 << 0)
37 #define LDB_CH1_MODE_EN_TO_DI0 (1 << 2)
38 #define LDB_CH1_MODE_EN_TO_DI1 (3 << 2)
39 #define LDB_CH1_MODE_EN_MASK (3 << 2)
40 #define LDB_SPLIT_MODE_EN (1 << 4)
41 #define LDB_DATA_WIDTH_CH0_24 (1 << 5)
42 #define LDB_BIT_MAP_CH0_JEIDA (1 << 6)
43 #define LDB_DATA_WIDTH_CH1_24 (1 << 7)
44 #define LDB_BIT_MAP_CH1_JEIDA (1 << 8)
45 #define LDB_DI0_VS_POL_ACT_LOW (1 << 9)
46 #define LDB_DI1_VS_POL_ACT_LOW (1 << 10)
47 #define LDB_BGREF_RMODE_INT (1 << 15)
49 #define con_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, connector)
50 #define enc_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, encoder)
54 struct imx_ldb_channel
{
56 struct drm_connector connector
;
57 struct drm_encoder encoder
;
58 struct device_node
*child
;
62 struct drm_display_mode mode
;
73 struct regmap
*regmap
;
75 struct imx_ldb_channel channel
[2];
76 struct clk
*clk
[2]; /* our own clock */
77 struct clk
*clk_sel
[4]; /* parent of display clock */
78 struct clk
*clk_pll
[2]; /* upstream clock we can adjust */
80 const struct bus_mux
*lvds_mux
;
83 static enum drm_connector_status
imx_ldb_connector_detect(
84 struct drm_connector
*connector
, bool force
)
86 return connector_status_connected
;
89 static int imx_ldb_connector_get_modes(struct drm_connector
*connector
)
91 struct imx_ldb_channel
*imx_ldb_ch
= con_to_imx_ldb_ch(connector
);
94 if (imx_ldb_ch
->edid
) {
95 drm_mode_connector_update_edid_property(connector
,
97 num_modes
= drm_add_edid_modes(connector
, imx_ldb_ch
->edid
);
100 if (imx_ldb_ch
->mode_valid
) {
101 struct drm_display_mode
*mode
;
103 mode
= drm_mode_create(connector
->dev
);
106 drm_mode_copy(mode
, &imx_ldb_ch
->mode
);
107 mode
->type
|= DRM_MODE_TYPE_DRIVER
| DRM_MODE_TYPE_PREFERRED
;
108 drm_mode_probed_add(connector
, mode
);
115 static struct drm_encoder
*imx_ldb_connector_best_encoder(
116 struct drm_connector
*connector
)
118 struct imx_ldb_channel
*imx_ldb_ch
= con_to_imx_ldb_ch(connector
);
120 return &imx_ldb_ch
->encoder
;
123 static void imx_ldb_encoder_dpms(struct drm_encoder
*encoder
, int mode
)
127 static bool imx_ldb_encoder_mode_fixup(struct drm_encoder
*encoder
,
128 const struct drm_display_mode
*mode
,
129 struct drm_display_mode
*adjusted_mode
)
134 static void imx_ldb_set_clock(struct imx_ldb
*ldb
, int mux
, int chno
,
135 unsigned long serial_clk
, unsigned long di_clk
)
139 dev_dbg(ldb
->dev
, "%s: now: %ld want: %ld\n", __func__
,
140 clk_get_rate(ldb
->clk_pll
[chno
]), serial_clk
);
141 clk_set_rate(ldb
->clk_pll
[chno
], serial_clk
);
143 dev_dbg(ldb
->dev
, "%s after: %ld\n", __func__
,
144 clk_get_rate(ldb
->clk_pll
[chno
]));
146 dev_dbg(ldb
->dev
, "%s: now: %ld want: %ld\n", __func__
,
147 clk_get_rate(ldb
->clk
[chno
]),
149 clk_set_rate(ldb
->clk
[chno
], di_clk
);
151 dev_dbg(ldb
->dev
, "%s after: %ld\n", __func__
,
152 clk_get_rate(ldb
->clk
[chno
]));
154 /* set display clock mux to LDB input clock */
155 ret
= clk_set_parent(ldb
->clk_sel
[mux
], ldb
->clk
[chno
]);
158 "unable to set di%d parent clock to ldb_di%d\n", mux
,
162 static void imx_ldb_encoder_prepare(struct drm_encoder
*encoder
)
164 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
165 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
166 struct drm_display_mode
*mode
= &encoder
->crtc
->hwmode
;
168 unsigned long serial_clk
;
169 unsigned long di_clk
= mode
->clock
* 1000;
170 int mux
= imx_drm_encoder_get_mux_id(imx_ldb_ch
->child
, encoder
);
172 if (ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
) {
173 /* dual channel LVDS mode */
174 serial_clk
= 3500UL * mode
->clock
;
175 imx_ldb_set_clock(ldb
, mux
, 0, serial_clk
, di_clk
);
176 imx_ldb_set_clock(ldb
, mux
, 1, serial_clk
, di_clk
);
178 serial_clk
= 7000UL * mode
->clock
;
179 imx_ldb_set_clock(ldb
, mux
, imx_ldb_ch
->chno
, serial_clk
,
183 switch (imx_ldb_ch
->chno
) {
185 pixel_fmt
= (ldb
->ldb_ctrl
& LDB_DATA_WIDTH_CH0_24
) ?
186 V4L2_PIX_FMT_RGB24
: V4L2_PIX_FMT_BGR666
;
189 pixel_fmt
= (ldb
->ldb_ctrl
& LDB_DATA_WIDTH_CH1_24
) ?
190 V4L2_PIX_FMT_RGB24
: V4L2_PIX_FMT_BGR666
;
193 dev_err(ldb
->dev
, "unable to config di%d panel format\n",
195 pixel_fmt
= V4L2_PIX_FMT_RGB24
;
198 imx_drm_panel_format(encoder
, pixel_fmt
);
201 static void imx_ldb_encoder_commit(struct drm_encoder
*encoder
)
203 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
204 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
205 int dual
= ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
;
206 int mux
= imx_drm_encoder_get_mux_id(imx_ldb_ch
->child
, encoder
);
209 clk_prepare_enable(ldb
->clk
[0]);
210 clk_prepare_enable(ldb
->clk
[1]);
213 if (imx_ldb_ch
== &ldb
->channel
[0] || dual
) {
214 ldb
->ldb_ctrl
&= ~LDB_CH0_MODE_EN_MASK
;
215 if (mux
== 0 || ldb
->lvds_mux
)
216 ldb
->ldb_ctrl
|= LDB_CH0_MODE_EN_TO_DI0
;
218 ldb
->ldb_ctrl
|= LDB_CH0_MODE_EN_TO_DI1
;
220 if (imx_ldb_ch
== &ldb
->channel
[1] || dual
) {
221 ldb
->ldb_ctrl
&= ~LDB_CH1_MODE_EN_MASK
;
222 if (mux
== 1 || ldb
->lvds_mux
)
223 ldb
->ldb_ctrl
|= LDB_CH1_MODE_EN_TO_DI1
;
225 ldb
->ldb_ctrl
|= LDB_CH1_MODE_EN_TO_DI0
;
229 const struct bus_mux
*lvds_mux
= NULL
;
231 if (imx_ldb_ch
== &ldb
->channel
[0])
232 lvds_mux
= &ldb
->lvds_mux
[0];
233 else if (imx_ldb_ch
== &ldb
->channel
[1])
234 lvds_mux
= &ldb
->lvds_mux
[1];
236 regmap_update_bits(ldb
->regmap
, lvds_mux
->reg
, lvds_mux
->mask
,
237 mux
<< lvds_mux
->shift
);
240 regmap_write(ldb
->regmap
, IOMUXC_GPR2
, ldb
->ldb_ctrl
);
243 static void imx_ldb_encoder_mode_set(struct drm_encoder
*encoder
,
244 struct drm_display_mode
*orig_mode
,
245 struct drm_display_mode
*mode
)
247 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
248 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
249 int dual
= ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
;
251 if (mode
->clock
> 170000) {
253 "%s: mode exceeds 170 MHz pixel clock\n", __func__
);
255 if (mode
->clock
> 85000 && !dual
) {
257 "%s: mode exceeds 85 MHz pixel clock\n", __func__
);
260 /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
261 if (imx_ldb_ch
== &ldb
->channel
[0]) {
262 if (mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
263 ldb
->ldb_ctrl
|= LDB_DI0_VS_POL_ACT_LOW
;
264 else if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
265 ldb
->ldb_ctrl
&= ~LDB_DI0_VS_POL_ACT_LOW
;
267 if (imx_ldb_ch
== &ldb
->channel
[1]) {
268 if (mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
269 ldb
->ldb_ctrl
|= LDB_DI1_VS_POL_ACT_LOW
;
270 else if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
271 ldb
->ldb_ctrl
&= ~LDB_DI1_VS_POL_ACT_LOW
;
275 static void imx_ldb_encoder_disable(struct drm_encoder
*encoder
)
277 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
278 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
281 * imx_ldb_encoder_disable is called by
282 * drm_helper_disable_unused_functions without
283 * the encoder being enabled before.
285 if (imx_ldb_ch
== &ldb
->channel
[0] &&
286 (ldb
->ldb_ctrl
& LDB_CH0_MODE_EN_MASK
) == 0)
288 else if (imx_ldb_ch
== &ldb
->channel
[1] &&
289 (ldb
->ldb_ctrl
& LDB_CH1_MODE_EN_MASK
) == 0)
292 if (imx_ldb_ch
== &ldb
->channel
[0])
293 ldb
->ldb_ctrl
&= ~LDB_CH0_MODE_EN_MASK
;
294 else if (imx_ldb_ch
== &ldb
->channel
[1])
295 ldb
->ldb_ctrl
&= ~LDB_CH1_MODE_EN_MASK
;
297 regmap_write(ldb
->regmap
, IOMUXC_GPR2
, ldb
->ldb_ctrl
);
299 if (ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
) {
300 clk_disable_unprepare(ldb
->clk
[0]);
301 clk_disable_unprepare(ldb
->clk
[1]);
305 static struct drm_connector_funcs imx_ldb_connector_funcs
= {
306 .dpms
= drm_helper_connector_dpms
,
307 .fill_modes
= drm_helper_probe_single_connector_modes
,
308 .detect
= imx_ldb_connector_detect
,
309 .destroy
= imx_drm_connector_destroy
,
312 static struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs
= {
313 .get_modes
= imx_ldb_connector_get_modes
,
314 .best_encoder
= imx_ldb_connector_best_encoder
,
317 static struct drm_encoder_funcs imx_ldb_encoder_funcs
= {
318 .destroy
= imx_drm_encoder_destroy
,
321 static struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs
= {
322 .dpms
= imx_ldb_encoder_dpms
,
323 .mode_fixup
= imx_ldb_encoder_mode_fixup
,
324 .prepare
= imx_ldb_encoder_prepare
,
325 .commit
= imx_ldb_encoder_commit
,
326 .mode_set
= imx_ldb_encoder_mode_set
,
327 .disable
= imx_ldb_encoder_disable
,
330 static int imx_ldb_get_clk(struct imx_ldb
*ldb
, int chno
)
334 snprintf(clkname
, sizeof(clkname
), "di%d", chno
);
335 ldb
->clk
[chno
] = devm_clk_get(ldb
->dev
, clkname
);
336 if (IS_ERR(ldb
->clk
[chno
]))
337 return PTR_ERR(ldb
->clk
[chno
]);
339 snprintf(clkname
, sizeof(clkname
), "di%d_pll", chno
);
340 ldb
->clk_pll
[chno
] = devm_clk_get(ldb
->dev
, clkname
);
342 return PTR_ERR_OR_ZERO(ldb
->clk_pll
[chno
]);
345 static int imx_ldb_register(struct drm_device
*drm
,
346 struct imx_ldb_channel
*imx_ldb_ch
)
348 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
351 ret
= imx_drm_encoder_parse_of(drm
, &imx_ldb_ch
->encoder
,
356 ret
= imx_ldb_get_clk(ldb
, imx_ldb_ch
->chno
);
360 if (ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
) {
361 ret
= imx_ldb_get_clk(ldb
, 1);
366 drm_encoder_helper_add(&imx_ldb_ch
->encoder
,
367 &imx_ldb_encoder_helper_funcs
);
368 drm_encoder_init(drm
, &imx_ldb_ch
->encoder
, &imx_ldb_encoder_funcs
,
369 DRM_MODE_ENCODER_LVDS
);
371 drm_connector_helper_add(&imx_ldb_ch
->connector
,
372 &imx_ldb_connector_helper_funcs
);
373 drm_connector_init(drm
, &imx_ldb_ch
->connector
,
374 &imx_ldb_connector_funcs
, DRM_MODE_CONNECTOR_LVDS
);
376 drm_mode_connector_attach_encoder(&imx_ldb_ch
->connector
,
377 &imx_ldb_ch
->encoder
);
387 static const char * const imx_ldb_bit_mappings
[] = {
388 [LVDS_BIT_MAP_SPWG
] = "spwg",
389 [LVDS_BIT_MAP_JEIDA
] = "jeida",
392 static const int of_get_data_mapping(struct device_node
*np
)
397 ret
= of_property_read_string(np
, "fsl,data-mapping", &bm
);
401 for (i
= 0; i
< ARRAY_SIZE(imx_ldb_bit_mappings
); i
++)
402 if (!strcasecmp(bm
, imx_ldb_bit_mappings
[i
]))
408 static struct bus_mux imx6q_lvds_mux
[2] = {
412 .mask
= IMX6Q_GPR3_LVDS0_MUX_CTL_MASK
,
416 .mask
= IMX6Q_GPR3_LVDS1_MUX_CTL_MASK
,
421 * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
422 * of_match_device will walk through this list and take the first entry
423 * matching any of its compatible values. Therefore, the more generic
424 * entries (in this case fsl,imx53-ldb) need to be ordered last.
426 static const struct of_device_id imx_ldb_dt_ids
[] = {
427 { .compatible
= "fsl,imx6q-ldb", .data
= imx6q_lvds_mux
, },
428 { .compatible
= "fsl,imx53-ldb", .data
= NULL
, },
431 MODULE_DEVICE_TABLE(of
, imx_ldb_dt_ids
);
433 static int imx_ldb_bind(struct device
*dev
, struct device
*master
, void *data
)
435 struct drm_device
*drm
= data
;
436 struct device_node
*np
= dev
->of_node
;
437 const struct of_device_id
*of_id
=
438 of_match_device(imx_ldb_dt_ids
, dev
);
439 struct device_node
*child
;
441 struct imx_ldb
*imx_ldb
;
448 imx_ldb
= devm_kzalloc(dev
, sizeof(*imx_ldb
), GFP_KERNEL
);
452 imx_ldb
->regmap
= syscon_regmap_lookup_by_phandle(np
, "gpr");
453 if (IS_ERR(imx_ldb
->regmap
)) {
454 dev_err(dev
, "failed to get parent regmap\n");
455 return PTR_ERR(imx_ldb
->regmap
);
461 imx_ldb
->lvds_mux
= of_id
->data
;
463 dual
= of_property_read_bool(np
, "fsl,dual-channel");
465 imx_ldb
->ldb_ctrl
|= LDB_SPLIT_MODE_EN
;
468 * There are three different possible clock mux configurations:
469 * i.MX53: ipu1_di0_sel, ipu1_di1_sel
470 * i.MX6q: ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
471 * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
472 * Map them all to di0_sel...di3_sel.
474 for (i
= 0; i
< 4; i
++) {
477 sprintf(clkname
, "di%d_sel", i
);
478 imx_ldb
->clk_sel
[i
] = devm_clk_get(imx_ldb
->dev
, clkname
);
479 if (IS_ERR(imx_ldb
->clk_sel
[i
])) {
480 ret
= PTR_ERR(imx_ldb
->clk_sel
[i
]);
481 imx_ldb
->clk_sel
[i
] = NULL
;
488 for_each_child_of_node(np
, child
) {
489 struct imx_ldb_channel
*channel
;
491 ret
= of_property_read_u32(child
, "reg", &i
);
492 if (ret
|| i
< 0 || i
> 1)
496 dev_warn(dev
, "dual-channel mode, ignoring second output\n");
500 if (!of_device_is_available(child
))
503 channel
= &imx_ldb
->channel
[i
];
504 channel
->ldb
= imx_ldb
;
506 channel
->child
= child
;
508 edidp
= of_get_property(child
, "edid", &channel
->edid_len
);
510 channel
->edid
= kmemdup(edidp
, channel
->edid_len
,
513 ret
= of_get_drm_display_mode(child
, &channel
->mode
, 0);
515 channel
->mode_valid
= 1;
518 ret
= of_property_read_u32(child
, "fsl,data-width", &datawidth
);
521 else if (datawidth
!= 18 && datawidth
!= 24)
524 mapping
= of_get_data_mapping(child
);
526 case LVDS_BIT_MAP_SPWG
:
527 if (datawidth
== 24) {
530 LDB_DATA_WIDTH_CH0_24
;
533 LDB_DATA_WIDTH_CH1_24
;
536 case LVDS_BIT_MAP_JEIDA
:
537 if (datawidth
== 18) {
538 dev_err(dev
, "JEIDA standard only supported in 24 bit\n");
542 imx_ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH0_24
|
543 LDB_BIT_MAP_CH0_JEIDA
;
545 imx_ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH1_24
|
546 LDB_BIT_MAP_CH1_JEIDA
;
549 dev_err(dev
, "data mapping not specified or invalid\n");
553 ret
= imx_ldb_register(drm
, channel
);
558 dev_set_drvdata(dev
, imx_ldb
);
563 static void imx_ldb_unbind(struct device
*dev
, struct device
*master
,
566 struct imx_ldb
*imx_ldb
= dev_get_drvdata(dev
);
569 for (i
= 0; i
< 2; i
++) {
570 struct imx_ldb_channel
*channel
= &imx_ldb
->channel
[i
];
572 if (!channel
->connector
.funcs
)
575 channel
->connector
.funcs
->destroy(&channel
->connector
);
576 channel
->encoder
.funcs
->destroy(&channel
->encoder
);
578 kfree(channel
->edid
);
582 static const struct component_ops imx_ldb_ops
= {
583 .bind
= imx_ldb_bind
,
584 .unbind
= imx_ldb_unbind
,
587 static int imx_ldb_probe(struct platform_device
*pdev
)
589 return component_add(&pdev
->dev
, &imx_ldb_ops
);
592 static int imx_ldb_remove(struct platform_device
*pdev
)
594 component_del(&pdev
->dev
, &imx_ldb_ops
);
598 static struct platform_driver imx_ldb_driver
= {
599 .probe
= imx_ldb_probe
,
600 .remove
= imx_ldb_remove
,
602 .of_match_table
= imx_ldb_dt_ids
,
607 module_platform_driver(imx_ldb_driver
);
609 MODULE_DESCRIPTION("i.MX LVDS driver");
610 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
611 MODULE_LICENSE("GPL");
612 MODULE_ALIAS("platform:" DRIVER_NAME
);