drivers/gpu/drm/imx/imx-ldb.c

   1 /*
   2  * i.MX drm driver - LVDS display bridge
   3  *
   4  * Copyright (C) 2012 Sascha Hauer, Pengutronix
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <linux/module.h>
  17 #include <linux/clk.h>
  18 #include <linux/component.h>
  19 #include <drm/drmP.h>
  20 #include <drm/drm_fb_helper.h>
  21 #include <drm/drm_crtc_helper.h>
  22 #include <drm/drm_of.h>
  23 #include <drm/drm_panel.h>
  24 #include <linux/mfd/syscon.h>
  25 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  26 #include <linux/of_device.h>
  27 #include <linux/of_graph.h>
  28 #include <video/of_display_timing.h>
  29 #include <video/of_videomode.h>
  30 #include <linux/regmap.h>
  31 #include <linux/videodev2.h>
  32
  33 #include "imx-drm.h"
  34
  35 #define DRIVER_NAME "imx-ldb"
  36
  37 #define LDB_CH0_MODE_EN_TO_DI0          (1 << 0)
  38 #define LDB_CH0_MODE_EN_TO_DI1          (3 << 0)
  39 #define LDB_CH0_MODE_EN_MASK            (3 << 0)
  40 #define LDB_CH1_MODE_EN_TO_DI0          (1 << 2)
  41 #define LDB_CH1_MODE_EN_TO_DI1          (3 << 2)
  42 #define LDB_CH1_MODE_EN_MASK            (3 << 2)
  43 #define LDB_SPLIT_MODE_EN               (1 << 4)
  44 #define LDB_DATA_WIDTH_CH0_24           (1 << 5)
  45 #define LDB_BIT_MAP_CH0_JEIDA           (1 << 6)
  46 #define LDB_DATA_WIDTH_CH1_24           (1 << 7)
  47 #define LDB_BIT_MAP_CH1_JEIDA           (1 << 8)
  48 #define LDB_DI0_VS_POL_ACT_LOW          (1 << 9)
  49 #define LDB_DI1_VS_POL_ACT_LOW          (1 << 10)
  50 #define LDB_BGREF_RMODE_INT             (1 << 15)
  51
  52 #define con_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, connector)
  53 #define enc_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, encoder)
  54
  55 struct imx_ldb;
  56
  57 struct imx_ldb_channel {
  58         struct imx_ldb *ldb;
  59         struct drm_connector connector;
  60         struct drm_encoder encoder;
  61         struct drm_panel *panel;
  62         struct device_node *child;
  63         struct i2c_adapter *ddc;
  64         int chno;
  65         void *edid;
  66         int edid_len;
  67         struct drm_display_mode mode;
  68         int mode_valid;
  69         int bus_format;
  70 };
  71
  72 struct bus_mux {
  73         int reg;
  74         int shift;
  75         int mask;
  76 };
  77
  78 struct imx_ldb {
  79         struct regmap *regmap;
  80         struct device *dev;
  81         struct imx_ldb_channel channel[2];
  82         struct clk *clk[2]; /* our own clock */
  83         struct clk *clk_sel[4]; /* parent of display clock */
  84         struct clk *clk_parent[4]; /* original parent of clk_sel */
  85         struct clk *clk_pll[2]; /* upstream clock we can adjust */
  86         u32 ldb_ctrl;
  87         const struct bus_mux *lvds_mux;
  88 };
  89
  90 static enum drm_connector_status imx_ldb_connector_detect(
  91                 struct drm_connector *connector, bool force)
  92 {
  93         return connector_status_connected;
  94 }
  95
  96 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
  97 {
  98         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
  99         int num_modes = 0;
 100
 101         if (imx_ldb_ch->panel && imx_ldb_ch->panel->funcs &&
 102             imx_ldb_ch->panel->funcs->get_modes) {
 103                 struct drm_display_info *di = &connector->display_info;
 104
 105                 num_modes = imx_ldb_ch->panel->funcs->get_modes(imx_ldb_ch->panel);
 106                 if (!imx_ldb_ch->bus_format && di->num_bus_formats)
 107                         imx_ldb_ch->bus_format = di->bus_formats[0];
 108                 if (num_modes > 0)
 109                         return num_modes;
 110         }
 111
 112         if (!imx_ldb_ch->edid && imx_ldb_ch->ddc)
 113                 imx_ldb_ch->edid = drm_get_edid(connector, imx_ldb_ch->ddc);
 114
 115         if (imx_ldb_ch->edid) {
 116                 drm_mode_connector_update_edid_property(connector,
 117                                                         imx_ldb_ch->edid);
 118                 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
 119         }
 120
 121         if (imx_ldb_ch->mode_valid) {
 122                 struct drm_display_mode *mode;
 123
 124                 mode = drm_mode_create(connector->dev);
 125                 if (!mode)
 126                         return -EINVAL;
 127                 drm_mode_copy(mode, &imx_ldb_ch->mode);
 128                 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 129                 drm_mode_probed_add(connector, mode);
 130                 num_modes++;
 131         }
 132
 133         return num_modes;
 134 }
 135
 136 static struct drm_encoder *imx_ldb_connector_best_encoder(
 137                 struct drm_connector *connector)
 138 {
 139         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 140
 141         return &imx_ldb_ch->encoder;
 142 }
 143
 144 static void imx_ldb_encoder_dpms(struct drm_encoder *encoder, int mode)
 145 {
 146 }
 147
 148 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 149                 unsigned long serial_clk, unsigned long di_clk)
 150 {
 151         int ret;
 152
 153         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 154                         clk_get_rate(ldb->clk_pll[chno]), serial_clk);
 155         clk_set_rate(ldb->clk_pll[chno], serial_clk);
 156
 157         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 158                         clk_get_rate(ldb->clk_pll[chno]));
 159
 160         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 161                         clk_get_rate(ldb->clk[chno]),
 162                         (long int)di_clk);
 163         clk_set_rate(ldb->clk[chno], di_clk);
 164
 165         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 166                         clk_get_rate(ldb->clk[chno]));
 167
 168         /* set display clock mux to LDB input clock */
 169         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
 170         if (ret)
 171                 dev_err(ldb->dev,
 172                         "unable to set di%d parent clock to ldb_di%d\n", mux,
 173                         chno);
 174 }
 175
 176 static void imx_ldb_encoder_prepare(struct drm_encoder *encoder)
 177 {
 178         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 179         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 180         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 181         u32 bus_format;
 182
 183         switch (imx_ldb_ch->bus_format) {
 184         default:
 185                 dev_warn(ldb->dev,
 186                          "could not determine data mapping, default to 18-bit \"spwg\"\n");
 187                 /* fallthrough */
 188         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 189                 bus_format = MEDIA_BUS_FMT_RGB666_1X18;
 190                 break;
 191         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 192                 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 193                 if (imx_ldb_ch->chno == 0 || dual)
 194                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
 195                 if (imx_ldb_ch->chno == 1 || dual)
 196                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
 197                 break;
 198         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 199                 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 200                 if (imx_ldb_ch->chno == 0 || dual)
 201                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
 202                                          LDB_BIT_MAP_CH0_JEIDA;
 203                 if (imx_ldb_ch->chno == 1 || dual)
 204                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
 205                                          LDB_BIT_MAP_CH1_JEIDA;
 206                 break;
 207         }
 208
 209         imx_drm_set_bus_format(encoder, bus_format);
 210 }
 211
 212 static void imx_ldb_encoder_commit(struct drm_encoder *encoder)
 213 {
 214         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 215         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 216         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 217         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 218
 219         drm_panel_prepare(imx_ldb_ch->panel);
 220
 221         if (dual) {
 222                 clk_prepare_enable(ldb->clk[0]);
 223                 clk_prepare_enable(ldb->clk[1]);
 224         }
 225
 226         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 227                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 228                 if (mux == 0 || ldb->lvds_mux)
 229                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
 230                 else if (mux == 1)
 231                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
 232         }
 233         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 234                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 235                 if (mux == 1 || ldb->lvds_mux)
 236                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
 237                 else if (mux == 0)
 238                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
 239         }
 240
 241         if (ldb->lvds_mux) {
 242                 const struct bus_mux *lvds_mux = NULL;
 243
 244                 if (imx_ldb_ch == &ldb->channel[0])
 245                         lvds_mux = &ldb->lvds_mux[0];
 246                 else if (imx_ldb_ch == &ldb->channel[1])
 247                         lvds_mux = &ldb->lvds_mux[1];
 248
 249                 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
 250                                    mux << lvds_mux->shift);
 251         }
 252
 253         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 254
 255         drm_panel_enable(imx_ldb_ch->panel);
 256 }
 257
 258 static void imx_ldb_encoder_mode_set(struct drm_encoder *encoder,
 259                          struct drm_display_mode *orig_mode,
 260                          struct drm_display_mode *mode)
 261 {
 262         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 263         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 264         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 265         unsigned long serial_clk;
 266         unsigned long di_clk = mode->clock * 1000;
 267         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 268
 269         if (mode->clock > 170000) {
 270                 dev_warn(ldb->dev,
 271                          "%s: mode exceeds 170 MHz pixel clock\n", __func__);
 272         }
 273         if (mode->clock > 85000 && !dual) {
 274                 dev_warn(ldb->dev,
 275                          "%s: mode exceeds 85 MHz pixel clock\n", __func__);
 276         }
 277
 278         if (dual) {
 279                 serial_clk = 3500UL * mode->clock;
 280                 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
 281                 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
 282         } else {
 283                 serial_clk = 7000UL * mode->clock;
 284                 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
 285                                   di_clk);
 286         }
 287
 288         /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
 289         if (imx_ldb_ch == &ldb->channel[0]) {
 290                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 291                         ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
 292                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 293                         ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
 294         }
 295         if (imx_ldb_ch == &ldb->channel[1]) {
 296                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 297                         ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
 298                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 299                         ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
 300         }
 301 }
 302
 303 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
 304 {
 305         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 306         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 307         int mux, ret;
 308
 309         /*
 310          * imx_ldb_encoder_disable is called by
 311          * drm_helper_disable_unused_functions without
 312          * the encoder being enabled before.
 313          */
 314         if (imx_ldb_ch == &ldb->channel[0] &&
 315             (ldb->ldb_ctrl & LDB_CH0_MODE_EN_MASK) == 0)
 316                 return;
 317         else if (imx_ldb_ch == &ldb->channel[1] &&
 318                  (ldb->ldb_ctrl & LDB_CH1_MODE_EN_MASK) == 0)
 319                 return;
 320
 321         drm_panel_disable(imx_ldb_ch->panel);
 322
 323         if (imx_ldb_ch == &ldb->channel[0])
 324                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 325         else if (imx_ldb_ch == &ldb->channel[1])
 326                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 327
 328         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 329
 330         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 331                 clk_disable_unprepare(ldb->clk[0]);
 332                 clk_disable_unprepare(ldb->clk[1]);
 333         }
 334
 335         if (ldb->lvds_mux) {
 336                 const struct bus_mux *lvds_mux = NULL;
 337
 338                 if (imx_ldb_ch == &ldb->channel[0])
 339                         lvds_mux = &ldb->lvds_mux[0];
 340                 else if (imx_ldb_ch == &ldb->channel[1])
 341                         lvds_mux = &ldb->lvds_mux[1];
 342
 343                 regmap_read(ldb->regmap, lvds_mux->reg, &mux);
 344                 mux &= lvds_mux->mask;
 345                 mux >>= lvds_mux->shift;
 346         } else {
 347                 mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
 348         }
 349
 350         /* set display clock mux back to original input clock */
 351         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
 352         if (ret)
 353                 dev_err(ldb->dev,
 354                         "unable to set di%d parent clock to original parent\n",
 355                         mux);
 356
 357         drm_panel_unprepare(imx_ldb_ch->panel);
 358 }
 359
 360 static const struct drm_connector_funcs imx_ldb_connector_funcs = {
 361         .dpms = drm_helper_connector_dpms,
 362         .fill_modes = drm_helper_probe_single_connector_modes,
 363         .detect = imx_ldb_connector_detect,
 364         .destroy = imx_drm_connector_destroy,
 365 };
 366
 367 static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
 368         .get_modes = imx_ldb_connector_get_modes,
 369         .best_encoder = imx_ldb_connector_best_encoder,
 370 };
 371
 372 static const struct drm_encoder_funcs imx_ldb_encoder_funcs = {
 373         .destroy = imx_drm_encoder_destroy,
 374 };
 375
 376 static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
 377         .dpms = imx_ldb_encoder_dpms,
 378         .prepare = imx_ldb_encoder_prepare,
 379         .commit = imx_ldb_encoder_commit,
 380         .mode_set = imx_ldb_encoder_mode_set,
 381         .disable = imx_ldb_encoder_disable,
 382 };
 383
 384 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
 385 {
 386         char clkname[16];
 387
 388         snprintf(clkname, sizeof(clkname), "di%d", chno);
 389         ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
 390         if (IS_ERR(ldb->clk[chno]))
 391                 return PTR_ERR(ldb->clk[chno]);
 392
 393         snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
 394         ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
 395
 396         return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
 397 }
 398
 399 static int imx_ldb_register(struct drm_device *drm,
 400         struct imx_ldb_channel *imx_ldb_ch)
 401 {
 402         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 403         int ret;
 404
 405         ret = imx_drm_encoder_parse_of(drm, &imx_ldb_ch->encoder,
 406                                        imx_ldb_ch->child);
 407         if (ret)
 408                 return ret;
 409
 410         ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
 411         if (ret)
 412                 return ret;
 413
 414         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 415                 ret = imx_ldb_get_clk(ldb, 1);
 416                 if (ret)
 417                         return ret;
 418         }
 419
 420         drm_encoder_helper_add(&imx_ldb_ch->encoder,
 421                         &imx_ldb_encoder_helper_funcs);
 422         drm_encoder_init(drm, &imx_ldb_ch->encoder, &imx_ldb_encoder_funcs,
 423                          DRM_MODE_ENCODER_LVDS, NULL);
 424
 425         drm_connector_helper_add(&imx_ldb_ch->connector,
 426                         &imx_ldb_connector_helper_funcs);
 427         drm_connector_init(drm, &imx_ldb_ch->connector,
 428                            &imx_ldb_connector_funcs, DRM_MODE_CONNECTOR_LVDS);
 429
 430         if (imx_ldb_ch->panel)
 431                 drm_panel_attach(imx_ldb_ch->panel, &imx_ldb_ch->connector);
 432
 433         drm_mode_connector_attach_encoder(&imx_ldb_ch->connector,
 434                         &imx_ldb_ch->encoder);
 435
 436         return 0;
 437 }
 438
 439 enum {
 440         LVDS_BIT_MAP_SPWG,
 441         LVDS_BIT_MAP_JEIDA
 442 };
 443
 444 struct imx_ldb_bit_mapping {
 445         u32 bus_format;
 446         u32 datawidth;
 447         const char * const mapping;
 448 };
 449
 450 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings[] = {
 451         { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,  18, "spwg" },
 452         { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,  24, "spwg" },
 453         { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, "jeida" },
 454 };
 455
 456 static u32 of_get_bus_format(struct device *dev, struct device_node *np)
 457 {
 458         const char *bm;
 459         u32 datawidth = 0;
 460         int ret, i;
 461
 462         ret = of_property_read_string(np, "fsl,data-mapping", &bm);
 463         if (ret < 0)
 464                 return ret;
 465
 466         of_property_read_u32(np, "fsl,data-width", &datawidth);
 467
 468         for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++) {
 469                 if (!strcasecmp(bm, imx_ldb_bit_mappings[i].mapping) &&
 470                     datawidth == imx_ldb_bit_mappings[i].datawidth)
 471                         return imx_ldb_bit_mappings[i].bus_format;
 472         }
 473
 474         dev_err(dev, "invalid data mapping: %d-bit \"%s\"\n", datawidth, bm);
 475
 476         return -ENOENT;
 477 }
 478
 479 static struct bus_mux imx6q_lvds_mux[2] = {
 480         {
 481                 .reg = IOMUXC_GPR3,
 482                 .shift = 6,
 483                 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
 484         }, {
 485                 .reg = IOMUXC_GPR3,
 486                 .shift = 8,
 487                 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
 488         }
 489 };
 490
 491 /*
 492  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
 493  * of_match_device will walk through this list and take the first entry
 494  * matching any of its compatible values. Therefore, the more generic
 495  * entries (in this case fsl,imx53-ldb) need to be ordered last.
 496  */
 497 static const struct of_device_id imx_ldb_dt_ids[] = {
 498         { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
 499         { .compatible = "fsl,imx53-ldb", .data = NULL, },
 500         { }
 501 };
 502 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
 503
 504 static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 505 {
 506         struct drm_device *drm = data;
 507         struct device_node *np = dev->of_node;
 508         const struct of_device_id *of_id =
 509                         of_match_device(imx_ldb_dt_ids, dev);
 510         struct device_node *child;
 511         const u8 *edidp;
 512         struct imx_ldb *imx_ldb;
 513         int dual;
 514         int ret;
 515         int i;
 516
 517         imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
 518         if (!imx_ldb)
 519                 return -ENOMEM;
 520
 521         imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
 522         if (IS_ERR(imx_ldb->regmap)) {
 523                 dev_err(dev, "failed to get parent regmap\n");
 524                 return PTR_ERR(imx_ldb->regmap);
 525         }
 526
 527         imx_ldb->dev = dev;
 528
 529         if (of_id)
 530                 imx_ldb->lvds_mux = of_id->data;
 531
 532         dual = of_property_read_bool(np, "fsl,dual-channel");
 533         if (dual)
 534                 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
 535
 536         /*
 537          * There are three different possible clock mux configurations:
 538          * i.MX53:  ipu1_di0_sel, ipu1_di1_sel
 539          * i.MX6q:  ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
 540          * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
 541          * Map them all to di0_sel...di3_sel.
 542          */
 543         for (i = 0; i < 4; i++) {
 544                 char clkname[16];
 545
 546                 sprintf(clkname, "di%d_sel", i);
 547                 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
 548                 if (IS_ERR(imx_ldb->clk_sel[i])) {
 549                         ret = PTR_ERR(imx_ldb->clk_sel[i]);
 550                         imx_ldb->clk_sel[i] = NULL;
 551                         break;
 552                 }
 553
 554                 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
 555         }
 556         if (i == 0)
 557                 return ret;
 558
 559         for_each_child_of_node(np, child) {
 560                 struct imx_ldb_channel *channel;
 561                 struct device_node *ddc_node;
 562                 struct device_node *ep;
 563
 564                 ret = of_property_read_u32(child, "reg", &i);
 565                 if (ret || i < 0 || i > 1)
 566                         return -EINVAL;
 567
 568                 if (dual && i > 0) {
 569                         dev_warn(dev, "dual-channel mode, ignoring second output\n");
 570                         continue;
 571                 }
 572
 573                 if (!of_device_is_available(child))
 574                         continue;
 575
 576                 channel = &imx_ldb->channel[i];
 577                 channel->ldb = imx_ldb;
 578                 channel->chno = i;
 579                 channel->child = child;
 580
 581                 /*
 582                  * The output port is port@4 with an external 4-port mux or
 583                  * port@2 with the internal 2-port mux.
 584                  */
 585                 ep = of_graph_get_endpoint_by_regs(child,
 586                                                    imx_ldb->lvds_mux ? 4 : 2,
 587                                                    -1);
 588                 if (ep) {
 589                         struct device_node *remote;
 590
 591                         remote = of_graph_get_remote_port_parent(ep);
 592                         of_node_put(ep);
 593                         if (remote)
 594                                 channel->panel = of_drm_find_panel(remote);
 595                         else
 596                                 return -EPROBE_DEFER;
 597                         of_node_put(remote);
 598                         if (!channel->panel) {
 599                                 dev_err(dev, "panel not found: %s\n",
 600                                         remote->full_name);
 601                                 return -EPROBE_DEFER;
 602                         }
 603                 }
 604
 605                 ddc_node = of_parse_phandle(child, "ddc-i2c-bus", 0);
 606                 if (ddc_node) {
 607                         channel->ddc = of_find_i2c_adapter_by_node(ddc_node);
 608                         of_node_put(ddc_node);
 609                         if (!channel->ddc) {
 610                                 dev_warn(dev, "failed to get ddc i2c adapter\n");
 611                                 return -EPROBE_DEFER;
 612                         }
 613                 }
 614
 615                 if (!channel->ddc) {
 616                         /* if no DDC available, fallback to hardcoded EDID */
 617                         dev_dbg(dev, "no ddc available\n");
 618
 619                         edidp = of_get_property(child, "edid",
 620                                                 &channel->edid_len);
 621                         if (edidp) {
 622                                 channel->edid = kmemdup(edidp,
 623                                                         channel->edid_len,
 624                                                         GFP_KERNEL);
 625                         } else if (!channel->panel) {
 626                                 /* fallback to display-timings node */
 627                                 ret = of_get_drm_display_mode(child,
 628                                                               &channel->mode,
 629                                                               OF_USE_NATIVE_MODE);
 630                                 if (!ret)
 631                                         channel->mode_valid = 1;
 632                         }
 633                 }
 634
 635                 channel->bus_format = of_get_bus_format(dev, child);
 636                 if (channel->bus_format == -EINVAL) {
 637                         /*
 638                          * If no bus format was specified in the device tree,
 639                          * we can still get it from the connected panel later.
 640                          */
 641                         if (channel->panel && channel->panel->funcs &&
 642                             channel->panel->funcs->get_modes)
 643                                 channel->bus_format = 0;
 644                 }
 645                 if (channel->bus_format < 0) {
 646                         dev_err(dev, "could not determine data mapping: %d\n",
 647                                 channel->bus_format);
 648                         return channel->bus_format;
 649                 }
 650
 651                 ret = imx_ldb_register(drm, channel);
 652                 if (ret)
 653                         return ret;
 654         }
 655
 656         dev_set_drvdata(dev, imx_ldb);
 657
 658         return 0;
 659 }
 660
 661 static void imx_ldb_unbind(struct device *dev, struct device *master,
 662         void *data)
 663 {
 664         struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
 665         int i;
 666
 667         for (i = 0; i < 2; i++) {
 668                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 669
 670                 if (!channel->connector.funcs)
 671                         continue;
 672
 673                 channel->connector.funcs->destroy(&channel->connector);
 674                 channel->encoder.funcs->destroy(&channel->encoder);
 675
 676                 kfree(channel->edid);
 677                 i2c_put_adapter(channel->ddc);
 678         }
 679 }
 680
 681 static const struct component_ops imx_ldb_ops = {
 682         .bind   = imx_ldb_bind,
 683         .unbind = imx_ldb_unbind,
 684 };
 685
 686 static int imx_ldb_probe(struct platform_device *pdev)
 687 {
 688         return component_add(&pdev->dev, &imx_ldb_ops);
 689 }
 690
 691 static int imx_ldb_remove(struct platform_device *pdev)
 692 {
 693         component_del(&pdev->dev, &imx_ldb_ops);
 694         return 0;
 695 }
 696
 697 static struct platform_driver imx_ldb_driver = {
 698         .probe          = imx_ldb_probe,
 699         .remove         = imx_ldb_remove,
 700         .driver         = {
 701                 .of_match_table = imx_ldb_dt_ids,
 702                 .name   = DRIVER_NAME,
 703         },
 704 };
 705
 706 module_platform_driver(imx_ldb_driver);
 707
 708 MODULE_DESCRIPTION("i.MX LVDS driver");
 709 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 710 MODULE_LICENSE("GPL");
 711 MODULE_ALIAS("platform:" DRIVER_NAME);